KR20190009245A - 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물 - Google Patents

반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물 Download PDF

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KR20190009245A
KR20190009245A KR1020180070386A KR20180070386A KR20190009245A KR 20190009245 A KR20190009245 A KR 20190009245A KR 1020180070386 A KR1020180070386 A KR 1020180070386A KR 20180070386 A KR20180070386 A KR 20180070386A KR 20190009245 A KR20190009245 A KR 20190009245A
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molybdenum
nitride film
forming
molybdenum nitride
substrate
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치유 주
키란 쉬레스타
페트리 라이자넨
마이클 유진 기븐스
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에이에스엠 아이피 홀딩 비.브이.
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Abstract

반도체 소자 구조물을 형성하는 방법이 제공된다. 상기 방법은 몰리브덴 할로겐화물 전구체를 포함하는 제1 기상 반응물에 기판을 접촉시키는 단계, 질소 전구체를 포함하는 제2 기상 반응물에 기판을 접촉시키는 단계, 및 환원 전구체를 포함하는 제3 기상 반응물에 기판을 접촉시키는 단계에 의한 원자층 증착에 의해, 기판에 몰리브덴 질화막을 형성하는 방법을 포함할 수 있다. 제공된 상기 방법은 몰리브덴 질화막을 포함하는 게이트 전극 구조물을 형성하는 단계를 포함하며, 상기 게이트 전극 구조물은 대략 5.0 eV보다 큰 유효 일함수를 갖는다. 몰리브덴 질화막을 포함하는 반도체 소자 구조물이 또한 제공된다.

Description

반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물{METHODS FOR FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND RELATED SEMICONDUCTOR DEVICE STRUCTURES}
관련 출원의 상호 참조
본 출원은, 그 내용이 본원에 참조로 통합되어 있고, "METHODS FOR FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND RELATED SEMICONDUCTOR DEVICE STRUCTURES"라는 명칭으로 2017년 7월 18일자로 출원된 미국 특허 가출원 제62/534,085호의 이익을 주장한다.
기술분야
본 개시는 일반적으로 몰리브덴 질화막을 포함하는 반도체 소자 구조물을 형성하는 방법 및 관련된 반도체 소자 구조물에 관한 것이다.
금속 산화물 반도체(MOS) 기술은 종래에 n형 도핑된 폴리실리콘을 게이트 전극 재료로서 사용하였다. 그러나, 도핑된 폴리실리콘은 어드밴스드 노드 응용을 위한 이상적인 게이트 전극 재료가 아닐 수 있다. 예를 들어, 도핑된 폴리실리콘은 도전성이지만, 바이어스 조건 하에서 캐리어들이 공핍될 수 있는 표면 영역이 여전히 있을 수 있다. 이 영역은 흔히 게이트 공핍으로 지칭되는 추가 게이트 절연체 두께로서 나타날 수 있고 동등한 산화물 두께에 기여할 수 있다. 게이트 공핍 영역은 수 옹스트롬(Å) 정도로 얇지만, 어드밴스드 노드 응용에서 게이트 산화물 두께가 감소함에 따라 게이트 산화물 두께가 감소함에 따라 게이트 공핍 영역의 두께는 유의해질 수 있다. 또 다른 예로서, 폴리실리콘은 NMOS 및 PMOS 소자 모두에 대해 이상적인 유효 일함수(effective work function, eWF)를 나타내지 않는다. 도핑된 폴리실리콘의 비이상적인 유효 일함수를 극복하기 위해, 문턱 전압 조절 이온 주입(threshold voltage adjustment implantation)이 사용될 수 있다. 그러나, 어드밴스드 노드 응용에서 소자의 기하학적 형상이 감소함에 따라, 문턱 전압 조절 이온 주입 공정은 점점 복잡해지고 비실용적이 될 수 있다.
도핑된 폴리실리콘 게이트 전극 관련 문제들을 극복하기 위해, 비이상적인 도핑된 폴리실리콘 게이트 재료는, 예를 들어, 전이 금속 질화물과 같은 대안적인 재료로 대체될 수 있다. 예를 들어, 전이 금속 질화물의 특성은 NMOS와 PMOS 소자 모두에 대해 보다 이상적인 유효 일함수를 갖는 게이트 전극 구조물을 제공하도록 변형될 수 있고, 여기서 게이트 전극의 유효 일함수, 예를 들어, 전자를 추출하는 데 필요한 에너지는 반도체 재료의 장벽 높이에 반드시 부합해야 한다. 예를 들어, PMOS 소자의 경우, 필요한 유효 일함수는 대략 5.0 eV이다.
따라서, 적절한 물리적 및 전기적 특성을 갖는 전이 금속 질화물을 포함하는 게이트 전극 구조물을 제공할 수 있는 방법 및 반도체 소자 구조물이 바람직하다.
본 발명의 내용은 선정된 개념들을 단순화된 형태로 소개하기 위해 제공된다. 이들 개념은 하기의 본 발명의 예시적 구현예의 상세한 설명에 더 상세하게 기재되어 있다. 이러한 요약은 청구된 요지의 주된 특징 또는 필수적인 특징을 구분하려는 의도가 아니며 청구된 요지의 범주를 제한하기 위해 사용하려는 의도 또한 아니다.
일부 구현예에서, 반도체 소자 구조물을 형성하는 방법이 제공된다. 상기 방법은: 원자층 증착에 의해 기판에 몰리브덴 질화막을 형성하는 단계; 및 몰리브덴 질화막을 포함하고 대략 5.0 eV보다 큰 유효 일함수를 갖는 게이트 전극 구조물을 형성하는 단계를 포함할 수 있으며, 몰리브덴 질화막을 형성하는 상기 단계는: 몰리브덴 할로겐화물 전구체를 포함하는 제1 기상 반응물과 기판을 접촉시키는 단계; 암모니아(NH3), 하이드라진(N2H4), 트리아제인(N3H5), 삼차부틸하이드라진(C4H9N2H3), 메틸하이드라진(CH3NHNH2) 및 디메틸하이드라진(CH3)2N2H2)을 포함하는 군으로부터 선택된 질소 전구체를 포함하는 제2 기상 반응물과 기판을 접촉시키는 단계; 수소 가스(H2), 실레인(SiH4), 디실레인(Si2H6), 트리실레인(Si3H8), 테트라실레인(Si4H8) 및 아세틸렌(C2H2)을 포함하는 군으로부터 선택된 환원 전구체를 포함하는 제3 기상 반응물과 기판을 접촉시키는 단계를 포함한다.
일부 구현예에서, 반도체 소자 구조물이 제공된다. 반도체 소자 구조물은 PMOS 트랜지스터 게이트 구조물을 포함할 수 있으며, PMOS 트랜지스터 게이트 구조물은 몰리브덴 질화막 및 몰리브덴 질화막과 반도체 바디 사이에 배치된 게이트 유전체를 포함하며, PMOS 게이트 구조물은 5.0 eV보다 큰 유효 일함수를 갖는다.
본 발명 및 선행 기술에 대하여 달성된 장점들을 요약하기 위한 목적으로, 본 발명의 특정 목적 및 장점들이 상기에서 본원에 기재되어 있다. 물론, 모든 목적이나 장점들이 본 발명의 임의의 특정 구현예에 따라 반드시 달성될 필요는 없다는 것을 이해하여야 한다. 따라서, 예를 들어, 당업자는, 본 발명이 본원에서 교시 또는 제안될 수 있는 다른 목적들 또는 장점들을 반드시 달성할 필요없이, 본원에 교시되거나 제안된 하나의 장점군을 달성하거나 최적화하는 방식으로 구현되거나 수행될 수 있다는 것을 인식할 것이다.
이들 구현예 모두는 본원에 개시된 본 발명의 범주 내에 있도록 의도된다. 이들 구현예 및 다른 구현예들은 첨부된 도면들을 참조하는 특정 구현예들의 다음의 상세한 설명으로부터 당업자에게 쉽게 자명해질 것이고, 본 발명은 개시된 임의의 특정 구현예(들)로 한정되지 않는다.
본 명세서는 본 발명의 구현예로 간주되는 것을 구체적으로 적시하고 명백하게 주장하는 청구범위로 결론을 내며, 본 개시의 구현예의 장점은 첨부한 도면들과 관련하여 읽을 때 본 개시 구현예의 특정 예에 대한 설명으로부터 더욱 쉽게 확인될 수 있는데, 도면들 중:
도 1은 본 개시의 구현예에 따라 형성된 반도체 소자 구조물의 단순화된 단면도이고;
도 2는 본 개시의 특정 구현예를 수행하도록 구성된 반응 시스템을 도시한다.
본원에 제시된 도시는 임의의 특정한 재료, 구조물, 또는 소자의 실제 도면을 의미하지 않으며, 본 개시의 구현예를 설명하기 위해 사용된 이상적인 묘사에 불과하다.
본원에서 사용된 용어 "원자층 증착"(ALD)은 증착 사이클, 바람직하게는 복수의 연속 증착 사이클이 공정 챔버에서 수행되는 증기 증착 공정을 지칭할 수 있다. 일반적으로, 각각의 사이클 동안, 전구체는 증착 표면(예를 들면, 기판 표면이나 이전 ALD 사이클로부터의 재료와 같은 이전에 증착된 하부 표면)에 화학 흡착되고, 추가적인 전구체와 쉽게 반응하지 않는(즉, 자기 제한 반응) 단일층 또는 서브-단일층을 형성한다. 그런후에, 필요한 경우, 증착 표면에서 화학 흡착된 전구체를 원하는 재료로 전환시키는 용도로, 반응물(예를 들어, 다른 전구체 또는 반응 가스)이 후속해서 공정 챔버에 유입될 수 있다. 일반적으로, 이러한 반응물은 전구체와 추가적으로 반응할 수 있다. 또한, 각 사이클 동안 공정 챔버로부터 과량의 전구체를 제거하고/제거하거나, 화학 흡착된 전구체의 변환 후 공정 챔버로부터 과량의 반응물 및/또는 반응 부산물을 제거하기 위해 퍼징(purging) 단계들이 사용될 수도 있다. 추가로, 본원에서 사용된 용어 "원자층 증착"은 "화학적 증기 원자층 증착", "원자층 에피택시(atomic layer epitaxy)"(ALE), 분자 빔 에피택시(molecular beam epitaxy)(MBE), 가스 공급원 MBE, 또는 유기금속 MBE, 및 전구체 조성물(들), 반응 가스, 및 퍼지(예를 들면, 불활성 캐리어) 가스의 교번 펄스(alternating pulses)로 수행되는 경우의 화학적 빔 에피택시와 같은 관련 용어들에 의해 지정된 공정을 포함하는 것을 또한 의미한다.
본원에서 사용된 바와 같이, 용어 "기판"은 사용될 수 있거나, 소자, 회로, 또는 막이 그 위에 형성될 수 있는 임의의 하부 재료(들)을 지칭할 수 있다.
몰리브덴 질화막(예를 들어, MoNx)에 대한 아래 첨자 "x"는 몰리브덴 질화물이 몰리브덴/질소 비의 변화에 따라 넓은 범위의 상을 가짐으로써 반드시 화학량론적이지 않음을 나타내기 위해 사용될 수 있다.
본 개시는 반도체 소자 구조물의 형성 방법 및 원자층 증착 공정에 의해 형성된 몰리브덴 질화막을 포함하는 반도체 소자 구조물 자체를 포함한다. 본 개시의 방법은, 게이트 전극 구조물의 구성 요소로서 몰리브덴 질화막을 사용하여 PMOS 소자 구조물에 보다 적합한 효과적인 일함수를 갖는 게이트 전극 구조물을 형성하는 단계를 포함할 수 있다. 본 개시는, 감소된 전기 비저항에 더하여 증가된 유효 일함수를 갖는 박막 몰리브덴 질화막을 포함하는 게이트 전극 구조물을 형성하는 방법을 또한 포함할 수 있다. 예를 들어, 게이트 전극 구조물의 유효 일함수는 그의 두께 함수로서 변할 수 있고, 즉 게이트 전극 구조물의 유효 일함수는 게이트 전극을 포함하는 재료들의 두께 감소에 따라 감소하거나 증가할 수 있다. 어드밴스드 노드 응용에서 소자의 기하학적 형상이 감소함에 따라, 대응하는 소자 막, 예를 들어 게이트 전극의 두께는 막의 유효 일함수 두께의 대응하는 변화에 따라 감소될 수도 있다. 감소된 두께에서 게이트 전극의 유효 일함수의 이러한 변화로 인해 PMOS 소자 구조물은 비이상적인 유효 일함수를 갖게 될 수 있다. 따라서 보다 바람직한 몰리브덴 질화막을 제공하기 위해 방법과 반도체 소자 구조물이 요구된다. 이러한 방법 및 반도체 소자 구조물의 예는 하기에 더 상세하게 기재되어 있다.
ALD는 통상적으로 자기 제한 반응에 기반하고, 이에 따라 반응물들의 순차 및 교번 펄스가 증착 사이클당 약 1 원자(또는 분자) 단일층의 재료를 증착하기 위해 사용된다. 증착 조건 및 전구체는 통상적으로 자가 포화 반응을 제공하도록 선택되어, 하나의 반응물의 흡착된 층이 동일한 반응물의 기상 반응물과 비반응성인 표면 종결부를 남긴다. 후속적으로 기판은 이전의 종결부와 반응하는 상이한 반응물과 접촉되어, 연속된 증착을 가능하게 한다. 따라서, 교번 펄스의 각각의 사이클은 통상적으로 원하는 재료를 약 1 단일층 이하로 남긴다. 그러나, 전술된 바와 같이, 당업자는 하나 이상의 ALD 사이클에서, 예를 들면 공정의 교번 특성에도 불구하고 몇몇 기상 반응이 발생하는 경우, 1 단일층보다 많은 재료가 증착될 수 있음을 인식할 것이다.
몰리브덴 질화막(MoNx)의 증착을 위한 ALD형 공정에서, 하나의 증착 사이클은, 기판을 제1 반응물에 노출시켜 반응 공간으로부터 임의의 미반응된 제1 반응물 및 반응 부산물을 제거하고, 제2 제거 단계가 후속하는 제2 반응물에 기판을 노출시키는 단계를 포함할 수 있다. 제1 반응물은 몰리브덴 전구체를 포함할 수 있고, 제2 반응물은 질소 전구체를 포함할 수 있다.
반응물들간의 기상 반응을 방지하고 자가 포화 표면 반응을 가능하게 하기 위하여 전구체들은 아르곤(Ar) 또는 질소(N2)와 같은 불활성 가스에 의해 분리될 수 있다. 그러나, 일부 구현예에서, 기판은 제1 기상 반응물 및 제2 기상 반응물과 개별적으로 접촉되도록 이동될 수 있다. 반응은 자가 포화되기 때문에, 기판의 엄격한 온도 제어 및 전구체의 정확한 투여량 제어는 대개 요구되지 않는다. 그러나, 기판 온도는 바람직하게는 입사 가스 종이 단일층으로 응축되지 않거나 표면에서 분해되지 않도록 한다. 잉여 화학 물질 및 반응 부산물이 존재하는 경우, 기판이 다음 반응 화학 물질과 접촉하기 전에 이들은, 예를 들어 반응 공간을 퍼징하거나 기판을 이동함으로써 기판 표면으로부터 제거된다. 원하지 않는 가스 분자들은 불활성 퍼징 가스의 도움으로 반응 공간으로부터 효과적으로 방출될 수 있다. 진공 펌프는 퍼징을 돕는 데 사용될 수 있다.
일부 구현예에 따라, ALD 공정은 집적 회로 작업물과 같은 기판에 몰리브덴 질화막을 형성하는 데 사용된다. 본 개시의 일부 구현예에서, 각각의 ALD 사이클은 구별된 두 개의 증착 단계 또는 상을 포함한다. 증착 사이클의 제1 단계("몰리브덴 단계")에서, 증착이 요구되는 기판 표면은 기판 표면에 화학 흡착하는 몰리브덴 전구체를 포함하는 제1 기상 반응물과 접촉되어, 기판 표면에 반응물 종의 약 1 단일층 이하를 형성한다.
일부 구현예에서, 본원에서 "몰리브덴 화합물"로 또한 지칭된 몰리브덴 전구체는 몰리브덴 할로겐화물 및 할로겐 리간드로 종결될 수 있는 흡착된 단일층을 포함할 수 있다. 따라서, 몰리브덴 전구체는 몰리브덴 트리클로라이드(MoCl3), 몰리브덴 테트라클로라이드(MoCl4), 몰리브덴 펜타클로라이드(MoCl5) 또는 몰리브덴 헥사클로라이드(MoCl6) 중 하나 이상을 더 포함할 수 있는 염화 몰리브덴을 포함할 수 있다. 몰리브덴 전구체는, 예를 들어, 몰리브덴 헥사플루오라이드(MoF6)와 같은 플루오르화 몰리브덴을 또한 포함할 수 있다. 몰리브덴 전구체는, 예를 들어, 몰리브덴 헥사카르보닐(Mo(CO)6)과 같은 몰리브덴 카르보닐을 더 포함할 수 있다. 본 개시의 일부 구현예에서, 몰리브덴 전구체는 예를 들어 테트라클로로(시클로 펜타디에닐) 몰리브덴과 같은 유기 몰리브덴 전구체를 포함할 수 있다. 일부 구현예에서, 몰리브덴 전구체는 하나 이상의 할라이드 리간드(예를 들어, 클로라이드 또는 플루오라이드), 또는 하나 이상의 금속-유기 리간드, 또는 적어도 하나의 유기 금속 리간드를 포함할 수 있거나, 심지어 시클릭 리간드(예를 들어, 시클로 펜타디에닐)를 포함할 수 있다. 일부 구현예에서, 기판을 몰리브덴 전구체에 노출시키는 단계는 20초 미만의 시간 동안, 또는 15초 미만의 시간 동안, 또는 10초 미만의 시간 동안, 또는 심지어 5초 미만의 시간 동안 기판 위에 몰리브덴 전구체(예를 들어, 몰리브덴 펜타클로라이드)를 펄싱하는 단계를 포함할 수 있다. 추가적으로, 몰리브덴 전구체를 기판 위에 펄싱하는 동안 금속 전구체의 유량은 1000 sccm 미만, 또는 500 sccm 미만, 또는 300 sccm 미만, 또는 심지어 100 sccm 미만일 수 있다.
과량의 몰리브덴 공급원 재료 및 반응 부산물은(존재하는 경우), 예를 들어, 불활성 가스로 퍼징함으로써 기판 표면으로부터 제거될 수 있다. 과량의 몰리브덴 공급원 재료 및 임의의 반응 부산물은 펌핑 시스템에 의해 발생된 진공의 도움으로 제거될 수 있다.
증착 사이클의 제2 단계("질소 단계")에서, 기판은 질소 전구체를 포함하는 제2 반응물과 접촉하게 된다. 본 개시의 일부 구현예에서, 질소 전구체는 질소계 플라즈마(예를 들어, 질소 라디칼, 이온 및 원자를 포함하는 플라즈마)를 포함할 수 있고, 질소계 플라즈마는 원격 플라즈마 또는 대안적으로 직접 플라즈마에 의해 생성될 수 있다. 본 개시의 일부 구현예에서, 상기 방법은 암모니아(NH3), 하이드라진(N2H4), 트리아제인(N3H5), 삼차부틸하이드라진(C4H9N2H3), 메틸하이드라진(CH3NHNH2) 및 디메틸하이드라진((CH3)2N2H2) 중 적어도 하나를 포함하도록 질소 전구체를 선택하는 단계를 더 포함할 수 있다.
기판을 질소 전구체에 노출시키는 단계는 20초 미만의 시간 간격 동안, 또는 15초 미만의 시간 기간 동안, 또는 10초 미만의 시간 동안, 또는 심지어 5초 미만의 시간 동안, 기판 위에 질소 전구체(예를 들어, 암모니아)를 펄싱하는 단계를 포함할 수 있다. 질소 전구체를 기판 위에 펄싱하는 동안, 질소 전구체의 유량은 1000 sccm 미만, 또는 500 sccm 미만, 또는 300 sccm 미만, 또는 심지어 100 sccm 미만일 수 있다.
질소 전구체를 포함하는 제2 기상 반응물은 기판 표면에 남아 있는 몰리브덴 함유 분자와 반응할 수 있다. 바람직하게는, 제2 단계에서, 질소는 몰리브덴 공급원 재료에 의해 남겨진 단일층과 제2 기상 반응물의 상호 작용에 의해 막으로 혼입된다. 일부 구현예에서, 질소 전구체 및 화학 흡착된 몰리브덴 금속 종을 포함하는 제2 기상 반응물 사이의 반응은 기판 위에 몰리브덴 질화 박막(MoNx)을 생성한다.
과량의 제2 공급원 화학 물질 및 반응 부산물이 존재하는 경우, 이들은 예를 들어 퍼징 가스 펄스 및/또는 펌핑 시스템에 의해 발생된 진공에 의해 기판 표면으로부터 제거된다. 퍼징 가스는 임의의 불활성 가스, 예를 들어 아르곤(Ar), 질소(N2) 또는 헬륨(He)인 것이 바람직하며 이들로 제한되지는 않는다. 퍼지(즉, 퍼징 가스 펄스) 또는 다른 반응물 제거 단계가 개재되는 경우, 하나의 단계는 일반적으로 다른 단계를 바로 따르는 것으로 간주된다.
기판이 제1 기상 반응물(즉, 몰리브덴 전구체) 및 제2 기상 반응물(즉, 질소 전구체)과 교번하여 접촉되는 증착 사이클은 원하는 두께의 몰리브덴 질화물(MoNx)이 증착될 때까지 1회 이상 반복될 수 있다. 본 개시의 일부 구현예에서, 기판이 제1 기상 반응물 및 제2 기상 반응물과 접촉하는 순서는, 기판이 제2 기상 반응물과 먼저 접촉하고 이어서 제1 기상 반응물과 접촉하는 순서일 수 있는 것으로 이해되어야 한다. 추가적으로, 일부 구현예에서, ALD 공정은 기판이 제1 기상 반응물과 1회 이상 접촉하고 이어서 기판이 제2 기상 반응물과 1회 이상 접촉하는 것을 포함할 수 있으며, 유사하게 대안적으로 기판이 제2 기상 반응물과 1회 이상 접촉하고 이어서 기판이 제1 기상 반응물과 1회 이상 접촉하는 것을 포함할 수 있다.
본 개시의 일부 구현예에서, 몰리브덴 질화막(MoNx)을 증착하기 위한 ALD 공정은 제3 단계를 추가로 포함할 수 있다. 예를 들어, 일부 구현예에서 하나의 증착 사이클은 기판을 제1 반응물에 노출시키고, 임의의 미반응된 제1 반응물 및 반응 부산물을 반응 공간으로부터 제거하고, 기판을 제2 반응물에 노출시킨 다음 제2 제거 단계가 이어지고, 기판을 제3 반응물에 노출시킨 다음 제3 제거 단계가 이어지는 것을 포함할 수 있다. 제1 반응물은 몰리브덴 전구체를 포함할 수 있고, 제2 반응물은 본원에서 전술한 바와 같은 질소 전구체를 포함할 수 있다. 일부 구현예에서, 제3 단계는 몰리브덴 질화막(MoNx)을 증착시키기 위한 ALD 공정에서 사용될 수 있고, 제3 단계는 환원 전구체를 포함할 수 있다.
증착 사이클의 제3 단계("환원 단계")에서, 기판은 환원 전구체를 포함하는 제3 기상 반응물과 접촉된다. 본 개시의 일부 구현예에서, 방법은 수소(H2), 실레인(SiH4), 디실레인(Si2H6), 트리실레인(Si3H8), 테트라실레인(Si4H10) 또는 일반 실험식 SixH(2x+2)를 갖는 고차 실레인 중 적어도 하나를 포함하도록 환원 전구체를 선택하는 단계를 더 포함할 수 있다. 일반적으로는, 환원 전구체는, 예를 들어, 아세틸렌(C2H2)과 같은 환원제를 포함하는 전구체를 포함할 수 있다. 본 개시의 일부 구현예에서, 환원 전구체는 수소 원자, 수소 라디칼, 수소 플라즈마 및 수소 이온을 포함할 수 있는 수소(H2)계 플라즈마를 포함할 수 있다. 예를 들어, 수소(H2)계 플라즈마는 직접 플라즈마 또는 대안적으로 원격 플라즈마를 사용하여 생성될 수 있다. 본 개시의 대안적인 구현예에서, 환원 전구체는 수소 플라즈마, 수소 라디칼, 수소 원자 또는 수소 이온을 포함하지 않을 수 있다. 예를 들어, 환원 전구체는 직접 플라즈마, 원격 플라즈마, 열선 또는 수소 분자 해리를 위한 대안적 수단에 의해 생성되지 않을 수 있다.
일부 구현예에서, 기판을 질소 전구체에 노출시키는 단계는 60초 미만의 시간 동안, 또는 30초 미만의 시간 동안, 또는 10초 미만의 시간 동안, 또는 5초 미만의 시간 동안, 또는 심지어 1초 미만의 시간 동안 기판 위에 질소 전구체를 펄싱하는 단계를 포함할 수 있다. 환원 전구체를 기판 위에 펄싱하는 동안, 환원 전구체의 유량은 1000 sccm 미만, 또는 500 sccm 미만, 또는 300 sccm 미만, 또는 100 sccm 미만일 수 있다.
환원 전구체를 포함하는 제3 기상 반응물은 기판 표면에 남아 있는 몰리브덴 질화막과 반응할 수 있다. 바람직하게는, 제3 단계에서, 환원 전구체를 포함하는 제3 기상 반응물은 몰리브덴 질화막(MoNx)과 상호 작용한다. 일부 구현예에서, 환원 전구체를 포함하는 제3 기상 반응물과 몰리브덴 질화막 사이의 상호 작용은 몰리브덴 질화막의 전기 비저항을 감소시킨다. 예를 들어, 본 개시의 일부 구현예에서, 환원 전구체를 포함하는 제3 기상 반응물을 사용하는 단계는 3000 μΩ-cm 미만, 또는 2000 μΩ-cm 미만, 또는 1200 μΩ-cm 미만, 또는 800 μΩ-cm 미만, 또는 600 μΩ-cm 미만, 또는 400 μΩ-cm 미만, 또는 심지어 200 μΩ-cm 미만의 전기 비저항을 갖도록 몰리브덴 질화막을 형성하는 단계를 포함할 수 있다.
과량의 제3 공급원 화학 물질 및 반응 부산물이 존재하는 경우, 이들은 예를 들어 퍼징 가스 펄스 및/또는 펌핑 시스템에 의해 만들어진 진공에 의해 기판 표면으로부터 제거된다. 퍼징 가스는 임의의 불활성 가스, 예를 들어 아르곤(Ar), 질소(N2) 또는 헬륨(He)인 것이 바람직하며 이들로 제한되지는 않는다. 퍼지(즉, 퍼징 가스 펄스) 또는 다른 반응물 제거 단계가 개재되는 경우, 하나의 단계는 일반적으로 다른 단계를 바로 따르는 것으로 간주된다.
본원에 기술된 예시적인 실시 구현예에서, ALD 증착 사이클은, 기판을 제1 기상 반응물과 접촉시킨 다음 제1 퍼징 사이클을 수행하고, 기판을 제2 기상 반응물과 접촉시킨 후 제2 퍼징 사이클을 수행하고, 기판을 제 3 기상 반응물과 접촉시킨 후 제3 퍼징 사이클을 수행하는 시퀀스를 포함할 수 있다. 본 개시의 다른 구현예에서, ALD 증착 사이클은 제1, 제2 및 제3 기상 반응물을 기판과 교번하여 접촉시키고, 퍼징 사이클을 개재하는 시퀀스에 의해 수행될 수 있다. 또한, ALD 증착 사이클은 후속하는 퍼징 사이클에 앞서, 각각의 접촉단계를 한 번 이상 반복하는 것을 포함할 수 있다.
본 개시의 일부 구현예에서, 환원 전구체를 포함하는 제3 기상 반응물에 기판을 접촉시키는 것을 포함하는 증착 사이클의 제3 단계는 증착 사이클의 제1 단계 및/또는 제2 단계와 동시에 수행될 수 있다. 예를 들어, ALD에 의해 기판에 몰리브덴 질화막을 형성하는 단계는, 몰리브덴 전구체 및 환원 전구체가 동시에 기판과 접촉하도록, 선택적으로 기판을 환원 전구체와 접촉시키는 동안 기판을 몰리브덴 전구체와도 접촉시키는 단계를 포함할 수 있다. 또한, 일부 구현예에서, ALD에 의해 기판에 몰리브덴 질화막을 형성하는 단계는, 질소 전구체 및 환원 전구체가 동시에 기판과 접촉하도록, 선택적으로 기판을 환원 전구체와 접촉시키는 동안 기판을 질소 전구체와도 접촉시키는 단계를 포함할 수 있다.
(선택적인 환원 전구체를 갖는)몰리브덴 전구체 및 질소 전구체를 사용하여 몰리브덴 질화물(MoNx)을 형성하는 본원에서 설명된 ALD 공정은, ALD 증착 시스템에서 가열된 기판으로 수행될 수 있다. 예를 들어, 일부 구현예에서, 상기 방법은 기판을 400℃를 초과하는 온도까지 가열하거나, 또는 기판을 450℃를 초과하는 온도까지 가열하거나, 또는 기판을 500℃를 초과하는 온도까지 가열하거나, 심지어 기판을 550℃를 초과하는 온도까지 가열하는 단계를 포함할 수 있다.
ALD에 의한 몰리브덴 질화막의 증착률은 통상적으로 Å/펄싱 사이클로 표현되며, 예를 들어, 표면에서 이용 가능한 반응성 표면 부위 또는 활성 부위의 수 및 화학 흡착 분자의 벌키성(bulkiness)을 포함하는 다수의 인자들에 의해 결정된다. 일부 구현예에서, 이러한 몰리브덴 질화막의 증착률은 약 0.1 Å/펄싱 사이클 내지 약 5.0 Å/펄싱 사이클의 범위일 수 있다. 일부 구현예에서, 증착률은 약 0.1, 0.2, 0.3, 0.5, 1.0, 1.5, 2.0, 2.5, 3.0, 3.5, 4.0, 4.5, 5.0 Å/펄싱 사이클일 수 있다.
본 개시의 구현예에 의해 형성된 몰리브덴 질화물은 MoNx의 형태를 취할 수 있다(x는 대략 0.75 내지 대략 1.8의 범위, x는 대략 0.8 내지 대략 1.5의 범위, x는 대략 0.9 내지 대략 1.3의 범위, 또는 대안적으로 x는 대략 0.95 내지 대략 1.2의 범위일 수 있음). MoNx 에 대한 원소 조성 범위는, 약 30원자% 내지 약 60원자%, 또는 약 35원자% 내지 약 55원자%, 또는 심지어 약 40원자% 내지 약 50원자%의 Mo를 포함할 수 있다. 대안적으로, MoNx 에 대한 원소 조성 범위는, 약 25원자% 내지 약 65원자%의 N, 약 30원자% 내지 약 60원자%의 N, 또는 심지어 약 35원자% 내지 약 55원자%의 N을 포함할 수 있다. 추가적인 구현예에서, MoNx는 약 20원자% 미만의 산소, 약 10원자% 미만의 산소, 약 5원자% 미만의 산소, 또는 심지어 약 2원자% 미만의 산소를 포함할 수 있다. 다른 구현예에서, MoNx는 약 10원자% 미만의 수소, 약 5원자% 미만의 수소, 또는 약 2원자% 미만의 수소, 또는 심지어 약 1원자% 미만의 수소를 포함할 수 있다. 일부 구현예에서, MoNx는 약 10원자% 미만의 할로겐화물/Cl, 약 5원자% 미만의 할로겐화물/Cl, 약 1원자% 미만의 할로겐화물/Cl, 또는 심지어 약 0.5원자% 미만의 할로겐화물/Cl을 포함할 수 있다. 또 다른 구현예에서, MoNx는 약 10원자% 미만의 탄소, 약 5원자% 미만의 탄소, 또는 약 2원자% 미만의 탄소, 또는 약 1원자% 미만의 탄소, 또는 심지어 약 0.5원자% 미만의 탄소를 포함할 수 있다. 본원에 개요된 구현예에서, 원소의 원자 농도는 러더퍼드 후방산란(RBS)을 사용하여 결정될 수 있다.
본 발명의 일부 구현예에서, 본 개시의 원자층 증착 공정에 의해 형성된 몰리브덴 질화막은 입방 결정형 구조를 가질 수 있는 반면, 대안적인 구현예에서는 본 개시의 방법에 의해 형성된 몰리브덴 질화막이 정방 결정형 구조를 가질 수 있다.
본 개시의 일부 구현예에서, 몰리브덴 질화막을 형성하는 단계는 몰리브덴 질화막을 100 Å 미만의 두께로, 또는 50 Å 미만의 두께로 또는, 30 Å 미만의 두께로 형성하는 단계를 포함할 수 있다.
본원에 기재된 ALD 공정에 의해 형성된 몰리브덴 질화막은 게이트 전극 구조물의 형성과 같은 다양한 상황에 사용될 수 있다. 당업자는 본원에 기재되어 있는 공정들이 FinFETs와 같은 다중 게이트 전극뿐만 아니라 평면 소자들을 포함하는 PMOS 트랜지스터의 제조를 포함하는 많은 상황에 적용 가능하다고 인식할 것이다.
비한정적인 실시예로서, 도 1을 참조하면, 반도체 소자 구조물(100)은 트랜지스터 구조물을 포함할 수 있고, 공급원 영역(102), 드레인 영역(104), 및 그 사이의 채널 영역(106) 포함할 수 있다. 트랜지스터 게이트 구조물(108)은 게이트 유전체(112)에 의해 채널 영역(106)과 분리될 수 있는 게이트 전극(110)을 포함할 수 있다. 본 개시의 교시에 따르면, 게이트 전극(110)은 본원에 기재되어 있는 원자층 증착 공정에 의해 형성된 몰리브덴 질화막을 포함할 수 있다. 도 1에 도시된 바와 같이, 일부 구현예에서, 트랜지스터 게이트 구조물(108)은 게이트 전극(110)에 형성된 하나 이상의 추가적인 전도층(114)을 더 포함할 수 있다. 하나 이상의 추가적인 전도층(114)은 폴리실리콘, 내화 금속, 전이 금속 탄화물 및 전이 금속 질화물 중 적어도 하나를 포함할 수 있다.
일부 구현예에서, 반도체 소자 구조물(100)은 PMOS 트랜지스터를 포함할 수 있고, PMOS 트랜지스터는 트랜지스터 게이트 구조물(108)을 더 포함할 수 있다. PMOS 트랜지스터 게이트 구조물(108)은 몰리브덴 질화막을 포함하는 게이트 전극(110) 및 몰리브덴 질화막과 반도체 바디(116) 사이에 배치된 게이트 유전체(112)를 포함할 수 있다.
비한정적인 예시적인 구현예로서, 반도체 소자 구조물(100)은 실리콘(Si) 반도체 바디(116), 산화 하프늄(HfO2) 게이트 유전체(112), 질화 몰리브덴(MoNx) 게이트 전극(110) 및 질화 티타늄(TiN)을 포함하는 추가 전도층(114)을 포함할 수 있다.
본 개시의 일부 구현예에서, 반도체 소자 구조물(100)과 같은 반도체 소자 구조물을 형성하는 단계는, 대략 4.9 eV보다 크거나, 대략 5.0 eV보다 크거나, 대략 5.1 eV보다 크거나, 대략 5.2 eV보다 크거나, 대략 5.3 eV보다 크거나, 심지어 대략 5.4 eV보다 큰 유효 일함수를 갖는 몰리브덴 질화막을 포함하는 게이트 전극 구조물을 형성하는 단계를 포함할 수 있다. 일부 구현예에서, 상기에서 주어진 유효 일함수 값은 대략 100 Å 미만, 또는 대략 50 Å 미만, 또는 대략 40 Å 미만, 또는 심지어 대략 30 Å 미만의 두께를 갖는 몰리브덴 질화막을 포함하는 전극 구조물에서 입증될 수 있다. 본 개시의 구현예는 증가된 유효 일함수를 갖는 몰리브덴 질화막을 포함하는 게이트 전극 구조물의 형성을 가능하게 하고, 예를 들어, 일부 구현예에서, 상기 방법들은 100 Å 미만의 두께와 대략 5.0 eV보다 큰 유효 일함수를 갖는 몰리브덴 질화막을 포함하는 게이트 전극 구조물을 형성하는 단계를 포함할 수 있음을 주목하여야 한다. 또 다른 구현예에서, 상기 방법들은 100 Å 미만의 두께와 5.4 eV보다 큰 유효 일함수를 갖는 몰리브덴 질화물 게이트 전극을 포함하는 게이트 전극 구조물을 형성하는 단계를 포함할 수 있다. 또 다른 구현예에서, 상기 방법들은 30 Å 미만의 두께와 5.0 eV보다 큰 유효 일함수를 갖는 질화 몰리브덴 게이트 전극을 포함하는 게이트 전극 구조물을 형성하는 단계를 포함할 수 있다.
본 개시의 구현예는 또한 본 개시의 몰리브덴 질화막을 형성하도록 구성된 반응 시스템을 포함할 수 있다. 보다 상세하게는, 도 2는 소정의 압력, 온도, 및 주변 조건 하에 기판(미도시)을 유지하고, 다양한 가스에 기판을 선택적으로 노출시키기 위한 메커니즘을 더 포함하는 반응 챔버(202)를 포함하는 반응 시스템(200)을 개략적으로 도시한다. 전구체 반응물 공급원(204)은 도관 또는 다른 적절한 수단(204A)에 의해 반응 챔버(202)에 결합될 수 있고, 매니폴드, 밸브 제어 시스템, 질량 유량 제어 시스템, 또는 전구체 반응물 공급원(204)으로부터 유래된 기상 전구체를 제어하기 위한 메커니즘에 추가로 결합될 수 있다. 전구체 반응물 공급원(204)에 의해 공급된 전구체(미도시)인 반응물(미도시)은 실온 및 표준 대기압 조건하에서 액체 또는 고체일 수 있다. 이러한 전구체는, 전구체 공급원 챔버 내에서의 기화 온도 또는 그 이상으로 유지될 수 있는 반응물 공급원 진공 용기 내에서 기화될 수 있다. 이러한 구현예에서, 기화된 전구체는 캐리어 가스(예컨대, 비활성 또는 불활성 가스)와 함께 운반된 다음 도관(204A)을 통해 반응 챔버(202) 내로 공급될 수 있다. 다른 구현예에서, 전구체는 표준 조건 하의 증기일 수 있다. 이러한 구현예에서, 전구체는 기화될 필요가 없으며, 캐리어 가스를 필요로 하지 않을 수 있다. 예를 들어, 일 구현예에서, 전구체는 가스 실린더 내에 저장될 수 있다. 반응 시스템(200)은 또한 추가적인 전구체 반응물 공급원을 또한 포함할 수 있는데, 이러한 전구체 반응물 공급원(206)은 또한 전술한 바와 같이 도관(206A)에 의해 반응 챔버에 결합될 수 있다.
퍼지 가스 공급원(208)은 도관(208A)을 통해 반응 챔버(202)에 결합될 수 있으며, 다양한 불활성 또는 비활성(noble) 가스를 반응 챔버(202)로 선택적으로 공급하여 반응 챔버로부터 전구체 가스 또는 폐가스의 제거를 돕는다. 공급될 수 있는 다양한 불활성 또는 비활성 가스는 고체, 액체 또는 저장된 기체 형태로부터 유래될 수 있다.
도 2의 반응 시스템(200)은 또한, 반응 시스템(200)에 포함된 밸브, 매니폴드, 펌프 및 기타 설비를 선택적으로 작동시키기 위한 전자 회로 및 기계적 구성 요소를 제공하는 시스템 작동 및 제어 메커니즘(210)을 포함할 수 있다. 이러한 회로 및 구성 요소는 전구체 공급원(204, 206) 및 퍼지 가스 공급원(208)으로부터 전구체, 퍼지 가스를 각각 도입하도록 작동한다. 시스템 작동 및 제어 메커니즘(210)은 가스 펄스 시퀀스의 시점, 기판과 반응 챔버의 온도, 반응 챔버의 압력, 및 반응 시스템(200)이 적절하게 작동하는데 필요한 다양한 기타 작동을 또한 제어한다. 작동 및 제어 메커니즘(210)은 반응 챔버(202) 내부 및 외부로의 전구체, 반응물 및 퍼지 가스의 유동을 제어하기 위한 제어 소프트웨어 및 전기적 또는 공기압 제어 밸브를 포함할 수 있다. 제어 시스템은 소프트웨어 또는 하드웨어 구성 요소, 예를 들어 특정 작업을 수행하는 FPGA 또는 ASIC과 같은 모듈을 포함할 수 있다. 유리하게는, 모듈은 제어 시스템의 어드레스 가능한 저장 매체에 탑재되어 하나 이상의 공정을 실행하도록 구성될 수 있다.
관련 기술분야의 당업자는, 상이한 수 및 종류의 전구체 반응물 공급원 및 퍼지 가스 공급원을 포함하여 본 반응 시스템의 다른 구성이 가능함을 이해한다. 또한, 당업자는 가스를 반응 챔버(202) 내로 선택적으로 공급하는 목적을 달성하는데 사용될 수 있는 밸브, 도관, 전구체 공급원, 퍼지 가스 공급원의 많은 배열이 존재함을 이해할 것이다. 또한, 반응 시스템을 개략적으로 표현하면서, 많은 구성 요소가 도면의 단순화를 위해 생략되었는데, 이러한 구성 요소는 예를 들면 다양한 밸브, 매니폴드, 정화기, 히터, 용기, 환기 장치, 및/또는 측관을 포함할 수 있다.
상기 기재된 본 개시의 구현예는 본 발명의 구현예의 예시일뿐이므로 이들 구현예는 첨부된 청구범위 및 그의 법적 등가물에 의해 정의된 본 발명의 범주를 제한하지 않는다. 임의의 등가적인 구현예는 본 발명의 범주 내에 있도록 의도된다. 실제로, 본원에 도시되고 기재된 것 외에도, 기재된 요소들의 선택적인 유용한 조합과 같은 본 개시의 다양한 변경은 본원의 설명으로부터 당업자에게 자명해질 수 있다. 이러한 변경 및 구현예 또한 첨부된 청구범위의 범주 내에 있는 것으로 의도된다.

Claims (18)

  1. 반도체 소자 구조물을 형성하는 방법으로서, 상기 방법은:
    원자층 증착에 의해 기판에 몰리브덴 질화막을 형성하는 단계; 및
    상기 몰리브덴 질화막을 포함하며, 대략 5.0 eV보다 큰 유효 일함수를 갖는 게이트 구조물을 형성하는 단계를 포함하되, 상기 몰리브덴 질화막을 형성하는 단계는:
    몰리브덴 할로겐화물 전구체를 포함하는 제1 기상 전구체와 기판을 접촉시키는 단계;
    암모니아(NH3), 하이드라진(N2H4), 트리아제인(N3H5), 삼차부틸하이드라진(C4H9N2H3), 메틸하이드라진(CH3NHNH2), 및 디메틸하이드라진((CH3)2N2H2)을 포함하는 군으로부터 선택된 질소 전구체를 포함하는 제2 기상 반응물과 기판을 접촉시키는 단계; 및
    수소 가스(H2), 실레인(SiH4), 디실레인(Si2H6), 트리실레인(Si3H8), 테트라실레인(Si4H8), 및 아세틸렌(C2H2)을 포함하는 군으로부터 선택된 환원 전구체를 포함하는 제3 기상 반응물과 기판을 접촉시키는 단계를 포함하는, 방법.
  2. 제1항에 있어서, 상기 염화 몰리브덴 전구체는 몰리브덴 트리클로라이드(MoCl3), 몰리브덴 테트라클로라이드(MoCl4), 몰리브덴 펜타클로라이드(MoCl5), 몰리브덴 헥사클로라이드(MoCl6), 몰리브덴 헥사플로라이드(MoF6), 및 테트라클로로(시클로펜타디에닐)몰리브덴을 포함하는 군으로부터 선택되는, 방법.
  3. 제1항에 있어서, 상기 몰리브덴 질화막을 형성하는 단계는, 상기 기판이 상기 제1 기상 반응물, 상기 제2 기상 반응물 및 상기 제3 기상 반응물과 교번적으로 및 순차적으로 접촉되는 적어도 하나의 증착 사이클을 포함하는, 방법.
  4. 제3항에 있어서, 상기 증착 사이클은 1회 이상 반복되는, 방법.
  5. 제1항에 있어서, 상기 몰리브덴 질화막은 대략 100 Å미만의 두께를 갖는, 방법.
  6. 제1항에 있어서, 상기 몰리브덴 질화막은 대략 50 Å 미만의 두께를 갖는, 방법.
  7. 제1항에 있어서, 상기 몰리브덴 질화막은 1200 μΩ-cm 미만의 전기 비저항을 갖는, 방법.
  8. 제1항에 있어서, 상기 게이트 전극 구조물을 형성하는 단계는 5.4 eV보다 큰 유효 일함수를 갖는 게이트 전극 구조물을 형성하는 단계를 더 포함하는, 방법.
  9. 제1항에 있어서, 상기 몰리브덴 질화막을 형성하는 단계는 상기 기판을 대략 400℃를 초과하는 온도까지 가열하는 단계를 더 포함하는, 방법.
  10. 제1항에 있어서, 상기 몰리브덴 질화막을 포함하는 상기 게이트 전극 구조물을 형성하는 단계는 대략 5.0 eV보다 큰 유효 일함수를 갖는 게이트 전극 구조물을 형성하는 단계를 포함하고, 30 Å 미만의 두께를 갖는 게이트 전극 구조물을 형성하는 단계를 더 포함하는, 방법.
  11. 제1항에 있어서, 상기 몰리브덴 질화막을 포함하는 상기 게이트 전극 구조물을 형성하는 단계는 대략 5.0 eV보다 큰 유효 일함수를 갖는 게이트 전극 구조물을 형성하는 단계를 포함하고, 1200 μΩ-cm 미만의 전기 비저항을 갖는 게이트 전극 구조물을 형성하는 단계를 더 포함하는, 방법.
  12. 제1항의 몰리브덴 질화막을 형성하도록 구성된 반응 시스템.
  13. 반도체 소자 구조물로서,
    몰리브덴 질화막;
    반도체 바디; 및
    상기 몰리브덴 질화막과 상기 반도체 바디 사이에 배치된 게이트 유전체를 포함하는 PMOS 트랜지스터 게이트 구조물을 포함하되,
    상기 PMOS 게이트 구조물은 5.0 eV보다 큰 유효 일함수를 갖는, 반도체 소자 구조물.
  14. 제13항에 있어서, 상기 몰리브덴 질화막은 100 Å 미만의 두께를 갖는, 반도체 소자 구조물.
  15. 제13항에 있어서, 상기 몰리브덴 질화막은 50 Å 미만의 두께를 갖는, 반도체 소자 구조물.
  16. 제13항에 있어서, 상기 PMOS 게이트 구조물은 5.4 eV보다 큰 유효 일함수를 갖는, 반도체 소자 구조물.
  17. 제13항에 있어서, 상기 몰리브덴 질화막은 1200 μΩ-cm 미만의 전기 비저항을 갖는, 반도체 소자 구조물.
  18. 제13항에 있어서, 상기 게이트 유전체는 산화 하프늄(HfO2)을 포함하는, 반도체 소자 구조물.
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US20210391440A1 (en) 2021-12-16

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