JP2004336019A - 成膜方法、半導体素子の形成方法、半導体素子、表示装置の形成方法及び表示装置 - Google Patents
成膜方法、半導体素子の形成方法、半導体素子、表示装置の形成方法及び表示装置 Download PDFInfo
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- JP2004336019A JP2004336019A JP2004095559A JP2004095559A JP2004336019A JP 2004336019 A JP2004336019 A JP 2004336019A JP 2004095559 A JP2004095559 A JP 2004095559A JP 2004095559 A JP2004095559 A JP 2004095559A JP 2004336019 A JP2004336019 A JP 2004336019A
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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Abstract
【解決手段】混合ガスは、有機金属化合物ガス、酸化性ガス、及び希ガスを含む。混合ガス中の希ガスの分圧の割合Prを85%≦Pr<100%とする。混合ガスをプラズマ処理容器内に導入する。プラズマ処理容器内にプラズマを発生させて有機金属ガス及び酸化性ガスをプラズマにて分解させ、被処理基板1に金属酸化物膜を形成する。
【選択図】 図1
Description
始めに、成膜工程を実施するための化学気相成膜装置のひとつであるプラズマCVD装置(plasma enhanced chemical vapor deposition system)10について説明する。図1に示すプラズマCVD装置10は、例えば平行平板型のプラズマCVD装置10である。このプラズマCVD装置10は、プラズマ処理容器としてのチャンバ11、対向する一対の平行平板電極12,13、例えば500W,40MHzを前記電極12,13間に供給するための高周波電源装置14、整合器15等を備えている。
第1の実施形態では、チャンバ11内の気体圧力を60Paとしているため、混合ガスの全圧に対する希ガス(Xeガス)の分圧の割合が大きくなるほど(希ガスで希釈するほど)、混合ガスの全圧に対するTEOSガスの分圧の割合は小さくなる。そのため、混合ガスの全圧に対する希ガスの分圧の割合Prによっては成膜速度が遅くなることがある。製造時間は製品の製造コストを左右する要因のひとつであるため、成膜時間は短い方が好ましい。そこで、本実施形態では、成膜速度の向上を実現できる成膜方法について説明する。
まず、被処理基板1を用意する。被処理基板1としては、第1の実施形態と同様に、例えば、半導体素子を形成するためのシリコン、液晶表示装置の表示回路を形成するためのガラス、及びプラスチックからなる基板等を用いることができる。本実施形態では、例えば、シリコン基板を用いている。
まず、被処理基板1を用意する。被処理基板1としては、例えば、シリコン、ガラス、又はプラスチック等からなる基板を用いることができる。本実施形態では、例えば、シリコン基板を用いている。
本実施形態では、有機金属化合物ガスとしてのTMAガス、酸化性ガスとしてのO2ガス、及びH2ガスとを混合させて混合ガスとしている。具体的には、TMAガスとO2ガスとH2ガスとの混合比率は10%:89%:1%である。なお、他の工程は、上述した第5の実施形態と同じであるから重複する説明は省略する。このようにすることにより、Al2O3膜が形成される。
後側の透明基体22の内面となる一方の面上の略全面に、バッファ層31としてのSiO2膜を形成する。このバッファ層31上に、例えば減圧CVD法等により、膜厚100nmのアモルファスシリコン(α-Si)膜を形成する。窒素ガス雰囲気中で1時間、450℃にて脱水素処理を行い、その後、α-Si膜に対してエキシマレーザを用いたレーザーアニール(laser annealing)による結晶化を行う。これにより、多結晶シリコン層が形成される。
Claims (16)
- シリコン原子を有する化合物からなるシリコン化合物ガス、酸化性ガス、及び希ガスを含み、かつ、全圧に対する前記希ガスの分圧の割合Prが85%≦Pr<100%となるように3種以上のガスをプラズマ処理容器内に供給し、
前記プラズマ処理容器内にプラズマを発生させて、被処理基板上に酸化シリコンからなる膜を形成することを特徴とする成膜方法。 - シリコン原子を有する化合物からなるシリコン化合物ガス、酸化性ガス、及び水素ガスを含むように3種以上のガスをプラズマ処理容器内に供給し、
前記プラズマ処理容器内にプラズマを発生させて、被処理基板上に酸化シリコンからなる膜を形成することを特徴とする成膜方法。 - 前記シリコン化合物ガスが、テトラエトキシシランガス、テトラメチルシクロテトラシロキサンガス、ジアセトキシジターシャリーブトキシシランガス、ヘキサメチルジシロキサンガスのいずれかであり、かつ、前記酸化性ガスが、酸素ガス、オゾンガス、一酸化炭素ガス、及び二酸化炭素ガスのうちの少なくとも1つを含むガスであることを特徴とする請求項1又は2に記載の成膜方法。
- 前記シリコン化合物ガスがシランガスであり、かつ、前記酸化性ガスが酸素ガス及びオゾンガスのうちの少なくとも一方を含むガスであることを特徴とする請求項1又は請求項2に記載の成膜方法。
- 有機金属化合物ガス、酸化性ガス、及び希ガスを含み、かつ、全圧に対する前記希ガスの分圧の割合Prが85%≦Pr<100%となるように3種以上のガスをプラズマ処理容器内に供給し、
前記プラズマ処理容器内にプラズマを発生させて、被処理基板上に金属酸化物からなる膜を形成することを特徴とする成膜方法。 - 有機金属化合物ガス、酸化性ガス、及び水素ガスを含むように3種以上のガスをプラズマ処理容器内に供給し、
前記プラズマ処理容器内にプラズマを発生させて、被処理基板上に金属酸化物からなる膜を形成することを特徴とする成膜方法。 - 前記有機金属化合物ガスが、トリメチルアルミニウム、トリエチルアルミニウム、トリプロポキシジルコニウム、ペンタエトキシタンタル、トリプロポキシハフニウムのうちのいずれか1つの化合物のガスであることを特徴とする請求項5又は6に記載の成膜方法。
- 前記プラズマ処理容器内で発生させるプラズマが表面波プラズマであることを特徴とする請求項1ないし7のうちのいずれか1項に記載の成膜方法。
- 請求項1,2,5,6のいずれか1に記載の成膜方法により形成された酸化シリコン膜および金属酸化物のうち少なくとも一方の膜によりゲート絶縁膜を形成したトランジスタからなることを特徴とする半導体素子。
- 少なくとも一部に半導体層を形成した被処理基板上に、
有機金属化合物ガス、酸化性ガス、及び希ガスを含み、かつ、全圧に対する前記希ガスの分圧の割合Prが85%≦Pr<100%となるように3種以上のガスをプラズマ処理容器内に供給し、
前記プラズマ処理容器内にプラズマを発生させて、前記酸化シリコン層上に金属酸化物膜を積層させることを特徴とする半導体素子の形成方法。 - 少なくとも一部に形成された半導体層を形成した被処理基板が設けられたプラズマ処理容器内に、
有機金属化合物ガス、酸化性ガス、及び水素ガスを含むように3種以上のガスを供給し、
前記プラズマ処理容器内にプラズマを発生させて、前記酸化シリコン層上に金属酸化物膜を積層させことを特徴とする半導体素子の形成方法。 - 前記酸化シリコン層を2nm以上の層厚で形成することを特徴とする請求項10又は11に記載の半導体素子の形成方法。
- 請求項1,2,5,6のいずれか1に記載の成膜方法により形成された酸化シリコン膜および金属酸化物のうち少なくとも一方の膜によりゲート絶縁膜を形成したトランジスタを画素選択素子としてマトリックス状に設けてなることを特徴とする表示装置。
- 半導体層を有する被処理基板上にマトリックス状に設けられた複数の薄膜トランジスタを備える表示装置の形成方法であって、
前記半導体層上に前記複数の薄膜トランジスタのゲート絶縁膜を形成するに際し、
有機金属化合物ガス、酸化性ガス、及び希ガスを含み、かつ、全圧に対する前記希ガスの分圧の割合Prが85%≦Pr<100%となるように3種以上のガスをプラズマ処理容器内に供給し、
前記プラズマ処理容器内にプラズマを発生させて、金属酸化物膜を形成させることを特徴とする表示装置の形成方法。 - 被処理基板上にマトリックス状に設けられた複数の薄膜トランジスタを備える表示装置の形成方法であって、
前記半導体層上に前記複数の薄膜トランジスタのゲート絶縁膜を形成するに際し、
有機金属化合物ガス、酸化性ガス、及び水素ガスを含むように3種以上のガスをプラズマ処理容器内に供給し、
前記プラズマ処理容器内にプラズマを発生させて、金属酸化物膜を形成させることを特徴とする表示装置の形成方法。 - 前記酸化シリコン層を2nm以上の層厚で形成することを特徴とする請求項14又は15に記載の表示装置の形成方法。
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- 2004-04-19 CN CNA2004100329640A patent/CN1570204A/zh active Pending
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Also Published As
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TW200427869A (en) | 2004-12-16 |
US20040209005A1 (en) | 2004-10-21 |
KR20040090903A (ko) | 2004-10-27 |
US7446060B2 (en) | 2008-11-04 |
US7307028B2 (en) | 2007-12-11 |
CN1570204A (zh) | 2005-01-26 |
US20070105402A1 (en) | 2007-05-10 |
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