JP5275094B2 - 基板処理方法 - Google Patents
基板処理方法 Download PDFInfo
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- JP5275094B2 JP5275094B2 JP2009061139A JP2009061139A JP5275094B2 JP 5275094 B2 JP5275094 B2 JP 5275094B2 JP 2009061139 A JP2009061139 A JP 2009061139A JP 2009061139 A JP2009061139 A JP 2009061139A JP 5275094 B2 JP5275094 B2 JP 5275094B2
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- 239000000758 substrate Substances 0.000 title claims description 64
- 238000003672 processing method Methods 0.000 title claims description 46
- 239000007789 gas Substances 0.000 claims description 105
- 238000009966 trimming Methods 0.000 claims description 52
- 238000000034 method Methods 0.000 claims description 46
- 229910052760 oxygen Inorganic materials 0.000 claims description 28
- 239000001301 oxygen Substances 0.000 claims description 27
- 239000010410 layer Substances 0.000 claims description 25
- 230000003647 oxidation Effects 0.000 claims description 19
- 238000007254 oxidation reaction Methods 0.000 claims description 19
- 238000001179 sorption measurement Methods 0.000 claims description 19
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 17
- 230000001590 oxidative effect Effects 0.000 claims description 17
- 230000003014 reinforcing effect Effects 0.000 claims description 16
- 238000005530 etching Methods 0.000 claims description 9
- FZHAPNGMFPVSLP-UHFFFAOYSA-N silanamine Chemical compound [SiH3]N FZHAPNGMFPVSLP-UHFFFAOYSA-N 0.000 claims description 9
- 239000012044 organic layer Substances 0.000 claims description 2
- 238000007670 refining Methods 0.000 claims description 2
- 230000002787 reinforcement Effects 0.000 claims 1
- 229920002120 photoresistant polymer Polymers 0.000 description 36
- 238000006243 chemical reaction Methods 0.000 description 33
- 235000012431 wafers Nutrition 0.000 description 19
- 239000004065 semiconductor Substances 0.000 description 12
- 230000006870 function Effects 0.000 description 11
- 238000003860 storage Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 238000010926 purge Methods 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 239000012895 dilution Substances 0.000 description 3
- 238000010790 dilution Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000010453 quartz Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000007865 diluting Methods 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000002407 reforming Methods 0.000 description 2
- 239000012780 transparent material Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910003481 amorphous carbon Inorganic materials 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000002052 molecular layer Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32733—Means for moving the material to be treated
- H01J37/32752—Means for moving the material to be treated for moving the material across the discharge
- H01J37/32761—Continuous moving
- H01J37/32779—Continuous moving of batches of workpieces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
小さい寸法の開口部を形成することができる。また、有機膜表面にSi含有ガスを吸着させた後、吸着したSi含有ガスをSi(シリコン)酸化膜に改質すると共に有機膜の線状部分の線幅を微細化するので、有機膜の線状部分の線幅をトリミングしながらその強度を向上させることができる。
12 反応管
17 プラズマ発生部
18 酸化ガス供給管
50 シリコン基材
51 アモルファスカーボン膜
53 フォトレジスト膜
54 開口部
55 Si酸化膜
Claims (9)
- 処理対象層と、有機膜とを有する基板を処理する基板処理方法であって、前記有機膜表面に補強膜を形成しつつ該有機膜の開口パターンを形成する線状部分の線幅を微細化する成膜トリミングステップを有し、
該成膜トリミングステップは、前記有機膜表面にSi含有ガスを吸着させる吸着ステップと、吸着したSi含有ガスをSi酸化膜に改質すると共に前記有機膜の前記線幅を微細化する酸化ステップを有することを特徴とする基板処理方法。 - 前記Si含有ガスとして、1価のアミノシランを用いることを特徴とする請求項1記載の基板処理方法。
- 前記吸着ステップにおける処理圧力は、1.33×10−1Pa(1mTorr)〜1.33×10kPa(100Torr)であることを特徴とする請求項1又は2記載の基板処理方法。
- 前記吸着ステップにおける処理温度は、20℃〜700℃であることを特徴とする請求項1乃至3のいずれか1項に記載の基板処理方法。
- 前記酸化ステップにおいて、酸化ガスとして酸素含有ガスを用い、該酸素含有ガスをプラズマ励起した酸素ラジカルによって前記有機膜表面に吸着したSi含有ガスをSi酸化膜に改質すると共に前記有機膜の前記線幅を微細化することを特徴とする請求項1乃至4のいずれか1項に記載の基板処理方法。
- 前記酸化ステップにおける処理圧力は、1.33×10−1Pa(1mTorr)〜1.33×10kPa(100Torr)であることを特徴とする請求項1乃至5のいずれか1項に記載の基板処理方法。
- 前記酸化ステップにおける処理温度は、20℃〜700℃であることを特徴とする請求項1乃至6のいずれか1項に記載の基板処理方法。
- 前記有機膜における前記線状部分の線幅は、60nm以下であることを特徴とする請求項1乃至7のいずれか1項に記載に基板処理方法。
- 前記成膜トリミングステップによって形成された前記補強膜の一部をエッチングして前記有機膜のトリミングされた前記線状部分を露出させる補強膜エッチングステップを有することを特徴とする請求項1乃至8のいずれか1項に記載の基板処理方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009061139A JP5275094B2 (ja) | 2009-03-13 | 2009-03-13 | 基板処理方法 |
US12/720,197 US8202805B2 (en) | 2009-03-13 | 2010-03-09 | Substrate processing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009061139A JP5275094B2 (ja) | 2009-03-13 | 2009-03-13 | 基板処理方法 |
Publications (3)
Publication Number | Publication Date |
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JP2010219106A JP2010219106A (ja) | 2010-09-30 |
JP2010219106A5 JP2010219106A5 (ja) | 2012-04-26 |
JP5275094B2 true JP5275094B2 (ja) | 2013-08-28 |
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JP2009061139A Active JP5275094B2 (ja) | 2009-03-13 | 2009-03-13 | 基板処理方法 |
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US (1) | US8202805B2 (ja) |
JP (1) | JP5275094B2 (ja) |
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