JP2012244180A - 多層接続構造及びその製造方法 - Google Patents
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Abstract
【解決手段】各コンタクトレベルは導電層と絶縁層とを有する。コンタクト開口を作り出すために、第1のコンタクトレベルを露出させるように上部層の一部が除去される。N個のマスクを用いて、最大2N個のコンタクトレベルまでコンタクト開口がエッチングされる。各マスクは、コンタクト開口のうちの実効的に半数をエッチングするために使用される。Nが3であるとき、第1のマスクにより1つのコンタクトレベルがエッチングされ、第2のマスクにより2つのコンタクトレベルがエッチングされ、第3のマスクにより4つのコンタクトレベルがエッチングされる。コンタクト開口の側壁に誘電体層が形成され得る。コンタクト開口内に導電体が形成され、前記誘電体層が該導電体を前記側壁から電気的に絶縁する。
【選択図】図17
Description
Claims (16)
- 相互接続領域に少なくとも4つのコンタクトレベルのスタックを有する3次元積層ICデバイスで使用され、前記コンタクトレベルのランドエリアにアライメントされ且つ該ランドエリアを露出させる相互接続コンタクト領域を形成する方法であって、各コンタクトレベルは導電層と絶縁層とを有し、当該方法は:
各コンタクトレベルのためのコンタクト開口を作り出すために、第1のコンタクトレベルを露出させるように、前記相互接続領域の上に位置する上部層の少なくとも一部を除去するステップと、
Nは2以上の整数として、前記コンタクトレベルの前記スタックに複数レベルの相互接続コンタクト領域を作り出すためのN個のエッチングマスクの組を選定するステップと、
前記N個のマスクを使用して、前記コンタクト開口を最大2N個のコンタクトレベルまでエッチングするステップであり:
第1のマスクを使用して、前記コンタクト開口のうちの実効的に半数で、1つのコンタクトレベルをエッチングするステップ;
第2のマスクを使用して、前記コンタクト開口のうちの実効的に半数で、2つのコンタクトレベルをエッチングするステップ;及び
前記コンタクト開口が前記2N個のコンタクトレベルまで延在するよう、前記除去するステップ、前記選定するステップ及び前記使用するステップを実行するステップ;
を有するステップと、
を有し、
それにより、前記コンタクト開口を通って前記コンタクトレベルの前記ランドエリアに接触する導電体を形成することが可能にされる、
方法。 - 前記除去するステップは、更なるマスクを用いて実行される、請求項1に記載の方法。
- 前記第1のマスクを使用するステップは、前記第1のマスクを用いて1つおきのコンタクト開口で、1つのコンタクトレベルをエッチングすることを有し、
前記第2のマスクを使用するステップは、前記第2のマスクを用いて、少なくとも一組の第1乃至第4のコンタクト開口のうちの第3及び第4のコンタクト開口で、2つのコンタクトレベルをエッチングすることを有する、
請求項1に記載の方法。 - 前記N個のマスクを使用するステップは更に:
第3のマスクを使用して、前記コンタクト開口のうちの実効的に半数で、4つのコンタクトレベルをエッチングするステップ;及び
第4のマスクを使用して、前記コンタクト開口のうちの実効的に半数で、8つのコンタクトレベルをエッチングするステップ;
を有する、請求項1に記載の方法。 - 前記第3のマスクを使用するステップは、前記第3のマスクを用いて、少なくとも一組の第1乃至第8のコンタクト開口のうちの第5乃至第8のコンタクト開口で、4つのコンタクトレベルをエッチングすることを有し、
前記第4のマスクを使用するステップは、前記第4のマスクを用いて、少なくとも一組の第1乃至第16のコンタクト開口のうちの第9乃至第16のコンタクト開口で、8つのコンタクトレベルをエッチングすることを有する、
請求項4に記載の方法。 - 前記第1のマスクを使用するステップは、コンタクト開口2、4、6、8、10、12、14、16で1つのコンタクトレベルをエッチングするように実行され、
前記第2のマスクを使用するステップは、コンタクト開口3、4、7、8、11、12、15、16で2つのコンタクトレベルをエッチングするように実行され、
前記第3のマスクを使用するステップは、コンタクト開口5−8、13−16で4つのコンタクトレベルをエッチングするように実行され、
前記第4のマスクを使用するステップは、コンタクト開口9−16で8つのコンタクトレベルをエッチングするように実行される、
請求項4に記載の方法。 - 前記第1のマスクを使用するステップは、コンタクト開口2、4、6、8、10、12、14、16で8つのコンタクトレベルをエッチングするように実行され、
前記第2のマスクを使用するステップは、コンタクト開口5、6、7、8、13、14、15、16で2つのコンタクトレベルをエッチングするように実行され、
前記第3のマスクを使用するステップは、コンタクト開口3、4、7、8、11、12、15、16で4つのコンタクトレベルをエッチングするように実行され、
前記第4のマスクを使用するステップは、コンタクト開口9−16で1つのコンタクトレベルをエッチングするように実行される、
請求項4に記載の方法。 - 前記コンタクトレベルを貫通するグランドコンタクト開口を作り出すステップと、
前記コンタクトレベルの複数の前記導電層と電気的に接触するように、前記グランドコンタクト開口内にグランド導電体を形成するステップと、
を更に有する請求項1に記載の方法。 - 前記グランドコンタクト開口はグランドコンタクト開口側壁を有し、当該方法は更に:
前記グランド導電体が前記グランド導電体と前記コンタクトレベルの前記複数の前記導電層との間に強化された電気接触を生成するように、前記グランド導電体を形成するステップに先立って、前記グランドコンタクト開口側壁において前記絶縁層の一部を除去するステップ、
を更に有する請求項8に記載の方法。 - 前記使用するステップは、エッチングされるコンタクトレベルの数順とは異なる順序で実行される、請求項1に記載の方法。
- 前記コンタクト開口は側壁を有し、当該方法は更に、該側壁に誘電体層を形成するステップを有する、請求項1に記載の方法。
- 相互接続領域の、少なくとも第1、第2、第3及び第4のコンタクトレベルのスタックであり、各コンタクトレベルが導電層と絶縁層とを有する、スタックと、
前記コンタクトレベルのスタックの一部を貫通する第1、第2、第3及び第4の導電体であり、それぞれ、前記第1、第2、第3及び第4のコンタクトレベルの前記導電層と電気的に接触する第1、第2、第3及び第4の導電体と、
前記第2、第3及び第4の導電体がそれぞれ前記第2、第3及び第4の導電層とのみ電気的に接触するように、前記第2、第3及び第4の導電体の周囲を取り囲む誘電体側壁スペーサと、
を有する3次元積層ICデバイス。 - 前記第1、第2、第3及び第4の導電体は一定のピッチを有する、請求項12に記載の積層ICデバイス。
- 前記第1、第2、第3及び第4の導電体の位置は、共通マスクによって決定可能である、請求項12又は13に記載の積層ICデバイス。
- 前記コンタクトレベルのスタックの一部を貫通し且つ前記第1、第2、第3及び第4のコンタクトレベルの前記導電層の各々と電気的に接触するグランド導電体、を更に有する請求項12に記載の積層ICデバイス。
- 前記第1、第2、第3及び第4の導電体並びに前記グランド導電体の位置は、共通マスクによって決定可能である、請求項15に記載の積層ICデバイス。
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US13/114,931 US8383512B2 (en) | 2011-01-19 | 2011-05-24 | Method for making multilayer connection structure |
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US9716137B1 (en) | 2017-07-25 |
US10388720B2 (en) | 2019-08-20 |
US20160365407A1 (en) | 2016-12-15 |
TW201644079A (en) | 2016-12-16 |
US20170018570A1 (en) | 2017-01-19 |
CN106252353B (zh) | 2019-09-03 |
TWI566447B (zh) | 2017-01-11 |
CN106252353A (zh) | 2016-12-21 |
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