JPS59127847A - スパツタリング装置の静電チヤツク装置 - Google Patents

スパツタリング装置の静電チヤツク装置

Info

Publication number
JPS59127847A
JPS59127847A JP288683A JP288683A JPS59127847A JP S59127847 A JPS59127847 A JP S59127847A JP 288683 A JP288683 A JP 288683A JP 288683 A JP288683 A JP 288683A JP S59127847 A JPS59127847 A JP S59127847A
Authority
JP
Japan
Prior art keywords
processed
frequency electrode
matter
insulating layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP288683A
Other languages
English (en)
Other versions
JPS6244410B2 (ja
Inventor
Noboru Kuriyama
昇 栗山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokuda Seisakusho Co Ltd
Original Assignee
Tokuda Seisakusho Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokuda Seisakusho Co Ltd filed Critical Tokuda Seisakusho Co Ltd
Priority to JP288683A priority Critical patent/JPS59127847A/ja
Publication of JPS59127847A publication Critical patent/JPS59127847A/ja
Publication of JPS6244410B2 publication Critical patent/JPS6244410B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Jigs For Machine Tools (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明はスパッタリング装置に係り、%に被処理物を静
電作用力により保持して処理する静電チャック装置に関
する。
例えば半導体ウェファの表面を清浄化するためにスパッ
タリング装置が用いられる。このスパッタリング装置は
一対の電極を持った処理室中に被処理物を置き、両電極
間圧放雷を起して処理室内にプラズマイオンを生成し、
とのプラズマイオンを被処理物に作用させるものである
。そして、この処理に際し被処理物を何れかの電極上に
保持するととになるが、このために何らかのチャック装
置を利用する。
従来、このチャック装置としては機械的に被処理物を保
持するものがある。これは被処理物の端部を保持部材に
よって一方の電1極面に押圧するようにしている。
しかしながら、この機械式チャックは複雑な機構を必要
とする上に、被処理物の表面の一部をプラズマイオンか
ら覆い隠すことになり不具合である。
本発明は上述の点に鑑みてなされたもので、被処理物を
載置すべき電極の表面に絶縁層を配し、この絶縁層を挾
んで被処理物と電極とに荷電することKより静電的に被
処理物をチャッキングし且つ荷電管を検出することによ
りチャッキングの適否を判定し得るような静電チャック
装置を構成したものである。
以下添付図面を参照して本発明の一実施例を説明する。
図は本発明に係るスパッタリング装置の全体構成を示し
ている。このスパッタリング装置は機構的には処理室l
/と給電回路室/:lとを有し、処理室ヌパッタリング
用高周波およびチャッキング用直流の給電回路を収納し
てなるものである。処理室l/が下方にあるのは被処理
物の処理面を下向きにし塵埃等の付着防止を図ったため
である。
処理室l/は容器21の開口部に絶縁部材2ユを介して
高周波電極23を配することにより密閉構造とされてお
り、高周波電極23の処理室ll側の面にはカフトンフ
ィルム等の絶縁層評が設けられている。
そして絶縁層2ケの中心位置に被処理物30を昇降させ
るための昇降テーブル8が設けられており、このテーブ
ル25の軸部はペローズムにより気密構造がとられてい
る。なお、処理室//を真空化するための要素および被
処理物3θを搬出入するための要りは図示を省略してい
る。
一方給電回路室12は、高周波電極23に高周波電源R
Fからの高周波電流を供給するための、コンデンサC1
、OcおよびインダクタンスLaからなるインビーダン
ヌマッチング回路と、高周波電極23に被処理物30を
チャッキングするため直流電源EからスイッチS、 、
S、の開閉に応じて与えられる直流電流を高周波電極2
3に供給するための回路とが設けられている。この直流
電流を供給する回路に挿入されたインダクタンスLfお
よびコンデンサOfは冒周波電流が漏洩することを防止
するためのフィルタを構成する。
そして、チャッキング電流の通電路として処理室側には
、テーブルコがブッシングを通って容器2/の外部に設
けられた電流制限抵抗Rに接続され、  ′この抵抗B
を介して接地されている。この抵抗Bはチャッキング用
直流電源Eが過大電流を流すことを防止するために設け
られたものであると同時に、その一部から取出した電圧
によりチャック力の検出を行うためのものでもある。す
なわち抵抗Bに流れる電流の積分値が高周波電極3と被
処理物tOとの間の蓄積電荷針つまりチャック力に等し
いことから抵抗只の一部から取出した電圧を増幅器AI
Pで増幅し積分画工Tによって積分することによりチャ
ック力を知ることができる。積分画工Tの出力は表示装
置DPに与えられ、チャック力の表示が行われる。表示
装置DPにレベル判定機能を持たせておけばチャック力
の適否を表示または(1) 出力することができる。
次にスパッタリング装置による被処理物の処理と関連さ
せて動作を説明する。
まず図示しない搬送人機構により被処理物3θが処理室
//に搬入され、このとき下降状態にある昇降テーブル
2S上に載置される。この状態で処理室l/はブラズi
イオン形成司能な状態にあるとする。
次いで昇降テーブルjを上昇させて被処理物30の上面
を絶縁層、2+に接触させる。接触したらチャッキング
を行う。これは連動関係のスイッチS1を閉、S、を開
として直流電源Eを高周波電極3に接続することにより
行う。被処理物30はテーブル25および電流制限抵抗
Hを介して接地されているから、高周波電極刀と被処理
物lθとの間に電荷が蓄積され始める。この電荷蓄積針
は逐時表示装置DPに表示される。所定電荷が蓄積され
たら被処理物10は高周波電極23との間の静電吸引力
により絶縁層コタに密着するからテーブルjを下降させ
てよい。テーブル2Sの下降は作業員が表示装置DPを
見ながら行ってもよいし、表示装置npの出力(t  
) により図示しないテーブル昇降機構を作動させてもよい
テーブル2夕が下降し切ったらスパッタリングを行う。
これは、高周波電源R1!′をオンにすることにより行
う。ただしそれに先立ってコンデンサ01、Ocを調整
して被処理物3θの特性に応じたインヒータンヌマッチ
ングをとっておく。スパッタリング中被処理物3oを過
熱させないために図示しない冷却手段により高周波電極
23を冷却する。
スパッタリング終了後、被処理物3oを取出すためにテ
ーブル2左を再び上昇させ、スイッチS、を開、S、を
閉とする。とれにより高周波電極:13と被処理物IO
との間の蓄mtt荷は電流制限抵抗Fを介して放電する
。したがって被処理物3oは静電吸引力を失い、テーブ
ル2夕を下降させれば被処理物3oも下降する。静電作
用力が消失しても被処理物3oが絶縁層241に吸着し
ているときに備えて高周波電極コ3と絶縁層コダとの間
にエアを吹込む等の手段を設けてもよい。
テーブル君が下降したら図示しない搬出入機構により被
処理物30を取出し、次に処理すべき被処理物を装入す
る。以下上叢己動作を繰返す。
以上は被処理物が1常にチャッキングされた場合である
が、チャッキングが正しく行われない場合もある。これ
は所定時間内に高周波型、@23と被処理物/θとの間
に所定の電荷が蓄積されない場合であり、例えば被処理
物30の反り等によって起きる。
この場合は被処理物30をスパッタリングせずに取出す
訳であるが、その判断は表示装置DPの表示または出力
による。
本発明は上述のように、従来の機械式チャッキングに代
って静電式チャッキングを行い然もチャック力を検出す
るようにしたため、簡単な機構でスパッタリングに好適
なチャッキングができ、その上被処理物の不具合をも押
押することができるものであり、スパッタリング装置の
構成上極めて有用な本のである。
【図面の簡単な説明】
図は本発明に係るスパッタリング装置の全体構成を示す
縦断面図である。 //・・・処理室、t、l・・・給電回路室、2/・・
容器、コ3・・・高周波電極1.2ダ・・・絶縁層、2
5・・・昇降テーブル、E・・・直流電源、S・・・ス
イッチ、R・・・電流制限抵抗、AF・・増幅器、工T
・・・積分器。

Claims (1)

    【特許請求の範囲】
  1. 内部に所定のガスが略々真空に近い状態で収容された処
    理室に高周波電極および他の電極を設け、これら両電極
    間で高周波放電を行ってスパッタリング処理を施すため
    に前記高周波電極近傍に被処理物をチャッキングする装
    置において、前記処理室に面する表面に絶縁層が設けら
    れた高周波電極と、この高周波電極に前記絶縁層を介し
    て対向するように前記処理室内で被処理物を移動させる
    装置と、前記高周波電極および前記被処理物の間に直流
    電圧を与える電源と、この電源から前記高周波電極およ
    び前記被処理物に至る通電経路に挿入された電流制限抵
    抗と、この抵抗に流れる電流を積分した出力を得る検出
    回路とをそなえ、前記被処理物を前記高周波電極に対し
    静電的に付着させたときこれら両者間に作用する静電吸
    引力を測定するようにしたことを特徴とするスパッタリ
    ング装置の静電チャック装置。
JP288683A 1983-01-13 1983-01-13 スパツタリング装置の静電チヤツク装置 Granted JPS59127847A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP288683A JPS59127847A (ja) 1983-01-13 1983-01-13 スパツタリング装置の静電チヤツク装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP288683A JPS59127847A (ja) 1983-01-13 1983-01-13 スパツタリング装置の静電チヤツク装置

Publications (2)

Publication Number Publication Date
JPS59127847A true JPS59127847A (ja) 1984-07-23
JPS6244410B2 JPS6244410B2 (ja) 1987-09-21

Family

ID=11541834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP288683A Granted JPS59127847A (ja) 1983-01-13 1983-01-13 スパツタリング装置の静電チヤツク装置

Country Status (1)

Country Link
JP (1) JPS59127847A (ja)

Cited By (203)

* Cited by examiner, † Cited by third party
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JPS61270046A (ja) * 1985-05-22 1986-11-29 Toshiba Mach Co Ltd 静電チヤツク装置
JPS6230346A (ja) * 1985-07-31 1987-02-09 Tokuda Seisakusho Ltd ウエハ支持装置
US5325261A (en) * 1991-05-17 1994-06-28 Unisearch Limited Electrostatic chuck with improved release
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CN113862645B (zh) * 2021-09-28 2023-09-08 北京北方华创微电子装备有限公司 承载装置及半导体工艺腔室
CN113862645A (zh) * 2021-09-28 2021-12-31 北京北方华创微电子装备有限公司 承载装置及半导体工艺腔室

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