JP2012004401A - 半導体装置の製造方法 - Google Patents
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- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
- H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
- H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
Abstract
【解決手段】半導体基板10上に、化学気相堆積法により、シリコンと酸素と炭素とを含む絶縁膜42を形成する工程と、絶縁膜を形成する工程の後、350℃以下の温度で加熱しながら絶縁膜に対して紫外線キュアを行う工程と、紫外線キュアを行う工程の後、絶縁膜に対してヘリウムプラズマ処理を行う工程とを有している。
【選択図】図3
Description
一実施形態による半導体装置の製造方法を図1乃至図14を用いて説明する。図1乃至図11は、本実施形態による半導体装置の製造方法を示す工程断面図である。
次に、本実施形態による半導体装置の製造方法の評価結果を図12乃至図14を用いて説明する。
上記実施形態に限らず種々の変形が可能である。
10…半導体基板
12…素子分離領域
14…素子領域
16…ウェル
18…ゲート絶縁膜
20…ゲート電極
22…エクステンション領域
24…サイドウォール絶縁膜
26…不純物領域
28…ソース/ドレイン拡散層
30…シリサイド膜
32…トランジスタ
34…層間絶縁膜
36…コンタクトホール
38…下地金属膜
40…導体プラグ
42…層間絶縁膜
42a…UVキュア後の層間絶縁膜
42b…Heプラズマ処理後の層間絶縁膜
44…キャップ膜
46…フォトレジスト膜
48…開口部
50…溝
52…バリアメタル膜
54…Cu層、配線
56…エッチングストッパ膜
58…層間絶縁膜
58a…UVキュア後の層間絶縁膜
58b…Heプラズマ処理後の層間絶縁膜
60…キャップ膜
62…フォトレジスト膜
64…開口部
66…コンタクトホール
68…樹脂層
70…フォトレジスト膜
72…開口部
74…溝
76…バリアメタル膜
78…Cu層
78a…導体プラグ
78b…配線
Claims (5)
- 半導体基板上に、化学気相堆積法により、シリコンと酸素と炭素とを含む絶縁膜を形成する工程と、
前記絶縁膜を形成する工程の後、350℃以下の温度で加熱しながら前記絶縁膜に対して紫外線キュアを行う工程と、
前記紫外線キュアを行う工程の後、前記絶縁膜に対してヘリウムプラズマ処理を行う工程と
を有することを特徴とする半導体装置の製造方法。 - 請求項1記載の半導体装置の製造方法において、
前記絶縁膜は、SiOC膜である
ことを特徴とする半導体装置の製造方法。 - 請求項1又は2記載の半導体装置の製造方法において、
前記紫外線キュアを行う工程では、230℃〜350℃の範囲内の温度で加熱しながら、前記絶縁膜に対して紫外線キュアを行う
ことを特徴とする半導体装置の製造方法。 - 請求項1乃至3のいずれか1項に記載の半導体装置の製造方法において、
前記ヘリウムプラズマ処理を行う工程では、350℃以下の温度で加熱しながら、前記絶縁膜に対してヘリウムプラズマ処理を行う
ことを特徴とする半導体装置の製造方法。 - 請求項4記載の半導体装置の製造方法において、
前記ヘリウムプラズマ処理を行う工程では、100℃〜350℃の範囲内の温度で加熱しながら、前記絶縁膜に対してヘリウムプラズマ処理を行う
ことを特徴とする半導体装置の製造方法。
Priority Applications (3)
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JP2010139018A JP2012004401A (ja) | 2010-06-18 | 2010-06-18 | 半導体装置の製造方法 |
US13/070,740 US8716148B2 (en) | 2010-06-18 | 2011-03-24 | Semiconductor device manufacturing method |
CN2011101301515A CN102290351A (zh) | 2010-06-18 | 2011-05-17 | 半导体器件制造方法 |
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JP2010139018A JP2012004401A (ja) | 2010-06-18 | 2010-06-18 | 半導体装置の製造方法 |
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JP2012004401A true JP2012004401A (ja) | 2012-01-05 |
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JP2010139018A Pending JP2012004401A (ja) | 2010-06-18 | 2010-06-18 | 半導体装置の製造方法 |
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US (1) | US8716148B2 (ja) |
JP (1) | JP2012004401A (ja) |
CN (1) | CN102290351A (ja) |
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US20110312191A1 (en) | 2011-12-22 |
US8716148B2 (en) | 2014-05-06 |
CN102290351A (zh) | 2011-12-21 |
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