TWI682454B - 基板處理方法 - Google Patents
基板處理方法 Download PDFInfo
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- TWI682454B TWI682454B TW107123992A TW107123992A TWI682454B TW I682454 B TWI682454 B TW I682454B TW 107123992 A TW107123992 A TW 107123992A TW 107123992 A TW107123992 A TW 107123992A TW I682454 B TWI682454 B TW I682454B
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- layer
- insulating layer
- stepped structure
- gas
- sacrificial
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Abstract
提供一種基板處理方法,當在具有階梯結構的VNAND裝
置上選擇性地形成阻擋層時,所述基板處理方法能夠防止由蝕刻溶液導致的對階梯結構的一部分的過度蝕刻。基板處理方法包含:交替地堆疊第一絕緣層以及第二絕緣層;透過蝕刻堆疊的第一絕緣層以及第二絕緣層來形成階梯式結構,所述階梯式結構具有上表面、下表面以及使上表面連接到下表面的側表面;使階梯式結構緻密;在緻密化的第二絕緣層上形成阻擋層;以及對包含第二絕緣層以及阻擋層的犧牲字線結構的至少一部分執行各向同性蝕刻。在於各向同性蝕刻步驟處蝕刻阻擋層期間,第二絕緣層並不經蝕刻或經略微蝕刻到可忽略的程度。
Description
一個或多個實施例涉及使用薄膜沉積技術的基板處理方法以及用所述方法製造的裝置,並且更具體地說,涉及透過用等離子體增強原子層沉積(plasma-enhanced atomic layer deposition;PEALD)方法將絕緣層(例如氮化矽層)沉積在基板上來處理基板的方法以及用所述方法製造的裝置(例如半導體裝置)。
近來,對三維(three-dimensional;3D)豎直NAND(vertical NAND;VNAND)快閃記憶體裝置的需求已迅速增加。為處理更多資訊,疊層柵的第一絕緣層和第二絕緣層堆疊的次數已增加到32對、48對、64對等。絕緣層的堆疊結構具有階梯結構,且金屬線可連接到每一階梯。舉例來說,第二絕緣層的上表面是階梯結構的上表面,且暴露的第二絕緣層連接到接觸通孔。
然而,在接觸通孔形成時,由於過度蝕刻,接觸通孔可在穿透第二絕緣層之後連接到階梯結構中的另一第二絕緣層。這在驅動半導體裝置時造成電短路。
圖1A和圖1B示意性地繪示上述處理中的問題。第一絕緣層2a、第一絕緣層2b以及第一絕緣層2c(下文稱為第一絕緣層2)與第二絕緣層3a、第二絕緣層3b以及第二絕緣層3c(下文稱為第二絕緣層3)交替地堆疊以形成堆疊結構1。舉例來說,第一絕緣層2可以是SiO2層,且第二絕緣層3可以是SiN層。第一絕緣層2使柵極(未示出)之間絕緣。第二絕緣層3連接到柵極電極,且在後續處理中可由例如鎢、鋁等的金屬層或其它導電層替換。
如圖1A中所示,在接觸通孔11形成時,由於過度蝕刻,接觸通孔11可在穿透第二絕緣層3b之後連接到另一第二絕緣層3a。如圖1B中所示,在用金屬填充第二絕緣層3和接觸通孔11時,在第二絕緣層3a與第二絕緣層3b之間可能發生電短路,且因此,裝置可能不能正常操作。
本公開的一個或多個實施例是在不執行單獨光刻工藝的情況下在具有階梯的結構的區域上選擇性地形成保護層。
本公開的一個或多個實施例是防止在具有階梯的結構的一部分中過度蝕刻,同時形成阻擋層。
本公開的一個或多個實施例是在三維(3D)半導體裝置的階梯結構中提高上表面和下表面對濕法蝕刻的抗性。
本公開的一個或多個實施例是防止當在具有階梯結構的
豎直NAND(VNAND)裝置上選擇性地形成阻擋層時由蝕刻溶液導致的對階梯結構的過度蝕刻。
額外方面將部分地在以下描述中得到闡述,並且部分地將從所述描述顯而易見,或可以透過對所提出的實施例的實踐而獲悉。
根據本公開的一個或多個實施例,基板處理方法包含:交替地堆疊第一絕緣層以及第二絕緣層;透過蝕刻堆疊的第一絕緣層以及第二絕緣層來形成階梯式結構,所述階梯式結構具有上表面、下表面以及使上表面連接到下表面的側表面;使階梯式結構緻密;在緻密化的第二絕緣層上形成阻擋層;以及對包含第二絕緣層以及阻擋層的犧牲字線結構的至少一部分執行各向同性蝕刻。
使階梯式結構緻密可包括使第二絕緣層的上部分緻密。使第二絕緣層的上部分緻密可包括選擇性地使第二絕緣層的一部分緻密,所述部分在階梯式結構的側表面與下表面之間的邊界處。
在各向同性蝕刻犧牲字線結構的至少一部分期間,在側表面與下表面之間的邊界上的第二絕緣層的部分的蝕刻速率與阻擋層的蝕刻速率之間的比率可等於或小於預定參考值。
在各向同性蝕刻犧牲字線結構的至少一部分期間,在階梯式結構的上表面以及下表面上的第二絕緣層中的暴露部分的蝕刻速率可慢於第二絕緣層的未暴露部分的蝕刻速率。
在各向同性蝕刻犧牲字線結構的至少一部分期間,可將
第二絕緣層中的所述部分蝕刻到預定厚度或小於預定厚度,所述部分在側表面與下表面之間的邊界上。
第二絕緣層可包括第一材料,且使階梯式結構緻密可包括透過使用第一氣體作為反應氣體來執行等離子體過程,第一氣體包含第一材料中包含的元素中的一種。
第二絕緣層的蝕刻速率可受第一氣體的種類和流速中的至少一個控制。
第一材料可包含氮化物材料,且第一氣體可包含氮。
第一氣體可以是不含氫氣體。使階梯式結構緻密可包含透過使用第二氣體作為反應氣體來執行等離子體過程,所述第二氣體包含第一材料中包含的元素中的至少一種,且第二氣體可以是含氫氣體。在各向同性蝕刻犧牲字線結構的至少一部分期間,第二絕緣層的蝕刻速率可受不含氫氣體與含氫氣體的供應比率控制且可調節為慢於預定參考蝕刻速率。
可在於第二絕緣層上形成阻擋層期間使用含氫氣體,且在形成阻擋層期間使用的含氫氣體的流速可受控制,使得定位於側表面與下表面之間的邊界上的第二絕緣層的部分的蝕刻速率與阻擋層的蝕刻速率之間的比率等於或小於預定參考值。
基板處理方法可進一步包括:在犧牲字線結構上形成層間絕緣層;去除犧牲字線結構;以及對應於去除了犧牲字線結構的空間形成導電字線結構,其中導電字線結構可包含:第一導電層,朝向溝道延伸;以及第二導電層,在第一導電層上,其中可
用等離子體過程執行階梯式結構的緻密化,且在第一導電層中,接觸第二導電層的部分的厚度可小於第一導電層的其餘部分的厚度。
根據本公開的一個或多個實施例,基板處理方法包含:將堆疊結構堆疊多次,所述堆疊結構包含絕緣層以及第一犧牲層;透過蝕刻階梯式結構來形成包含上表面、下表面以及使上表面與下表面彼此連接的側表面的階梯式結構;在階梯式結構上形成第二犧牲層;以及對第二犧牲層的至少一部分執行各向同性蝕刻,其中,在形成第二犧牲層之前,處理第一犧牲層使得在階梯式結構的上表面以及下表面上的第一犧牲層的暴露部分的密度比第一犧牲層的未暴露部分的密度大預定比率或更多。
在對第二犧牲層的至少一部分的各向同性蝕刻期間,第一犧牲層的暴露部分上的蝕刻速率與第二犧牲層上的蝕刻速率之間的比率可等於或小於預定參考值。
在對第二犧牲層的至少一部分的各向同性蝕刻期間,將在上表面以及下表面上的第一犧牲層的暴露部分可蝕刻到預定厚度或小於預定厚度。
根據本公開的一個或多個實施例,基板處理方法包含:選擇性地使階梯式結構緻密,所述階梯式結構包含上表面、下表面以及使上表面與下表面彼此連接的側表面;在階梯式結構上形成至少一個層;以及對所述至少一個層執行各向同性蝕刻,其中,在各向同性蝕刻之前,所述至少一個層中的氫與氮的比率大於階
梯式結構中的氫與氮的比率。
1‧‧‧堆疊結構
2、2a、2b、2c‧‧‧第一絕緣層
3、3a、3b、3c‧‧‧第二絕緣層
6‧‧‧阻擋層
9‧‧‧傾斜突出端
11‧‧‧接觸通孔
12‧‧‧金屬線
13‧‧‧導電層
14‧‧‧部分
15、16、17‧‧‧位置
80‧‧‧階梯結構
81a、81b‧‧‧第一絕緣層
82a、82b‧‧‧第二絕緣層
83‧‧‧阻擋層
85‧‧‧邊界
87‧‧‧傾斜突出端
200‧‧‧基板
210、210a、210b、210c、210d‧‧‧絕緣層
220、220a、220b、220c、220d‧‧‧第一犧牲層
230、230'‧‧‧第二犧牲層
250‧‧‧層間絕緣層
260‧‧‧接觸通孔
C1‧‧‧第一導電層
C2‧‧‧第二導電層
E‧‧‧部分
h1、h2、h3、h4‧‧‧厚度
h2'、h4'‧‧‧厚度
L‧‧‧下表面
NE‧‧‧部分
S‧‧‧側表面
S1‧‧‧步驟/第一階梯
S2‧‧‧步驟/第二階梯
S3、S4、S5‧‧‧步驟
ST‧‧‧階梯結構
U‧‧‧上表面
U1‧‧‧上表面
U2‧‧‧側表面
U3‧‧‧上表面
WL‧‧‧導電字線結構
WL1‧‧‧第一字線
WL2‧‧‧第二字線
MCS‧‧‧記憶體單元串
透過結合附圖對實施例進行的以下描述,這些和/或其它方面將變得顯而易見並且更加容易瞭解。
圖1A和圖1B示意性地繪示現有過程中的問題。
圖2A到圖2F是示意性地繪示在三維(3D)半導體設備的階梯結構上形成保護層以及選擇性地蝕刻所述保護層的過程的圖。
圖3A和圖3B是示意性地繪示過度蝕刻暴露在階梯的上表面上的第二絕緣層的圖。
圖4是示出根據一實施例的基板處理方法的流程圖。
圖5是示出根據一實施例的基板處理方法的示意圖。
圖6是示出根據一實施例的基板處理方法的示意圖。
圖7是示出根據一實施例的基板處理方法的示意圖。
圖8A到圖8D是繪示對一樣式的階梯式結構應用圖5的基板處理方法的結果的圖。
圖9是示出根據一實施例的基板處理方法的示意圖。
圖10是繪示根據圖9的等離子體預處理(第一步驟和第二步驟)中使用的反應氣體的流速比率的第二絕緣層的濕法蝕刻速率中的變化的圖。
圖11是繪示圖10的每一等離子體預處理中的條件的表。
圖12到圖21是示出根據一實施例的基板處理方法的示意圖。
圖22是由根據實施例的基板處理方法形成的半導體裝置的圖。
圖23和圖24是示出根據實施例的基板處理方法以及用所述基板處理方法製造的半導體裝置的圖。
圖25到圖27是更詳細地示出圖16的基板處理方法的圖。
現在將詳細參考實施例,所述實施例的實例在附圖中示出,其中在全文中相似附圖標號指代相似元件。在這方面,本發明實施例可以具有不同形式並且不應被解釋為限於本文中所闡述的描述。因此,實施例僅透過參考圖式在下文中進行描述以說明本說明書的各方面。如本文中所使用,術語「和/或」包含相關的所列項中的一個或多個的任何和所有組合。例如「中的至少一個」等表述當在元件列表之前時修飾元件的整個列表而不是修飾列表的個別元件。
在下文中,將參考附圖詳細描述本公開的一個或多個實施例。
提供本公開的實施例以向本領域的普通技術人員說明本公開的更全面方面,且以下實施例可採用本公開的方面的範圍的形式修飾,但不限於以下實施例。實際上,提供這些實施例以進一步增強本公開以及向本領域的技術人員全面說明本公開的方面。
本說明書中所使用的術語僅用於描述特定實施例,且並不意圖限制本公開。如本文中所使用,單數形式「一(a、an)」以及「所述」意圖還包含複數形式,除非上下文另外明確指示。將進一步理解,術語「包括(comprises/comprising)」在本文中使用時指定所陳述的特徵、整數、步驟、操作、元件和/或元件的存在,但並不排除一個或多個其它特徵、整數、步驟、操作、元件、元件和/或其群組的存在或添加。如本文中所使用,術語「和/或」包含相關的所列項中的一個或多個的任何和所有組合。
應理解,雖然本文中可使用術語第一、第二等來描述各種元件、區域和/或部分,但這些元件、區域和/或部分不應受這些術語限制。這些術語僅用於將一個元件、區域或部分與另一元件、區域或部分區分開。因此,在不脫離示範性實施例的教示的情況下,以下論述的第一元件、區域或部分可被稱為第二元件、區域或部分。
在本公開中,「氣體」可包含氣化固體和/或液體,且可包含單種氣體或氣體混合物。在本公開中,通過噴淋頭引入到反應腔室中的處理氣體可包含前體氣體和添加氣體。前體氣體和添加氣體可通常作為混合氣體或分開地引入到反應空間中。前體氣體可與例如惰性氣體的運載氣體一起引入。添加氣體可包含經稀釋氣體,例如反應氣體和惰性氣體。反應氣體和經稀釋氣體可作為混合物或分開地引入到反應空間中。前體可包含兩個或多於兩個前體,且反應氣體可包含兩種或多於兩種反應氣體。前體是在基
板上化學吸附的氣體且通常包含配置介電層中的基質的主結構的類金屬元素或金屬元素,且用於累積的反應氣體是與前體反應的氣體,在激發所述氣體以將原子層或單層固定在基板上時所述前體在基板上被化學吸附。「化性吸附」表示化學飽和吸附。除處理氣體以外的氣體,即不通過噴淋頭引入的氣體,可用於密封反應空間,所述氣體包含例如惰性氣體的密封氣體。在一些實施例中,「膜」是指在垂直於厚度方向的方向上連續延伸的基本上無針孔的覆蓋整個目標或相關表面層,或僅覆蓋目標或相關表面的層。在一些實施例中,「層」是指形成於表面上的具有一定厚度的結構或膜或非膜結構的同義詞。膜或層可由具有某些特性的離散單膜或單層構成或由多膜或多層構成,且相鄰膜或相鄰層之間的邊界可以透明或可以不透明,且可基於物理、化學和/或任何其它特性、形成過程或工序和/或相鄰膜或相鄰層的功能或目的而建立。
在本公開中,表述「含有Si-N鍵」可指Si-N鍵或由Si-N鍵指定的事物,且具有Si-N鍵或基本上由Si-N鍵配置的主構架和/或Si-N鍵或基本上由Si-N鍵配置的取代基。氮化矽層可以是含有Si-N鍵的介電層,並且可包含氮化矽(SiN)層和氮氧化矽(SiON)層。
在本公開中,表述「一致材料」應解釋為主成分一致。舉例來說,在第一層和第二層皆為由一致材料構成的氮化矽層時,第一層可從由Si2N、SiN、Si3N4以及Si2N3組成的群組中選出,且第二層也可選自以上群組,但第二層的具體膜品質可與第一層
的具體膜品質不同。
另外,在本公開中,由於可工作範圍可以基於常規工作確定,因此變數的任何兩個數位可以構成變數的可工作範圍,並且所指示的任何範圍可以包含或不包含端點。另外,所指示的變數的任何值(與它們是否用「約」指示無關)可以指精確值或近似值並且包含等同物,並且在一些實施例中可以指平均值、中值、代表值、大部分值等。
在未指定條件和/或結構的本公開中,鑒於本公開,本領域的普通技術人員可以按照常規實驗容易地提供這類條件和/或結構。在所有的所公開實施例中,出於既定目的,實施例中所使用的任何元件可以用與其同等的任何元件替換,包含本文中明確、必須或本質上所公開的那些元件。此外,本公開可同等地應用於設備和方法。
在下文中,將參考示意性地說明所述實施例的圖式來描述本發明的實施例。在例如取決於製造技術和/或容限的圖式中,可預期所示形狀的修改。因此,應理解,本公開的實施例不限於本說明書中繪示的區域中的特定形狀,且可包含例如在製造工藝期間所引起的形狀改變。
圖2A到圖2F是示意性地繪示在三維(3D)半導體裝置的階梯結構上形成保護層以及選擇性地蝕刻所述保護層的過程的圖。
為防止接觸通孔穿透第二絕緣層,如圖2A和圖2B中所
示,阻擋層6沉積在階梯結構1上。透過等離子體增強原子層沉積(PEALD)處理,阻擋層6可以沉積在每一階梯的側表面S、上表面U以及下表面L上。等離子體過程是在基板上執行的原位等離子體過程或直接等離子體過程。等離子體過程是非對稱等離子體過程。根據自由基和活性物質的直線性質,由於離子轟擊效應,沉積在階梯的上表面U和下表面L上的阻擋層比沉積在側表面S上的阻擋層更緻密。
因此,如圖2C中所示,在濕法蝕刻工藝(選擇性蝕刻)之後,在側表面S上的阻擋層去除並且階梯結構的在上表面U和下表面L上的阻擋層保留。
另外,在階梯的上表面U與側表面S之間的邊界上的阻擋層以及在階梯的下表面L與側表面S之間的邊界上的阻擋層具有在上表面U上的阻擋層以及側表面S上的阻擋層6的膜密度中間的膜密度,且因此,所述阻擋層保留作為部分保留(或部分去除)的傾斜突出端9。
在這之後,如圖2D中所示,絕緣厚層10沉積在階梯結構1上,且接觸通孔11形成。接觸通孔11中的每一個連接到對應第二絕緣層3上的阻擋層6。由於阻擋層6,可防止接觸通孔11穿透第二絕緣層3。
在後處理中,如圖2E中所示,用金屬填充接觸通孔11以形成金屬線12。在這之後,如圖2F中所示,用例如金屬、多晶矽或摻雜絕緣體的導電材料替換第二絕緣層3和阻擋層6以形成
字線,所述金屬例如鎢、鋁等。因此,柵極電極可經由導電層13連接到金屬線12。
然而,在選擇性蝕刻期間,因為僅阻擋層6的一部分保留在階梯結構1上,例如在下表面L與側表面S之間的邊界上,所以在阻擋層6下方的第二絕緣層3可部分地暴露(參看圖2C)。因此,在選擇性蝕刻工藝期間,第二絕緣層3的暴露部分可因蝕刻溶液而經蝕刻和受損,且導致在用導電材料替換第二絕緣層3時在驅動裝置期間產生電短路。
圖3繪示暴露在階梯的上表面U和下表面L上的第二絕緣層3因過度蝕刻而受損。
在圖3A中,在選擇性地蝕刻阻擋層6時,部分地去除在階梯的側表面S與下表面L之間的邊界上的阻擋層6且第二絕緣層3的部分14暴露於蝕刻溶液。如圖3B中所示,由於第二絕緣層3的暴露部分14,第二絕緣層3可以各種形式受損。舉例來說,部分地去除第二絕緣層3(以位置15表示),浸潤第二絕緣層3的蝕刻溶液沿著阻擋層6與第二絕緣層3之間的邊界浸潤以產生空隙(以位置16表示),或第二絕緣層3可被分隔開(以位置17表示)。在這種情況下,在後處理中用金屬層或導電層替換第二絕緣層3和阻擋層6時,裝置可能不能正常操作且第二絕緣層3和阻擋層6可能不能用作字線。因此,必須解決在蝕刻工藝期間第二絕緣層的一部分的過度蝕刻。
圖4是示出根據一實施例的基板處理方法的流程圖。
參看圖4,形成階梯式結構(S1)。舉例來說,第一絕緣層和第二絕緣層交替地堆疊。接下來,蝕刻堆疊的第一絕緣層和第二絕緣層以獲得階梯式結構,所述階梯式結構具有上表面、下表面以及連接上表面和下表面的側表面。
在這之後,對階梯式結構執行等離子體預處理過程(S2)。可透過使用由將RF功率施加到兩個電極中的至少一個而激發的電容耦合等離子體(capacitive coupled plasma;CCP)來執行等離子體預處理過程。在一實施例中,等離子體預處理可在與用於形成階梯式結構的過程相同的反應器中原位執行,或可在與用於形成階梯式結構的過程不同的反應器中非原位執行。
在一實施例中,可透過使用非對稱等離子體過程來執行等離子體預處理過程,且可由於所述非對稱等離子體過程而選擇性地使階梯式結構的上表面的膜品質緻密。非對稱等離子體過程包含施加等離子體以提供方向性的過程,且可由於等離子體方向性而實現在階梯式結構上的選擇性緻密化。
舉例來說,相對於具有上表面、下表面以及連接上表面和下表面的側表面的階梯式結構,可在與側表面平行的方向上施加等離子體。在這種情況下,由於方向性,等離子體的碰撞大體上發生在結構的上表面和下表面上,且等離子體的碰撞較少發生在結構的側表面上。
在一實施例中,在非對稱等離子體過程期間可使用包含氬氣(Ar)的氣體。在非對稱等離子體過程期間,啟動Ar氣體以
產生活性物質。根據活性物質的方向性,可選擇性地使階梯式結構的上表面緻密,所述階梯式結構的上表面垂直於等離子體活性物質的前進方向,且因此,階梯式結構的上部分的膜品質可相對於濕法蝕刻具有增強的抗性。可由活性物質的離子轟擊效應而產生緻密化。
在另一實施例中,在非對稱等離子體過程期間,可使用包含階梯式結構的組分的氣體。詳細地說,在階梯式結構包含第一材料時,可將第一氣體用作反應氣體以執行等離子體過程,其中第一氣體含有所述第一材料中包含的元素中的一種。舉例來說,在階梯式結構的上表面和下表面包含氮化矽層時,在非對稱等離子體過程期間,可啟動包含階梯式結構的上表面中包含的元素Si和N中的至少一種(例如氮)的氣體(例如N2、NH3)以產生活性物質。由於氮等離子體的方向性,可將氮等離子體施加到階梯式結構的上表面和下表面。因此,為階梯式結構的一種元素的氮組分增加,且因此可獲得富氮的氮化矽層。
根據一實施例,在等離子體預處理過程期間,可因等離子體和/或反應氣體(例如氮離子)中的Ar離子的離子轟擊效應而實現階梯式結構的緻密化。本文中,可透過改變等離子體供應條件(等離子體功率、等離子體頻率、Ar/N2流速等)來調節階梯式結構的密度和濕法蝕刻速率(wet etch rate;WER)特性。
此外,因為氫和氮組分是影響相對於濕法蝕刻(稍後將參看圖9到圖11描述此情況)的抗性的主元素中的一種,所以在
等離子體預處理過程期間可透過調節反應物中的氫量和/或氮量來調節階梯式結構的WER特性。舉例來說,為減少氮化矽層的WER,在等離子體過程期間可使用不包含氫氣的氣體(或不包含氫組分的氣體)。本文中,氣體本身可不包含氫氣,或氣體的組分可不包含氫。舉例來說,在氮化矽層上的等離子體預處理期間,可使用不含有氫的氮氣(例如氮(N2)氣)替代氨氣(NH3)。
在這之後,阻擋層沉積在階梯式結構上(S3)。可透過原子層沉積(atomic layer deposition;ALD)方法,具體地說PEALD處理,來沉積阻擋層。阻擋層可以是絕緣層。舉例來說,阻擋層可以是SiN層。在一個實施例中,阻擋層可具有單層。在另一實施例中,阻擋層可包含雙層結構或以不同處理條件形成的複合層。可在相同反應器中原位或在不同反應器中非原位執行形成階梯式結構和阻擋層的過程。
在這之後,可執行等離子體後處理過程(S4)。可透過使用由將RF功率施加到兩個電極中的至少一個而激發的電容耦合等離子體(CCP)來執行等離子體後處理過程。在一實施例中,等離子體後處理可在與形成階梯式結構和阻擋層的過程相同的反應器中原位執行,或可在不同反應器中非原位執行。
可透過使用非對稱等離子體過程來執行等離子體後處理過程,且可由於所述非對稱等離子體過程而選擇性地使阻擋層緻密。非對稱等離子體過程包含等離子體施加過程以具有方向性,且可由於等離子體方向性而實現沉積在階梯式結構上的薄膜的選
擇性緻密化。
舉例來說,相對於具有上表面、下表面以及連接上表面和下表面的側表面的階梯式結構,可在與側表面平行的方向上施加等離子體。在這種情況下,由於等離子體活性物質的方向性,可選擇性地使形成在階梯式結構的上表面和下表面上的阻擋層緻密,其中阻擋層垂直於等離子體活性物質的處理的方向。因此,階梯式結構的上表面和下表面相對於濕法蝕刻的抗性可以增大為大於階梯式結構的側表面的相對於濕法蝕刻的抗性。
由於根據位置的層的膜品質之間的差異,其中層透過非對稱等離子體的施加而形成,上表面上的阻擋層以及下表面上的阻擋層可在隨後各向同性蝕刻工藝(S5)期間分隔開。
在等離子體後處理過程之後,可執行濕法蝕刻工藝(S5)。在本發明方法中,可去除阻擋層,且阻擋層的去除可透過使用蝕刻溶液來部分地和選擇性地執行(選擇性蝕刻)。也就是說,在阻擋層沉積在階梯式結構上時,執行濕法蝕刻工藝,且因此,去除側表面上的阻擋層同時可保留上表面和下表面上的阻擋層。
如上文所描述,透過使用非對稱等離子體過程來執行等離子體後處理過程,阻擋層可以僅透過濕法蝕刻工藝選擇性地沉積在階梯式結構的上表面和下表面上。此外,在濕法蝕刻工藝期間,選擇性地形成的阻擋層可以充分地分隔開。因此,可省略用於選擇性地形成且在階梯式結構的上表面和下表面上待彼此間隔
開預定距離的阻擋層的光刻工藝。
在透過濕法蝕刻去除阻擋層的一部分時,階梯式結構可在對應於去除部分的位置處暴露於蝕刻溶液。然而,與圖3B中不同,根據本公開不發生由蝕刻溶液導致的對階梯式結構的損害(例如過度蝕刻)。這是因為等離子體預處理過程是在沉積阻擋層以使階梯式結構緻密之前在操作S2中對階梯式結構執行的,且因此改良相對於濕法蝕刻的抗性。
根據一實施例,可透過使用非對稱等離子體過程來執行等離子體預處理。舉例來說,相對於具有上表面、下表面以及連接上表面和下表面的側表面的階梯式結構,可在與側表面平行的方向上施加等離子體。在這種情況下,在透過濕法蝕刻去除側表面上的阻擋層時,可以蝕刻暴露於蝕刻溶液的階梯式結構的側表面。然而,與透過蝕刻側表面上的阻擋層形成具有預定間隔的阻擋層不同,不需要另外蝕刻階梯式結構的側表面,且因此,不必透過使用非對稱等離子體過程來執行等離子體預處理。下文將參看圖25和圖26詳細地描述此情況。
在本說明書中所提及的濕法蝕刻是透過使半導體裝置的結構浸沒到液態型蝕刻溶液中由化學反應蝕刻表面的方法。濕法蝕刻是一種各向同性蝕刻方法,且各向同性蝕刻本身可能無法很大程度上影響階梯式結構以及阻擋層的選擇性蝕刻。實際上,根據本公開,在形成階梯式結構和阻擋層時,透過等離子體預處理改良階梯式結構的抗蝕刻性且執行非對稱等離子體過程,使得結
構的上表面和下表面和其上的阻擋層以及結構的側表面和其上的阻擋層可具有彼此不同的物理性質,因此在後蝕刻處理中實現選擇性蝕刻。換句話說,在蝕刻工藝之前執行的處理成為控制濕法蝕刻處理條件的要素。
上述控制處理條件的要素包含施加等離子體的過程。階梯式結構的選擇性蝕刻以及阻擋層可透過應用以下中的至少一個作為控制後蝕刻處理的要素來實現:階梯式結構和阻擋層的緻密化、等離子體的方向性、活性物質的離子轟擊效應和/或具有絕緣層中包含的組分的氣體等離子體的應用。
圖5是示出根據一實施例的基板處理方法的示意圖。
參看圖5,提供一種改良階梯式結構相對於濕法蝕刻的抗性的方法。根據本發明實施例,在沉積阻擋層之前執行等離子體預處理。
根據本發明實施例,上述方法包含第一步驟、第二步驟以及第三步驟。第一步驟是等離子體預處理過程,第二步驟是沉積阻擋層的過程,以及第三步驟是等離子體後處理過程。
詳細地說,在第一步驟中,將基板(階梯式結構)裝載在反應器中,並且隨後在基板(階梯式結構)上執行等離子體預處理。等離子體預處理透過供應反應氣體而不供應源氣體來啟動作為等離子體的反應氣體。在第一步驟的一個迴圈期間,將反應氣體供應到基板(t0到t2),且在此之後,可以供應反應氣體的狀態將等離子體施加到基板(t1到t2)。啟動的反應氣體的離子轟擊
效應增加目標層的抗濕法蝕刻性。如圖5中所示,將包含供應反應氣體(t0到t2)/施加等離子體(t1到t2)/吹掃(t2到t3)的迴圈反覆執行多次(例如m次)以調節階梯式結構的密度。
在一實施例中,反應氣體可包含暴露的下部基板的膜中包含的元素中的至少一種。舉例來說,在SiN絕緣層暴露在階梯式結構中時,可將包含氮的氣體用作反應氣體。舉例來說,反應氣體可以是N2或NH3。在將包含氮的氣體(具體地說,氣體包含氮而無氫)啟動且施加到階梯式結構時,階梯式結構中包含的N組分增加且可以獲得富含氮(N-rich)的氮化矽層,所述氮為階梯式結構的組分。在這種情況下,階梯式結構的密度可增大。此外,如下文所描述,階梯式結構的抗濕法蝕刻性可增加。
在一實施例中,第一步驟可包含反應氣體預流過程(t0到t1)。透過反應氣體的預流過程,反應氣體可以在將等離子體供應到反應空間之前均勻分佈在反應空間中,且因此,活性物質可以在供應等離子體的過程中均勻分佈且所述過程可以穩定地執行。
在另一實施例中,可透過使用非對稱等離子體過程來執行等離子體預處理過程。舉例來說,相對於具有上表面、下表面以及連接上表面和下表面的側表面的階梯式結構,可在與側表面平行的方向上施加等離子體。本文中,因為Ar離子或反應氣體離子具有方向性(直線性質),所以離子轟擊效應更多地展示在階梯式結構(例如階梯結構)的上表面和下表面上而非在階梯式結構
的側表面上。因此,階梯結構的上部分和下部分比側壁更緻密,且由於等離子體預處理而具有相對較低WER。
如上文所描述,根據本公開的實施例,執行等離子體預處理,且因此,可實現由氮導致的啟動的Ar離子的離子轟擊效應和/或薄膜的緻密化效應,且因此,可選擇性地調節薄膜相對於蝕刻後處理的抗性。
第二步驟是將阻擋層沉積在先前執行等離子體預處理的基板(即階梯式結構)上的過程。第二步驟是PEALD薄膜沉積過程。如圖5中所示,將包含供應源氣體(t3到t4)/吹掃(t4到t5)/供應反應物(t5到t7)/RF等離子體(t6到t7)/吹掃(t7到t8)的基礎PEALD迴圈反覆地執行多次(例如n次)以形成具有所需厚度的阻擋層。
在本發明實施例中,源氣體可以是包含Si的前體,且更詳細地說,包含氨基矽烷基團的前體。可將包含氮的氣體用作反應物。舉例來說,反應氣體可以是N2或NH3。然而,本公開中使用的源氣體和反應物不限於此。TSA、(SiH3)3N;DSO、(SiH3)2;DSMA、(SiH3)2NMe;DSEA、(SiH3)2NEt;DSIPA、(SiH3)2N(iPr);DSTBA、(SiH3)2N(tBu);DEAS、SiH3NEt2;DIPAS、SiH3N(iPr)2;DTBAS、SiH3N(tBu)2;BDEAS、SiH2(NEt2)2;BDMAS、SiH2(NMe2)2;BTBAS、SiH2(NHtBu)2;BITS、SiH2(NHSiMe3)2;TEOS、Si(OEt)4;SiCl4;HCD、Si2Cl6;3DMAS、SiH(N(Me)2)3;BEMAS、Si H2[N(Et)(Me)]2;AHEAD、Si2(NHEt)6;TEAS、
Si(NHEt)4;Si3H8等可用作Si源,或可在供應所述Si源時使用上述材料的組合。在本公開中,反應物可以是包含氫的氮氣,且NH4 +可用于添加到上文所描述的NH3中。將Ar用作吹掃氣體。
在透過反覆地執行第二步驟多次來沉積具有所需厚度的阻擋層之後,可在第三步驟中執行使用Ar氣體的等離子體後處理。在第三步驟的一個迴圈期間,供應Ar氣體(t8到10),且在此之後,可以供應Ar氣體的狀態施加等離子體(t9到t10)。上述迴圈可執行多次(例如x次)。在第三步驟中,可實現由等離子體中的Ar離子導致的離子轟擊效應。
根據一實施例,可透過使用非對稱等離子體過程來執行等離子體後處理。舉例來說,相對於具有上表面、下表面以及連接上表面和下表面的側表面的階梯式結構,可在與側表面平行的方向上施加等離子體。本文中,因為Ar離子具有方向性(直線性質),所以離子轟擊效應更多地展示在階梯式結構(例如階梯結構)的上表面和下表面上的阻擋層上而非在側表面上的阻擋層上。因此,沉積在側壁上的阻擋層並不比沉積在階梯結構的上部分和下部分上的阻擋層更緻密,且具有相對較高WER。
圖6是示出根據一實施例的基板處理方法的示意圖。根據本發明實施例的基板處理方法可以是根據上文所描述的實施例的基板處理方法的修改實例。在下文中,將省略關於實施例的相同要素的描述。
參看圖6,阻擋層可透過等離子體預處理、PEALD阻擋
層沉積、等離子體後處理以及後濕法蝕刻工藝沉積在階梯式結構上。在圖5中所示出的實施例中,在PEALD阻擋層沉積過程期間使用一種反應氣體,但在圖6的實施例中,在PEALD阻擋層沉積過程期間使用兩種反應氣體。
可透過反覆地執行供應反應氣體(t0到t2)/等離子體施加(t1到t2)/吹掃(t2到t3)來將第一步驟(等離子體預處理)執行多次(例如m次)。在此之後,可透過反覆地執行包含供應源(t3到t4)/吹掃(t4到t5)/供應反應氣體(t5到t7)/RF等離子體(t6到t7)/吹掃(t7到t8)的基礎PEALD迴圈來將第二步驟(阻擋層沉積)執行多次(例如n次)。
如上文所描述,階梯式結構相對於後濕法蝕刻的抗性(或蝕刻速率)可依據等離子體預處理中使用的反應物的種類和/或流速(具體地說,反應物中包含的氮量和/或氫量)而變化。舉例來說,等離子體預處理中使用的第一反應物可以是N2或NH3。在將N2用作第一反應物時,階梯式結構的WER和在後濕法蝕刻工藝期間過度蝕刻階梯式結構的可能性將小於在將NH3用作第一反應物時的階梯式結構的WER和在後濕法蝕刻工藝期間過度蝕刻階梯式結構的可能性。
在PEALD阻擋層沉積的過程中,可將各種材料或其組合用作反應氣體,且阻擋層相對於後濕法蝕刻的抗性可依據材料中的氮和/或氫的量而變化。舉例來說,第一反應物可以是N2且第二反應物可以是NH3,這可比第一反應物是NH4且第二反應物是NH3
的情況具有更高的相對於濕法蝕刻的抗性。
圖7是示出根據一實施例的基板處理方法的示意圖。根據本發明實施例的基板處理方法可以是根據上文所描述的實施例的基板處理方法的修改實例。在下文中,將省略關於實施例的相同要素的描述。
參看圖7,阻擋層可透過等離子體預處理、PEALD阻擋層沉積以及後濕法蝕刻工藝沉積在階梯式結構上。在圖6的實施例中,在PEALD阻擋層沉積之後執行等離子體後處理。然而,在圖7中所示出的實施例中,執行後濕法蝕刻工藝而不執行等離子體後處理。
如上文所描述,階梯式結構相對於後濕法蝕刻的抗性可依據等離子體預處理中使用的反應物的種類和/或流速而變化。
此外,在阻擋層沉積工藝(第二步驟)中使用的源材料和反應氣體變化時,沉積的阻擋層相對於後濕法蝕刻的抗性可改變。此外,根據一實施例,可透過調節在阻擋層沉積工藝(第二步驟)中執行的RF等離子體施加(t6到t7)的方向性來以不同方式根據位置調節沉積在階梯式結構上的阻擋層的膜品質。
圖8A到圖8D是繪示對階梯式結構應用圖5的基板處理方法的結果的圖。
如圖8A中所示,階梯式結構可以是階梯結構80,其中第一絕緣層81a和第一絕緣層81b(下文中由附圖標號81表示)與第二絕緣層82a和第二絕緣層82b(下文中由附圖標號82表示)
交替地堆疊。可透過使第一絕緣層81和第二絕緣層82交替地堆疊多次以及對堆疊的第一絕緣層81和第二絕緣層82執行階梯蝕刻來獲得階梯結構80。階梯結構80具有上表面U、下表面L以及使上表面U和下表面L彼此連接的側表面S。
根據一實施例,第一絕緣層81可以是氧化矽層(SiO2)且第二絕緣層82可以是氮化矽層(SiN)。
第一絕緣層81a具有厚度h1,第二絕緣層82a具有厚度h2,第一絕緣層81b具有厚度h3且第二絕緣層82b具有厚度h4。在一實例中,第一絕緣層81a的厚度h1與第一絕緣層81b的厚度h3可彼此相等。在一實例中,第二絕緣層82a的厚度h2與第二絕緣層82b的厚度h4可彼此相等。在一實例中,可符合h1=h2=h3=h4。
參看圖5和圖8B,可對階梯式結構(階梯結構80)執行等離子體預處理過程(第一步驟)。透過等離子體預處理(圖5的第一步驟),可由於等離子體的離子轟擊效應而使第二絕緣層82的暴露部分緻密。詳細地說,可使階梯結構80的上部分緻密,所述上部分為上表面U、下表面L以及側表面S。因此,階梯結構80的上部分的抗濕法蝕刻性可增加。在這種情況下,在後濕法蝕刻工藝期間,第二絕緣層82可不受損或可發生可忽略不計的損害,在此之後,在用金屬層或導電層替換第二絕緣層82時可能不會發生電短路。
第二絕緣層82a中的部分E(暴露於等離子體)的密度可大於第二絕緣層82a中的部分NE(不暴露於等離子體)的密度。
在這種情況下,第二絕緣層82a的暴露於等離子體的部分E的蝕刻速率Ve可小於第二絕緣層82a的部分NE(不暴露於等離子體)的蝕刻速率Vne。此外,由於離子轟擊效應,第二絕緣層82a中的部分E的厚度h2'可等於或小於第二絕緣層82a中的部分NE的厚度h2。也就是說,在第二絕緣層82a中,接觸第一絕緣層81b的部分的厚度h2可等於不接觸第一絕緣層81b的部分的厚度h2'或比所述厚度h2'更厚。因此,第二絕緣層82a的厚度可在下表面L與側表面S之間的邊界(圖8D的85)處改變,且第二絕緣層82a可具有階梯式部分。因此,在導電字線結構形成於去除了第二絕緣層82a和阻擋層(圖8D的83)的對應空間中時,導電字線結構的第一導電層(對應於第二絕緣層82a)的上部分可具有在垂直於另一第一導電層(對應於第二絕緣層82b)的端部的延伸線上的階梯式部分,且所述階梯式部分可與第二導電層(對應於阻擋層83)間隔開。導電字線結構可具有在第一導電層上的第一階梯式部分(對應於圖8D的85)。
同樣地,上表面U的第二絕緣層82b在暴露於等離子體之後可由於離子轟擊而緻密,且可具有相對於後濕法蝕刻的增加的抗性。此外,上表面U中的暴露於等離子體的第二絕緣層82b的厚度h4'可等於或小於暴露於等離子體之前的厚度h4。
根據一實施例,為改良第二絕緣層82的抗濕法蝕刻性,在等離子體預處理期間可將包含第二絕緣層82中包含的元素Si和N中的一種的氣體用作反應氣體,如上文所描述。舉例來說,
可將包含氮(N)的氣體用作反應氣體。在這種情況下,由於離子轟擊,為第二絕緣層82中所包含的氮組分增加,且因此,可獲得富氮的氮化矽層。在這種情況下,第二絕緣層82,具體地說,階梯結構80的上表面U和下表面L上的第二絕緣層82的密度可增加。
如上文所描述,階梯式結構(具體地說,上表面U、下表面L以及側表面S)相對於後濕法蝕刻的抗性可依據等離子體預處理(圖5的第一步驟)中使用的反應氣體的種類和/或流速而變化。也就是說,第二絕緣層82的一部分中的蝕刻速率可受反應氣體的種類和流速中的至少一個控制。可透過調節反應氣體的種類和流速中的至少一個來控制第二絕緣層82的暴露部分上的蝕刻速率,且因此在後濕法蝕刻工藝期間可防止過度蝕刻第二絕緣層82中的部分。也就是說,在後濕法蝕刻工藝期間,可透過調節反應氣體的種類和流速中的至少一個將第二絕緣層82蝕刻到預定厚度或小於預定厚度。
根據一實施例,可透過使用非對稱等離子體過程來執行等離子體預處理(圖5的第一步驟)。舉例來說,可在與側表面S平行的方向上將等離子體施加到階梯結構80。在這種情況下,等離子體通常由於方向性而碰撞階梯結構80的上表面U和下表面L,且可相對較少碰撞側表面S。因此,上表面U和下表面L上的第二絕緣層82的密度可大於側表面S上的第二絕緣層82的密度。在這種情況下,在透過後濕法蝕刻工藝去除側表面S上的阻擋層
時,可蝕刻在階梯式結構的側表面S上的暴露於蝕刻溶液的第二絕緣層82。下文將參看圖25和圖26詳細地描述此情況。
根據另一實施例,等離子體預處理(圖5的第一步驟)可包含選擇性地使在上表面U和下表面L上的第二絕緣層的至少一部分緻密的過程。具體地說,如下文參看圖8D所描述,因為第二絕緣層82a在下表面L與側表面S之間的邊界85處暴露於蝕刻溶液,所以可選擇性地使邊界85上的第二絕緣層82緻密以防止過度蝕刻。舉例來說,在後濕法蝕刻工藝期間,可透過調節等離子體預處理(圖5的第一步驟)中使用的反應氣體的種類和/或流速將邊界85上的第二絕緣層82蝕刻到預定厚度或小於預定厚度。
參看圖5和圖8C,執行阻擋層沉積(圖5的第二步驟)以將阻擋層83沉積在階梯式結構上。阻擋層83可以是與第二絕緣層82一致的材料。舉例來說,在第二絕緣層82是氮化矽層時,阻擋層83也可以是氮化矽層。
在此之後,執行等離子體後處理(圖5的第三步驟)。在本發明實施例中,可在與側表面S平行的方向上將等離子體施加到階梯結構80。本文中,由於Ar離子的方向性(直線性質),上表面U和下表面L上的阻擋層83以及側表面S上的阻擋層83可具有彼此不同的膜品質。也就是說,因為離子轟擊效應聚集在上表面U和下表面L上且較少聚集在側表面S上的阻擋層上,所以膜品質依據位置而變化,且因此在後濕法蝕刻工藝期間可首先蝕刻側表面S上的阻擋層83。因此,上表面U和下表面L上的阻擋
層83保留,且可實現選擇性濕法蝕刻。
更詳細地說,如圖8D中所示,可透過濕法蝕刻首先蝕刻側表面S上的阻擋層83,且因此可暴露側表面S上的第一絕緣層81b和第二絕緣層82b。在這種情況下,上表面U和下表面L上的阻擋層可保留。
另外,在階梯結構80的上表面U與側表面S之間的邊界85上的阻擋層83具有在下表面L上的阻擋層83以及在側表面S上的阻擋層83的膜密度中間的膜密度,且因此,阻擋層83保留作為傾斜突出端87,所述突出端中的一些保留(去除)。也就是說,可在階梯結構80的下表面L與側表面S之間的邊界上部分地蝕刻阻擋層83,且因此,邊界85上的第二絕緣層82a可暴露。
然而,甚至在邊界85上的第二絕緣層82a暴露於蝕刻溶液時,不發生對第二絕緣層82a的損害(例如過度蝕刻)。這是因為在阻擋層83沉積之前在第一步驟中透過對第二絕緣層82a的暴露部分執行等離子體預處理來使階梯式結構的上部分緻密,且因此,相對於蝕刻溶液的抗濕法蝕刻性增加。
根據一實施例,可透過調節等離子體預處理(圖5的第一步驟)的處理條件來將第二絕緣層82a的蝕刻速率調節為比阻擋層83的蝕刻速率慢得多。在這種情況下,在對阻擋層83的濕法蝕刻工藝期間,實際上將不蝕刻第二絕緣層82。
在另一實施例中,可透過調節等離子體預處理(圖5的第一步驟)的處理條件來將第二絕緣層82的蝕刻速率與阻擋層83
的蝕刻速率之間的比率調節為等於或小於預定參考值。具體地說,邊界85上的第二絕緣層82a的蝕刻速率與阻擋層83的蝕刻速率之間的比率可調節為等於或小於預定參考值。在這種情況下,在濕法蝕刻工藝期間將第二絕緣層82蝕刻到預定厚度或小於預定厚度,且過度蝕刻可能不發生在第二絕緣層82上。
圖9是示出根據一實施例的基板處理方法的示意圖。根據本發明實施例的基板處理方法可以是根據上文所描述的實施例的基板處理方法的修改實例。在下文中,將省略關於實施例的相同要素的描述。
參看圖9,阻擋層可透過等離子體預處理、PEALD阻擋層沉積以及後濕法蝕刻工藝沉積在階梯式結構上。圖7中所示的實施例包含一個等離子體預處理階段,但圖9中所示的實施例包含兩個等離子體預處理階段。
可透過反覆地執行包含供應第二反應氣體(t0到t2)/等離子體施加(t1到t2)的迴圈來執行第一步驟(第一等離子體預處理)多次(例如m次)。舉例來說,第一等離子體預處理中使用的第二反應氣體可以是N2或NH3。在此之後,可透過反覆地執行包含供應第一反應氣體(t2到t4)/等離子體施加(t3到t4)的迴圈來執行第二步驟(第二等離子體預處理)多次(例如n次)。舉例來說,第二等離子體預處理中使用的第一反應氣體可以是NH3或N2。在此之後,可透過反覆地執行包含供應源(t5到t6)/吹掃(t6到t7)/供應第一反應氣體和第二反應氣體(t7到t9)/RF等
離子體(t8到t9)/吹掃(t9到t10)的基礎PEALD迴圈來執行第三步驟(阻擋層沉積)多次(例如x次)。
根據本發明實施例,在等離子體預處理中使用兩種類別的反應氣體,且等離子體預處理劃分為兩個階段,但本公開不限於此。舉例來說,在等離子體預處理中可使用「a」種類別的反應氣體,且等離子體預處理可劃分為「b」個階段(本文中a不必等於b)。
根據一實施例,第二步驟中使用的第一反應氣體可與第一步驟中使用的第二反應氣體不同。更詳細地說,在第二步驟中可使用具有相對較低氫量的材料。根據一實施例,考慮到氫氣降低絕緣層的抗濕法蝕刻性因素,不含氫的氣體可用作第一反應氣體和/或第二反應氣體。此外,具有低含量的氫或不具有氫的氮氣可用作第一反應氣體和/或第二反應氣體。此外,第二步驟中使用的第一反應氣體中的氮含量可大於第一步驟中使用的第二反應氣體中的氮含量。
在一個實施例中,在第二絕緣層包含第一材料時,包含第一材料中包含的元素中的一種的第一氣體可用作第一氣體以執行圖9中所示的等離子體過程。在這種情況下,為第二絕緣層的組分中的一種的上述元素增加,且第二絕緣層的密度可增大。舉例來說,在第一材料是氮化物材料時,第一反應氣體可以是包含氮的氣體,且在這種情況下,第二絕緣層可形成為富氮的絕緣層。第二絕緣層的蝕刻速率可受第一氣體的種類和流速中的至少一個
控制。舉例來說,因為反應氣體中的氫組分限制膜的緻密化且反應氣體中的氮組分促進膜的緻密化,所以包含氮的第一氣體可用作第一氣體或不含有氫的第一氣體可用作反應氣體以增大第二絕緣層的密度。在一實施例中,包含第一材料中包含的元素中的至少一種的第二氣體可用作反應氣體以執行圖9的等離子體過程。作為一實例,第一氣體可以是不含氫氣體且第二氣體可以是含氫氣體。在這種情況下,可根據不含氫氣體與含氫氣體之間的流速比率來控制第二絕緣層的蝕刻速率。具體地說,可調節不含氫氣體與含氫氣體之間的流速比率,使得第二絕緣層的蝕刻速率可比預定參考蝕刻速率慢,同時各向同性地蝕刻包含第二絕緣層(圖8C的82)和阻擋層(圖7C的83)的犧牲字線結構的至少一部分。
如下文參看圖10和圖11所描述,階梯式結構(具體地說,階梯式結構的上部分)的密度以及相對於後濕法蝕刻工藝的抗性(或蝕刻速率)可根據等離子體預處理過程(圖9的第一步驟和第二步驟)的處理參數中的差而改變。舉例來說,在第一反應氣體是N2且第二反應氣體是NH3時,WER低於第一反應氣體是NH4且第二反應氣體是NH3的情況下的WER。
圖10繪示根據等離子體預處理(圖7的第一步驟和圖9的第一步驟和第二步驟)中使用的反應氣體的類別和/或流速比率的暴露於等離子體的第二絕緣層的濕法蝕刻速率中的變化。圖11是示出圖10的每一等離子體預處理中的條件的表。在本發明實施例中,第一絕緣層包含SiO2且第二絕緣層包含SiN。
條件#1到#3是在根據圖7中所示實施例的基板處理方法的等離子體預處理(第一步驟)中僅供應N2氣體。條件#4到#7包含在第一等離子體預處理中供應NH3作為第二反應氣體以及在第二等離子體預處理中供應N2作為第一反應氣體,根據圖9中所示實施例的基板處理方法。
圖10繪示根據等離子體預處理條件#1到#7的第二絕緣層的WER。如圖10所示,預定參考濕法蝕刻速率是1.51安/秒。在第二絕緣層的WER大於1.51安/秒時,暴露的第二絕緣層可在阻擋層上的濕法蝕刻工藝期間受損(過度蝕刻)。因此,必須將第二絕緣層的蝕刻速率調節為等於或小於預定參考速度(1.51安/秒)。
參看圖10和圖11,第二絕緣層的根據條件#4到#7的WER大於第二絕緣層的根據條件#1到#3的WER。也就是說,氫氣使絕緣層的抗濕法蝕刻性減弱。在使用包含氫的氣體時,可在第二絕緣層上產生更多Si-H鍵,且因此,第二絕緣層的WER在後濕法蝕刻工藝中增加。
具體地說,在對比條件#4與條件#7時,除了條件#7中供應的NH3的量(3升)比條件#4中供應的NH3的量更大以外,條件#4與條件#7彼此一致。本文中,第二絕緣層在條件#7中的WER大於在條件#4中的WER(1.38安/秒相較于1.36安/秒)。也就是說,隨著反應物中的氫含量增加,WER也增加。
在對比條件#1與條件#2時,識別出隨著第二絕緣層中的
氮含量增加,WER減少。除了條件#2施加的等離子體功率比條件#1施加的等離子體功率更大以外,條件#2與條件#1一致。在這種情況下,由於條件#2中的更大等離子體功率,根據條件#2形成的第二絕緣層(SiN)比根據條件#1形成的第二絕緣層(SiN)更緻密(例如具有更多Si-N鍵),且因此具有比根據條件#1形成的第二絕緣層更小的WER。
也就是說,根據圖10和圖11,反應物中的氫組分限制膜的緻密化且反應物的氮組分促進膜的緻密化。
因此,可根據在等離子體預處理過程中供應的反應物的種類和/或流速比率來控制下層的WER,即在階梯結構的第二絕緣層中的暴露於等離子體的部分。舉例來說,考慮到氫氣降低絕緣層的抗濕法蝕刻性,在等離子體預處理期間供應Ar和N2的混合氣體而不供應氫或包含氫的氣體以減少第二絕緣層的WER。
圖12到圖20是示出根據實施例的基板處理方法的示意圖。根據本發明實施例的基板處理方法可以是根據上文所描述的實施例的基板處理方法的修改實例。在下文中,將省略關於實施例的相同要素的描述。
參看圖12,堆疊結構在基板200上堆疊多次,其中堆疊結構分別包含絕緣層210a、絕緣層210b、絕緣層210c以及絕緣層210d(下文中由附圖標號210表示)以及第一犧牲層220a、第一犧牲層220b、第一犧牲層220c以及第一犧牲層220d(下文中由附圖標號220表示)。舉例來說,絕緣層210可以是氧化矽層,
且第一犧牲層220可以是氮化矽層。然而本公開不限於此,且絕緣層210和第一犧牲層220可包含具有與彼此不同的蝕刻選擇性的任何材料。
在此之後,蝕刻絕緣層210和第一犧牲層220以形成溝道孔,且用於形成記憶體單元串(圖22的MCS)的組件的至少一部分的過程在所述溝道孔中執行。記憶體單元串可包含如溝道、柵極導電層以及柵極絕緣層的這類組件。
用於形成記憶體單元串的元件的過程可透過以下來執行:直接形成溝道、柵極導電層以及柵極絕緣層的至少一部分;在溝道孔中形成犧牲層使得溝道、柵極導電層以及柵極絕緣層可在後處理中形成;或其組合。
接下來,蝕刻堆疊結構以形成階梯結構,所述階梯結構包含上表面、下表面以及使上表面和下表面彼此連接的側表面。舉例來說,如圖13中所示,蝕刻堆疊結構包含絕緣層210和第一犧牲層220的端部部分以形成具有階梯形狀的階梯式結構。具有階梯形狀的階梯式結構可透過例如反應式離子蝕刻和抗蝕減縮來獲得。
在具有階梯形狀的階梯式結構形成時,階梯式結構包含上表面、下表面以及連接上表面和下表面的側表面。舉例來說,階梯式結構可包含至少一個階梯ST,且一個階梯ST包含第一犧牲層220b上的上表面U、第一犧牲層220a上的下表面L以及使上表面U和下表面L彼此連接的側表面S。
參看圖14,執行使具有階梯形狀的階梯式結構緻密的過程,即等離子體預處理。可透過使用例如Ar的惰性氣體和/或包含階梯式結構的組分(例如在第一犧牲層220是氮化矽層的情況下為氮)的氣體來執行等離子體預處理。
可透過使用非對稱等離子體過程來執行等離子體預處理(即緻密化過程)。由於非對稱等離子體過程中等離子體離子的方向性,可以僅使第一犧牲層220(例如第一氮化矽層)(即階梯結構的上表面U和下表面L上的第一犧牲層220(例如第一氮化矽層))的上部分的一部分,緻密。因此,可實現在各向同性蝕刻工藝期間選擇性蝕刻階梯式結構上的犧牲層。
根據一實施例,可以選擇性地使在階梯式結構的上表面U和下表面L上的第一犧牲層220的至少一部分緻密。舉例來說,可以選擇性地使在側表面S與下表面L之間的邊界上的第一犧牲層220緻密。在另一實施例中,(例如透過調節反應氣體的種類和/或流速)調節非對稱等離子體過程的條件,使得犧牲層220的至少一部分(例如在側表面S與下表面L之間的邊界上的第一犧牲層220)的蝕刻速率與第二犧牲層(圖15的230)的蝕刻速率之間的比率可等於或小於預定參考值,並且隨後可選擇性地使犧牲層220的至少一部分緻密。因此,在對第二犧牲層(圖15的230)的後各向同性蝕刻期間,可將第一犧牲層220的至少一部分蝕刻到預定厚度或小於預定厚度。
在一替代性實施例中,在形成第二犧牲層(圖15的230)
之前,可處理第一犧牲層220使得在上表面U和下表面L上的暴露部分的密度可大於第一犧牲層220的未暴露部分的密度。根據一實施例,可處理(例如非對稱等離子體過程)第一犧牲層220使得在上表面U和下表面L上的暴露部分的密度比第一犧牲層220的未暴露部分的密度大預定比率或更多。透過調節第一犧牲層220的暴露部分的密度,第一犧牲層220的暴露部分的蝕刻速率與第二犧牲層230的蝕刻速率之間的比率可等於或小於預定參考值,以便在各向同性蝕刻工藝期間防止過度蝕刻第一犧牲層220。在這種情況下,在透過後各向同性蝕刻工藝蝕刻第二犧牲層230時,可將上表面U和下表面L上的第一犧牲層220的暴露部分蝕刻到預定厚度或小於預定厚度。
參看圖15,至少一個層沉積在具有階梯形狀的階梯式結構上。所述至少一個層可以是絕緣層,且所述絕緣層可以透過根據上文所描述的實施例的PEALD處理來形成。在這種情況下,第二犧牲層230可沉積在階梯式結構上。
在一個實施例中,第一犧牲層220和第二犧牲層230可具有相同材料。舉例來說,在第一犧牲層220是氮化矽層時,第二犧牲層230可以是氮化矽層(即第二氮化矽層)。
在另一實施例中,第二犧牲層230可具有與第一犧牲層220的物理性質不同的物理性質。舉例來說,在第一犧牲層220和第二犧牲層230分別是第一氮化矽層和第二氮化矽層時,在等離子體預處理期間使用不含氫氣體且在形成第二犧牲層230時可
使用含氫氣體。
在一實施例中,可調節在形成第二犧牲層230期間使用的不含氫氣體與含氫氣體的流動速率,使得可將第一犧牲層220蝕刻到預定厚度或小於預定厚度同時透過後各向同性蝕刻來蝕刻第二犧牲層230,即,使得第二犧牲層230的蝕刻速率可以比第一犧牲層220的蝕刻速率快預定比率或更多。舉例來說,在第二犧牲層230形成時,可供應比氮更多的氨。因此,第二犧牲層230中的氫與氮的比率可以大於第一犧牲層220中的氫與氮的比率。這是基於反應物中的氫組分限制膜的緻密化且氮組分促進膜的緻密化(參看圖10)。因此,在對第二犧牲層230的各向同性蝕刻期間,可將第一犧牲層220蝕刻到預定厚度或小於預定厚度。
在此之後,執行第二犧牲層230的緻密化,即等離子體後處理。可透過使用例如Ar的惰性氣體和/或含有第二犧牲層的組分(例如在第二犧牲層230是氮化矽層時為氮)來執行等離子體後處理過程。
可透過使用非對稱等離子體過程來執行等離子體後處理。由於非對稱等離子體過程中的等離子體離子的方向性,可僅使上表面U和下表面L上的第二犧牲層230緻密。因此,可實現在各向同性蝕刻工藝期間選擇性蝕刻階梯式結構上的第二犧牲層。
參看圖16,執行蝕刻犧牲字線結構的至少一部分的過程,所述犧牲字線結構包含第一犧牲層220和第二犧牲層230(例
如第一氮化矽層和第二氮化矽層)。上述蝕刻可以是各向同性蝕刻工藝。更詳細地說,可透過使用濕法蝕刻工藝,例如透過使用磷酸或氫氟酸來執行蝕刻工藝。
由於非對稱等離子體後處理過程,在蝕刻工藝期間,階梯的側表面S上的第二犧牲層(例如第二氮化矽層)的蝕刻速率可比階梯的上表面U和下表面L上的第二犧牲層的蝕刻速率更快。因此,僅去除側表面S上的犧牲層,且可保留上表面U和下表面L上的犧牲層。如上文所描述,薄膜(在這種情況下,第二犧牲層)可僅透過非對稱等離子體後處理和濕法蝕刻工藝來選擇性地沉積在階梯式結構的上部分和下部分上,而無需執行光刻工藝。
此外,在蝕刻工藝期間,第一犧牲層220的暴露部分的蝕刻速率可比第二犧牲層230的蝕刻速率慢。這可能是因為第一犧牲層220在等離子體預處理期間緻密且第一犧牲層220的抗蝕刻性相對改良,和/或因為在第二犧牲層230的形成期間供應相對大量的含有氫的反應物且第二犧牲層230具有低密度。
在一個實施例中,可根據以下機制中的一種執行蝕刻工藝。
-第一機制(透過非對稱等離子體預處理來僅使一個階梯的上表面U和下表面L緻密且執行非對稱等離子體後處理的情況):首先去除一個階梯的側表面S上的第二犧牲層230。因此,所述階梯的側表面S上的第一犧牲層220和絕緣層210可暴露於
蝕刻材料(參看圖25)。本文中,可去除暴露於蝕刻材料的側表面S上的第一犧牲層220和絕緣層210。這是因為由於非對稱等離子體預處理,側表面S上的第一犧牲層220和絕緣層210並未緻密。本文中,可去除側表面S上保留的第二犧牲層230。因此,在一個階梯的側表面S與下表面L之間的邊界上的第一犧牲層220可暴露於蝕刻劑。然而,可不去除或可略微去除(例如去除到預定程度)暴露於蝕刻劑的第一犧牲層220。這是因為執行了非對稱等離子體預處理且第一犧牲層220的上部分緻密(參看圖26)。
因此,在導電字線結構形成於去除了犧牲字線結構的對應空間中時,導電字線結構的第一導電層(圖20的C1)可不包含在側表面S與下表面L之間的邊界處的凹部,但可具有相對較平坦的上表面。然而,因為第一犧牲層220的側表面被蝕刻,所以第一導電層(圖20的C1)的側表面將是不平坦的。
-第二機制(透過等離子體預處理來使一個階梯的上表面U、下表面L以及側表面S緻密且執行非對稱等離子體後處理的情況):首先去除一個階梯的側表面S上的第二犧牲層230。因此,所述階梯的側表面S上的第一犧牲層220和絕緣層210可暴露於蝕刻劑(參看圖27)。此外,在一個階梯的側表面S與下表面L之間的邊界上的第一犧牲層220可暴露於蝕刻劑。然而,可不去除或可略微去除(例如去除到預定程度)暴露於蝕刻劑的第一犧牲層220和絕緣層210。這是因為由於等離子體預處理,上表面U、下表面L以及側表面S上的第一犧牲層220和絕緣層210緻密(參
看圖26)。
因此,在導電字線結構形成於去除了犧牲字線結構的對應空間中時,導電字線結構的第一導電層(圖20的C1)可不包含在側表面S與下表面L之間的邊界處且在側表面S中的凹部,但可具有相對較平坦的上表面和側表面。
更詳細地說,由於非對稱等離子體後處理過程,上表面U和下表面L上的第二犧牲層230與側表面S上的第二犧牲層230具有彼此不同的物理性質,且上表面U和下表面L上的第二犧牲層230的抗濕法蝕刻性大於側表面S上的第二犧牲層230的抗濕法蝕刻性。因此,在上表面U與側表面S之間的邊界處的第二犧牲層230可比側表面S更加突出,且在下表面L與側表面S之間的邊界處的第二犧牲層230可朝向側表面S突出。
此外,在因為執行等離子體預處理而並不蝕刻或略微蝕刻(例如蝕刻到預定程度)上表面U和下表面L上的第一犧牲層210時,第一犧牲層210可不因過度蝕刻而受損,且因此第一犧牲層210可具有相對較平坦的上表面。
在單一蝕刻工藝期間執行上述第一機制和第二機制。也就是說,根據實施例的基板處理方法允許薄膜選擇性地沉積在具有階梯的結構上而無需執行額外光刻工藝。此外,透過在等離子體預處理過程中調節處理參數,在選擇性地沉積薄膜期間,例如過度蝕刻的各種類型的損害可能不發生在階梯式結構上。
參看圖17,層間絕緣層250沉積在犧牲字線結構上。層
間絕緣層250可包含與在階梯式結構上的第一犧牲層220之間的絕緣層210的材料相同的材料。舉例來說,階梯式結構的第一犧牲層220可以是氮化矽層且階梯式結構的絕緣層210可以是氧化矽層,並且隨後層間絕緣層250可以是氧化矽層。
參看圖18,連接到第二犧牲層230的至少一部分的接觸通孔260透過圖案化工藝形成於層間絕緣層250的上表面中。根據一實施例,接觸通孔260可在透過蝕刻第一犧牲層220和第二犧牲層230形成導電字線結構之後形成。
參看圖19,蝕刻第一犧牲層220和第二犧牲層230,並且隨後暴露溝道(未示出)、絕緣層210、層間絕緣層250以及接觸通孔260。因此,可去除包含第一犧牲層(圖18的220)和第二犧牲層(圖18的230)的犧牲字線結構。根據一實施例,也可在蝕刻犧牲層的同時去除基板200上的第二犧牲層(圖18的230'),且因此可部分地暴露基板200的上表面。
參看圖20,導電字線結構WL形成於暴露空間中。導電字線結構WL可形成於去除了犧牲字線結構的對應空間中。導電字線結構WL可包含由例如鎢、銅、多晶矽等的各種導電材料或其組合中選出的材料。
導電字線結構WL可具有以下結構:-第一導電層C1(對應於第一犧牲層(圖18的220)),朝向溝道延伸;-第二導電層C2(對應於第二犧牲層(圖18的230)),
在第一導電層C1的端部部分上。
換句話說,導電字線結構WL中包含的第一導電層C1和第二導電層C2來源於透過不同過程形成的層(即犧牲層)。
如上文參看圖8B所描述,根據實施例,在形成第二犧牲層之前執行使階梯式結構緻密的過程,即等離子體預處理。因此,由於離子轟擊效應,在暴露於等離子體的部分(即階梯式結構的上表面U和下表面L)上的第一犧牲層的高度等於或小於在並不暴露於等離子體的部分上的第一犧牲層的高度。因此,如圖21中所示,在導電字線結構WL的第一導電層C1中,在等離子體預處理期間暴露於等離子體的部分的厚度可以等於或小於並不暴露於等離子體的部分的厚度。因此,第一導電層C1可具有第一階梯S1。詳細地說,第一階梯S1可定位于垂直于定位於第一導電層C1上的另一第一導電層C1的端部的延伸線上。此外,導電字線結構WL可具有由第一導電層C1和第一導電層C1上的第二導電層C2形成的第二階梯S2。第二階梯S2可包含第二導電層C2的上表面U1、第二導電層C2的側表面U2以及第一導電層C1的上表面U3。在一個實施例中,第一階梯S1與第二階梯S2可彼此間隔開。
圖22是根據一實施例的半導體裝置的電路圖。可透過根據上述實施例的基板處理方法來製造半導體裝置。在下文中,將省略關於實施例的相同要素的描述。
參看圖22,半導體記憶體裝置可包含基板200、記憶體
單元串MCS、第一字線WL1以及第二字線WL2。
記憶體單元串MCS可延伸為從基板200突出。記憶體單元串MCS可包含多個記憶體單元。雖然圖22中僅示出四個記憶體單元,但是一個記憶體單元串MCS中可包含更多個或更少個記憶體單元。
第一字線WL1可連接到第一記憶體單元MC1。舉例來說,第一字線WL1可朝向第一記憶體單元MC1的溝道延伸。同樣地,第二字線WL2可連接到第二記憶體單元MC2,且第二字線WL2可朝向第二記憶體單元MC2的溝道延伸。
第一字線WL1和第二字線WL2中的至少一個可包含透過圖20中所示的過程形成的字線結構。因此,第一字線WL1和第二字線WL2中的至少一個可包含朝向溝道延伸的第一導電層C1和第一導電層C1上的第二導電層C2,且在第一導電層C1中,接觸第二導電層C2的部分的厚度(圖8B的h2')等於或小於不接觸第二導電層C2的部分的厚度(圖8B的h2)。
圖23是由根據實施例的基板處理方法形成的半導體設備的圖。根據實施例的半導體裝置可以是根據上文所描述的實施例的半導體裝置的修改實例。在下文中,將省略關於實施例的相同要素的描述。
參看圖23,半導體裝置與圖20的半導體裝置的不同在於第二犧牲層230'保留在基板200上。基板200上的第二犧牲層230'可保留,因為在圖19中所示的犧牲層的蝕刻工藝期間第二犧牲層
230'並不暴露於蝕刻溶液。在這種情況下,基板200上的第二犧牲層230'可以是保留在半導體裝置的最終產物上的結構。
圖24是示出根據一實施例的基板處理方法以及用所述基板處理方法製造的半導體裝置的圖。根據本發明實施例的基板處理方法和半導體裝置可以是根據上文所描述的實施例的基板處理方法和半導體裝置的修改實例。在下文中,將省略關於實施例的相同要素的描述。
參看圖24,絕緣層210可以是氧化矽層且包含第一犧牲層220和第二犧牲層230的犧牲字線結構可包含氮化矽層(即第一氮化矽層和第二氮化矽層)。為使階梯結構ST的上部分上的犧牲字線結構與階梯結構ST的下部分上的犧牲字線結構分隔開,可對氮化矽層執行磷酸蝕刻工藝。
如圖24中所示,在磷酸蝕刻工藝期間,第二犧牲層可具有平行四邊形狀突出端結構。這可能是因為,如上文所描述,由於非對稱等離子體後處理,階梯式結構的上表面U和下表面L上的第二犧牲層的蝕刻速率與側表面S上的第二犧牲層的蝕刻速率彼此不同。
因為在下表面L與側表面S之間的邊界85上的第二犧牲層被蝕刻,所以可部分地暴露第一犧牲層。然而,由於等離子體預處理,在磷酸蝕刻工藝期間可不蝕刻第一犧牲層的暴露部分或可僅將其蝕刻到可忽略的程度。因此,空腔可能不能在第一犧牲層中產生,且由於蝕刻而使第一犧牲層間隔開和/或分離的可能性
可降低。
如上文所描述,根據實施例的基板處理方法可防止在選擇性地在階梯式結構上形成薄膜的過程期間過度蝕刻階梯式結構或在結構中產生空腔。因此,可防止在隨後用金屬層替換階梯式結構的犧牲層時產生電短路。
為理解的方便起見,隨附圖式中的各元件的形狀為示範性的。另外,可以不同方式修改以上形狀。貫穿本說明書,相似參考標號表示相同元件。
應理解,本文中所描述的實施例應被視為僅具有描述性意義,而非出於限制性目的。每一實施例內的特徵或方面的描述通常應被視為是可用於其它實施例中的其它類似特徵或方面。
雖然已參考圖式描述一個或多個實施例,但本領域的一般技術人員應理解,可在不脫離隨附權利要求書所界定的本發明概念的精神和範圍的情況下對實施例在形式和細節上進行各種改變。
S1、S2、S3、S4、S5‧‧‧步驟
Claims (18)
- 一種基板處理方法,包括: 交替地堆疊第一絕緣層以及第二絕緣層; 透過蝕刻堆疊的所述第一絕緣層以及所述第二絕緣層來形成階梯式結構,所述階梯式結構具有上表面、下表面以及使所述上表面連接到所述下表面的側表面; 使所述階梯式結構緻密; 在緻密化的所述第二絕緣層上形成阻擋層;以及 對包含所述第二絕緣層以及所述阻擋層的犧牲字線結構的至少一部分執行各向同性蝕刻。
- 如申請專利範圍第1項所述的基板處理方法,其中所述使所述階梯式結構緻密包括使所述第二絕緣層的上部分緻密。
- 如申請專利範圍第2項所述的基板處理方法,其中所述使所述第二絕緣層的所述上部分緻密包括選擇性地使所述第二絕緣層的一部分緻密,所述部分在所述階梯式結構的所述側表面與所述下表面之間的邊界處。
- 如申請專利範圍第3項所述的基板處理方法,其中在所述各向同性蝕刻所述犧牲字線結構的至少一部分期間,在所述側表面與所述下表面之間的所述邊界上的所述第二絕緣層的所述部分的蝕刻速率與所述阻擋層的蝕刻速率之間的比率等於或小於預定參考值。
- 如申請專利範圍第1項所述的基板處理方法,其中在所述各向同性蝕刻所述犧牲字線結構的至少一部分期間,在所述階梯式結構的所述上表面以及所述下表面上的所述第二絕緣層中的暴露部分的蝕刻速率慢於所述第二絕緣層的未暴露部分的蝕刻速率。
- 如申請專利範圍第2項所述的基板處理方法,其中在所述各向同性蝕刻所述犧牲字線結構的至少一部分期間,將所述第二絕緣層中的一部分蝕刻到預定厚度或小於預定厚度,所述部分在所述側表面與所述下表面之間的邊界上。
- 如申請專利範圍第1項所述的基板處理方法,其中所述第二絕緣層包括第一材料,以及 所述使所述階梯式結構緻密包括透過使用第一氣體作為反應氣體來執行等離子體過程,所述第一氣體包含所述第一材料中包含的元素中的一種。
- 如申請專利範圍第7項所述的基板處理方法,其中所述第二絕緣層的蝕刻速率受所述第一氣體的種類以及流速中的至少一個控制。
- 如申請專利範圍第7項所述的基板處理方法,其中所述第一材料包含氮化物材料,且所述第一氣體包含氮。
- 如申請專利範圍第7項所述的基板處理方法,其中所述第一氣體是不含氫氣體。
- 如申請專利範圍第10項所述的基板處理方法,其中所述使所述階梯式結構緻密包括透過使用第二氣體作為反應氣體來執行等離子體過程,所述第二氣體包含所述第一材料中包含的所述元素中的至少一種,以及 所述第二氣體是含氫氣體。
- 如申請專利範圍第11項所述的基板處理方法,其中在所述各向同性蝕刻所述犧牲字線結構的至少一部分期間,所述第二絕緣層的蝕刻速率受所述不含氫氣體與所述含氫氣體的流速比率控制且調節為慢於預定參考蝕刻速率。
- 如申請專利範圍第1項所述的基板處理方法,其中所述在於所述第二絕緣層上形成所述阻擋層期間使用含氫氣體,以及 在所述形成所述阻擋層期間使用的所述含氫氣體的流速受控制,使得定位於所述側表面與所述下表面之間的邊界上的所述第二絕緣層的一部分的蝕刻速率與所述阻擋層的蝕刻速率之間的比率等於或小於預定參考值。
- 如申請專利範圍第1項所述的基板處理方法,進一步包括: 在所述犧牲字線結構上形成層間絕緣層; 去除所述犧牲字線結構;以及 在去除了所述犧牲字線結構的對應空間中形成導電字線結構, 其中所述導電字線結構包括: 第一導電層,朝向溝道延伸;以及 第二導電層,在所述第一導電層上, 其中用等離子體過程執行所述階梯式結構的緻密化,且在所述第一導電層中,接觸所述第二導電層的部分的厚度小於所述第一導電層的其餘部分的厚度。
- 一種基板處理方法,包括: 將堆疊結構堆疊多次,所述堆疊結構包含絕緣層以及第一犧牲層; 透過蝕刻階梯式結構來形成包含上表面、下表面以及使所述上表面與所述下表面彼此連接的側表面的所述階梯式結構; 在所述階梯式結構上形成第二犧牲層;以及 對所述第二犧牲層的至少一部分執行各向同性蝕刻, 其中,在所述形成所述第二犧牲層之前,處理所述第一犧牲層使得在所述階梯式結構的所述上表面以及所述下表面上的所述第一犧牲層的暴露部分的密度比所述第一犧牲層的未暴露部分的密度大預定比率或更多。
- 如申請專利範圍第15項所述的基板處理方法,其中在所述對所述第二犧牲層的至少一部分的各向同性蝕刻期間,所述第一犧牲層的所述暴露部分上的蝕刻速率與所述第二犧牲層上的蝕刻速率之間的比率等於或小於預定參考值。
- 如申請專利範圍第16項所述的基板處理方法,其中在所述對所述第二犧牲層的至少一部分的各向同性蝕刻期間,將在所述上表面以及所述下表面上的所述第一犧牲層的暴露部分蝕刻到預定厚度或小於預定厚度。
- 一種基板處理方法,包括: 選擇性地使階梯式結構緻密,所述階梯式結構包含上表面、下表面以及使所述上表面與所述下表面彼此連接的側表面; 在所述階梯式結構上形成至少一個層;以及 對所述至少一層執行各向同性蝕刻, 其中,在所述各向同性蝕刻之前,所述至少一個層中的氫與氮的比率大於所述階梯式結構中的氫與氮的比率。
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