TW201833993A - 拓撲受限電漿增強循環沉積方法 - Google Patents
拓撲受限電漿增強循環沉積方法 Download PDFInfo
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- TW201833993A TW201833993A TW106138996A TW106138996A TW201833993A TW 201833993 A TW201833993 A TW 201833993A TW 106138996 A TW106138996 A TW 106138996A TW 106138996 A TW106138996 A TW 106138996A TW 201833993 A TW201833993 A TW 201833993A
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Classifications
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01C—AMMONIA; CYANOGEN; COMPOUNDS THEREOF
- C01C3/00—Cyanogen; Compounds thereof
- C01C3/14—Cyanic or isocyanic acid; Salts thereof
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
- C23C16/509—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
- C23C16/5096—Flat-bed apparatus
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32174—Circuits specially adapted for controlling the RF discharge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
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Abstract
在一具體例中,本發明提供一種將設置於模板上具有間隔之垂直間隔件所構成之圖案轉移至該模板之方法,其包括藉由電漿增強循環沉積將作為間隔件傘層之層實質上僅沉積於由矽或金屬氧化物製成之各垂直間隔件的頂表面上,其中實質上沒有層被沉積於垂直間隔件之側壁及模板之暴露表面上,隨後使用具有間隔件傘層的垂直間隔件,藉由各向異性蝕刻,將垂直間隔件所構成之圖案轉移至模板。
Description
本申請案依據35 USC 119(e)主張2016年11月28日提出申請之美國臨時申請案第62/426,804號之權利,將該案之全體揭示內容以引用的方式併入本文。
本發明大致係關於一種電漿增強循環沉積之方法,特定言之係一種拓撲受限電漿增強循環沉積之方法,其稱為拓樸致能選擇性沉積或TESD,其中一膜選擇性地沉積於溝槽間的頂表面上。此技術不被視為ALD,但其最初係使用電漿增強原子層沉積(PEALD)設備所衍生,因此,此技術原來被稱作地理致能選擇性ALD或GESA。由於本發明人已使用「GESA」來代表此技術,因此在本揭示內容中,使用術語「GESA」來指稱拓樸致能選擇性沉積。此外,在本揭示內容中,關於本發明,術語「ALD」或「PEALD」係指在適用於ALD或PEALD之設備中的循環沉積,而非指稱原子層沉積或電漿增強ALD。
關於在基板上沉積介電膜之方法,已知典型為化學氣相沉積 (CVD)及原子層沉積(ALD)。熟悉技藝人士通常使用電漿增強CVD(PECVD)及電漿增強ALD(PEALD)來形成介電膜。PEALD係一種使用前驅體之化學吸附沉積介電膜的技術,且其相較於PECVD,可改良沉積於基板之凹部圖案上之膜的階梯覆蓋率。然而,當藉由PEALD將除SiO膜外之介電膜沉積於凹部圖案上時,在該處於具有電漿的氛圍中進行硝化或碳取代反應,沉積於側壁上之膜厚度有時會較沉積於頂表面上之膜厚度小。此問題可由相較於在頂表面或底表面上之反應速度干擾在側壁上之反應速度的離子碰撞所引起。特定而言,硝化相較於氧化具有低側壁反應速率,從而會引起薄膜沉積於側壁上、沉積於側壁上之膜劣化等等的問題。通常,在凹部圖案中藉由PEALD之膜的保形性(沉積於側壁上之SiN或SiCN膜之厚度與沉積於頂表面上之膜厚度的比率(百分比))可在60%至90%之範圍內。雖然沉積具高保形性之膜具有優點,但本發明人已發現在(例如)使用間隔件界定雙重圖案化(SDDP,spacer-defined double patterning)之圖案轉移及目標蝕刻之製程中沉積實質上具零保形性之膜(即實質上沒有膜沉積於凹部圖案之側壁上)的顯著優點,其中藉由使用實質上僅沉積於垂直間隔件之頂表面上之膜作為硬遮罩,可有效地避免在製程期間之任何可能的優先蝕刻(其通常以特定結晶取向發生)及喪失解析度。本發明人已進行研究在PEALD中沉積實質上具零保形性之膜。
關於相關技術之問題及解決方案的任何論述,僅為提供本發明之背景脈絡而包括於本揭示中,不應被視為同意該論述的任何或全部在本發明完成之際為已知。
一些具體例提供一種將設置於模板上具有間隔之垂直間隔件所構成之圖案轉移至該模板之方法,其包括:藉由電漿增強原子層沉積(PEALD)將作為間隔件傘層之層實質上僅沉積於由矽或金屬氧化物製成之 各垂直間隔件的頂表面上,其中實質上沒有層被沉積於垂直間隔件之側壁及模板之暴露表面上,隨後使用具有間隔件傘層的垂直間隔件,藉由各向異性蝕刻,將垂直間隔件所構成之圖案轉移至模板。由於該層實質上僅沉積於各垂直間隔件之頂表面上,而實質上沒有層被沉積於凹部圖案之側壁及底部上,因此該層係拓樸受限層且可有效地充作間隔件傘層。由於實質上沒有層被沉積於側壁及底部上,因此無需額外製程來在將圖案轉移至模板之前自側壁及底部移除此一層。上述PEALD與習知之PEALD不同,乃因熟知習知之PEALD為一種在溝槽中沉積高度保形膜之方法,而上述PEALD與習知之PEALD相反,其係一種沉積非保形膜(即具有實質上零之保形性)的方法。由於上述PEALD沉積拓樸受限膜,因此將拓樸受限PEALD稱作拓樸致能選擇性沉積或GESA。
其他具體例提供一種藉由電漿增強原子層沉積(PEALD)循環將膜實質上僅沉積於具有由底部及側壁所構成之凹部圖案之基板之頂表面上的方法,其之各循環包括:(i)藉由載氣通過包含呈液態之前驅體之瓶,將前驅體供應至其中放置基板之反應空間,不對該反應空間施加RF功率,該前驅體包含除氫外之多種元素,其中瓶中之蒸氣壓力係約30mmHg或更高;及(ii)在不供應前驅體的情況下對反應空間施加RF功率,藉此實質上僅在基板之頂表面上沉積拓樸受限層,其中實質上沒有層被沉積於凹部圖案之側壁及底部上。
如以上所論述,雖然GESA代表拓樸致能選擇性ALD,但GESA的本性並非ALD,因為相較於習知ALD能在凹部圖案之所有表面上幾近均勻地沈積就厚度而言之高度保形膜,GESA能使膜僅選擇性或實質上地沈積於凹部圖案之頂表面上,即膜之保形性(側壁之膜厚度對頂表面之膜厚度的比率)為實質上零。此外,不同於ALD,GESA具有CVD組分,即每個循環所沈積之子層的厚度為超過一個原子層的厚度,即較厚於通過自限吸附過程經化學吸附於表面上之前驅體的厚度。因此,在本揭示內容中, 雖然使用術語「GESA」,但GESA並非指ALD製程,而係亦可指稱「拓樸致能選擇性沉積」(TESD)。GESA並不限於前述具體例,且更一般而言,可藉由(例如)一種拓樸致能選擇性沉積方法來進行,在該方法中,將膜以一或多個半導體製造層選擇性地沉積於具有由底部及側壁構成之凹部圖案之基板的頂表面上,該方法依序包括:(i)將前驅體供應至反應空間,在該反應空間中基板放置於電極之間,該前驅體包含除金屬或類金屬原子之外包括氮的多種元素;(ii)進行反應空間之排空,僅達到在基板之頂表面附近所殘留之前驅體量為較大於經化學吸附於基板之頂表面上之前驅體量的程度;及(iii)在電極之間施加RF功率,同時供應實質上不含H及O之電漿產生氣體,以產生基板所暴露之富含離子之各向異性電漿,藉此實質上僅在或選擇性地及主要地在基板之頂表面上沉積拓樸受限層,其中實質上沒有層,或實質上較拓樸受限層薄的層,被沈積於凹部圖案之側壁及底部上。GESA之獨特特徵(例如,高度非保形生長)有用於許多半導體製造過程,諸如,比方說,彼等於本揭示內容中所揭示者,且熟悉技藝人士當明瞭該等有用應用,且將可基於本揭示內容及透過常規實驗在該等應用中進行GESA。
此外,在一些具體例中,該方法進一步包括,在步驟(iii)之後,(v)使於步驟(iii)中獲得之拓樸受限層在反應空間中暴露至氧電漿,以將基於氮化物、基於含氮碳化物、或碳氮化物層之拓樸受限層轉變為基於氧化物之層。與上述轉變過程結合,GESA之應用廣泛地擴展至各種半導體製造過程。
為概述本發明之態樣及相較於相關技術所達成之優點,於本揭示內容中描述本發明之某些目的及優點。當然,應明瞭無須所有該等目的或優點皆可根據本發明之任何特定具體例來達成。因此,舉例來說,熟悉技藝人士當認知本發明可按照本文所教示達成或最佳化一優點或一組優點而無須達成本文中可能教示或提出之其他目的或優點的方式來具體化或 實施。
本發明之其他態樣、特徵及優點將可由隨後之詳細說明而明白。
1‧‧‧基板
2‧‧‧導電平板電極
3‧‧‧反應室
4‧‧‧導電平板電極
5‧‧‧轉移室
6‧‧‧排氣管線
7‧‧‧排氣管線
11‧‧‧反應室3之內部
12‧‧‧電接地之一側
13‧‧‧圓形管道
14‧‧‧分隔板
16‧‧‧轉移室5之內部(轉移區)
20‧‧‧瓶(儲槽)
21‧‧‧氣體管線
22‧‧‧氣體管線
24‧‧‧密封氣體管線
41‧‧‧SiO2膜
42‧‧‧GESA膜
43‧‧‧側壁或底部
51‧‧‧SiO2膜
52‧‧‧GESA膜
61‧‧‧SiO2膜
62‧‧‧GESA膜
70‧‧‧矽基板
71‧‧‧下層
72‧‧‧GESA膜
73‧‧‧膜
74‧‧‧第二垂直間隔件
81‧‧‧目標層
82‧‧‧蝕刻硬遮罩
84‧‧‧垂直間隔件
93‧‧‧光阻劑圖案
94‧‧‧抗反射層(ARL)
95‧‧‧金屬氧化物間隔件
96‧‧‧核心部分
101‧‧‧基板
102‧‧‧膜
103‧‧‧膜
105‧‧‧GESA膜
106‧‧‧基於氧化物之膜
161‧‧‧SiO2膜
162‧‧‧GESA膜(SiCN)
163‧‧‧整合的單一氧化物膜
201‧‧‧基板
203‧‧‧鰭片
205‧‧‧SiO襯料
207‧‧‧虛擬閘極
209‧‧‧GESA膜
a‧‧‧閥
b‧‧‧閥
c‧‧‧閥
d‧‧‧閥
e‧‧‧閥
f‧‧‧閥
現將參照較佳具體例之圖式來說明本發明之此等及其他特徵,該等具體例意欲說明而非限制本發明。該等圖式為作說明用而經大大地簡化且未必按比例繪製。
圖1A係可用於本發明之一具體例中之用於沉積介電膜之PEALD(電漿增強原子層沉積)設備的示意圖式。
圖1B繪示可用於本發明之一具體例中之使用流道系統(FPS)之前驅體供應系統的示意圖式。
圖2顯示在使用一種前驅體之根據本發明之一具體例之一循環中之低氣壓PEALD的示意過程順序,其中呈灰色的單元呈現「開」狀態,而呈白色的單元呈現「關」狀態,且各單元之寬度不代表各過程的持續時間。
圖3係根據本發明之一具體例之GESA膜之X射線繞射概況的圖。
圖4係顯示根據本發明之一具體例沉積於溝槽上之GESA膜之橫截面圖的STEM照片。
圖5係顯示根據本發明之一具體例沉積於溝槽上之GESA膜之橫截面圖的STEM照片。
圖6係顯示根據本發明之一具體例沉積於溝槽上之GESA膜之橫截面圖的STEM照片。
圖7係顯示根據一比較實施例沉積於溝槽上之PEALD(不完全GESA)膜之橫截面圖的STEM照片。
圖8係根據本發明之一具體例使用間隔件界定雙重圖案化(SDDP)之圖案轉移及目標蝕刻(步驟(a)至(j))的示意圖式。
圖9係根據本發明之一具體例於(a)中之CVD、於(b)中之PEALD、於(c)中之改良PEALD(不完全GESA)、及於(d)中之GESA之沉積概況的示意圖式。
圖10係根據本發明之一具體例利用氧電漿之氧化過程的示意圖式,其中(a)中之矽/金屬氮化物經轉變為矽/金屬氧化物。
圖11係顯示根據本發明之一具體例沉積於具有溝槽之基板上之GESA膜之橫截面圖的STEM照片。
圖12係顯示圖11所示之GESA膜在根據本發明之一具體例暴露至氧電漿後之橫截面圖的STEM照片。
圖13顯示根據本發明之具體例在暴露至氧電漿前(GESA POR)、在使用400W之RF功率暴露至氧電漿後(TS-SiO 400W)、及在使用100W之RF功率暴露至氧電漿後(TS-SiO 100W)之GESA膜的XPC光譜。
圖14係在虛擬閘極凹部之形成中應用GESA膜之示意圖式,其中(a)顯示沒有GESA膜的問題及(b)顯示藉由根據本發明之一具體例之GESA膜的有利效應。
在本揭示內容中,「氣體」可包括汽化固體及/或液體且可由單一氣體或氣體混合物構成,視前後文而定。同樣地,冠詞「一」係指一物種或包括多個物種的屬,視前後文而定。在本揭示內容中,經由噴淋頭引入至反應室之製程氣體可包括含矽前驅體及添加劑氣體,基本上由其所組成,或由其所組成。添加劑氣體可包括用於氮化及/或碳化前驅體之反應物氣體,及當向添加劑氣體施加RF功率時用來激發前驅體的惰性氣體(例如,貴重氣體)。惰性氣體可作為載氣及/或稀釋氣體進給至反應室。在本揭 示內容中,未使用用來氧化前驅體之反應物氣體。此外,在一些具體例中,未使用反應物氣體,而僅使用貴重氣體(作為載氣及/或稀釋氣體)。前驅體及添加劑氣體可作為混合氣體或分開地引入至反應空間。前驅體可利用載氣(諸如稀有氣體)引入。可使用除製程氣體外之氣體(即未通過噴淋頭引入之氣體)來(例如)密封反應空間,其包括諸如稀有氣體之密封氣體。在一些具體例中,術語「前驅體」一般係指參與化學反應產生另一化合物之化合物,及特定言之係指一種構成膜基質或膜之主要骨架的化合物,而術語「反應物」係指除前驅體外之化合物,其活化前驅體、改質前驅體、或催化前驅體之反應,其中當施加RF功率時,該反應物可向膜基質提供元素(諸如N、C)並成為膜基質之一部分。術語「惰性氣體」係指當施加RF功率時激發前驅體的氣體,但不同於反應物,其未成為膜基質之一部分。
在一些具體例中,「膜」係指在垂直於厚度方向之方向中連續延伸且實質上無針孔以覆蓋整個目標或關注表面的層,或僅係覆蓋目標或關注表面之層。在一些具體例中,「層」係指形成於表面上之具有特定厚度之結構或係膜或非膜結構之同義詞。膜或層可由具有特定特徵的離散單一膜或層或多個膜或層構成,且在相鄰膜或層之間之邊界可係清晰或不清晰的且可基於物理、化學、及/或任何其他特徵、形成過程或順序、及/或相鄰膜或層之功能或用途來確定。此外,在本揭示內容中,一變數的任何兩個數值可構成該變數的可工作範圍,因可工作範圍可基於例行工作來確定,且所指示之任何範圍可包括或不包括終點。另外,所指示變數之任何值(不管其是否有以「約」指示)可指精確值或近似值且包括等效值,且在一些具體例中可指平均值、中間值、代表值、多數值等。此外,在本揭示內容中,術語「由...構成」及「具有」在一些具體例中獨立地指「通常或廣泛地包括」、「包括」、「基本上由...組成」、或「由...所組成」。在本揭示內容中,在一些具體例中任何定義的含意不一定排除一般及慣用的含意。
在本揭示內容中,當未指定條件及/或結構時,熟悉技藝人 士可鑒於本揭示內容按照常規實驗來輕易地提供該等條件及/或結構。
在所有揭示具體例中,於一具體例中使用之任何元素可經與其等效的任何元素取代,包括用於預期用途而彼等明確地、必然地、或固有地揭示於文中者。此外,本發明可同等地應用於設備及方法。
將針對較佳具體例來說明該等具體例。然而,本發明不受限於該等較佳具體例。
在一些具體例中,一種將設置於模板(通常由藉由旋塗或CVD製程製備得之非晶形碳(a-C)所構成)上具有間隔之垂直間隔件所構成之圖案轉移至該模板之方法,其包括:藉由電漿增強原子層沉積(PEALD)將作為間隔件傘層之層實質上僅沉積於由氧化矽或金屬氧化物(例如,TiO2)製成之各垂直間隔件的頂表面上,其中實質上沒有層被沉積於垂直間隔件之側壁及模板之暴露表面上,隨後使用具有間隔件傘層的垂直間隔件,藉由各向異性蝕刻(例如,反應性離子蝕刻,RIE),將垂直間隔件所構成之圖案轉移至模板。
在揭示內容中,「實質上零」或類似者可指非本質的量、低於可偵測的量、本質上不會影響目標或期望性質的量、或由熟悉技藝人士認為接近零之量,諸如低於10%、低於5%、低於1%、或在一些具體例中其相對於總和或參考值之任何範圍。舉例來說,當將厚度10nm之膜沉積於頂表面上,且實質上沒有膜沉積於側壁上時,沉積於側壁上之膜的厚度可係小於1nm、小於0.5nm、小於0.1nm、或介於其間之任何範圍。在揭示內容中,「實質上較薄」、「實質上短暫」、或類似片語可係指由熟悉技藝人士所認知之材料差異或差異,諸如至少30%、40%、50%、60%、70%、80%、90%之彼等或在一些具體例中其之任何範圍。舉例來說,當將厚度10nm之膜沉積於頂表面上,且一實質上較該膜薄之層沉積於側壁上時,沉積於側壁上之膜的厚度可係至多7nm、至多6nm、至多5nm、至多4nm、至多3nm、至多2nm、至多1nm、或介於其間之任何範圍。此外,例如, 當完成排空1秒以自目標區域充分地移除過剩氣體、未反應氣體、及副產物,且進行實質上短暫的排空時,此短暫排空的持續時間可係至多0.7秒、至多0.6秒、至多0.5秒、至多0.4秒、至多0.3秒、至多0.2秒、至多0.1秒、或介於其間之任何範圍。此外,在揭示內容中,「實質上相同」、「實質上均勻」、或類似片語可係指無關緊要的差異或由熟悉技藝人士所認知之差異,諸如低於10%、低於5%、低於1%之彼等或在一些具體例中其之任何範圍。
由於作為硬遮罩之間隔件傘具有針對下方模板的高蝕刻選擇性,因此垂直間隔件可係短的且因此可在蝕刻期間維持以將圖案轉移至模板。在一些具體例中,垂直間隔件之高度係在3nm至60nm之範圍內,通常約5nm至約40nm。在一些具體例中,間隔件傘層之厚度係在約1nm至約15nm之範圍內,通常約3nm至約8nm。在一些具體例中,間隔件傘層係由非晶形氮化矽碳所構成。在一些具體例中,模板係由非晶形碳所構成。在一些具體例中,垂直間隔件係藉由間隔件界定雙重圖案化(SDDP)所產生。
在一些具體例中,關於拓樸受限PEALD或拓樸致能選擇性PEALD(GESA),相鄰垂直間隔件間之各間隔必需小於一預定距離。在本揭示內容中,將相鄰垂直間隔件間之凹部及任何其他凹部圖案稱作「溝槽」。換言之,溝槽係包括由垂直間隔件所形成之圖案的任何凹部圖案,且其在一些具體例中具有約20nm至約100nm(通常約30nm至約50nm)之寬度(其中當溝槽具有與寬度實質上相同的長度時,將其稱作孔洞/通孔,且其直徑為約20nm至約100nm),約30nm至約100nm(通常約40nm至約60nm)之深度,及約2至約10(通常約2至約5)之縱橫比。溝槽的適合尺寸可視製程條件、膜組成、預期應用等而改變。
在上文中,若溝槽之寬度過寬,則GESA變得不完全,且不完全的GESA膜會自然地開始沉積於溝槽之底表面上,且因此,在理論 上(不限制本發明),可選擇溝槽之寬度以致CVD之非保形沉積輪廓可如下文所述地顯著。在非限制性理論中,在CVD之非保形沉積輪廓可係顯著的,施加各向異性電漿,且蝕刻/濺鍍輪廓可係顯著的條件下,GESA可係完全的。在特定的GESA條件下,可增強及促進上述現象以實質上不將膜沉積於側壁及底表面上。
圖9係根據本發明之一具體例於(a)中之CVD、於(b)中之PEALD、於(c)中之改良PEALD(不完全GESA)、及於(d)中之GESA之沉積概況的示意圖式。當溝槽窄時,蕈狀生長係CVD(包括如圖9之(a)中所繪示之循環CVD)的典型沉積輪廓,其中當膜102沉積於具有溝槽的基板101上時,沉積於頂表面上之其之頂部厚,沉積於側壁上之其之側部較頂部薄且朝向溝槽之底部變得更薄,且沉積於底表面上之其之底部薄或幾乎無法偵測或無法偵測。在CVD中,於氣相中激發之前驅體之反應性物種未充分地到達狹窄溝槽的底部。在PEALD中,保形生長係典型的沉積輪廓,如圖9之(b)中所繪示,其中當膜103沉積於具有溝槽的基板101上時,沉積於頂表面上之其之頂部、沉積於側壁上之其之側部、及沉積於底表面上之其之底部係拓樸等形。在PEALD中,不同於CVD,膜係藉由表面反應形成,其中前驅體分子吸收於溝槽之所有表面上且經飽和,其中經吸附前驅體分子之量與飽和後之前驅體暴露無關(即,自限吸附反應過程)。於排空後,經吸收之前驅體分子暴露至反應物氣體,隨後暴露至電漿,從而引起表面反應以形成膜。當使用各向異性電漿諸如Ar電漿時,電漿不會充分地到達溝槽之側壁。熟知電漿組成複雜,其係由帶電(離子)或中性(原子及自由基)之間的許多不同物種構成。通常認為在電漿中,離子物種負責高度各向異性生長且負責所謂的「離子轟擊」。Ar電漿(例如)主要係由離子與極少自由基所構成,因此Ar電漿過程通常具有極差的保形性並呈現圖9之(c)中所繪示的沉積輪廓(改良PEALD或不完全GESA),其中沉積於頂表面上之其之頂部厚,沉積於側壁上之其之側部薄或幾乎無法偵測或無法偵測,且沉積於 底表面上之其之底部厚。在側壁上,發生不充分的離子轟擊,然而轟擊充分地到達頂表面及底表面。
相對地,圖9之(d)中繪示GESA的沉積輪廓,其中沉積於頂表面上之其之頂部厚,沉積於側壁上之其之側部及沉積於底表面上之其之底部薄或幾乎無法偵測或無法偵測。在非限制性理論中,GESA發生在CVD之非保形沉積輪廓可係顯著、施加各向異性電漿、且蝕刻/濺鍍輪廓可係顯著之時。換言之,例如,當藉由將儲存呈液態之前驅體之瓶的溫度提高至供應甚高於飽和用量之大量前驅體的程度(該劑量可較飽和用量高至少一個數量級)而提高前驅體之蒸氣壓,以致排空變得不足以移除所有前驅體氣體之時。存於氣相中之殘留前驅體氣體可能導致CVD樣沉積,其中蕈狀輪廓更為顯著。此外,殘留的前驅體氣體可能使離子(例如,電漿中所含之Ar離子)的平均自由徑降低,藉此使得離子更難到達溝槽之底表面(於溝槽之底部較少離子轟擊)。平均自由徑可定義如下(簡化為每次碰撞的平均距離): πd 2 n v 其中d為分子直徑,及n v為每單位體積的分子數。換言之,當每單位體積的分子數增加時,離子的平均自由徑變短。例如,前驅體分子的直徑顯著大於Ar離子的直徑,且如雲般盤旋的殘留前驅體分子將顯著地縮短離子的平均自由徑。此外,藉由提高製程壓力,n v增大,因而縮短離子的平均自由徑。結果,在GESA中,於溝槽之底表面上的膜形成有效地受到抑制,藉此實質上沒有膜沉積於溝槽之底表面上,同時膜形成在溝槽之頂表面上進行(在頂表面上方之殘留前驅體分子可能促進膜形成,且因此,不同於習知之PEALD,當延長GESA中之RF功率施加的持續時間時,每個循環的生長速率可提高)。為使殘留前驅體分子保持於基板上方,其中一個有效參數係提高前驅體之分壓,即提高前驅體之蒸氣壓,而非延長前驅體脈衝的持續時間。此外,如前所述,使用各向異性電漿防止膜沉積於溝槽之側壁 上。
此外,在非限制性理論中,蝕刻/濺鍍效應可促進GESA沉積輪廓。考慮到可將Ar離子束用於濺鍍,電漿中所含之Ar離子可將一些沉積膜濺鍍掉。在典型的GESA中,沉積膜的生長速率相當低(例如,GESA製程一般具有極低的生長速率,例如,每個循環0.06-0.1埃),且濺鍍可促進生長速率。此外,此濺鍍效應對於低密度膜可更為顯著(例如,GESA膜係由50%碳及20%氫所構成,或具有Si及N污染物之低密度(20% H2)a-C膜)。在一些具體例中,藉由Ar電漿轟擊的濺鍍可以下列方式操作:(Dt-St)>(Db-Sb)(Ds-Ss),其中Dt、Db、及Ds分別代表在溝槽之頂表面、底表面、及側壁的沉積速率,及St、Sb、及Ss分別代表在溝槽之頂表面、底表面、及側壁的濺鍍速率。在一些具體例中,Sb>Db,且Ss>Ds。此外,前驅體與Ar電漿的反應副產物可促進GESA沉積輪廓。例如,歸因於包括Si、N、C、及H之前驅體的組成,於電漿暴露期間產生一些H離子/自由基。當GESA膜主要由a-C構成時,此碳膜高度易被H物種(揮發性產物)侵蝕。因此,為進一步最佳化頂部選擇性輪廓,在一些具體例中,蝕刻效應可以下列方式操作:(Dt-Et)>(Db-Eb)(Ds-Es),其中Dt、Db、及Ds分別代表在溝槽之頂表面、底表面、及側壁的沉積速率,及Et、Eb、及Es分別代表在溝槽之頂表面、底表面、及側壁之藉由受激發副產物的蝕刻速率。在一些具體例中,Eb>Db,且Es>Ds。前驅體之劑量、排空程度、電漿持續時間、製程壓力、及惰性氣體流量係最佳化GESA沉積輪廓的關鍵參數。
在一些具體例中,沉積於溝槽頂表面上之GESA膜的厚度係作為溝槽寬度之函數來選擇,以將膜實質上僅沉積於頂表面上(實質上沒有膜在底表面及側壁上)。舉例來說,當溝槽之寬度(W)係約6nm時,於頂表面上之膜的厚度(T)可係小於約9nm,通常約7nm或以下,而當溝槽之寬度(W)係約3nm時,於頂表面上之膜的厚度(T)可係小於約18nm,通常 約14nm或以下,其中T(nm) x W(nm)可係小於約54,通常42或以下。
在本發明之另一態樣中,一些具體例提供一種藉由電漿增強原子層沉積(PEALD)循環將膜實質上僅沉積於具有由底部及側壁所構成之凹部圖案之基板之頂表面上的方法,其之各循環包括:(i)藉由載氣通過包含呈液態之前驅體之瓶,將前驅體供應至其中放置基板之反應空間,不對該反應空間施加RF功率,該前驅體包含除氫外之多種元素,其中瓶中之蒸氣壓力係約30mmHg或更高;及(ii)在不供應前驅體的情況下對反應空間施加RF功率,藉此實質上僅在基板之頂表面上沉積拓樸受限層,其中實質上沒有層被沉積於凹部圖案之側壁及底部上。
在一些具體例中,未在整個PEALD循環中將反應物供應至反應空間,而僅將載氣(較佳Ar)用於電漿反應。由於前驅體包含除氫外之多種元素,因此不需要反應物來沉積GESA膜。在一些具體例中,由於未使用反應物,因此前驅體係於其分子中包含除氫外之多種元素的任何適當前驅體。在一些具體例中,前驅體包含矽/金屬、氮、碳、及氫。在一些具體例中,前驅體替代矽或在矽之外包含諸如Ti、Zr、Co、W、Ta、Hf、及/或Nb之金屬。在一些具體例中,前驅體係烷基胺基矽烷。在一些具體例中,烷基胺基矽烷係選自由下列所組成之群:雙-二乙基胺基矽烷(BDEAS)、雙-二甲基胺基矽烷(BDMAS)、己基乙基胺基矽烷(HEAD)、四乙基胺基矽烷(TEAS)、第三丁基胺基矽烷(TBAS)、雙-第三丁基胺基矽烷(BTBAS)、雙-二甲基胺基二甲基胺基矽烷(BDMADMS)、七甲基矽氮烷(HMDS)、三甲基矽烷基二乙胺(TMSDEA)、三甲基矽烷基二甲胺(TMSDMA)、三甲基三乙烯基環三矽氮烷(TMTVCTS)、叁-三甲基羥基胺(TTMSHA)、雙-二甲基胺基甲基矽烷(BDMAMS)、及二甲基矽烷基二甲胺(DMSDMA)。前驅體可由單一前驅體或兩種或多於兩種前驅體之混合物構成。
在一些具體例中,烷基胺基矽烷前驅體係自儲槽或瓶供應至反應室用於非晶形氮化矽碳層之GESA。烷基胺基矽烷前驅體在室溫下通常 (但不一定)係液體,及當在反應室上游需要將前驅體汽化時,前驅體係於配備加熱器的儲槽或瓶中汽化。供應至反應室之前驅體的量可基於自儲槽排出之前驅體的蒸氣壓來確定,該蒸氣壓係取決於儲槽的溫度。在一些具體例中,用於非晶形氮化矽碳層之GESA的儲槽溫度(例如,對於BDEAS而言約70℃至約100℃,通常,例如,約80℃)較用於氧化矽層之PEALD的儲槽溫度(例如,對於BDEAS而言約20℃至約60℃)高。BDEAS的飽和蒸氣壓,例如,係在70℃下30mmHg,且因此,對於GESA而言,可能需要30mmHg或更高(例如,35mmHg或更高)的蒸氣壓來將特定劑量的前驅體供應至反應空間。舉例來說,在80℃下之前驅體的劑量,例如,可較在60℃下之前驅體的劑量高至少一位數。令人驚訝地,前驅體之蒸氣壓係GESA的其中一個重要製程參數,因為在習知之ALD中,前驅體的化學吸附係由自限飽和吸附所控制。對於GESA,前驅體之劑量需夠高以阻止膜沉積於溝槽之底表面及側壁,儘管於頂表面上的膜厚度不會顯著地受劑量所影響。劑量可影響於溝槽之各頂表面處之電磁場的產生,從而抑制於溝槽之底部及側壁的膜沉積。劑量亦可由瓶溫、進給時間、載氣流量、及稀釋氣體流量來界定。
此外,在一些具體例中,RF功率係以每單位面積(cm2)基板約50W至約1000W(通常約75.W/cm2至約500W/cm2)施加至反應空間。在一些具體例中,用於非晶形氮化矽碳層之GESA的RF功率係高於或相當於用於氧化矽層之PEALD的RF功率,例如,對於300-mm基板在約100W至約500W之範圍內(可將W值轉換為每單位面積基板的瓦數並應用於不同尺寸的基板)。亦令人驚訝地,當施加RF功率的持續時間變得較長時,每個循環的生長速率(GPC)可顯著地提高(超過50%),指示較經由簡單飽和吸附有更多前驅體分子吸附於基板表面上,其中施加較長的RF功率可有助於在基板上方使用殘留前驅體分子的CVD樣沉積,儘管理論並未限制本發明。鑒於上述,GESA具有典型ALD的基本特徵,但基本上或在化學 性上不同於典型ALD。
在一些具體例中,載氣係通過PEALD循環連續供應至反應室。在一些具體例中,稀釋氣體係在整個PEALD循環中連續供應至反應空間。關於載氣及稀釋氣體,可單獨地或以兩者或更多者之任何組合使用諸如Ar、He、Ne、Kr、及Xe之貴重氣體。
在本揭示內容中,「連續」係指不中斷真空、在時間線上沒有中斷、沒有任何材料介入步驟、未改變處理條件、其後立即、作為下一步驟、或在一些具體例中在兩個結構間沒有除該兩結構外之介入的離散物理或化學結構。
在一些具體例中,循環進一步包括在步驟(i)之後排空反應室,及在各循環中在步驟(ii)之後排空反應空間。
在一些具體例中,GESA層係沉積於由氧化矽或金屬氧化物製成的下層上。在一些具體例中,關於下層,藉由,例如,PEALD,將SiO層沉積於具有溝槽的基板上(諸如揭示於由相同申請人於2015年12月21日提出申請之美國申請案第14/977,291號中,將其全體揭示內容以引用的方式併入本文中)。在一些具體例中,使用烷基胺基矽烷作為前驅體來沉積SiO層,該前驅體係與用於非晶形氮化矽碳層之GESA中者相同的氣體。在一些具體例中,下層及GESA層係於相同反應室中連續地沉積。
在一些具體例中,雖然SiO層具有80%至100%之保形性,但可實現沉積於SiO層上且具有實質上零之保形性的GESA層,即使SiO層及GESA層係於相同反應室中連續地沉積。在理論上(不限制本發明),當恰當地選擇溝槽之寬度時,藉由調整如本揭示內容中所述之製程條件,可抑制在溝槽之底部及側壁的離子轟擊,且可部分地發生CVD樣沉積,其中在基板上方之殘留前驅體分子(藉由,例如,不充分的排空及/或提高瓶溫從而縮短離子的平均自由徑)可阻止電漿中所含之入射離子進入溝槽中,且各向異性電漿亦可降低溝槽側壁處之離子轟擊,藉此抑制膜沉積於溝槽之側 壁及底表面上。在特定的GESA條件下,可增強及促進上述現象以實質上不將膜沉積於側壁及底表面上。
雖然典型地使用SiO層,但下層可為其他介電膜(較佳由可針對GESA促進累積電荷的材料所構成)。此介電膜包括,但不限於,由SiC、SiCO、任何摻雜矽玻璃構成之低k膜、或具有約1.9至5.0、通常約2.1至3.0、較佳低於2.5之介電常數的有機聚合物或矽基聚合物。在一些具體例中,在包括側壁及底表面之溝槽或通道中、及/或平坦表面藉由電漿增強CVD、熱CVD、循環CVD、電漿增強ALD、熱ALD、自由基增強ALD、或任何其他薄膜沉積方法形成介電膜。通常,介電膜之厚度係在約50nm至約500nm之範圍內(期望的膜厚度可根據膜之應用及用途等適當地選擇)。
將針對圖式來說明具體例。然而,本發明不受限於圖式。
圖2顯示在根據本發明之一具體例之一循環中之GESA的示意連續過程順序,其中呈灰色的單元呈現「開」狀態,而呈白色的單元呈現「關」狀態,且各單元之寬度不代表各過程的持續時間。在圖2中所繪示的順序中,使用連續供應的載氣,不施加RF功率,將前驅體以脈衝(「饋送」)供應至反應空間。此外,將稀釋氣體連續供應至反應空間。於「饋送」後,將反應空間排空(「排空1」),其中未將前驅體進給至反應空間,同時將載氣及稀釋氣體連續進給至反應空間,不施加RF功率,藉此自基板表面移除未經化學吸附的前驅體及過剩氣體。其後,藉由於整個沉積循環中連續流動之載氣及稀釋氣體中以脈衝(「RF」)原位施加RF功率(「RF」),不進給前驅體來產生沉積用電漿,藉此形成單層。於「RF」後,將反應空間排空(「排空2」),其中將載氣及稀釋氣體連續進給至反應空間,不進給前驅體且不對反應空間施加RF功率,藉此自基板表面移除副產物及過剩氣體。歸因於載氣之連續流動進入反應空間中作為前驅體間歇地或以脈衝注入其中之恆定流,且歸因於稀釋氣體之連續流動,可有效率地進行排空以 快速地自層表面移除過剩氣體及副產物,藉此有效率地繼續進行多個PEALD循環,在GESA中,雖然由於ALD的本性而在包括溝槽之頂表面、側壁、及底表面的所有表面上形成一單層的前驅體,但由於電漿並未到達形成於溝槽之側壁及底表面上之部分的單層,因而實質上沒有膜形成於溝槽之側壁及底表面上,且該部分的單層藉由排空而移除。
在圖2中,前驅體係藉助於載氣來提供。由於ALD係自限吸附反應過程,因此經沉積前驅體分子的數目係由反應性表面部位的數目來決定且與飽和後的前驅體暴露無關,且前驅體之供應係使得藉此每個循環的反應性表面部位經飽和。如前所述,各脈衝或各沉積循環的期間較佳為自限的。在各期間供應過量的前驅體以使敏感的結構表面飽和。表面飽和確保前驅體佔據所有可用的反應性部位(例如,受到物理尺寸或「立體阻礙」的限制)。在一些具體例中,可減小前驅體的脈衝時間,使得未達到完全飽和且低於一單層吸附於基板表面上。
載氣之連續流動可使用流道系統(FPS)來完成,其中載氣管線設有具有前驅體儲槽(瓶)的歧路管線,且主要管線與歧路管線經切換,其中當僅欲將載氣進給至反應室時,將歧路管線關閉,而當欲將載氣及前驅體氣體兩者進給至反應室時,關閉主要管線且載氣流動通過歧路管線並自瓶與前驅體氣體一起流出。以此方式,載氣可連續流入反應室中,並可藉由切換主要管線及歧路管線而以脈衝遞送前驅體氣體。圖1B繪示根據本發明之一具體例使用流道系統(FPS)之前驅體供應系統(黑色閥指示閥為關閉)。如圖1B中之(a)中顯示,當將前驅體進給至反應室(未顯示)時,首先,諸如Ar(或He)的載氣流動通過具有閥b及c的氣體管線,且接著進入瓶(儲槽)20。載氣自瓶20流出,同時遞送對應於瓶20內之蒸氣壓力之量的前驅體氣體,並流動通過具有閥f及e之氣體管線,及接著與前驅體一起進給至反應室。以上,閥a及d為關閉。當僅將載氣(貴重氣體)進給至反應室時, 如圖1B中之(b)中顯示,載氣流動通過具有閥a之氣體管線,同時繞過瓶20。以上,閥b、c、d、e、及f為關閉。
熟悉技藝人士當明瞭設備包括經程式化或以其他方式組態以導致執行文中他處說明之沉積及反應器清潔過程的一或多個控制器(未顯示)。如熟悉技藝人士所當明瞭,該(等)控制器係與反應器的各種電源、加熱系統、泵、機器人、及氣體流量控制器或閥連通。
製程循環可使用任何適當的設備(包括,例如,圖1A中所繪示之設備)進行。圖1A係可用於本發明之一些具體例中之理想地與經程式化以進行下文所述順序之控制結合之PEALD設備的示意圖。在此圖中,藉由在反應室3之內部11(反應區)中提供一對平行且彼此相對的導電平板電極4、2,向一側施加HRF功率(13.56MHz或27MHz)25,且使另一側12電接地,於電極之間激發電漿。於下部平台2(下部電極)中設置溫度調節器,且使置於其上之基板1的溫度保持恆定於給定溫度。上部電極4亦充作噴淋頭板,且若有之反應物氣體及/或稀釋氣體、及前驅體氣體分別經由氣體管線21及氣體管線22及通過噴淋頭板4引入至反應室3中。另外,在反應室3中,設置具有排氣管線7的圓形管道13,通過其將反應室3之內部11中的氣體排除。另外,設置於反應室3下方的轉移室5設有密封氣體管線24,以經由轉移室5之內部16(轉移區)將密封氣體引入反應室3之內部11中,其中設置用來分隔反應區及轉移區的分隔板14(此圖中省略藉以將晶圓轉移進出轉移室5的閘閥)。轉移室亦設有排氣管線6。在一些具體例中,在相同反應空間中進行多元素膜之沉積及表面處理,以致所有步驟可連續地進行而不會使基板暴露至空氣或其他含氧氛圍。
在一些具體例中,在圖1A所描繪之設備中,可使用圖1B中所繪示之切換惰性氣體之流動與前驅體氣體之流動的系統(先前說明)來以脈衝引入前驅體氣體,而無反應室壓力的實質波動。
熟悉技藝人士當明瞭設備包括經程式化或以其他方式組態 以導致執行文中他處說明之沉積及反應器清潔過程的一或多個控制器(未顯示)。如熟悉技藝人士所當明瞭,該(等)控制器係與反應器的各種電源、加熱系統、泵、機器人及氣體流量控制器或閥連通。
在一些具體例中,可使用雙室反應器(接近彼此設置之兩個用來處理晶圓的區段或隔室),其中反應物氣體及貴重氣體可經由共用管線供應,而前驅體氣體係經由非共用管線供應。
在一些具體例中,GESA循環可在下表1中顯示的條件下進行。
以上所指示之用於300-mm晶圓之RF功率可經轉換為W/cm2(每單位面積晶圓之瓦數),其可應用於具有不同直徑(諸如200mm或450mm)之晶圓。
在一些具體例中,GESA膜之厚度係在約3nm至約30nm,通常約5nm至約15nm之範圍內(可根據膜之應用及用途等,亦取決於溝槽之寬度適當地選擇期望的膜厚度)。因此,在一些具體例中,僅將循環重複直至拓樸受限層之厚度達到上述期望厚度為止。
關於GESA,通常不使用反應物氣體,因此,不同於習知之ALD,於化學吸附前驅體之後,沒有反應物經化學吸附,其中在一些具體例中僅使用前驅體及惰性氣體電漿。因此,嚴格來說,在以上具體例中,GESA並非ALD,儘管GESA係使用PEALD設備進行。
GESA層可用於包括間隔件界定雙重圖案化(SDDP)的多種應用中。圖8係根據本發明之一具體例使用SDDP之圖案轉移及目標蝕刻的示意圖式,其中使用GESA膜作為硬遮罩來將圖案自第一模板轉移至第二模板。使用抗反射層(ARL)94作為用來提高SDDP製程中之圖案密度(例如,間距減小)的第一模板。使用蝕刻硬遮罩82作為用來蝕刻目標層81的第二模板。在圖8中之步驟(a)中,於抗反射層94(由,例如,非晶形碳所構成)上形成光阻劑圖案93(由,例如,酚醛清漆(Novolacs)所構成,使得抗反射層94可於步驟(b)中以光阻劑圖案蝕刻,該步驟(b)為將圖案轉移至第一模板94之步驟。在步驟(c)中,根據任何所揭示之具體例或其之等效具體例沉積金屬氧化物間隔件95(由,例如,氧化矽所構成),隨後在步驟(d)(其係間隔件RIE(反應性離子蝕刻)步驟)中蝕刻。藉由剝除抗反射層94之材料(於核心部分96中之光阻劑材料),於步驟(e)中形成垂直間隔件84。由於金屬氧化物間隔件(95)具有高蝕刻選擇性,因此用來於其上形成間隔件之抗反射層94(第一模板)可係薄的,且金屬氧化物間隔件可於蝕刻期間保留而於步驟(e)中形成垂直間隔件84(金屬氧化物間隔件)。在一些具體例中,抗反射層之 厚度係約5至50nm(通常10至30nm),及金屬氧化物層之厚度係約5至50nm(通常10至20nm)。在一些具體例中,GESA膜之厚度係約2至15nm(通常3至8nm)。在步驟(f)中,將GESA膜72選擇性地沉積於垂直間隔件84之頂部作為抗蝕刻間隔件傘。拓樸受限PEALD實現膜的頂部選擇性沉積。
在步驟(g)中,藉由蝕刻將圖案自具有GESA膜72的垂直間隔件84轉移至第二模板82而形成第二垂直間隔件74,及在步驟(h)中,將第一垂直間隔件84剝除。在步驟(i)中,使用第二垂直間隔件74使形成於矽基板70上之目標層81進行乾式蝕刻。在步驟(j)中,將第二垂直間隔件74剝除。以上,藉由使用根據任何所揭示之具體例或其之等效具體例之GESA膜作為抗蝕刻間隔件傘72,圖案可有效且準確地自第一模板94轉移至第二模板82。此外,GESA膜可有助於保持間隔件完整性並在圖案轉移至第二模板期間改良解析度。在一些具體例中,抗反射層、蝕刻硬遮罩、金屬氧化物層(間隔件)、及目標層可藉由文中揭示之任何方法或其等效方法或藉由脈衝PECVD或PEALD來沉積。
GESA膜不僅抗HF、HCl、及TMAH濕蝕刻,而且亦例如,抗BCl3、BCl3/Ar乾蝕刻,且因此,在步驟(g)中,當將圖案轉移至第二模板82時,GESA膜幫助垂直間隔件84來維持圖案。另一方面,GESA膜對氧化、濕蝕刻化學與氧化及HF(常用於半導體加工中)交替之組合、或(例如)基於氧或CF4之乾蝕刻敏感,因此,在步驟(h)中,GESA膜可有效地與金屬氧化物間隔件84一起剝除。
GESA不限於上述具體例,且可更一般地藉由,例如,拓樸致能選擇性沉積之方法進行,其中在半導體製造中將膜選擇性地沉積於具有由底部及側壁構成之凹部圖案之基板的頂表面上,該方法依序包括:(i)將前驅體供應至反應空間,在該反應空間中基板放置於電極之間,該前驅體包含除金屬或類金屬原子之外包括氮的多種元素;(ii)進行反應空間之排 空,僅達到在基板之頂表面附近所殘留之前驅體量為較大於經化學吸附於基板之頂表面上之前驅體量的程度;及(iii)在電極之間施加RF功率,同時供應實質上不含H及O之電漿產生氣體,以產生基板所暴露之富含離子之各向異性電漿,藉此實質上僅在或選擇性地及主要地在基板之頂表面上沉積拓樸受限層,其中實質上沒有層,或實質上較拓樸受限層薄的層,被沈積於凹部圖案之側壁及底部上。GESA之獨特特徵(例如,高度非保形生長)有用於許多半導體製造過程,諸如,比方說,彼等於本揭示內容中所揭示者,且熟悉技藝人士當明瞭該等有用應用,且將可基於本揭示內容及透過常規實驗在該等應用中進行GESA。以下將詳細說明本發明之其他、替代或經改良的非限制性具體例,其中於以上揭示之任何具體例中描述之任何元素/條件可以任何組合用於下述具體例中至與該等具體例中所用之其他元素相容且一致的完整程度。在所有揭示具體例中,於一具體例中使用之任何元素可經與其等效的任何其他元素取代,包括彼等明確地、必然地、或固有地揭示於文中者,只要該等改變不相互衝突即可。
在一些具體例中,不僅可使用含矽前驅體,而且可使用含金屬前驅體。例如,該金屬可為選自由下列組成之群之至少一元素:Ti、Zr、Hf、Ti、Ta、Nb、Si、Ge、Al、Co、W、Ru、Cu、Ni、V、Zn、及Pt,且該等含金屬前驅體包括,但不限於,SiH4、Si2H6、GeH4、WF6、TiCl4、HFCl4、(CH3)3Al、(CH3CH2)2Zn、Cp2Ni、(EtCp)2Ru、Cp2Me2Zr、(MeCp)(Me)3Pt、Al(NMe2)3、Al2(NMe2)6、Hf(NMe2)4、Hf(NEtMe)4、Hf(NEt2)4、La[N(SiMe3)2]3、Ta(NMe2)5、Ta(NEt2)5、Ta(NtBu)(NEt2)3、Ti(NMe2)4、Ti(NEtMe)4、W(NtBu)2(NMe2)2、Zn[N(SiMe3)2]2、Zr(NMe2)4、Zr(NEtMe)4、Zr(NEt2)4、V(NEt2)4、Co(iPr-amd)、Co(tBuEt-amd)2、Cu2(iPr2-amd)2、Ni(tBu2-amd)2、Cu2(sBu2-amd)2、Ti(iPr2-amd)3、V(Et2-amd)3、V(iPr2-amd)3、Hf(Me2-pmd)4、及Hf(Me2-bmd)4。如本揭示內容中所論述,以下兩特徵有助於藉由GESA之拓樸受限沉積或頂部選擇性沉積的機制:
a)明顯的CVD組分(例如,不完全或實質上短暫的排空),其導致高度非保形生長。
b)高度各向異性電漿,其實質上不含自由基(例如,無含O2-或H之氣體流動通過室作為電漿產生氣體),導致在側壁上沉積實質上薄的膜(若有的O或H(較佳沒有)包含於沉積膜中,O或H之唯一來源應係包含於前驅體中)。
GESA原理不僅可應用於含矽前驅體,而且可應用於諸如如下所闡述之Ti(NCH3)4的含金屬前驅體。
˙Ti(NCH3)4+Ar或He電漿→TiCN(拓樸受限)
此外,於本揭示內容中所揭示之沉積後氧化過程可如下所述來應用。
˙TiCN(拓樸受限)+O2電漿(沉積後)→TiO(拓樸受限)
在一些具體例中,拓樸受限層係由SiCN、SiN、TiCN、TiN、TaCN、或TaN所構成。
在一些具體例中,在整個沉積步驟中未將除電漿產生氣體外之反應物供應至反應空間。
在一些具體例中,在步驟(i)中,未在電極之間施加RF功率而將前驅體供應至反應空間,且該方法進一步包括(iv)在步驟(ii)之後立即排空反應室,其中步驟(i)至(iv)僅重複至拓樸受限層之厚度達到1nm至100nm為止。
在一些具體例中,電漿產生氣體實質上不含H及O(諸如NH3、CO2等),而係由Ar、He、及/或N2構成,乃因該氣體可產生富含離子、少自由基的各向異性電漿。基於相同理由,遠距電漿並不適合,因遠距電漿主要包含自由基。富含離子、少自由基的電漿可定義為相較衍生自電漿產生氣體之自由基包含更多離子的電漿,即離子對自由基之比率大於1,其可使用光發射光譜術(OES)來確定。舉例來說,在OES光譜中,在391 nm的一個峰代表N2 +離子,及在601nm的另一峰代表N2*中性粒子,其中該比率可定義為OES離子(391nm)/中性粒子(601nm)之比率。該比率可成室壓及N2/He氣體混合物之函數改變,其中,例如,當壓力低於10毫托(m Torr)及當氣體混合物係富含氦(氦比氮多)時,電漿變得更具離子性。
作為GESA之一有效應用,在一些具體例中,凹部圖案係由設置於模板上之具有間隔之光阻劑線條或垂直間隔件所構成的圖案,且在步驟(iii)中,拓樸受限層實質上僅在各光阻劑線條或各垂直間隔件之頂表面上作為傘層沉積,其中實質上沒有層被沉積在光阻劑線條或垂直間隔件之側壁上及在模板之暴露表面上,隨後使用具有傘層之光阻劑線條或垂直間隔件,藉由各向異性蝕刻,將光阻劑線條或垂直間隔件所構成之圖案轉移至模板。換言之,GESA膜不僅可用作如先前所述之間隔件傘層並且可用作抗蝕劑傘層。舉例來說,拓樸受限層係直接沉積在藉由EUV(極紫外)光微影術形成的光阻劑線條上。為對應於半導體裝置之小型化,進行用於光微影術之光源的波長減小,例如,從ArF(氟化氬雷射)改變為EUV。然而,用於EUV之光阻劑似乎較弱。GESA膜可強化EUV光阻劑。此外,藉由將GESA膜沉積於EUV光阻劑上,可增加光阻劑之高度,從而導致增加圖案轉移解析度。在一些具體例中,抗蝕劑傘層之厚度係在2nm至20nm之範圍內。
在一些具體例中,為直接沉積GESA膜於EUV光阻劑上,用來沉積GESA膜的Ar電漿(或He電漿)可能不理想,乃因,例如,重Ar原子會導致損壞較ArF光阻劑更脆弱的EUV光阻劑。在該情況中,可使用N2電漿替代Ar電漿,藉此,例如,沉積氮化矽替代碳氮化矽,如下所示:
˙烷基胺基矽烷+Ar電漿→SiCN(拓樸受限)
˙烷基胺基矽烷+N2電漿→SiN(拓樸受限)
藉由使用N2電漿替代Ar電漿來沉積GESA膜,可實質上抑制或減少對光阻劑的損壞。使用N2電漿之製程條件可與使用Ar電漿之 製程條件相同,僅除了用N2載氣及稀釋氣體來替代Ar載氣及稀釋氣體,儘管其流率可相同。
作為GESA之另一有效應用,在一些具體例中,凹部圖案係由用於FinFET裝置之鰭片結構所構成的圖案,且在步驟(iii)中,拓樸受限層係實質上僅在或選擇性及主要地在由氧化矽或金屬氧化物製成之各鰭片結構之頂表面上作為保護層沉積,其中實質上沒有層、或實質上較拓樸受限層薄的層,被沉積於鰭片結構之側壁上及在基板之暴露表面上。
圖14係在虛擬閘極凹部之形成中應用GESA膜之示意圖式,其中(a)顯示沒有GESA膜的問題及(b)顯示藉由根據本發明之一具體例之GESA膜的有利效應。在(a)中,為在基板201之頂部上形成薄矽鰭片反轉通道,其容許閘極形成兩個接觸點,即鰭片203之左側及右側(未顯示),虛擬閘極207起初覆蓋鰭片203,鰭片203經具有2nm厚度之SiO襯料205覆蓋,例如如圖14之(a)中所繪示。接下來,藉由蝕刻移除虛擬閘極207以形成凹部,藉此形成鰭片反轉通道。然而,如(a)中所繪示,藉由蝕刻,經SiO襯料覆蓋之鰭片203的頂部受損,即通道之性質降級。然而,藉由如圖14之(b)中所繪示在經SiO襯料覆蓋之鰭片203的頂部上選擇性地形成GESA膜209,在形成虛擬閘極凹部之蝕刻過程期間,經SiO襯料覆蓋之鰭片203的頂部可有效地受保護,從而避免通道劣化。
如前所述,熟悉技藝人士當明瞭GESA之特徵且將可藉由利用GESA之主要功能將GESA應用於各種應用,以不僅與圖案化結合並且與基於本揭示內容透過常規實驗與其他半導體製造過程結合來選擇性地保護特定特徵之頂部。
此外,在一些具體例中,該方法進一步包括在步驟(iii)之後(即在沉積拓樸受限層之後),(v)使於步驟(iii)中獲得之拓樸受限層在反應空間中暴露至氧電漿,以將基於氮化物層之拓樸受限層轉變為基於氧化物層。與以上轉變過程結合,GESA之應用廣泛擴展至各種半導體製造過程。 舉例來說,當將GESA膜用作非犧牲膜時,作為SiCN膜之GESA膜相當易漏,從而導致對裝置效能的不利效應。藉由將其轉變為氧化矽膜,膜品質可顯著地改良。在另一實例在半導體製造過程中,藉由將GESA膜轉變為氧化物膜,可調整膜之乾蝕刻速率選擇性,其中利用氧化物膜,整合可變得更容易。在又另一實例中,當製造需要藉由HF浸漬進行濕蝕刻以移除層時,藉由將構成層之GESA膜轉變為氧化物層,可有效地進行濕蝕刻,乃因作為SiCN膜之GESA膜通常不會被HF蝕刻溶液蝕刻。
圖10係根據本發明之一具體例利用氧電漿之氧化過程的示意圖式,其中(a)中之矽/金屬氮化物經轉變為矽/金屬氧化物。在此具體例中,如(a)中所繪示,GESA膜105選擇性地沉積於具有溝槽之基板101的頂表面上,及藉由使GESA膜105暴露至氧電漿,GESA膜可轉變為基於氧化物之膜106,而未顯著蝕刻GESA膜,如(b)中所繪示。
在一些具體例中,形成在基於氧化物之下層上之拓樸受限層的厚度在步驟(v)中藉由氧電漿處理而減小。
在一些具體例中,拓樸受限層係沉積在基於氧化物之下層上,其中拓樸受限層在步驟(v)中完全轉變為基於氧化物之層,以致在拓樸受限層與下層之間實質上沒有可偵測的接縫。在完成上述的一種方式中,在一些具體例中,步驟(v)係於每個預設次數的重複步驟(i)至(iii)之後進行。以上(循環暴露至氧電漿),在一些具體例中,拓樸受限層之總厚度在步驟(v)之後超過20nm(較佳地,20nm至100nm)。或者,在一些具體例中,步驟(v)係於作為沉積後處理的步驟(i)至(iii)完成之後進行。以上(單次暴露至氧電漿),在一些具體例中,拓樸受限層之總厚度在步驟(v)之後係在2nm至20nm之範圍內(較佳地,5nm至15nm)。當拓樸受限層之厚度超過20nm時,藉由電漿之氧化無法完全在每一次暴露至電漿時在深於20nm之區域中發生。
在一些具體例中,基於氮化物之GESA膜至基於氧化物之 膜的轉變可使用氧電漿在下表1A中顯示的條件下進行。
下表顯示GESA過程與電漿氧化過程的組合實例;
以上在表1B至1E中,載氣及稀釋氣體以符號*指示,其意指若在沉積過程中使用此等氣體時,儘管此等氣體並非不可或缺。若金屬前驅體原本為氣態或高度揮發性液體,則不需要載氣,此外,若使用載氣,則可能不需要稀釋氣體。
本發明進一步參照以下的工作實施例作說明。然而,該等實施例不欲限制本發明。在實施例中,當未明確說明條件及/或結構時,熟悉技藝人士可鑒於本揭示內容根據常規實驗輕易地提供該等條件及/或結構。此外,於特定實施例中應用的數字在一些具體例中可經修改至少±50%之範圍,且該等數字為近似值。
藉由GESA於Si基板(具有300mm直徑及0.7mm厚度)之平坦表面上形成膜,以使用圖2中繪示之順序確定膜性質,其之一循環係使用圖1A中繪示之PEALD設備及圖1B中繪示之氣體供應系統(FPS)在下表2(製程循環)中所示之條件下進行。使用載氣/稀釋氣體作為電漿產生氣體。沉積多個具有不同厚度之膜用來分析(見表3)。分析沉積膜且展現下表3所示之性質。
以上,GESA中的GPC低,顯示存在本揭示內容中所述之蝕刻/濺鍍效應。
於表3中,「均勻度(49pt Hi/Lo var %)」代表於基板之49個點處測得之膜厚度的均勻度,表示為最高厚度與最低厚度之間的差(%); 「R.I @633nm」代表當使用波長633nm之光時的反射率;「沉積速率」代表每個循環的生長速率;「K-值@1.5K」代表於1.5克耳文(Kelvin)的介電常數;「J @2MV/cm」代表於2MV/cm之漏電流;「BV @10E-3A/cm2(THK 6nm)」代表於10E-3A/cm2之崩潰電壓;「密閉性極限」代表當暴露至HF時展現密閉性的最小厚度(根據於經GESA塗布之SiO膜之HF浸漬後觀察到之厚度差來測量,其中若厚度差為0nm則將GESA膜視為密閉性);「霧度」代表利用分光光度計測得之霧度值,其係膜粗糙度之指示;「WER」代表使用0.5至2% HF溶液(稀氟化氫)之濕蝕刻速率;「密度」代表使用質量及X射線反射術測得之密度;及「粗糙度」代表使用X射線反射術測得之表面粗糙度。
以上,厚度18nm之膜的RI與厚度3.5nm之膜的RI稍微不同。此可能係歸因於天然氧化物(折射率1.4)之下層之貢獻的測量假象。如由以上明顯可見,GESA膜係漏電材料,但具有1nm之密閉性(通常1.5nm或以下),由於最習知之薄膜歸因於島狀生長行為具有介於2及5nm之間之密閉性,因此其係顯著地低。此外,GESA膜顯現相當高之對化學物質的抗性(通常,WER係零或實質上零nm/秒)。GESA膜之霧度值及粗糙度指示此膜相當光滑(通常,表面粗糙度小於0.5nm),其對大多數應用為較佳。由於GESA膜之以上的特殊性質,因而除了拓樸選擇性沉積能力之外,GESA膜展示其可用於諸如稍後超薄蝕刻止停的平面應用。
此外,使膜經受藉由飛行時間彈性回彈檢測分析(TOF-ERDA)的組成物分析。結果示於下表4。如表4所示,GESA膜係由SiCN構成。
此外,使用X射線繞射儀使膜進行結晶度分析。圖3係顯 示GESA膜之X射線繞射概況(2 θ/θ方法)的圖,其顯示如由箭頭指示的兩個峰,其指示GESA膜為非晶形。
如由以上明顯可見,GESA膜為SiCN非晶形膜。雖然取決於應用,但對非晶形材料存在顯著優勢。舉例來說,在圖案化(使用間隔件及核心)中,非晶形材料可避免在製程期間之任何可能的優先蝕刻及解析度損失(特定結晶取向的優先蝕刻係結晶材料中的熟知現象)。
除了下表5中所示者外,在實施例1中所使用之條件下沉積GESA膜,以確定GESA之特性。
如表5所示,即使當「饋送」之持續時間較實施例1中者長五倍,GPC(每個循環的生長速率)亦僅稍微增加而未顯著不同,指示在GESA中,如同典型ALD,前驅體係藉由飽和化學吸附於基板表面上。雖然藉由增加「饋送」之持續時間,看來化學吸附分子形成厚度稍微超過一單層之原子層,但由於前驅體之劑量主要係由前驅體之分壓控制,因此經延長的「饋送」持續時間對膜形成的影響小。然而,當未施加RF功率時,由於未使用反應物,因而未沉積膜。另一方面,當RF功率施加之持續時間較實施例1中長3倍時,令人驚訝地,GPC顯著地增加(超過50%),指示於基板表面上發生CVD樣沉積,而非簡單的自限ALD沉積,當施加較長的RF功率時,其可能會促進使用存在於基板上方之殘留前驅體氣體的CVD樣沉積(GESA使用甚高於習知PEALD通常所用者的瓶溫(80℃),從而使得排 空不充足),儘管理論並未限制本發明。因此,GESA具有典型ALD的基本特徵,但基本上或在化學性上不同於典型ALD。
藉由GESA在實施例1中使用之條件下,於經SiO2膜覆蓋之Si基板(具有300mm直徑及0.7mm厚度)上形成膜,該基板具有寬度大約30nm之窄溝槽及寬度大約75nm之寬溝槽,其深度係大約70nm。SiO2膜係藉由PEALD於基板上形成為具有約13nm之厚度。
圖4係顯示沉積於溝槽上之GESA膜之橫截面圖的STEM(掃描穿透式電子顯微鏡)照片。如圖4所示,GESA膜42係沉積於覆蓋窄溝槽之SiO2膜41的頂表面上,然而實質上沒有GESA膜沉積於窄溝槽之側壁或底部43上。於各頂表面上中心處之GESA膜的厚度(最高厚度)係5.95至6.6nm(SiO2膜之厚度係大約12nm至13nm)。
圖5係顯示沉積於溝槽上之GESA膜之橫截面圖的STEM照片。如圖5所示,GESA膜52係沉積於覆蓋窄及寬溝槽之SiO2膜51的頂表面上,然而實質上沒有GESA膜沉積於不僅窄溝槽並且寬溝槽之側壁或底部上(於各頂表面上中心處之GESA膜的厚度為大約7nm)。
圖6係顯示沉積於溝槽上之GESA膜之橫截面圖的STEM照片。如圖6所示,GESA膜62係沉積於覆蓋窄及寬溝槽之SiO2膜61的頂表面上,然而實質上沒有GESA膜沉積於不僅窄溝槽並且寬溝槽之側壁或底部上。於各頂表面上中心處之GESA膜的厚度(最高厚度)係8.3至10.8nm(SiO2膜之厚度係大約12nm至13nm)。圖6中具有倒梯形之溝槽的底表面顯示稍微模糊的影像,而在圖5中並未顯示此一模糊影像,或許指示藉由一定程度地減小溝槽頂表面上之GESA膜的厚度,可實質上完全地抑制膜之沉積於底表面上。無論如何,圖4、5、及6顯示沒有膜沉積於側壁及V或U形底表面上在非限制性理論中,GESA由於在基板上方之殘留前驅體分子而發生,其促成縮短離子之平均自由徑並抑制於底部之離子轟 擊,從而歸因於抑制側壁處之離子轟擊的各向異性電漿,且歸因於本揭示內容中描述之蝕刻/濺鍍效應,導致CVD之非保形沉積輪廓。
除了瓶溫為60℃外,在實施例1中使用之條件下沉積膜。圖7係顯示根據此比較實施例沉積於溝槽上之PEALD膜之橫截面圖的STEM照片。如圖7所示,膜不僅沉積於覆蓋溝槽之下層71的頂表面上,並且亦沉積於具有倒梯形之溝槽之下層71之底部的表面上,儘管於側壁上之膜沉積看來受限(於側壁僅觀察到輕微及部分沉積的膜),指示GESA經進行至特定程度但未進行完全的GESA。沉積於頂表面上之膜72及沉積於底表面上之膜73具有與實施例1中沉積於頂表面上之膜厚度實質上相似的厚度。經確定為進行完全GESA,需要特定的飽和蒸氣壓(BDEAS之飽和蒸氣壓係在70℃下30mmHg),即特定劑量的前驅體。在非限制性理論中,當前驅體之分壓足夠低以使其於飽和之後完全排空時,實質上沒有殘留前驅體分子留在基板上方,其縮短電漿中所含離子之平均自由徑,因此,於溝槽底部之離子轟擊未受到抑制,從而於底部形成膜。在此比較實施例中形成於側壁處之膜薄,或許是因使用作為各向異性電漿的Ar電漿之故。
藉由GESA於Si基板(具有300mm直徑及0.7mm厚度且經SiO2襯料膜覆蓋)之平坦表面上形成SiCN膜,使用圖2中繪示之順序,其之一循環係使用圖1A中繪示之PEALD設備及圖1B中繪示之氣體供應系統(FPS)在下表6(製程循環)中所示之條件下進行。使用載氣/稀釋氣體作為電漿產生氣體。SiO2膜係藉由PEALD於基板上形成為具有約13nm之厚度。
圖11係顯示沉積於具有溝槽之基板上之GESA膜之橫截面圖的STEM照片。如圖11所示,GESA膜(SiCN)162係沉積在覆蓋窄及寬溝槽之SiO2膜161的表面上,其中實質上沒有GESA膜沉積於窄溝槽的側壁或底部上。另一方面,GESA膜係沉積在經SiO2膜161覆蓋之溝槽的各頂表面上,且亦沉積於寬溝槽之底部及U形底表面上,儘管於底部上之GESA膜較於頂表面上之GESA膜薄。為有效地抑制GESA膜沉積於溝槽底部上,溝槽需為狹窄,例如,溝槽之寬度應為<50nm(在此情況,溝槽之寬度為62nm)。於各頂表面上中心處之GESA膜的厚度(最高厚度)係9.7至11.2nm(SiO2膜之厚度係大約9nm至10nm),其中圖11中於各頂表面上 中心處之GESA膜及SiO2膜的總厚度為19.7nm至20.2nm。於寬溝槽之底表面及U形底表面處之GESA膜的厚度分別為7nm(SiO2膜之厚度為大約9.5nm)及3nm(SiO2膜之厚度為大約9nm),其中圖11中,於底部之GESA膜及SiO2膜的總厚度分別為16.2nm及14.1nm。圖11顯示實質上沒有GESA膜沉積於側壁及V形底表面上。
接下來,使以如上述之相同方式獲得之經GESA膜覆蓋之具有溝槽之基板於相同室中在下表7中所示之條件下暴露至氧電漿。
圖12係顯示GESA膜在暴露至氧電漿後之橫截面圖的STEM照片。如圖12所示,GESA膜(SiCN)162與SiO2膜161之間的區別或對比實質上消失,導致形成整合的單一氧化物膜163,即由STEM未觀察到其間的邊界,指示SiCN有效地轉變為SiO(無碳)(儘管理論上,其間的區別可使用耦合EELS(電子能量損失能譜)的HR-TEM(高解析度穿透式電子顯微術)偵測得)。
此外,如圖12所示,GESA膜藉由暴露至氧電漿經蝕刻至特定程度(大約50%,通常10%至70%),該氧電漿歸因於電漿的蝕刻/濺鍍效應而修整或蝕刻GESA膜。
以與實施例4實質上相似的方式藉由GESA將SiCN膜沉積 於經SiO襯料覆蓋之基板上,隨後以與實施例4實質上相似的方式使經沉積GESA膜之基板暴露至氧電漿,僅除了實施例5中之RF功率為400W及實施例6中為100W。
圖13顯示在暴露至氧電漿前(GESA POR)、於實施例5中在使用100W之RF功率暴露至氧電漿後(TS-SiO 100W)、及於實施例6中在使用400W之RF功率暴露至氧電漿後(TS-SiO 400W)之GESA膜的XPC光譜(x軸代表結合能eV)。如圖13所示,於暴露至氧電漿後,GESA膜(SiCN)有效地轉變為SiO膜,其中使用100W之RF功率及400W之RF功率獲得之兩個膜清楚顯示形成Si-O-Si鍵及解離Si-N鍵及Si-H鍵,且當RF功率更高時,以上趨勢更為明顯。此外,使各膜經受藉由飛行時間彈性回彈檢測分析(TOF-ERDA)的組成物分析。結果示於下表8。如表8所示,GESA膜(SiCN)經轉變為SiO膜,其中未偵測到碳或氮(即低於可偵測含量),然而偵測到高含量的Si及O。
此外,分析各膜且其呈現下表9中所示之濕蝕刻性質。
「WERR(TOX)」代表使用0.5至2% HF溶液(稀氟化氫)相對於熱氧化物膜的濕蝕刻速率。
如前所述,藉由將GESA-SiCN膜暴露於氧電漿,可將膜轉變為SiO膜,且可根據氧電漿之強度調整SiO品質或性質。
藉由GESA將SiN膜形成於在其表面上設置有EUV光阻劑圖案的Si基板(具有300mm直徑及0.7mm厚度)上,使用圖2中繪示之順序,其之一循環係使用圖1A中繪示之PEALD設備及圖1B中繪示之氣體供應系統(FPS)在下表10(製程循環)中所示之條件下進行。使用載氣/稀釋氣體作為電漿產生氣體。EUV光阻劑圖案係藉由EUV雷射微影術形成,該圖案具有大約20nm之寬度、大約35nm之高度、及大約40nm之間距。
藉由GESA使用N2電漿沉積於光阻劑圖案上之SiN膜之橫截面圖的STEM照片(未顯示)證實GESA膜主要係沉積於抗蝕劑之頂表面上,其中該GESA膜在頂表面上之中心處具有大約7nm之厚度(最高厚度),在溝槽底表面之中心處具有大約3.7nm之厚度(最高厚度),及在側壁之大約中點處具有大約2.7nm之厚度,且在中心處之GESA膜及抗蝕劑的總高度係大約40nm,及在側壁之大約中點處之GESA膜及抗蝕劑的總寬度係大約22nm。
此外,使膜經受藉由飛行時間彈性回彈檢測分析(TOF-ERDA)的組成物分析。結果示於下表11。如表11所示,GESA膜係由SiCN構成。
以上,「GESA(POR)」係指使用氬電漿的一般GESA膜。如表11所示,藉由使用氮電漿替代氬電漿,有效地沉積SiN膜(不含可偵測的氧或碳)。
如前所述,藉由直接將GESA膜沉積於光阻劑圖案上,可提高抗蝕劑的強度(特定而言,EUV光阻劑似乎較弱),且可增加抗蝕劑之 高度,以致可改良圖案轉移解析度。
熟悉技藝人士當明瞭可進行許多及各種修改而不脫離本發明之精神。因此,應清楚明瞭本發明之形式僅係說明性而非意欲限制本發明之範疇。
Claims (20)
- 一種拓樸致能選擇性沉積方法,其中在半導體製造中將膜選擇性地沉積於具有由底部及側壁構成之凹部圖案之基板的頂表面上,該方法依序包括:(i)將前驅體供應至反應空間,在該反應空間中該基板放置於電極之間,該前驅體包含除金屬或類金屬原子之外包括碳及/或鹵化物的多種元素;(ii)進行反應空間之排空,僅達到在基板之頂表面附近所殘留之前驅體量為較大於經化學吸附於基板之頂表面上之前驅體量的程度;及(iii)在電極之間施加RF功率,同時供應實質上不含H及O之電漿產生氣體,以產生基板所暴露之富含離子之各向異性電漿,藉此選擇性地及主要地在基板之頂表面上沉積拓樸受限層,其中實質上沒有層,或實質上較拓樸受限層薄的層,被沈積於凹部圖案之側壁及底部上。
- 如請求項1之方法,其中該前驅體包含矽或金屬、碳、氮、及氫。
- 如請求項1之方法,其中在步驟(i)中,該前驅體係藉由載氣通過包含呈液態之前驅體之瓶被供應至反應空間,未在該等電極之間施加RF功率,其中該瓶中之蒸氣壓力係約30mmHg或更高。
- 如請求項2之方法,其中該拓樸受限層係由SiCN、SiN、TiCN、TiN、ZrCN、ZrN、HfCN、HfN、TaCN、TaN、NbCN、NbN、AlCN、AlN、CoCN、CoN、CuCN、CuN、WCN、WN、RuCN、RuN、NiCN、NiN、LaCN、LaN、TiNCl、HFNCl、或WFN所構成。
- 如請求項1之方法,其中在整個沉積步驟中未將除電漿產生氣體外之反應物供應至反應空間。
- 如請求項1之方法,其中該凹部圖案之寬度係小於100nm。
- 如請求項1之方法,其中在步驟(i)中,該前驅體係在未在該等電極之間施加RF功率之情況下供應至該反應空間,且該方法進一步包括(iv)在步驟(ii)之後立即排空反應室,其中步驟(i)至(iv)僅重複至該拓樸受限層之厚度達到1nm至100nm為止。
- 如請求項1之方法,其中該等載氣及/或稀釋氣體為Ar、He、及/或N 2。
- 如請求項1之方法,其中該凹部圖案係由設置於模板上之具有間隔之光阻劑線條或垂直間隔件所構成的圖案,且在步驟(iii)中,該拓樸受限層係選擇性地及主要地在各光阻劑線條或各垂直間隔件之頂表面上作為傘層沉積,其中實質上沒有層、或實質上較該拓樸受限層薄的層,被沉積在該等光阻劑線條或垂直間隔件之側壁上或在該模板之暴露表面上,隨後使用具有該等傘層之該等光阻劑線條或垂直間隔件,藉由各向異性蝕刻,將該等光阻劑線條或垂直間隔件所構成之圖案轉移至該模板。
- 如請求項9之方法,其中該拓樸受限層係沉積於由氧化矽或金屬氧化物所製成且藉由間隔件界定雙重圖案化(SDDP)所產生的垂直間隔件上。
- 如請求項9之方法,其中該拓樸受限層係沉積於藉由EUV光微影術所形成之光阻劑線條上。
- 如請求項9之方法,其中該傘層之厚度係在1nm至15nm之範圍內。
- 如請求項1之方法,其中該凹部圖案係由用於FinFET裝置之鰭片結構所構成的圖案,且在步驟(iii)中,該拓樸受限層係選擇性及主要地在由氧化矽或金屬氧化物製成之各鰭片結構之頂表面上作為保護層沉積,其中實質上沒有層、或實質上較該拓樸受限層薄的層,被沉積於該鰭片結構之側壁上及在該基板之暴露表面上。
- 如請求項1之方法,其進一步包括,在步驟(iii)之後,(v)使於步驟(iii)中獲得之該拓樸受限層在該反應空間中暴露至氧電漿,以將基於氮化物或碳氮化物層之拓樸受限層轉變為基於氧化物之層。
- 如請求項14之方法,其中該拓樸受限層係沉積在基於氧化物之下層上,其中該拓樸受限層在步驟(v)中完全轉變為基於氧化物之層,以致在該拓樸受限層與該下層之間實質上沒有可偵測的接縫。
- 如請求項15之方法,其中形成在該基於氧化物之下層上之該拓樸受限層的厚度係在步驟(v)中藉由氧電漿處理而減小。
- 如請求項14之方法,其中步驟(v)係於每個預設次數的重複步驟(i)至(iii)之後進行。
- 如請求項17之方法,其中在完成步驟(v)之後,該拓樸受限層的厚度係超過20nm。
- 如請求項14之方法,其中步驟(v)係於作為沉積後處理的步驟(i)至(iii)完成之後進行。
- 如請求項19之方法,其中在步驟(v)之後,該拓樸受限層的厚度係在5nm至20nm之範圍內。
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- 2017-09-15 US US15/705,955 patent/US10340135B2/en active Active
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