JP5110409B2 - 自己組織化材料を使用するピッチマルチプリケーション - Google Patents
自己組織化材料を使用するピッチマルチプリケーション Download PDFInfo
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- JP5110409B2 JP5110409B2 JP2010511238A JP2010511238A JP5110409B2 JP 5110409 B2 JP5110409 B2 JP 5110409B2 JP 2010511238 A JP2010511238 A JP 2010511238A JP 2010511238 A JP2010511238 A JP 2010511238A JP 5110409 B2 JP5110409 B2 JP 5110409B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0338—Process specially adapted to improve the resolution of the mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3088—Process specially adapted to improve the resolution of the mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/947—Subphotolithographic processing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/95—Multilayer mask including nonradiation sensitive layer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24058—Structurally defined web or sheet [e.g., overall dimension, etc.] including grain, strips, or filamentary elements in respective layers or components in angular relation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/757,846 | 2007-06-04 | ||
| US11/757,846 US7923373B2 (en) | 2007-06-04 | 2007-06-04 | Pitch multiplication using self-assembling materials |
| PCT/US2008/063943 WO2008150673A1 (en) | 2007-06-04 | 2008-05-16 | Pitch multiplication using self-assembling materials |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010531051A JP2010531051A (ja) | 2010-09-16 |
| JP2010531051A5 JP2010531051A5 (enExample) | 2011-06-23 |
| JP5110409B2 true JP5110409B2 (ja) | 2012-12-26 |
Family
ID=39689121
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010511238A Active JP5110409B2 (ja) | 2007-06-04 | 2008-05-16 | 自己組織化材料を使用するピッチマルチプリケーション |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US7923373B2 (enExample) |
| EP (1) | EP2165355B1 (enExample) |
| JP (1) | JP5110409B2 (enExample) |
| KR (1) | KR101547706B1 (enExample) |
| CN (1) | CN101681812B (enExample) |
| TW (1) | TWI360161B (enExample) |
| WO (1) | WO2008150673A1 (enExample) |
Families Citing this family (96)
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| US8575021B2 (en) * | 2004-11-22 | 2013-11-05 | Intermolecular, Inc. | Substrate processing including a masking layer |
| US7384849B2 (en) | 2005-03-25 | 2008-06-10 | Micron Technology, Inc. | Methods of forming recessed access devices associated with semiconductor constructions |
| US7282401B2 (en) | 2005-07-08 | 2007-10-16 | Micron Technology, Inc. | Method and apparatus for a self-aligned recessed access device (RAD) transistor gate |
| US7867851B2 (en) | 2005-08-30 | 2011-01-11 | Micron Technology, Inc. | Methods of forming field effect transistors on substrates |
| US7700441B2 (en) | 2006-02-02 | 2010-04-20 | Micron Technology, Inc. | Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates |
| US7723009B2 (en) | 2006-06-02 | 2010-05-25 | Micron Technology, Inc. | Topography based patterning |
| US7602001B2 (en) | 2006-07-17 | 2009-10-13 | Micron Technology, Inc. | Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells |
| US7772632B2 (en) | 2006-08-21 | 2010-08-10 | Micron Technology, Inc. | Memory arrays and methods of fabricating memory arrays |
| US7589995B2 (en) | 2006-09-07 | 2009-09-15 | Micron Technology, Inc. | One-transistor memory cell with bias gate |
| US7767099B2 (en) * | 2007-01-26 | 2010-08-03 | International Business Machines Corporaiton | Sub-lithographic interconnect patterning using self-assembling polymers |
| US7923373B2 (en) * | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
| JP2010534924A (ja) * | 2007-06-15 | 2010-11-11 | アプライド マテリアルズ インコーポレイテッド | 基板ギャップ内に犠牲酸化物ライナを形成する酸素sacvd |
| US8143156B2 (en) * | 2007-06-20 | 2012-03-27 | Sandisk Technologies Inc. | Methods of forming high density semiconductor devices using recursive spacer technique |
| US8980756B2 (en) | 2007-07-30 | 2015-03-17 | Micron Technology, Inc. | Methods for device fabrication using pitch reduction |
| US8563229B2 (en) | 2007-07-31 | 2013-10-22 | Micron Technology, Inc. | Process of semiconductor fabrication with mask overlay on pitch multiplied features and associated structures |
| US7737039B2 (en) | 2007-11-01 | 2010-06-15 | Micron Technology, Inc. | Spacer process for on pitch contacts and related structures |
| US7659208B2 (en) | 2007-12-06 | 2010-02-09 | Micron Technology, Inc | Method for forming high density patterns |
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| US7521094B1 (en) * | 2008-01-14 | 2009-04-21 | International Business Machines Corporation | Method of forming polymer features by directed self-assembly of block copolymers |
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| JP2009295785A (ja) * | 2008-06-05 | 2009-12-17 | Toshiba Corp | 半導体装置の製造方法 |
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| JP2010118501A (ja) * | 2008-11-13 | 2010-05-27 | Toshiba Corp | 半導体装置の製造方法 |
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| JP6019966B2 (ja) * | 2012-09-10 | 2016-11-02 | 大日本印刷株式会社 | パターン形成方法 |
| JP6088803B2 (ja) | 2012-11-16 | 2017-03-01 | 株式会社日立ハイテクノロジーズ | 画像処理装置、自己組織化リソグラフィ技術によるパターン生成方法、及びコンピュータープログラム |
| US8518836B1 (en) * | 2012-11-19 | 2013-08-27 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor patterning |
| US8828885B2 (en) * | 2013-01-04 | 2014-09-09 | Taiwan Semiconductor Manufacturing Company Limited | Photo resist trimmed line end space |
| KR101993255B1 (ko) * | 2013-01-07 | 2019-06-26 | 삼성전자주식회사 | 콘택 홀 형성 방법 |
| JP6136271B2 (ja) * | 2013-01-08 | 2017-05-31 | 大日本印刷株式会社 | インプリントモールドの製造方法 |
| JP6127517B2 (ja) * | 2013-01-08 | 2017-05-17 | 大日本印刷株式会社 | インプリントモールドの製造方法 |
| US8969207B2 (en) | 2013-03-13 | 2015-03-03 | Globalfoundries Inc. | Methods of forming a masking layer for patterning underlying structures |
| US8975009B2 (en) | 2013-03-14 | 2015-03-10 | Tokyo Electron Limited | Track processing to remove organic films in directed self-assembly chemo-epitaxy applications |
| US8980538B2 (en) | 2013-03-14 | 2015-03-17 | Tokyo Electron Limited | Chemi-epitaxy in directed self-assembly applications using photo-decomposable agents |
| US9147574B2 (en) * | 2013-03-14 | 2015-09-29 | Tokyo Electron Limited | Topography minimization of neutral layer overcoats in directed self-assembly applications |
| US20140273534A1 (en) | 2013-03-14 | 2014-09-18 | Tokyo Electron Limited | Integration of absorption based heating bake methods into a photolithography track system |
| US9209014B2 (en) | 2013-03-15 | 2015-12-08 | Tokyo Electron Limited | Multi-step bake apparatus and method for directed self-assembly lithography control |
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-
2007
- 2007-06-04 US US11/757,846 patent/US7923373B2/en active Active
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2008
- 2008-05-16 WO PCT/US2008/063943 patent/WO2008150673A1/en not_active Ceased
- 2008-05-16 JP JP2010511238A patent/JP5110409B2/ja active Active
- 2008-05-16 KR KR1020097027395A patent/KR101547706B1/ko active Active
- 2008-05-16 CN CN2008800187311A patent/CN101681812B/zh active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| TW200908091A (en) | 2009-02-16 |
| KR20100032397A (ko) | 2010-03-25 |
| EP2165355A1 (en) | 2010-03-24 |
| US20110033786A1 (en) | 2011-02-10 |
| JP2010531051A (ja) | 2010-09-16 |
| WO2008150673A1 (en) | 2008-12-11 |
| US7923373B2 (en) | 2011-04-12 |
| US10515801B2 (en) | 2019-12-24 |
| TWI360161B (en) | 2012-03-11 |
| KR101547706B1 (ko) | 2015-08-26 |
| EP2165355B1 (en) | 2013-10-30 |
| CN101681812B (zh) | 2013-03-13 |
| US20080299774A1 (en) | 2008-12-04 |
| CN101681812A (zh) | 2010-03-24 |
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