JPS6435916A - Formation of fine pattern - Google Patents

Formation of fine pattern

Info

Publication number
JPS6435916A
JPS6435916A JP19003487A JP19003487A JPS6435916A JP S6435916 A JPS6435916 A JP S6435916A JP 19003487 A JP19003487 A JP 19003487A JP 19003487 A JP19003487 A JP 19003487A JP S6435916 A JPS6435916 A JP S6435916A
Authority
JP
Japan
Prior art keywords
formed
removed
sio film
pattern
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19003487A
Inventor
Norio Hasegawa
Toshihiko Tanaka
Hiroshi Fukuda
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP19003487A priority Critical patent/JPS6435916A/en
Publication of JPS6435916A publication Critical patent/JPS6435916A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE:To make it possible to form the fine pattern exceeding the limits of resolution using lithographic technique by a method wherein the material, which becomes the mask used for processing of the substrate to be processed, is selectively formed on the sidewall of the pattern formed by lithography, and then a resist is removed. CONSTITUTION:An Al film 2 is coated on a silicon substrate 1, a photoresist is coated on the whole surface, an ordinary exposing and developing method is conducted, and a resist pattern 3 is formed. Then, an ordinary resist-hardening treatment is conducted, and an SiO film 4 is formed using a plasma CVD method. Subsequently, the SiO film 4 on the plane part is removed by conducting reactive sputter etching, and an SiO film 4' is formed on the sidewall of the resist pattern 3 in a self alignment manner. Then, the resist pattern 3 is removed by plasma etching using O2. The Al film 2 is processed using the second pattern consisting of the SiO film 4' as an etching mask, and the SiO film 4' is removed. As a result, the resolution of lithography can be remarkably improved.
JP19003487A 1987-07-31 1987-07-31 Formation of fine pattern Pending JPS6435916A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19003487A JPS6435916A (en) 1987-07-31 1987-07-31 Formation of fine pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19003487A JPS6435916A (en) 1987-07-31 1987-07-31 Formation of fine pattern

Publications (1)

Publication Number Publication Date
JPS6435916A true JPS6435916A (en) 1989-02-07

Family

ID=16251261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19003487A Pending JPS6435916A (en) 1987-07-31 1987-07-31 Formation of fine pattern

Country Status (1)

Country Link
JP (1) JPS6435916A (en)

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06216084A (en) * 1992-12-17 1994-08-05 Samsung Electron Co Ltd Separation of pattern of semiconductor device and formation of minute pattern
US5595941A (en) * 1994-06-01 1997-01-21 Mitsubishi Denki Kabushiki Kaisha Method of forming fine patterns
EP0755067A1 (en) * 1995-07-17 1997-01-22 Siemens Aktiengesellschaft Method of fabrication for sublithographic etching masks
WO2005034215A1 (en) * 2003-09-30 2005-04-14 Infineon Technologies Ag Method for the production of a hard mask and hard mask arrangement
JP2005202104A (en) * 2004-01-15 2005-07-28 Nikon Corp Method for manufacturing polarization element, polarization element, method for manufacturing picture projecting device and picture projecting device
JP2008306161A (en) * 2007-06-05 2008-12-18 Hynix Semiconductor Inc Method for forming fine pattern of semiconductor device
JP2009507375A (en) * 2005-09-01 2009-02-19 マイクロン テクノロジー, インク. Mask pattern having spacers for increasing pitch and method for forming the same
JP2009124134A (en) * 2007-10-26 2009-06-04 Applied Materials Inc Frequency doubling method using photoresist template mask
JP2009212163A (en) * 2008-02-29 2009-09-17 Toshiba Corp Method of fabricating semiconductor device
JP2009536787A (en) * 2006-05-10 2009-10-15 ラム リサーチ コーポレーションLam Research Corporation Pitch reduction
KR100953053B1 (en) * 2008-08-01 2010-04-14 주식회사 하이닉스반도체 Method of forming fine patterns in semiconductor device
JP2010527137A (en) * 2006-03-23 2010-08-05 マイクロン テクノロジー, インク. Topography-oriented patterning
WO2011078083A1 (en) * 2009-12-25 2011-06-30 東京エレクトロン株式会社 Method of manufacturing semiconductor device and system for manufacturing semiconductor device
JP2012511253A (en) * 2008-12-04 2012-05-17 マイクロン テクノロジー, インク. Substrate manufacturing method
JP2012511254A (en) * 2008-12-04 2012-05-17 マイクロン テクノロジー, インク. Substrate manufacturing method
US20130063707A1 (en) * 2011-09-14 2013-03-14 Ryota Aburada Pattern generating method, pattern forming method, and pattern generating program
CN103050382A (en) * 2011-10-17 2013-04-17 中芯国际集成电路制造(上海)有限公司 Manufacturing method of semiconductor device
JP2013251320A (en) * 2012-05-30 2013-12-12 Dainippon Printing Co Ltd Nano-imprint mold and manufacturing method of the same
KR101428820B1 (en) * 2007-05-14 2014-08-08 마이크론 테크놀로지, 인크. Topography directed patterning
US8865598B2 (en) 2005-06-02 2014-10-21 Micron Technology, Inc. Method for positioning spacers in pitch multiplication
US8895232B2 (en) 2004-09-01 2014-11-25 Micron Technology, Inc. Mask material conversion
US9048194B2 (en) 2008-03-21 2015-06-02 Micron Technology, Inc. Method for selectively modifying spacing between pitch multiplied structures
US9082829B2 (en) 2005-09-01 2015-07-14 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
US9653315B2 (en) 2008-12-04 2017-05-16 Micron Technology, Inc. Methods of fabricating substrates
US9666695B2 (en) 2007-12-18 2017-05-30 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures
US9679781B2 (en) 2005-09-01 2017-06-13 Micron Technology, Inc. Methods for integrated circuit fabrication with protective coating for planarization
US9761457B2 (en) 2006-07-10 2017-09-12 Micron Technology, Inc. Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
US10151981B2 (en) 2008-05-22 2018-12-11 Micron Technology, Inc. Methods of forming structures supported by semiconductor substrates

Cited By (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06216084A (en) * 1992-12-17 1994-08-05 Samsung Electron Co Ltd Separation of pattern of semiconductor device and formation of minute pattern
US5595941A (en) * 1994-06-01 1997-01-21 Mitsubishi Denki Kabushiki Kaisha Method of forming fine patterns
US5688723A (en) * 1994-06-01 1997-11-18 Mitsubishi Denki Kabushiki Kaisha Method of forming fine patterns
US5710066A (en) * 1994-06-01 1998-01-20 Mitsubishi Denki Kabushiki Kaisha Method of forming fine patterns
EP0755067A1 (en) * 1995-07-17 1997-01-22 Siemens Aktiengesellschaft Method of fabrication for sublithographic etching masks
WO2005034215A1 (en) * 2003-09-30 2005-04-14 Infineon Technologies Ag Method for the production of a hard mask and hard mask arrangement
JP2005202104A (en) * 2004-01-15 2005-07-28 Nikon Corp Method for manufacturing polarization element, polarization element, method for manufacturing picture projecting device and picture projecting device
US8895232B2 (en) 2004-09-01 2014-11-25 Micron Technology, Inc. Mask material conversion
US8865598B2 (en) 2005-06-02 2014-10-21 Micron Technology, Inc. Method for positioning spacers in pitch multiplication
US9679781B2 (en) 2005-09-01 2017-06-13 Micron Technology, Inc. Methods for integrated circuit fabrication with protective coating for planarization
JP2009507375A (en) * 2005-09-01 2009-02-19 マイクロン テクノロジー, インク. Mask pattern having spacers for increasing pitch and method for forming the same
US9082829B2 (en) 2005-09-01 2015-07-14 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
US10396281B2 (en) 2005-09-01 2019-08-27 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
JP2010527137A (en) * 2006-03-23 2010-08-05 マイクロン テクノロジー, インク. Topography-oriented patterning
JP2009536787A (en) * 2006-05-10 2009-10-15 ラム リサーチ コーポレーションLam Research Corporation Pitch reduction
US9761457B2 (en) 2006-07-10 2017-09-12 Micron Technology, Inc. Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
US10096483B2 (en) 2006-07-10 2018-10-09 Micron Technology, Inc. Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
KR101428820B1 (en) * 2007-05-14 2014-08-08 마이크론 테크놀로지, 인크. Topography directed patterning
JP2008306161A (en) * 2007-06-05 2008-12-18 Hynix Semiconductor Inc Method for forming fine pattern of semiconductor device
JP2009124134A (en) * 2007-10-26 2009-06-04 Applied Materials Inc Frequency doubling method using photoresist template mask
US9666695B2 (en) 2007-12-18 2017-05-30 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures
US9941155B2 (en) 2007-12-18 2018-04-10 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures
JP2009212163A (en) * 2008-02-29 2009-09-17 Toshiba Corp Method of fabricating semiconductor device
US9048194B2 (en) 2008-03-21 2015-06-02 Micron Technology, Inc. Method for selectively modifying spacing between pitch multiplied structures
US10151981B2 (en) 2008-05-22 2018-12-11 Micron Technology, Inc. Methods of forming structures supported by semiconductor substrates
KR100953053B1 (en) * 2008-08-01 2010-04-14 주식회사 하이닉스반도체 Method of forming fine patterns in semiconductor device
US9653315B2 (en) 2008-12-04 2017-05-16 Micron Technology, Inc. Methods of fabricating substrates
JP2012511253A (en) * 2008-12-04 2012-05-17 マイクロン テクノロジー, インク. Substrate manufacturing method
JP2012511254A (en) * 2008-12-04 2012-05-17 マイクロン テクノロジー, インク. Substrate manufacturing method
US8853087B2 (en) 2009-12-25 2014-10-07 Tokyo Electron Limited Method of manufacturing semiconductor device and system for manufacturing semiconductor device
JP2011133797A (en) * 2009-12-25 2011-07-07 Tokyo Electron Ltd Method of manufacturing semiconductor device, and system for manufacturing semiconductor device
WO2011078083A1 (en) * 2009-12-25 2011-06-30 東京エレクトロン株式会社 Method of manufacturing semiconductor device and system for manufacturing semiconductor device
TWI407490B (en) * 2009-12-25 2013-09-01 Tokyo Electron Ltd Manufacturing method for semiconductor device, and manufacturing system for semiconductor device
US9268208B2 (en) * 2011-09-14 2016-02-23 Kabushiki Kaisha Toshiba Pattern generating method, pattern forming method, and pattern generating program
US20130063707A1 (en) * 2011-09-14 2013-03-14 Ryota Aburada Pattern generating method, pattern forming method, and pattern generating program
CN103050382A (en) * 2011-10-17 2013-04-17 中芯国际集成电路制造(上海)有限公司 Manufacturing method of semiconductor device
JP2013251320A (en) * 2012-05-30 2013-12-12 Dainippon Printing Co Ltd Nano-imprint mold and manufacturing method of the same

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