JP2007096055A - 半導体装置、及び半導体装置の作製方法 - Google Patents
半導体装置、及び半導体装置の作製方法 Download PDFInfo
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- JP2007096055A JP2007096055A JP2005284538A JP2005284538A JP2007096055A JP 2007096055 A JP2007096055 A JP 2007096055A JP 2005284538 A JP2005284538 A JP 2005284538A JP 2005284538 A JP2005284538 A JP 2005284538A JP 2007096055 A JP2007096055 A JP 2007096055A
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Images
Abstract
【解決手段】半導体層として化合物半導体材料を用い、半導体層とソース電極層及びドレイン電極層との間に、それぞれ導電性の有機化合物及び無機化合物を含むバッファ層を形成する。バッファ層は有機化合物及び無機化合物を含む層として形成される。化合物半導体材料を用いた半導体層とソース電極層及びドレイン電極層との間に介在するバッファ層によって、半導体層とソース電極層及びドレイン電極層との導電性は向上し、電気的に良好な接続を行うことができる。
【選択図】図1
Description
本発明の実施の形態について、図1を用いて説明する。図1(A)(B)(C)に示すトランジスタは、ボトムゲート構造のコプラナー型の薄膜トランジスタである。
本発明の実施の形態について、図2(A)(B)を用いて説明する。本実施の形態は、本発明を用いた逆スタガ型薄膜トランジスタの例である。よって、実施の形態1と、同一部分又は同様な機能を有する部分の繰り返しの説明は省略する。
本発明の実施の形態について、図3(A)(B)を用いて説明する。本実施の形態は、本発明を用いたトップゲート構造の薄膜トランジスタの例である。よって、実施の形態1と、同一部分又は同様な機能を有する部分の繰り返しの説明は省略する。
図17(A)は本発明に係る表示パネルの構成を示す上面図であり、絶縁表面を有する基板2700上に画素2702をマトリクス上に配列させた画素部2701、走査線側入力端子2703、信号線側入力端子2704が形成されている。画素数は種々の規格に従って設ければ良く、XGAであってRGBを用いたフルカラー表示であれば1024×768×3(RGB)、UXGAであってRGBを用いたフルカラー表示であれば1600×1200×3(RGB)、フルスペックハイビジョンに対応させ、RGBを用いたフルカラー表示であれば1920×1080×3(RGB)とすれば良い。
本発明の実施の形態について、図13乃至図15を用いて説明する。より詳しくは、本発明を適用した、実施の形態3で示したトップゲート構造のプレナー型薄膜トランジスタを有する表示装置の作製方法について説明する。図14(A)は表示装置画素部の上面図であり、図13及び図14(B)は、図14(A)を形製する各工程における線E−Fによる断面図である。図15(A)も表示装置の上面図であり、図15(B)は、図15(A)における線O−P(線U−Wを含む)による断面図である。なお表示素子として液晶材料を用いた液晶表示装置の例を示す。よって、同一部分又は同様な機能を有する部分の繰り返しの説明は省略する。
本発明を適用して薄膜トランジスタを形成し、該薄膜トランジスタを用いて表示装置を形成することができるが、発光素子を用いて、なおかつ、該発光素子を駆動するトランジスタとしてnチャネル型トランジスタを用いた場合、該発光素子から発せられる光は、素子を有する基板より光を取り出す下方放射、封止基板側より光を放射する上方放射、発光素子を挟み込む両方の基板より光を放射する両方放射のいずれかを行う。ここでは、それぞれの場合に応じた発光素子の積層構造について、図12を用いて説明する。
次に、実施の形態4乃至6によって作製される表示パネルに駆動用のドライバ回路を実装する態様について説明する。
本発明の半導体装置、及び表示装置に具備される保護回路の一例について説明する。
本実施の形態で示す表示パネルの画素の構成について、図10に示す等価回路図を参照して説明する。本実施の形態では、画素の表示素子として発光素子(EL素子)を用いる例を示す。
本実施の形態を図9を用いて説明する。図9は、本発明を適用して作製されるTFT基板2800を用いて発光(EL)表示モジュールを構成する一例を示している。図9において、TFT基板2800上には、画素により構成された画素部が形成されている。
本実施の形態を図16(A)及び図16(B)を用いて説明する。図16(A)、図16(B)は、本発明を適用して作製されるTFT基板2600を用いて液晶表示モジュールを構成する一例を示している。
本発明によって形成される表示装置によって、テレビジョン装置を完成させることができる。図20はテレビジョン装置の主要な構成を示すブロック図を示している。表示パネルには、図17(A)で示すような構成として画素部601のみが形成されて走査線側駆動回路603と信号線側駆動回路602とが、図18(B)のようなTAB方式により実装される場合と、図18(A)のようなCOG方式により実装される場合と、図17(B)に示すようにTFTを形成し、画素部601と走査線側駆動回路603を基板上に一体形成し信号線側駆動回路602を別途ドライバICとして実装する場合、また図17(C)で示すように画素部601と信号線側駆動回路602と走査線側駆動回路603を基板上に一体形成する場合などがあるが、どのような形態としても良い。
本発明を適用して、様々な表示装置を作製することができる。即ち、それら表示装置を表示部に組み込んだ様々な電子機器に本発明を適用できる。
本発明によりプロセッサ回路を有するチップ(無線チップ、無線プロセッサ、無線メモリ、無線タグともよぶ)として機能する半導体装置を形成することができる。本発明の半導体装置の用途は広範にわたるが、例えば、紙幣、硬貨、有価証券類、証書類、無記名債券類、包装用容器類、書籍類、記録媒体、身の回り品、乗物類、食品類、衣類、保健用品類、生活用品類、薬品類及び電子機器等に設けて使用することができる。
(実施の形態15)
本実施の形態として実施の形態1乃至3に記載の半導体装置を、可撓性を有する表示装置に適用した例について図26を参照しながら示す。
Claims (18)
- 酸化物半導体層と、導電層と、前記酸化物半導体層と前記導電層との間に設けられた有機化合物及び無機化合物を含む層を有することを特徴とする半導体装置。
- 酸化物半導体層と、ソース電極層と、ドレイン電極層と、前記酸化物半導体層と前記ソース電極層との間に設けられた第1の有機化合物及び無機化合物を含む層と、前記酸化物半導体層と前記ドレイン電極層との間に設けられた第2の有機化合物及び無機化合物を含む層とを有することを特徴とする半導体装置。
- ゲート電極層と、ゲート絶縁層と、酸化物半導体層と、ソース電極層と、ドレイン電極層と、前記酸化物半導体層と前記ソース電極層との間に設けられた第1の有機化合物及び無機化合物を含む層と、前記酸化物半導体層と前記ドレイン電極層との間に設けられた第2の有機化合物及び無機化合物を含む層とを有することを特徴とする半導体装置。
- 請求項2又は請求項3において、前記第1の有機化合物及び無機化合物を含む層と、前記第2の有機化合物及び無機化合物を含む層とは異なる材料を含むことを特徴とする半導体装置。
- 請求項2乃至4のいずれか一項において、前記第1の有機化合物及び無機化合物を含む層と前記ソース電極層との間に第1の一導電型を有する半導体層と、前記第2の有機化合物及び無機化合物を含む層と前記ドレイン電極層との間に第2の一導電型を有する半導体層を有することを特徴とする半導体装置。
- ゲート電極層と、前記ゲート電極層上にゲート絶縁層と、前記ゲート絶縁層上にソース電極層及びドレイン電極層と、前記ソース電極層及び前記ドレイン電極層上に酸化物半導体層と、前記酸化物半導体層上に有機材料を含む半導体層とを有することを特徴とする半導体装置。
- 請求項1乃至6のいずれか一項において、前記酸化物半導体層は酸化亜鉛を含むことを特徴とする半導体装置。
- 請求項1乃至7のいずれか一項において、前記酸化物半導体層はアルミニウム又はガリウムを含むことを特徴とする半導体装置。
- 酸化物半導体層を形成し、
前記酸化物半導体層に接して有機化合物及び無機化合物を含む層を形成し、
前記有機化合物及び無機化合物を含む層に接して導電層を形成することを特徴とする半導体装置の作製方法。 - 酸化物半導体層を形成し、
前記酸化物半導体層上に、第1の有機化合物及び無機化合物を含む層と第2の有機化合物及び無機化合物を含む層とを形成し、
前記第1の有機化合物及び無機化合物を含む層上にソース電極層を、前記第2の有機化合物及び無機化合物を含む層上にドレイン電極層を形成することを特徴とする半導体装置の作製方法。 - ゲート電極層を形成し、
前記ゲート電極層上にゲート絶縁層を形成し、
前記ゲート絶縁層上に酸化物半導体層を形成し、
前記酸化物半導体層上に、第1の有機化合物及び無機化合物を含む層と第2の有機化合物及び無機化合物を含む層とを形成し、
前記第1の有機化合物及び無機化合物を含む層上にソース電極層を、前記第2の有機化合物及び無機化合物を含む層上にドレイン電極層を形成することを特徴とする半導体装置の作製方法。 - ゲート電極層を形成し、
前記ゲート電極層上にゲート絶縁層を形成し、
前記ゲート絶縁層上にソース電極層及びドレイン電極層を形成し、
前記ソース電極層上に前記第1の有機化合物及び無機化合物を含む層を、前記ドレイン電極層上に前記第2の有機化合物及び無機化合物を含む層を形成し、
前記第1の有機化合物及び無機化合物を含む層と前記第2の有機化合物と無機化合物を含む層との上に酸化物半導体層を形成することを特徴とする半導体装置の作製方法。 - 酸化物半導体層を形成し、
前記酸化物半導体層上に第1の有機化合物及び無機化合物を含む層と第2の有機化合物及び無機化合物を含む層とを形成し、
前記第1の有機化合物及び無機化合物を含む層上にソース電極層を、前記第2の有機化合物及び無機化合物を含む層上にドレイン電極層を形成し、
前記ソース電極層、前記ドレイン電極層及び前記酸化物半導体層上にゲート絶縁層を形成し、
前記ゲート絶縁層上にゲート電極層を形成することを特徴とする半導体装置の作製方法。 - 請求項9乃至13のいずれか一項において、前記第1の有機化合物及び無機化合物を含む層と、前記第2の有機化合物及び無機化合物を含む層とは異なる材料を含んで形成することを特徴とする半導体装置の作製方法。
- 請求項9乃至14のいずれか一項において、前記第1の有機化合物及び無機化合物を含む層と前記ソース電極層との間に第1の一導電型を有する半導体層と、前記第2の有機化合物及び無機化合物を含む層と前記ドレイン電極層との間に第2の一導電型を有する半導体層を形成することを特徴とする半導体装置の作製方法。
- ゲート電極層を形成し、
前記ゲート電極層上にゲート絶縁層を形成し、
前記ゲート絶縁層上にソース電極層及びドレイン電極層を形成し、
前記ソース電極層及び前記ドレイン電極層上に酸化物半導体層を形成し、
前記酸化物半導体層上に有機材料を含む半導体層を形成することを特徴とする半導体装置の作製方法。 - 請求項9乃至16のいずれか一項において、前記酸化物半導体層は、酸化亜鉛を含んで形成することを特徴とする半導体装置の作製方法。
- 請求項9乃至17のいずれか一項において、前記酸化物半導体層は、アルミニウム又はガリウムを含んで形成することを特徴とする半導体装置の作製方法。
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