TW201629267A - 形成有低電阻及淺接面深度之膜的方法 - Google Patents

形成有低電阻及淺接面深度之膜的方法 Download PDF

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TW201629267A
TW201629267A TW104142636A TW104142636A TW201629267A TW 201629267 A TW201629267 A TW 201629267A TW 104142636 A TW104142636 A TW 104142636A TW 104142636 A TW104142636 A TW 104142636A TW 201629267 A TW201629267 A TW 201629267A
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木村祥亮
大衛 堤 羅斯
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Ａｓｍ Ｉｐ控股公司
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Abstract

一種用於在一基板上形成一具有一罩蓋膜之經摻雜氧化矽膜之方法，其包括：在一基板上形成一砷矽酸鹽玻璃(ASG)膜作為一砷(As)摻雜氧化矽膜；以由Si、N、及H構成之處理氣體在未激發下連續地處理該ASG膜之表面；及在該ASG膜之經處理表面上連續地形成一氮化矽(SiN)膜作為一罩蓋膜。

Description

形成有低電阻及淺接面深度之膜的方法
本發明一般而言係關於一種用於在一基板上形成具一罩蓋膜之砷矽酸鹽玻璃(ASG或AsSG)膜之方法。
氧化金屬半導體場效電晶體(MOSFET)係大型積體電路(LSI)中進行邏輯操作之基本切換裝置。當進行MOSFET之小型化時，在縮放趨勢中接面深度(Xj)之減少與摻雜濃度之增加係不可避免的。FinFET及三閘極FET具有用於源極/汲極延伸之鰭片結構，且此等裝置需要減少該等源極/汲極延伸區域之橫向電阻(或薄片電阻)以藉由縮小MOSFET而獲得較大之汲極電流。因此，對於進一步縮小MOSFET而言，該等源極/汲極延伸區域之淺Xj(Xj定義為其中摻雜劑濃度係5x1018/cm3時之深度)及低薄片電阻(Rs)皆係不可避免的。然而，尚未成功地減少在淺區域處(例如：Xj<10nm)之Rs。以上特徵對於用於穿隧式場效電晶體(TFET)藉由接地平面(GP)技術之開啟電壓調變亦係重要的。
為提供本發明之內容之目的，任何與相關技術關聯之問題及解決方案之討論已單獨包括在本揭露中，且不應視為承認在作出本發明時知曉任何或全部討論。
某些具體實施例提供一種具有少於1,000ohm/sq之薄片電阻(Rs)及少於10nm之接面深度(Xj)之薄膜之方法(較佳地，少於500ohm/sq之Rs及少於5nm之Xj)。在某些具體實施例中，使用砷(As)作為n型摻雜劑之砷矽酸鹽玻璃(ASG)膜係與SiN罩蓋結合使用，其中該ASG膜之表面係在形成該SiN罩蓋之前在原位以一特定氣體處理。在某些具體實施例中，用於處理該ASG膜之表面之氣體係氮氣、矽烷氣體、氫氧、及一貴重氣體之組合。在某些具體實施例中，該SiN罩蓋係藉由電漿增強電子層沉積(PEALD)形成。在某些具體實施例中，該ASG膜係使用固態摻雜形成。在某些具體實施例中，該摻雜方法適用於在FinFET中之延伸摻雜或在TFET中之接地平面摻雜。根據進一步示例性具體實施例，提供實現少於1,000ohm/sq之Rs及少於10nm之Xj之方法。
基於總結本發明之態樣及優於相關技術所達成之優點的目的，在本揭露中描述本發明之某些目的及優點。當然，應了解根據本發明之任何特定具體實施例可不必達成所有此等目標或優點。因此，例如，熟悉此技術之人士將認知本發明可以達到或最佳化本文教示之一優點或一群優點之方式下體現或進行，而不必達成如可在本文教示或建議之其它目標或優點。
本發明之其它態樣、特徵、及優點將由以下實施方式變得顯而易見。
1‧‧‧基板
2‧‧‧導電平板電極/較低之台(低電極)
3‧‧‧反應室
4‧‧‧導電平板電極/高電極
5‧‧‧HRF功率
6‧‧‧排放管
11‧‧‧內部
12‧‧‧電接地
21‧‧‧n型摻雜膜
22‧‧‧Si基板
23‧‧‧氣流控制器
23‧‧‧SiO2罩蓋膜
24‧‧‧密封氣體流量控制器
31‧‧‧脈衝流控制閥
31‧‧‧n型摻雜膜
32‧‧‧Si基板
33‧‧‧化學吸附處理氣體
34‧‧‧SiN罩蓋膜
50‧‧‧LRF功率
V1(X)‧‧‧閥
V2(X)‧‧‧閥
V1(R)‧‧‧閥
V2(R)‧‧‧閥
本發明之此等及其它特徵現將根據較佳具體實施例之圖式 描述，該等較佳具體實施例係意欲說明而非限制本發明。該等圖式基於說明性目的而大幅地簡化且不必按比例繪製。
圖1A係可用在本發明之一具體實施例中用於沉積一介電膜之一PEALD(電漿增強原子層沉積)裝置之示意圖。
圖1B說明可用於本發明之一具體實施例中之切換一惰性氣體流及一前驅物氣體流之示意圖。
圖2係層壓製程(a)至(b)之示意圖，其指出根據一比較例之一部份製造積體電路之示意截面圖。
圖3係層壓製程(a)至(c)之示意圖，其指出根據本發明之一具體實施例之一部份製造積體電路之示意截面圖。
圖4係顯示根據本發明之一具體實施例與該等比較例者相關之由薄片電阻(Rs)及接面深度(Xj)所界定之一目標區域。
圖5係圖4之圖之說明圖。
在本揭露中，「氣體」可包括蒸發固體及/或液體，且可由單一氣體或氣體混合物構成。在本揭露中，經由淋洗頭引入反應室之製程氣體可包含一含矽氣體及一添加氣體、基本上由其組成、或由其組成。該含矽氣體及該添加氣體可以一混合氣體或分開地引入一反應空間中。該含矽氣體可與諸如一貴重氣體之一載體氣體引入。除該製程氣體外之一氣體(即未通過該淋洗頭引入之一氣體)可用於例如密封該反應空間，其包括諸如一貴重氣體之一密封氣體。在一些具體實施例中，「膜」意指實質上無針孔在垂直於厚度方向上之方向連續地延伸以覆蓋整個目標或關注表面之一層， 或僅係覆蓋目標或關注表面之一層。在某些具體實施例中，「層」意指具有在一表面上形成之某厚度之一結構或膜或非膜結構之同義字。一膜或層可由具有某種特性之不連續單一膜或層，或多個膜或層構成，且相鄰膜或層間之邊界可或可不為清晰的，且可基於物理、化學、及/或任何其它特性、形成製程或順序，及/或相鄰膜或層之功能或目的建立。
進一步地，在本揭露中，字詞「一」或「一個」係指一種類或包括多種類之一屬，除非另外指明。術語「由...構成」及「具有」在某些具體實施例中獨立地指「通常或廣泛地包含」、「包含」、「基本上由...組成」、或「由...組成」。並且，在此揭露中，在某些具體實施例中任何所定義之意義不必排除普通及習知之意義。
另外，在本揭露中，任何兩個數目之變數可構成變數之可作用範圍，可作用範圍可基於例行工作確定，且所指出之任何範圍可包括或排除端點。此外，任何所指出之變數之值(無論其等是否係以「約」指出)可係指精確值或近似值，且包括等效值，且在一些具體實施例中可指平均值、中值、代表值、多數等。
在其中未具體指明條件及/或結構之本揭露中，熟悉本技術者考量本揭露作為例行實驗可容易地提供此等條件及/或結構。在所有所揭露之具體實施例中，任何在具體實施例中所用之元件可以用於所欲目的之其任何等效元件替代，包括本文明確地、必要地、或本質上地揭露者。進一步地，本發明可同樣地應用在裝置及方法中。
該等具體實施例將就較佳具體實施例說明。然而，本發明不限於該等較佳具體實施例。
在某些具體實施例中，一種用於在一基板上形成一具有一罩蓋膜之經摻雜氧化矽膜之方法，其包含：(i)在一基板上形成一砷矽酸鹽玻璃(ASG)膜作為一砷(As)摻雜氧化矽膜；(ii)以由Si、N、及H構成之處理氣體在未激發下連續處理該ASG膜之表面；及(iii)在該ASG膜之經處理表面上連續地形成一氮化矽(SiN)膜作為一罩蓋膜。藉由使用該ASG膜，代替磷摻雜二氧化矽玻璃(PSG)膜，結合代替SiO罩蓋之SiN罩蓋，並在沉積該SiN罩蓋於其上之前以該處理氣體在原位處理該ASG膜之表面，可製造其中一薄片電阻(Rs)係如1,000ohm/sq般低(較佳地500ohm/sq或更低)，及接面深度(Xj)(如5E+18原子/cm3之深度)係如10nm般小(較佳地5nm或更低)的結構，表示摻雜劑(As)之濃度僅在該界面處該基板之頂表面中為高(即，摻雜劑進入該基板內之高濃度及淺擴散)。在某些具體實施例中，在該ASG膜中之As之膜內濃度大約為1E+22原子/cm3。習知上，當Xj係如10nm般小時未成功地減少Rs。砷在一矽基板中未如磷般擴散得多，從而有助於小接面深度，並且，若該界面未暴露於空氣中時，該SiN罩蓋較SiO罩蓋阻擋更多As之擴散，從而有助於較該罩蓋側上在該基板側上更高之As濃度。未受限於理論，結果，根據某些具體實施例可同時達成低Rs及低Xj。在本揭露中，該「ASG」膜及「SiN」膜可包含熟習本技術之人士可接受分別作為一「ASG」膜及「SiN」膜之程度之不可避免元素之不純物。在某些具體實施例中，該基板係一矽晶圓或具有諸如一矽層之下覆半導體層。
在某些具體實施例中，在退火步驟後在該ASG膜與該基板間之一界面處之一薄片電阻(Rs)及一As接面深度(Xj)分別大約為500ohm/sq或更低(例如100ohm/sq至400ohm/sq)，及大約為5nm或更低(例如 1nm至4nm)。
在本揭露中，該字詞「連續地」指以下之至少一者：未破壞真空下，未暴露於空氣，未開放一室，作為一原位製程，未中斷為順序中之一步驟、未改變製程條件，及在步驟間未引起一基板表面上之化學變化，取決於該具體實施例。在某些具體實施例中，諸如清洗或其它該範圍中可省略之步驟之一輔助步驟不算作一步驟，因此，該字詞「連續地」不排除插入一輔助步驟。藉由連續地進行步驟(i)至步驟(iii)，該ASG膜之表面係以該處理氣體在完全未暴露於空氣或任何其它含氧氣氛下在整個步驟(i)至(iii)中處理，使得可在該ASG膜中維持摻雜劑之高濃度。在某些具體實施例中，步驟(i)至(iii)係在一相同反應室中進行。因此，可明顯地改善生產力。由於步驟(ii)係在未激發氣體下進行，實質上無膜在該ASG膜之表面上形成，但氣體在該ASG膜之表面上吸收。藉由步驟(ii)，在該ASG膜及該SiN罩蓋間之界面可有效地阻擋As自該ASG膜至該SiN罩蓋之擴散或遷移。包括在該處理氣體中之Si、N、及H之組合係有效的，因為該等氣體可用於SiN罩蓋形成且其流可在該SiN罩蓋形成開始前完全地穩定化。
在某些具體實施例中，包括用於步驟(ii)中之處理氣體之所有該等氣體係與用於步驟(iii)中之所有該等氣體相同，使得可在其間無任何中斷或任何插入下連續地進行步驟(ii)及步驟(iii)，從而不只增加生產力但亦形成具有用於阻擋該摻雜劑之擴散之更有效界面之SiN罩蓋層。在某些具體實施例中，包括用於步驟(ii)中之該處理氣體之所有氣體係與用於步驟(iii)中之所有氣體不僅在種類亦在數量(流速)上係相同的。在某些具體實施例中，在步驟(ii)中，該處理氣體係與諸如氦(He)、氖(Ne)、氬(Ar)、氪(Kr)、 及/或氙(Xe)之貴重氣體一起供應。在某些具體實施例中，該處理氣體在步驟(ii)中包含N2氣體、SiH4氣體、及H2氣體，或其它諸如Si2H6之含矽氣體以及其它諸如NH3之含氮及含氫氣體。由於該表面處理，用於該SiN罩蓋形成之氣體饋送可有效地在開始該SiN罩蓋形成之前穩定化，且可平順地實行改變用於SiN罩蓋形成之配方(主要改變電漿產生器之設定)。
在某些具體實施例中，在該ASG膜中之As濃度係約1E+22原子/cm3，且在步驟(i)中形成之ASG膜之厚度大約為5nm或更低(通常0.5nm至5nm)。
在某些具體實施例中，在步驟(i)中，該ASG膜係藉由原子層沉積(ALD)以固態摻雜形成。在某些具體實施例中，該固態摻雜係在約300℃或更低之溫度下進行。在某些具體實施例中，該ALD係一電漿增強ALD。在某些具體實施例中，該固態摻雜係基於美國專利申請公開案第2013/0115763號之揭露進行，該揭露全文以引用的方式併入本文中。可在某些具體實施例中使用任何適於形成一ASG膜之方法，包括諸如電漿摻雜、離子輔助沉積及摻雜(IADD)、旋塗、次大氣壓力化學氣相沉積(SACVD)、或ALD之任何習知方法。
在某些具體實施例中，在步驟(iii)中形成之SiN膜之厚度大約為5nm或更低(通常0.5nm至5nm)。在某些具體實施例中，藉由原子層沉積(ALD)沉積該SiN膜。在某些具體實施例中，該ALD係一電漿增強ALD。可在某些具體實施例中使用任何適於形成一SiN罩蓋之方法，包括諸如低壓CVD或PEALD(諸如美國專利申請公開案第2014/0141625號及第2013/0330933號，其每一揭露全文以引用方式併入本文中)之任何習知方法。
在某些具體實施例中，該方法進一步包含在步驟(iii)後退火在該ASG膜上形成之SiN膜。在本揭露中，「退火」意指其中諸如磷或砷之摻雜劑擴散入該矽基板內之製程。
在某些具體實施例中，可藉由PEALD將該ASG膜形成為固態摻雜(SSD)層，其中一個循環係在下表1所示之條件下進行。
可在一載體氣體之輔助下提供該摻雜劑前驅物。由於ALD為自限制吸附反應製程，所沉積之前驅物分子數係以反應表面位點數測定且與飽和後之前驅物暴露無關，且該前驅物之供應係使得因而每一循環中該等反應表面位點飽和。
在某些具體實施例中，一砷矽酸鹽玻璃ALD循環包含一矽階段、一摻雜劑階段及一氧化階段。該矽階段包含提供一脈衝之BDEAS至 包含一基板之一反應室中。在該摻雜劑階段中，移除過量BDEAS並將該基板與一脈衝之摻雜劑前驅物接觸。若有的話，移除過量之摻雜劑前驅物及反應副產品。接著將該基板與氧電漿接觸以形成一硼或磷-砷矽酸鹽玻璃。該氧電漿可例如在整個該ALD循環中連續地流動之氧氣中在原位產生。在其它具體實施例中，該氧電漿可遠端地產生並提供至該反應室。
如上所提及，每一ALD循環之每一脈衝或階段較佳地係自限制。在每一階段中供應之過量反應物以飽和該易受影響之結構表面。表面飽和確保所有可得之反應位點之反應物佔據(例如，受到物理尺寸或「立體阻礙」限制)且因此確保優異之階梯覆蓋。在某些具體實施例中，可減少一或多個反應物之脈衝時間使得未達成完全飽和且在該基板表面上吸附少於單層。然而，在某些具體實施例中，例如由於分解或氣相反應，該摻雜劑前驅物步驟係未自限制的。
在某些具體實施例中，在任何清洗步驟前同時提供該矽前驅物及該摻雜劑前驅物。因此，在某些具體實施例中，提供一脈衝之矽前驅物、提供一脈衝之摻雜劑前驅物、且自該反應空間清洗去任何未反應之矽及摻雜劑前驅物。可依序地提供該矽前驅物及該摻雜劑前驅物，可以該矽前驅物或該摻雜劑前驅物任一者開始，或一起開始。在某些具體實施例中，同時提供該矽前驅物及摻雜劑前驅物。可選擇該摻雜劑前驅物對該矽前驅之比以得到在該沉積薄膜中所需之摻雜劑濃度。
可選擇矽前驅物循環對摻雜劑前驅物循環之比以控制在由PEALD製程沉積之最終薄膜中之摻雜劑濃度。例如，對於一低摻雜劑密度，摻雜劑前驅物循環對矽前驅物循環之比可在1：10之數量級。對於一較高摻 雜劑密度，該比例可在高達約1：1或更高之範圍內，諸如：1.5：1、2：1、2.5：1、3：1、4：1等。在某些具體實施例中，在ALD製程中之所有沉積循環可係摻雜劑前驅物循環。包含摻雜劑之沉積循環對不包括摻雜劑之沉積循環之比例(諸如摻雜劑前驅物循環對矽前驅物循環之比，或摻雜劑氧化物循環對矽前驅物循環之比)可稱為控制鈕。例如，若對每四個矽前驅物循環提供一摻雜劑前驅物循環，則該控制鈕係0.25。若不使用未摻雜氧化物循環，則該控制鈕可視為無限大。
藉由控制摻雜劑前驅物循環對矽前驅物循環之比，可由約0摻雜劑原子至約5E+22/cm3摻雜劑原子之密度範圍控制摻雜劑濃度。可例如藉由SIMS(二級離子探針質譜術)測量密度。
另外，在該沉積製程期間可藉由改變摻雜劑前驅物循環對矽前驅物循環之比例跨該膜厚度變化該摻雜劑密度。例如，可在接近該基板表面處，諸如在Si表面附近，提供高密度之摻雜劑(矽前驅物循環對摻雜劑前驅物循環之較低比例)，且遠離該基板在該頂表面處之摻雜劑密度可係低的(矽前驅物循環對摻雜劑前驅物循環之較高比例)。在其它具體實施例中，可在該頂表面處提供一較高密度之摻雜劑，且靠近該基板表面提供一較低密度。
在某些具體實施例中，藉由在一氧化矽沉積製程中以某間隔提供一摻雜劑前驅物循環形成砷矽酸鹽玻璃層。該間隔可例如基於循環數或厚度。例如，在每一組預定數目之矽前驅物沉積循環後，諸如在每10、20、50、100、200、500等循環後，提供一或多個摻雜劑前驅物沉積循環。在某些具體實施例中，可重覆未摻雜之氧化矽沉積循環直至到達一預定厚 度之氧化矽層，在該點接著進行一或多個摻雜劑前驅物循環。重覆此製程使得摻雜劑以特定厚度間隔併入該膜中。例如，可在所沉積之每5nm之未摻雜SiO2後提供一或多個摻雜劑前驅物循環。接著重覆該製程直到已沉積具所需厚度及組成之砷矽酸鹽玻璃薄膜。
在某些具體實施例中，在用於製造砷矽酸鹽玻璃膜之ALD製程中，與未摻雜氧化矽沉積循環一起提供一或多個「摻雜劑氧化物」沉積循環。該製程亦可包括一或多個砷矽酸鹽玻璃沉積循環。
在「摻雜劑氧化物」沉積循環中，自上述之砷矽酸鹽玻璃沉積循環省略該矽前驅物。因此，將該基板暴露至交替且連續之脈衝之摻雜劑前驅物及氧化劑中，諸如氧電漿。在某些具體實施例中可使用其它反應性氧源。在某些具體實施例中，藉由進行多次摻雜劑氧化物沉積循環及多次氧化矽沉積循環提供砷矽酸鹽玻璃膜。可選擇摻雜劑氧化物循環對矽前驅物循環之比以控制在最終砷矽酸鹽玻璃膜中之摻雜劑濃度。例如，對於低摻雜劑密度，摻雜劑氧化物循環對矽前驅物循環之比可在1：10之數量級。在其它具體實施例中，藉由增加摻雜劑氧化物循環對矽前驅物循環之比至1：1或甚至更高，諸如1.5：1、2：1、2.5：1、3：1、4：1等而達到高摻雜劑密度。例如，對於一高摻雜劑密度，諸如一高B密度，摻雜劑氧化物循環對矽前驅物循環之比可在6：1，或甚至10：1之數量級。
在該沉積製程期間可藉由改變摻雜劑氧化物循環對氧化矽循環之比例跨該膜厚度變化該密度。例如，高密度之摻雜劑可藉由使用氧化矽循環對摻雜劑氧化物循環之一較低比例在該基板表面附近提供且在該頂表面處之摻雜劑之密度可藉由提供氧化矽循環對摻雜劑氧化物循環之一 較高比例而降低。
在某些具體實施例中，該基板之原位電漿預處理係在SSD層沉積之前進行以加強該Si鰭片內之摻雜效率。例如，H2電漿預處理可提供用於FinFET裝置設計之某些調整空間。該預處理不僅限於H2電漿。在某些具體實施例中，該預處理電漿可選自Ar、He、H2、含氟氣體、及其混合氣體電漿。
在某些具體實施例中，對於該ASG膜(亦稱為「摻雜劑層」)可使用在美國專利申請公開案第2013/0115763號(該揭露全文以引用方式併入本文中)中所揭示之該ALD循環。
在某些具體實施例中，該摻雜劑層係在下表2中所示之條件下以一處理氣體處理。
儘管在完成該ALD循環後連續地進行該表面處理，該表面處理未如該ASG膜形成之一部份進行，而是為與該ASG膜形成區分之一分離步驟，即該表面處理係在該ASG膜形成全部完成之後起始。例如，該表面處理並非該ASG膜之ALD循環之任何部份且在完成該ALD循環時之清洗後起始(該清洗係使用例如諸如Ar之一貴重氣體以950至2,000sccm之流速持續3至60秒以在饋送用於該表面處理之SiH4之前移除用在該ASG膜形成之O2而進行)。進一步地，儘管該SiN罩蓋形成係在完成該表面處理後連續地進行，該表面處理未如該SiN罩蓋形成之一部份進行，即，該表面處理未如該SiN罩蓋形成之一啟動步驟起始，儘管該SiN罩蓋形成係在該表面處理時連續地進行(無任何包括清洗之插入步驟)。例如，該表面處理並非用於該SiN罩蓋之ALD循環之任何部份。然而，在某些具體實施例中，對於該表面處理可使用與用在該SiN罩蓋之ALD循環者相同之氣體。進一步地，在某些具體實施例中，在表面處理中該等氣體之流速可與用於SiN罩蓋之ALD循環者相同。在某些具體實施例中，在該表面處理中諸如稀釋氣體之連續饋送氣體可在未中斷下在完成該表面處理後連續地饋送至該SiN罩蓋之ALD循環之反應空間中。或者，在某些具體實施例中，用於該表面處理之至少某些條件可與用於該SiN罩蓋之ALD循環者不同。
藉由避免將該摻雜劑層之表面暴露於空氣或其它含氧氣氛，並暴露該表面至一Si/N/H氣體(即，由Si、N、及H構成之一氣體)，當該表面以一罩蓋層覆蓋時，可有效地抑制自該摻雜劑層之摻雜劑損失。由於未激發該等氣體，該等氣體以化學吸附之方式吸收在該表面上，通常，無膜在該摻雜劑層之表面上形成，但可在該表面上形成類似於一原子層之 一層。Si/N/H之比例(即，含Si氣體/含N氣體/含H氣體之比)可在2/(5-20)/(3-10)(Si<H<N)，通常地2/10/5之範圍中。另外，若該表面處理之持續時間短於3秒，該表面處理之持續時間長於20秒。
在該摻雜劑層之表面之表面處理下，在未暴露於空氣或其它含氧氣氛下連續地形成一SiN罩蓋層。在某些具體實施例中，該SiN罩蓋層可藉由循環CVD或PEALD形成，該循環CVD之一個循環係在下表3中所示之條件下進行。在循環CVD中，用於SiN罩蓋層之一前驅物通常是經脈衝的，同時其它氣體及RF功率係連續地加載；然而，代替或除了該前驅物流，可脈衝RF功率及任何其它氣體，只要可在該反應空間中而非如ALD中在該基板表面上發生一電漿反應即可。在某些具體實施例中，該反應空間之壓力實質上為恆定，同時進行循環CVD，其中可藉由例如使用在下文解釋之圖1B中說明之一氣體流系統切換前驅物流及惰性氣體流，同時連續地饋送該前驅物及該惰性氣體以維持該壓力。
在某些具體實施例中，該SiN罩蓋形成可藉由PEALD在類似於表3中所示者之條件下進行，但在該矽前驅物脈衝後進行清洗(例如：0.1至10.0秒，較佳地0.3至5秒)，脈衝RF功率(例如：0.1至10秒，較佳地0.5至5秒)，且在該RF功率脈衝後，進行清洗(例如：0.1至10秒，較佳地0.1至4秒)。
在某些具體實施例中，用於該SiN罩蓋形成之氣體及其流速係與該表面處理所用者相同，且可在完成該表面處理時連續地進行該SiN罩蓋形成。在某些具體實施例中，使用Ar作為一清洗氣體並連續地流過其供應管線，藉以當該矽前驅物未饋送入該反應空間時流入該反應空間內，或當該矽前驅物藉由閥切換饋入該反應空間時流入一排氣管線。在某些具體實施例中，該清洗氣體係Ar，流速為約950sccm至約2,000sccm。
在某些具體實施例中，該罩蓋層係直接在已以一處理氣體處理之該摻雜劑層上方並與其接觸。該罩蓋層係以SiN構成。由於該摻雜劑層之表面係在未暴露於空氣下以該SiN罩蓋層覆蓋，因此在某些具體實施例中即使該SiN罩蓋層之厚度為小(諸如小於2nm)時，該SiN罩蓋層可有效地維持在該摻雜劑層中之As濃度。
在某些具體實施例中，對於該罩蓋層，可使用在美國專利申請公開案第2013/0115763號(該揭露全文以引用方式併入本文中)中所揭示之該ALD循環。
在某些具體實施例中，在沉積該罩蓋層後，將該基板退火以將As擴散入基板內。在某些具體實施例中，可在下表4中所示之條件下進行退火。
該等具體實施例將相對於較佳具體實施例解釋。然而，本發明不限於該等較佳具體實施例。
圖1A係可用在本發明之某些具體實施例中之PEALD裝置之示意圖，希望連同經程式化以進行以下描述之順序控制。在本圖式中，藉由平行地並彼此相對地在反應室3之內部11中提供一對導電平板電極4、2，向一側施加HRF功率(13.56MHz或27MHz)5及5MHz或更低之LRF功率(400kHz~500kHz)50，及向另一側提供電接地12，在電極間激發電漿。在較低之台2(該低電極)中提供一溫度調節器，且其上所置之基板1之溫度在所給溫度下保持恆定。該高電極4亦用作淋洗板，且反應氣體與稀有氣體經由氣流控制器23、脈衝流控制閥31、及淋洗板引入反應室3中。此外，在反應室3中，提供排放管6，反應室3之內部11中之氣體經由該排放管6排放。此外，反應室提供有密封氣體流量控制器24以將密封氣體引入反應室3之內部11中(本圖式中省略在反應室內部中用於分隔反應區及傳送區之分隔板)。在某些具體實施例中，該ASG膜之沉積、表面處理、及SiN罩蓋之沉積可在相同裝置中進行，諸如上述者，使得可在未暴露該基板至空氣或其它含氧氣氛下連續地進行所有步驟。在某些具體實施例中，可使用一遠端電漿單元以激發一氣體。
在某些具體實施例中，在圖1A中所示之裝置中，代替該脈衝流控制閥31，可使用切換一惰性氣體流及一前驅物氣體流之系統。圖1B說明諸如一切換流系統之示意圖。在圖1B中之(a)中，閥V1(X)及V2(R)係關閉的，且閥V1(R)及V2(X)係開啟的，使得一前驅物氣體經由閥V1(R)流入一通氣口，且一惰性氣體經由閥V2(X)流入一反應器。在圖1B中之(b)中，藉由同時關閉閥V1(R)及V2(X)並開啟閥V1(X)及V2(R)，將該前驅物氣體立即導向流至該反應器，並立即將該惰性氣體導向流入該通氣口，而未實質改變流速同時維持連續流動。可例如在一排放口之下游設置該通氣口。
在某些具體實施例中，可在與用於ASG膜之沉積之室不同的室中使用一群集裝置連續地進行該表面處理(一基板係經由一晶圓操作室在未暴露於空氣下在室間轉移)。
熟悉本技術者將了解本裝置包括一或多個控制器(未示出)，其經程式化或是經組態以使得進行本文他處所描述之沈積及反應器清潔製程。該(等)控制器與各種電源、加熱系統、幫浦、機器人及反應器之氣體流量控制器或閥連通，如熟悉本技術者所了解。
圖2係層壓製程(a)至(b)之示意圖，其指出根據一比較例之一部份製造積體電路之示意截面圖。在本實例中，在製程(a)中在一Si基板22上沉積一n型摻雜膜21，其中該n型摻雜劑可係磷。其後，在製程(b)中在該n型摻雜膜21之表面上沉積一SiO2罩蓋膜23。由於使用磷作為n型摻雜劑，未進行表面處理，且使用該SiO2罩蓋膜，可能發生高濃度之摻雜劑深擴散入該Si基板內。相對地，圖3係層壓製程(a)至(c)之示意圖，其 指出根據本發明之一具體實施例之一部份製造積體電路之示意截面圖。在本具體實施例中，在製程(a)中在一Si基板32上沉積一n型摻雜膜31，其中該n型摻雜劑係砷。其後，在製程(b)中以一處理氣體在原位處理該As摻雜膜31之表面，藉此以一化學吸附處理氣體33覆蓋該表面。其後，在製程(c)中在該As摻雜膜31之經處理表面上沉積一SiN罩蓋膜34(在該圖中，「LT-SiN罩蓋」係指由循環CVD或PEALD沉積之低溫SiN罩蓋)。由於使用砷作為n型摻雜劑，原位進行表面處理，且原位形成該SiN罩蓋膜，可發生高濃度摻雜劑淺擴散入該Si基板內(即，在該界面處實現一低薄片電阻(Rs)及一低接面深度(Xj))。
本發明進一步地參照以下工作實施例解釋。然而，該等實施例未意欲限制本發明。在其中未具體指明條件及/或結構之實施例中，熟悉本技術者考量本揭露作為例行實驗可容易地提供此等條件及/或結構。並且，應用在該特定實施例中之數字在某些具體實施例中可以至少±50%之範圍修正，且該等數字為近似值。
實施例
一砷矽酸鹽玻璃(ASG)膜係在一Si基板(Φ300mm)上藉由PEALD形成，其中一循環係以圖3所示之順序在下表5中所示之條件下使用圖1A所示之PEALD裝置(包括圖1B所示之修改)進行。
在相同裝置中以下表6所示之條件以一處理氣體在原位處理該摻雜劑層。
其後，藉由循環CVD在原位形成一SiN罩蓋層，其中之一循環係在下表7所示之條件下在相同裝置中進行(該等氣體與其流速實質上 與用於該表面處理者相同)。
在沉積該罩蓋層之後，將該基板接受退火以在下表8所示之條件下將As擴散入Si基板內。
作為比較例，製造以下結構：
在退火時，針對薄片電阻(Rs)及接面深度(Xj)分析所得之膜。該等結果顯示在下表10中。該等結果亦顯示在圖4中。圖4係根據本發明之實施例相關於該等比較例者顯示由薄片電阻(Rs)及接面深度(Xj)所界定之一目標區域之圖。使用CDE ResMAP 463工具在該基板上49個點處測量該薄片電阻，且使用Atomika 4100 SIMS工具以Cs主光束測量該接面深度。
如表10及圖4所示，除了「LT-SiN罩蓋」(本發明之一實施例)外，無其它膜滿足1000ohm/sq或更低之Rs及10nm或更低之Xj。即使藉由As離子植入所摻雜之膜亦不滿足以上標準。進一步地，即使使用該 ASG膜，且在其上形成該SiN罩蓋(在「HT-SiN罩蓋」)，當未進行該表面處理時(在該例中，為藉由PLCVD沉積該SiN罩蓋，該基板自該ALD室轉移至該CVD室並暴露至空氣中達約3600秒)，儘管摻雜劑之擴散係淺的(Xj=2.9nm)，摻雜劑濃度係低的(Rs=6732ohm/sq)。僅有「LT-SiN罩蓋」滿足具淺摻雜劑擴散(Xj=2.7nm)之高摻雜劑濃度(Rs=354)。圖5係圖4之圖之說明圖。令人驚奇地藉由在Si基板上形成經表面處理且接著以SiN罩蓋(原位SiN罩蓋)覆蓋之一ASG膜，摻雜劑之高濃度及淺擴散可滿足至滿足少於1000ohm/sq之Rs及少於10nm之Xj(5E+18之深度)，更佳地少於500ohm/sq之Rs及少於5nm之Xj(5E+18之深度)之程度。以上特性高度適合用於FinFET裝置之延伸摻雜，尤其其中該鰭片寬度係10nm時(若摻雜劑在5nm深度處自該鯺片兩側擴散，該裝置將保持在一開啟(ON)狀態，且將變得無作用)。
熟悉本技術之人士應了解可在不背離本發明之精神下進行許多及各種修正。因此，應清楚了解本發明之形式僅作說明之用，且未意欲限制本發明之範疇。
31‧‧‧n型摻雜膜
32‧‧‧Si基板
33‧‧‧化學吸附處理氣體
34‧‧‧SiN罩蓋膜

Claims (18)

  1. 一種用於在一基板上形成具一罩蓋膜之一經摻雜氧化矽膜之方法，其包含：(i)在一基板上形成一砷矽酸鹽玻璃(ASG)膜作為一砷(As)摻雜氧化矽膜；(ii)以由Si、N、及H構成之一處理氣體在未激發下連續地處理該ASG膜之一表面；及(iii)在該ASG膜之經處理表面上連續地形成一氮化矽(SiN)膜作為一罩蓋膜。
  2. 如申請專利範圍第1項之方法，其中包括用於步驟(ii)中之該處理氣體之所有氣體係與步驟(iii)中所用之所有氣體相同。
  3. 如申請專利範圍第1項之方法，其中在步驟(ii)中，該處理氣體係與一貴重氣體一起供應。
  4. 如申請專利範圍第1項之方法，其中該處理氣體包含N2氣體、SiH4氣體、及H2氣體。
  5. 如申請專利範圍第1項之方法，其中步驟(ii)係在100℃至300℃之溫度下進行。
  6. 如申請專利範圍第1項之方法，其中在該ASG膜中之As之濃度大約為1E+22原子/cm3。
  7. 如申請專利範圍第1項之方法，其中在步驟(i)中形成之該ASG膜之厚度大約為5nm或更低。
  8. 如申請專利範圍第1項之方法，其中在步驟(i)中，該ASG膜係藉由原子層沉積(ALD)以固態摻雜形成。
  9. 如申請專利範圍第8項之方法，其中該固態摻雜係在約300℃或更低之溫度下進行。
  10. 如申請專利範圍第8項之方法，其中該ALD係電漿增強ALD。
  11. 如申請專利範圍第1項之方法，其中在步驟(iii)中形成之SiN膜之厚度大約為5nm或更低。
  12. 如申請專利範圍第1項之方法，其中該基板係矽晶圓。
  13. 如申請專利範圍第1項之方法，其中該SiN膜係藉由循環CVD沉積。
  14. 如申請專利範圍第13項之方法，其中該循環CVD包含脈衝式地將用於該SiN膜之一前驅物饋送入一反應空間同時維持該反應空間之壓力。
  15. 如申請專利範圍第1項之方法，其進一步包含在步驟(iii)後退火在該ASG膜上形成之該SiN膜。
  16. 如申請專利範圍第15項之方法，其中在該ASG膜及該基板間之一界面處在退火步驟後之一薄片電阻(Rs)及5E+18原子/cm3之一As接面深 度(Xj)分別大約為500ohm/sq或更低，及大約為5nm或更低。
  17. 如申請專利範圍第15項之方法，其中在該ASG膜中之As之膜內濃度大約為1E+22原子/cm3。
  18. 如申請專利範圍第1項之方法，其中步驟(i)至(iii)係在相同反應室中進行。
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