TWI731024B - 在溝槽的側壁或平坦表面上選擇性地形成氮矽化合物膜的方法 - Google Patents

在溝槽的側壁或平坦表面上選擇性地形成氮矽化合物膜的方法 Download PDF

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TWI731024B
TWI731024B TW106100823A TW106100823A TWI731024B TW I731024 B TWI731024 B TW I731024B TW 106100823 A TW106100823 A TW 106100823A TW 106100823 A TW106100823 A TW 106100823A TW I731024 B TWI731024 B TW I731024B
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dielectric film
film
plasma
power
wet etching
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TW106100823A
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TW201740462A (zh
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石川大
深澤篤毅
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美商Ａｓｍ Ｉｐ控股公司
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    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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Abstract

一種用於在溝槽中製造一層結構之方法，包括：在上表面、及溝槽之底表面與側壁上同時形成含有Si-N鍵之一介電膜，其中藉由以在兩電極間施加電壓所激發之電漿轟擊，在該上表面及該底表面上形成之該膜之頂/底部份與在該等側壁上形成之該膜之一側壁部份提供不同之化學抗性，該基板平行於該等兩個電極放置於其間；且藉由濕式蝕刻實質上移除該膜之頂/底部份及該側壁部份中之任一者而非兩者，該濕式蝕刻依不同之化學抗性較該膜之頂/底部份及側壁部份之另一者更主要地移除其中一者。

Description

在溝槽的側壁或平坦表面上選擇性地形成氮矽化合物 膜的方法
本發明大體而言係關於一種在基板的上表面所形成之溝槽中製造一層結構之方法，該層結構係由含有Si-N鍵的介電膜所構成。
在大型積體電路(LSIs)之製程中，存在數個用於在溝槽中形成側壁之製程步驟。該等側壁係用做間隔件或用於阻隔結構自溝槽之側表面蝕刻。傳統上，藉由在溝槽之表面上形成一共形膜而形成該等側壁，接著藉由不對稱蝕刻移除在其中形成該等溝槽之上表面上形成之其部份，及在該等溝槽之底表面上形成之部份。然而，當使用此一成形方法時，需要過度蝕刻以移除側壁之底角，在該等底角中，該等側壁之厚度在靠近底部及在底部處增加，形成一梯度。過度蝕刻引起下層之蝕刻並造成層結構之損害。
為提供本發明之內容之目的，任何與相關技術關聯之問題及解決方案之討論已單獨包括在本揭露中，且不應視為承認在作出本發明時知曉任何或全部討論。
在某些具體實施例中，在其中形成溝槽之一基板之頂表面上 及在該溝槽之底表面上形成之一膜與在該溝槽之側壁上形成之一膜具有與濕式蝕刻關聯之不同之膜性質(即膜性質之定向性控制)。藉由使該基板進行濕式蝕刻，可選擇性地移除在該溝槽之頂/底表面上形成之膜或在該溝槽之側壁上形成之膜，即選擇性地形成沿一溝槽結構中之水平方向延伸之一膜或沿垂直方向上延伸之一膜。根據以上方法，在一溝槽結構中之水平或垂直層可藉由濕式蝕刻而無乾式蝕刻做為一蝕刻手段選擇性地單獨形成(即膜形成之定向控制)。
在某些具體實施例中，該具有定向控制膜性質之膜可係藉由電漿增強化學氣相沉積(PECVD)或電漿增強原子層沉積(PEALD)所沉積之一氮矽化合物膜。或者，在某些具體實施例中，在無定向控制下沉積一氮矽化合物膜，且接著處理該膜以提供膜性質之定向性。亦即，當在沉積該膜期間或在沉積該膜之後於一氮矽化合物膜上實施離子轟擊時，可自該膜移除雜質，藉以造成該膜緻密化且改良該膜品質；然而，當加強離子轟擊且不對稱地沿垂直於該膜之方向在介電膜上實施時，該膜品質劣化，從而解離Si-N鍵、減少該膜之密度、及增加濕式蝕刻速率。由於通常離子轟擊據信造成膜之緻密化且減少濕式蝕刻速率，以上現象係完全出乎預料的。離子轟擊強度可藉由使用平行板電極配置產生之電漿來定向控制，例如電容耦合電漿，其可控制離子之入射方向、離子劑量、及離子能量。基於以上原理(其未意欲限制本發明)，可控制膜性質之定向性。
基於總結本發明之態樣及優於相關技術所達成之優點的目的，在本揭露中描述本發明之某些目的及優點。當然，應了解根據本發明之任何特定具體實施例可不必達成所有此等目標或優點。因此，例如，熟悉此技術之人士將認知本發明可以達到或最佳化本文教示之一優點或一群優點之方式下體現或進行，而不必達成如可在本文教示或建議之其它目標或優點。
本發明之其它態樣、特徵、及優點將由以下實施方式變得顯 而易見。
1:基板
2:導電平板電極/低電極/較低之台
3:反應室
4:導電平板電極/上方電極/淋洗板
5:轉移室
6:排放管線
7:排放管線
11:內部
12:電接地
13:圓形管路
14:分離板
16:內部/轉移區
20:HRF功率
21:氣體管線
22:氣體管線
23:氣體管線
24:密封氣體管線
30:瓶(儲存器)
51:基板
51a:底表面
51b:頂表面
51c:側壁
52:部份
53a:底部份
53b:頂部份
a、b、c、d、e、f:閥
本發明之此等及其它特徵現將參考較佳具體實施例之圖式描述，該等較佳具體實施例僅僅意欲說明而非限制本發明。該等圖式基於說明性目的而大幅地簡化且無需按比例繪製。
圖1A係可用在本發明之具體實施例中用於沉積一保護膜之電漿輔助原子層沉積(PEALD)裝置之示意圖。
圖1B說明使用可用於本發明之具體實施例中之一流通系統(FPS)之前驅物供應系統之示意圖。
圖2係說明根據本發明之具體實施例製造層結構之步驟的流程圖。
圖3係說明根據本發明之另一具體實施例製造層結構之步驟的流程圖。
圖4係說明根據本發明之又一具體實施例製造層結構之步驟的流程圖。
圖5係說明根據本發明之再另一具體實施例製造層結構之步驟的流程圖。
圖6係說明根據本發明之不同具體實施例製造層結構之步驟的流程圖。
圖7係根據本發明之具體實施例顯示RF功率與在一頂表面上形成之膜之濕式蝕刻速率及在一溝槽之側壁上形成之一膜之濕式蝕刻速率間之關係之圖，其顯示臨限(參考)RF功率。
圖8顯示根據本發明之具體實施例形成之氮矽化合物膜之橫截面之掃描式電子顯微鏡(SEM)照片。
圖9顯示根據本發明之具體實施例形成之氮矽化合物膜之 橫截面之掃描式電子顯微鏡(SEM)照片。
圖10說明根據本發明之具體實施例形成之氮矽化合物膜之橫截面圖。
圖11說明根據本發明之另一具體實施例形成之氮矽化合物膜之橫截面圖。
圖12顯示根據本發明之具體實施例之一SiN膜之RF功率與Si-N峰強度[a.u.]間之關係之圖。
圖13顯示根據本發明之一具體實施例之一SiN膜之RF功率與密度[g/cm3]間之關係之圖。
圖14係根據本發明之一具體實施例顯示電漿密度與在一頂表面上形成之膜之濕式蝕刻速率及在一溝槽之側壁上形成之一膜之濕式蝕刻速率間之一般關係之圖。
在本揭露中，「氣體」可包括蒸發固體及/或液體，且可由單一氣體或氣體混合物構成。在本揭露中，經由噴淋頭引入反應室之製程氣體可包含一前驅物氣體及一添加氣體、基本上由其組成、或由其組成。該前驅物氣體及該添加氣體通常係以一混合氣體或分開地引入一反應空間中。該前驅物氣體可與諸如一惰性氣體之一載體氣體一起引入。該添加氣體可包含一反應氣體及諸如一惰性氣體之稀釋氣體、基本上由其組成、或由其組成。該反應氣體及該稀釋氣體可以一混合氣體或分開地引入該反應空間中。一前驅物可包含二或多種前驅物，且一反應氣體可包含二或多種反應氣體。該前驅物係在一基板上化學吸附之氣體且通常包含構成一介電膜之一基質之一主結構之類金屬或金屬元素，及用於沉積之反應氣體係當一氣體經激發以將一原子層或單層固定在該基板上時與在一基板上化學吸附之前驅物反應之氣體。「化學吸附」係指化學飽和吸附。除該製程氣體外 之氣體，即在未通過該噴淋頭所引入之氣體可用於例如密封該反應空間，其包括諸如惰性氣體之密封氣體。在一些具體實施例中，「膜」意指實質上無針孔在垂直於厚度方向上之方向連續延伸以覆蓋整個目標或關注表面之一層，或僅係覆蓋目標或關注表面之一層。在某些具體實施例中，「層」意指在一表面上形成之具有某厚度之一結構或膜或非膜結構之同義字。一膜或層可由具有某種特性之不連續單一膜或層，或多個膜或層構成，且相鄰膜或層之間之邊界可或可不為清晰的，且可基於物理、化學、及/或任何其它特性、形成製程或順序，及/或相鄰膜或層之功能或目的建立。
在本揭露中，「包含一Si-N鍵」可指由一或多個Si-N鍵特徵化，其具有實質上由一或多個Si-N鍵構成之主要骨架，及/或具有實質上由一或多個Si-N鍵構成之取代基。含有一Si-N鍵之介電膜包括(但不限於)一SiN膜及一SiON膜，其具有約2至10、通常約4至8之介電常數。
在此揭露中，「退火」係指在其間處理一材料以獲得其穩定形式之程序，例如存在於一組份中之末端基(諸如醇基及羥基)以更穩定基團(諸如：Si-Me基)替代及/或形成一更穩定之形式(諸如Si-O鍵)，通常造成一膜之緻密化。
進一步地，在本揭露中，字詞「一」或「一個」係指一種類或包括多種類之一屬，除非另外指明。術語「由...構成」及「具有」在某些具體實施例中獨立地指「通常或廣泛地包含」、「包含」、「基本上由...組成」、或「由...組成」。並且，在此揭露中，任何所定義之意義不必排除在某些具體實施例中之普通及習知之意義。
另外，在本揭露中，任何二個數目之變數可構成變數之可作用範圍，可作用範圍可基於例行工作確定，且所指出之任何範圍可包括或排除端點。此外，任何所指出之變數之值(無論其等是否係以「約」指出)可係指精確值或近似值，且包括等效值，且在一些具體實施例中可指平均值、中位數、代表值、多數等。
在其中未具體指明條件及/或結構之本揭露中，熟悉本技術者考量本揭露做為例行實驗事件可容易地提供此等條件及/或結構。在所有所揭露之具體實施例中，任何在具體實施例中所用之元件可以用於所欲目的之其任何等效元件替代，包括本文明確地、必要地、或本質上地揭露者。進一步地，本發明可同樣地應用在裝置及方法中。
該等具體實施例將就較佳具體實施例說明。然而，本發明不限於該等較佳具體實施例。
某些具體實施例提供一種用於在一基板之上表面中形成之一溝槽中製造由含有Si-N鍵之介電膜構成之一層結構之方法，包含：(i)同時在上表面、及該溝槽之底表面與側壁上形成含有Si-N鍵之一介電膜，其中藉由以在兩電極間施加電壓激發之電漿轟擊而在上表面及底表面上形成之該介電膜之頂/底部份與在該等側壁上形成之該介電膜之側壁部份提供不同之化學抗性，該基板係平行於該等兩個電極放置於其間；及(ii)藉由濕式蝕刻實質上移除該介電膜之頂/底部份及該側壁部份中之任一者而非兩者，該濕式蝕刻依不同之化學抗性較該介電膜之頂/底部份及側壁部份之另一者更主要地移除其中一者。術語「同時地形成」可意指通常或實質上同時、在相同程序中、或在相同步驟中形成，其包括通常或實質上同時、在相同程序、或在相同步驟中沈積，及/或通常或實質上同時、在相同程序、或在相同步驟中處理。在本揭露中，術語「實質的」或「實質上」可指熟習本技術人士認知之充分、大量、或有形之量、大小、時間、或空間(例如相對於總值或參考值之至少70%、80%、90%、或95%)對所欲目的或功能而言為足夠的。
圖2係說明根據本發明之具體實施例製造層結構之步驟的流程圖。步驟S1及步驟S2分別對應於步驟(i)及(ii)。在步驟S1中，藉由使用電漿轟擊，在一溝槽上形成具膜性質之定向性之介電膜。該電漿轟擊可在沉積該膜期間或在沉積該膜完成之後施加。在步驟S2中，根據該膜之頂 /底部份與該膜之側壁部份之間之膜性質差異，藉由濕式蝕刻較該膜之該等部份之其它者更主要地蝕刻其中一者，僅留下該層結構中之該等部份之一者。
例如，在步驟S2中，該濕式蝕刻係使用氟化氫(HF)之溶液進行。
藉由調整以在兩個電極間施加電壓而激發之電漿轟擊，可在上表面及該底表面上形成之該介電膜之頂/底部份與在該等側壁上形成之該介電膜之側壁部份提供不同之化學抗性，該基板係平行於該等兩個電極放置於其間。電漿係具高自由電子含量(約50%)之部份游離氣體，及當藉由在平行電極之間施加AC電壓而激發一電漿時，離子藉由在電漿鞘與下電極間產生之自dc偏壓(VDC)而加速，並以垂直該膜之方向(該離子入射方向)轟擊放置於該下電極上之基板上之膜。可以電漿密度或離子動力能表示電漿轟擊。該電漿密度主要可藉由調整壓力及RF功率來調配(較低壓力與較高功率，造成較高電漿密度)。亦可藉由施加dc偏壓或具有針對離子跟隨所設定之較低頻率(<1MHz)之AC電壓來調配電漿密度。可使用探針法測定電漿密度(例如「使用混成蘭牟而探針及微波干涉計法之高精確電漿密度測量(High accuracy plasma density measurement using hybrid Langmuir probe and microwave interferometer method)」，Deline C等人，Rev.Sci.Instrum.2007 Nov；78(11)：113504，該揭露之全文以引用之方式併入本文中)。當在電漿中插入一探針並對其施加電壓時，電流流過該探針，其稱為「離子飽和電流」(Ii)，其可經如下計算，且接著該電漿密度(Np)可計算如下： Ii=e x Ne
Figure 106100823-A0305-02-0009-8
(kTe/M) x exp(1/2)eA；Np=Ii
Figure 106100823-A0305-02-0009-9
(M/kTe)/exp(1/2)eA，其中Ii：離子飽和電流[A]；A：該探針之表面積[m2]；e：電子電荷[C]；Ne：電子密度[m-3]；k：波茲曼常數[J/K]；Te：電子溫度[K]；M：離子質量[kg]。
圖14係根據本發明之一具體實施例顯示電漿密度與在一頂表面上形成之膜之濕式蝕刻速率及在一溝槽之側壁上形成之一膜之濕式蝕 刻速率間之一般關係之圖。在此圖中，該化學抗性以濕式蝕刻速率表示。在該膜之頂/底表面上，通常在垂直於該膜表面之方向上進行電漿轟擊，而在該膜之側壁表面上，通常在平行於該膜表面之方向上進行電漿轟擊。當電漿密度低時，在一溝槽之頂/底表面上形成之膜之濕式蝕刻速率係低的，此係由於包括在該電漿中在該膜上施加之離子移除雜質且造成該膜之緻密化。然而，在該頂/底表面上形成之該膜之濕式蝕刻速率隨電漿密度增加而增加，如圖14中所示，因為離子劑量非常高而強化Si-N鍵之解離。另一方面，當電漿密度低時，在該溝槽之側壁表面上形成之膜之濕式蝕刻速率係高的，此係由於包括在該電漿中在該膜施加之離子劑量不足以移除雜質且造成該膜之緻密化。然而，在側壁表面上形成之該膜之濕式蝕刻速率隨電漿密度增加而減少，如圖14中所示。換言之，在該頂/底表面上形成之該膜的膜品質隨該電漿密度增加而劣化，而在該側壁表面上形成之該膜的膜品質隨電漿密度增加而改良。因此，存在一電漿密度之臨限點，其中在該等頂/底表面上之該膜之膜品質(或膜特性)及在該側壁上之膜之膜品質實質上相等，即顯示電漿密度與在該等頂/底表面上形成之膜之濕式蝕刻速率及在該等側壁上形成之膜之濕式蝕刻速率之間之關係的線在該臨限點處相交，如圖14所示。在該等頂/底表面上之膜之膜特性與該等側壁表面上之膜之膜特性在該臨限點處反轉。因此，藉由調整該電漿密度，可形成具有膜性質之定向性之膜。當將電漿密度設定為較該臨限點低時，藉由濕式蝕刻可較在該頂/底表面上之膜更主要地移除在該等側壁上之膜，而當將電漿密度設定為較該臨限點高時，藉由濕式蝕刻可較在該等側壁上之膜更主要地移除在該頂/底表面上之膜。因此，可製造所需層結構。
在圖14中，相交點(臨限點)依施加電壓持續時間、頻率、壓力、電極間距離、溫度等而改變，其中，通常施加電壓之持續時間愈久，且壓力愈低，在相交點處之電漿密度變得愈低。應注意，當壓力、RF功率、電壓等不變時，在濕式蝕刻速率及平行電極間之RF功率之間可獲得實質上 類似於圖14中所示之關係。基於本揭露與例行實驗，可在步驟(i)及(ii)之前測定臨限點。因此，在某些具體實施例中，用於製造層結構之方法進一步包含在步驟(i)及(ii)之前，重覆以下步驟以測定臨限點(參考點)：(a)在與步驟(i)相同之條件但改變電壓做為一變數下同時形成介電膜；及(b)藉由濕式蝕刻在與步驟(ii)中相同條件下實質上移除該介電膜之頂/底部份及側壁部份之任一者而非兩者。
圖3係說明根據本發明之具體實施例製造層結構之步驟的流程圖。分別地，步驟S11對應於步驟(a)及(b)，且步驟S12及S13對應於步驟(i)及(ii)。在步驟S11中，測定用於反轉一膜之頂/底部份及側壁部份之膜特性的用於電漿轟擊之臨限電壓。在步驟S12中，藉由在參照所測定臨限電壓而調整之電壓下使用電漿轟擊，在一溝槽上形成具膜性質之定向性之介電膜。例如，當於步驟S12中在該等電極間施加較該臨限電壓高之電壓時，該膜之頂/底部份之濕式蝕刻速率變得較該膜之側壁部份之濕式蝕刻速率高，造成在步驟S13中藉由濕式蝕刻主要地移除該膜之頂/底部份，而非該膜之側壁部份。換言之，當於步驟S12中在該等電極間施加較該臨限電壓低之電壓時，該膜之側壁部份之濕式蝕刻速率變得較該膜之頂/底部份之濕式蝕刻速率高，造成在步驟S13中藉由濕式蝕刻主要地移除該膜之側壁部份，而非該膜之頂/底部份。
當在一膜上施加離子轟擊而不使用平行電極配置時，例如藉由使用低壓化學氣相沉積(LPCVD)中之反應物，將得不到諸如圖14中所示之臨限點，此係由於在LPCVD中之反應物不造成不對稱之離子轟擊，即不造成膜性質之定向性。例如，美國專利申請早期公開US 2003/0029839揭示LPCVD，其中植入諸如N2 +之含氮離子以形成富含氮層，接著進行熱退火以促進在該層中之Si-N及N-H鍵以減少該層之濕式蝕刻速率。相反地，在本發明之某些具體實施例中，在頂/底層上使用氮進行不對稱電漿轟擊，其未將氮富含於該層中，但將Si-N鍵解離並減少該層之密度，藉以相對於 在一溝槽之側壁上形成之層之濕式蝕刻速率增加在該等頂/底表面上形成之層之濕式蝕刻速率。上文中，當解離Si-N鍵時，形成Si懸鍵及N懸鍵，其最終以氫終止，形成N-H鍵及Si-H鍵。由於解離Si-N鍵，該層之密度減少，且該濕式蝕刻速率增加。因此，在某些具體實施例中，在步驟(i)及(ii)之間不進行熱退火(諸如在900℃)以避免該頂/底層之緻密化(即，避免減少該頂/底層之濕式蝕刻速率)。進一步地，在某些具體實施例中，離子之入射能少於約200eV(電漿電位大約為100至200V)，其係低於美國專利申請早期公開US 2003/0029839中所揭示者(0.5至20keV)。如同在LPCVD中之反應物，熱原子層沉積(ALD)中之反應物與遠端電漿沉積之電漿不形成一臨限點，諸如圖14中所示者，此係由於該熱ALD電漿與遠端電漿沉積亦不造成不對稱之離子轟擊，即不造成膜性質之定向性。進一步地，當使用具有低電子溫度及入射離子之低離子動能之電漿(諸如表面波電漿(SWP))時，離子轟擊之效應極受限，且因此，不發生膜劣化，並因此，難以造成膜性質之定向性。此外，甚至當在由氧化矽構成之一膜上進行電漿轟擊時，該氧化矽膜之膜品質未劣化，且因此，難以造成膜性質之定向性。
在某些具體實施例中，該電漿係電容耦合電漿(CCP)，其係藉由向該等兩個電極中之一者施加RF功率而激發。進一步地，在某些具體實施例中，可使用感應耦合電漿(ICP)、電子迴旋加速器共振(ECR)電漿、微波表面波電漿、螺旋波電漿等做為電漿，其中如必要對電極施加偏壓以增加該電漿與電極之間之dc偏壓。
在某些具體實施例中，該RF功率高於參考RF功率(該介電膜之頂/底部份及該介電膜之側壁部份之化學抗性在該參考RF功率下實質上相等)，其中該濕式蝕刻相對於該介電膜之側壁部份選擇性地移除該介電膜之頂/底部份。
在某些具體實施例中，該電漿係Ar、N2、及/或O2或其它具有高於氫或氦之原子序之原子之電漿。
在某些具體實施例中，該溝槽具有10至50nm(通常15至30nm)之寬度(其中當該溝槽具有實質上與該寬度相同之長度時，其表示為洞/孔，且其直徑為10至50nm)，30至200nm(通常50至150nm)之深度，及3至20(通常3至10)之高寬比。
在某些具體實施例中，可使用該介電膜做為一蝕刻停止膜、低k間隔件、或間隙填料。例如，當僅留下側壁部份時，該部份可用作用於間隔件界定雙重圖案化(SDDP)之間隔件，或當僅留下頂/底部份時，該部份可只用作用於一側壁層之固態摻雜(SSD)之遮罩。
在某些具體實施例中，步驟(i)包含：(ia)將在其上表面中具有一溝槽之一基板放置於該等電極間；且(ib)藉由電漿增強原子層沉積(PEALD)使用氮氣做為一反應氣體在該基板上沉積該介電膜，其中該電漿係電容耦合電漿(CCP)，該電漿藉由在該PEALD之每一循環中向該等兩個電極中之一者施加RF功率而激發，其中該RF功率高於參考RF功率(在該參考RF功率下，該介電膜之頂/底部份與該介電膜之側壁部份之化學抗性實質上相等)，使得在步驟(ii)中之濕式蝕刻相對於該介電膜之側壁部份選擇性地移除該介電膜之頂/底部份。上文中，在沉積該膜時而非在完成該膜之沉積後，形成具有膜性質之定向性之膜。
圖4係說明根據本發明之又一具體實施例製造層結構之步驟的流程圖。步驟S21對應於步驟(ib)，且步驟S22對應於步驟(ii)。在步驟S21中，具有膜性質之定向性之介電膜在高於該臨限電壓之電壓下藉由使用電漿轟擊在一溝槽上沉積，及在步驟S22中，與該膜之側壁部分相較更主要地移除該膜之頂/底部份，使得實質上僅在該層結構中留下該側壁部份。
在某些具體實施例中，步驟(i)包含：(ia)將其上表面上具有一溝槽之一基板放置於該等電極間；且(ic)藉由電漿增強原子層沉積(PEALD)使用氮氣做為一反應氣體在該基板上沉積該介電膜，其中該電漿係電容耦合電漿(CCP)，該電漿藉由在該PEALD之每一循環中向該等兩個電 極中之一者施加RF功率而激發，其中該RF功率低於參考RF功率(在該參考RF功率下，該介電膜之頂/底部份與該介電膜之側壁部份之化學抗性實質上相等)，使得在步驟(ii)中之濕式蝕刻相對於該介電膜之頂/底部份選擇性地移除該介電膜之側壁部份。上文中，在沉積該膜時而非在完成該膜之沉積後，形成具有膜性質之定向性之膜。
圖5係說明根據本發明之再另一具體實施例製造層結構之步驟的流程圖。步驟S31對應於步驟(ic)，且步驟S32對應於步驟(ii)。在步驟S31中，具有膜性質之定向性之介電膜在低於該臨限電壓之電壓下藉由使用電漿轟擊在一溝槽上沉積，及在步驟S32中，與該膜之頂/底部分相較更主要地移除該膜之側壁部份，使得實質上僅在該層結構留下該頂/底部份。
在某些具體實施例中，該介電膜為SiN膜或SiON膜或其它含Si-N鍵膜。
在某些具體實施例中，該PEALD或其它沉積方法使用一或多種選自由胺基矽烷、鹵化矽烷、單矽烷、及二矽烷組成之群組之化合物做為一前驅物。該胺基矽烷及鹵化矽烷包括(但不限於)Si2Cl6、SiCl2H2、SiI2H2、雙二乙基胺基矽烷、雙二甲基胺基矽烷、六乙基胺基二矽烷、四乙基胺基矽烷、第三丁基胺基矽烷、雙第三丁基胺基矽烷、三甲基矽基二乙基胺、三甲基矽基二乙基胺、及雙二甲基胺基二甲基矽烷。
在某些具體實施例中，步驟(i)包含：(iA)在其上表面中具有一溝槽之一基板上沉積一介電膜；(iB)在該等兩個電極間放置該基板；及(iC)激發在該等電極間之電漿以處理該經沉積介電膜之表面而不沉積一膜，其中該電漿係電容耦合電漿(CCP)，其係藉由向該等兩個電極中之一者施加RF功率而激發，其中該RF功率高於參考RF功率(在該參考RF功率下，該介電膜之頂/底部份與該介電膜之側壁部份之化學抗性實質上相等)，使得在步驟(ii)中之濕式蝕刻相對於該介電膜之側壁部份選擇性地移除該介電膜之頂/底部份。上文中，在沉積一膜完成之後藉由處理該膜而形成具有膜性 質之定向性之膜。上文中，步驟(ii)係不需為具循環性之沉積後處理。
圖6係說明根據本發明之不同具體實施例製造層結構之步驟的流程圖。步驟S41對應於步驟(iA)，且步驟S42對應於步驟(iB)及(iC)，且步驟S43對應於步驟(ii)。在步驟S41中，在一溝槽上沉積一介電膜，該膜不需具有膜性質之定向性，儘管其可已具有膜性質之定向性。在步驟S42中，在高於該臨限電壓之電壓下在該膜上進行電漿轟擊做為沉積後處理，使得該膜之頂/底部份之濕式蝕刻速率高於該膜之側壁部份之濕式蝕刻速率。在步驟S43中，藉由濕式蝕刻與該膜之側壁部分相較更主要地移除該膜之頂/底部份，使得實質上僅在該層結構中留下該膜之側壁部份。由於已在該沉積後處理之前沉積該膜，因此使用低於臨限電壓之電壓可能無效，這是因為藉由在該膜上施加電漿轟擊該側壁部份之濕式蝕刻速率不會如以上討論之圖14中所說明變得高於如此沉積之膜之濕式蝕刻速率。
在某些具體實施例中，所沉積介電膜具有約10nm或更低之厚度(通常約5nm或更少)。若待處理之膜較約10nm厚，則電漿轟擊未到達該膜之底部，即難以完全調整該厚度方向上該膜之濕式蝕刻速率。
接受沉積後處理之介電膜可藉由任何合適之沉積方法在該基板上沉積，包括：電漿增強原子層沉積(PEALD)、熱ALD、低壓化學氣相沉積(PCVD)、遠端電漿沉積、PECVD等。較佳地，由於ALD可提供高保形性(諸如超過70%(或高於80%或90%))，該介電膜係藉由ALD沉積。
在某些具體實施例中，在沉積該介電膜之後與在步驟(ii)之前不進行退火。
在某些具體實施例中，可藉由PEALD進行該沉積循環，其中一個循環係在下表1所示之條件下進行。
表1(數字為近似值)
Figure 106100823-A0305-02-0016-1
在某些具體實施例中，在下表2所示之條件下進行沉積後處理。
Figure 106100823-A0305-02-0017-2
在上文中，儘管未饋入前驅物至該反應室，載體氣體連續地流動。
在某些具體實施例中，可在下表3所示之條件下進行濕式蝕刻。
表3(數字為近似值)
Figure 106100823-A0305-02-0018-3
關於濕式蝕刻，可使用包括任何習知裝置之任何合適之單晶圓型或批次型裝置。並且，可使用包括任何習知溶液之用於濕式蝕刻之任何合適之溶液。
在某些具體實施例中，可如下僅在一溝槽之側壁上形成一絕緣膜：1)在具有一溝槽圖案之一基板上形成一SiN膜，其中重覆饋送一前驅物之脈衝且將該基板暴光至由一電漿激發之含氮氣物種之一周圍氣氛中之脈衝，其中該電漿係以一方式激發：在使得該膜之側壁部份之濕式蝕刻速率低於該膜之頂/底部份之濕式蝕刻速率之條件下，在垂直於該基板之方向上在該基板上進行電漿轟擊(離子之入射角垂直於該基板)；及2)藉由濕式蝕刻移除該膜之頂/底部份。
在上述程序順序中，使用連續供應之載體氣體以脈衝供應該前驅物。使用流通系統(FPS)完成此程序，其中載體氣體管線提供有具有前驅物儲存器(瓶)之改道管線，且切換主要管線及改道管線，其中當一載體氣體僅意欲饋送至一反應室時，關閉該改道管線，而當意欲饋送該載體氣體及一前驅物氣體兩者至該反應室中時，關閉該主要管線，且該載體氣體流經該改道管線並與該前驅物氣體一起自該瓶流出。在此方式下，該載體氣體可連續地流入該反應室內，並可藉由切換該主要管線及該改道管線脈衝地攜載該前驅物氣體。圖1B說明根據本發明之一具體實施例使用一流通系統(FPS)之一前驅物供應系統(黑色閥係指該等閥係關閉的)。如圖1B的(a) 所示，當饋送一前驅物至一反應室中時(未顯示)，首先，一載體氣體(諸如Ar(或He))流經具有閥b及c之一氣體管線，及接著進入一瓶(儲存器)30。該載體氣體自該瓶30流出同時攜載對應於該瓶30內之蒸氣壓之量的一前驅物氣體，並流經具有閥f及e之一氣體管線，且接著與該前驅物一起饋送至該反應室中。上文中，關閉閥a及d。當僅饋送該載體氣體(惰性氣體)至該反應室中時，如圖1B中之(b)中所示，該載體氣體流經具閥a之氣體管線同時旁流至該瓶30。在上文中，閥b、c、d、e、及f關閉。
可在一載體氣體之輔助下提供該前驅物。由於ALD為自限制吸附反應製程，所沉積之前驅物分子數係以反應表面位點數測定且與飽和後之前驅物暴露無關，且該前驅物之供應係使得藉以每一循環之該等反應表面位點飽和。可原位產生沉積電漿，例如，於整個沉積循環中連續流動之氨氣中。在其它具體實施例中，該電漿可遠端地產生並提供至該反應室。
如上所提及，每一沉積循環之每一脈衝或階段較佳地係自限制。在每一階段中供應過量反應物以飽和該敏感之結構表面。表面飽和確保所有可得(例如，受到物理尺寸或「立體阻礙」限制)之反應位點被反應物佔據且因此確保優異之階梯覆蓋。在某些具體實施例中，可減少一或多個反應物之脈衝時間使得未達成完全飽和且在該基板表面上吸附少於單層。
可使用例如包括圖1A所示之裝置之任何合適裝置進行該程序循環。圖1A係可用在本發明之某些具體實施例中之PEALD裝置之示意圖，希望連同經程式化以進行以下描述之順序控制。在本圖式中，藉由平行地並彼此相對地在反應室3之內部11(反應區)中提供一對導電平板電極4、2，向一側施加HRF功率(13.56MHz或27MHz)20，及另一側電接地12，在電極間激發電漿。在較低之台2(低電極)中提供一溫度調節器，且其上所置之基板1之溫度在所給溫度下保持定溫。上方電極4亦用作一淋洗板，且將反應氣體(及惰性氣體)及前驅物氣體分別通過一氣體管線21及 氣體管線22，且通過該淋洗板4引入該反應室3內。此外，在該反應室3中，提供具一排放管線7之圓形管路13，在該反應室3之內部11中之氣體通過其排放。另外，經由一氣體管線23將稀釋氣體引入該反應室3中。進一步地，置於該反應室3下之轉移室5提供有一密封氣體管線24以經由該轉移室5之內部16(轉移區)將密封氣體引入該反應室3之內部11內，其中提供用於分開該反應區及該轉移區之一分離板14(一晶圓通過一閘閥轉移至該轉移室5或自其轉移，該閘閥自該圖省略)。該轉移室亦提供有排氣管線6。在某些具體實施例中，該多元素膜之沉積及表面處理係在相同反應空間中進行，使得可在未暴露該基板至空氣或其它含氧氣氛下連續地進行所有該等步驟。在某些具體實施例中，可使用一遠端電漿單元以激發一氣體。
在某些具體實施例中，在圖1A中所示之裝置中，可使用在圖1B(先前所述)中說明之切換一惰性氣體流及一前驅物氣體流之系統，以在無該反應室之實質上波動之壓力下脈衝式地引入該前驅物氣體。
在某些具體實施例中，可使用雙室反應器(用於加工彼此緊密放置之晶圓的兩區或腔室)，其中可經由一共用管線供應一反應氣體及惰性氣體，而經由未共用管線供應一前驅物氣體。
熟悉本技術者將了解本裝置包括一或多個控制器(未示出)，其經程式化或是經組態以使得進行本文他處所描述之沈積及反應器清潔程序。該(等)控制器與各種電源、加熱系統、幫浦、機器人及反應器之氣體流量控制器或閥連通，如熟悉本技術者所了解。
本發明進一步地參照以下工作實施例解釋。然而，該等實施例未意欲限制本發明。在其中未具體指明條件及/或結構之實施例中，熟悉本技術者考量本揭露做為例行實驗可容易地提供此等條件及/或結構。並且，應用在該特定實施例中之數字在某些具體實施例中可以至少±50%之範圍修正，且該等數字為近似值。
在某些具體實施例中，可如下僅在一溝槽之側壁上形成一絕 緣膜：1)在具有一溝槽圖案之一基板上形成一SiN膜(該膜可或可不具有膜性質之定向性)；2)以一電漿處理該膜，該電漿以一方式激發：在使得該膜之側壁部份之濕式蝕刻速率低於該膜之頂/底部份之濕式蝕刻速率之條件下，在垂直於該基板之方向上在該基板上進行電漿轟擊(離子之入射角垂直於該基板)；及3)藉由濕式蝕刻移除該膜之頂/底部份。
實施例 實施例1
藉由PEALD在具有溝槽之一Si基板(Φ300mm)上形成SiN膜，其中一循環係在如下表4(沉積循環)所示之條件下使用圖1A所示之PEALD裝置及圖1B所示之氣體供應系統(FPS)進行。
在自該反應室取出該基板後，在下表4所示之條件下使該基板接受濕式蝕刻。
Figure 106100823-A0305-02-0022-4
結果顯示於圖7中。圖7係顯示RF功率與在該頂表面上形成之膜之濕式蝕刻速率與在該溝槽之側壁上形成之膜之濕式蝕刻速率間之 關係之圖，其顯示臨限(參考)RF功率。如圖7所示，該側壁部份之濕式蝕刻速率隨RF功率增加而減少，而該頂/底部份之濕式蝕刻速率隨RF功率增加而增加，其中表示前者之線與表示後者之線在約600W之RF功率處相交。即，該臨限RF功率大約為600W，且據了解當在該等電極間施加之RF功率高於約600W時，可相對於該膜之側壁部份而選擇性地移除該膜之頂/底部份，而當在該等電極間施加之RF功率低於約600W時，可相對於該膜之頂/底部份而選擇性地移除該膜之側壁部份。
進一步地，在濕式蝕刻之前，對該膜之頂部份進行其它分析：Si-N峰值強度及密度。圖12係顯示該SiN膜之RF功率與Si-N峰強度[au]間之關係之圖。圖13係顯示該SiN膜之RF功率與密度[g/cm3]間之關係之圖。如圖12及13所見，與一般技術知識相反(即當增加RF功率時，發生該膜之緻密化)，當RF功率增加時對該SiN膜之不對稱電漿轟擊破壞Si-N鍵，且由於Si-N鍵之解離，該膜之密度減少(該密度通常在2.6至3.2g/cm3之範圍內)，其中藉由濕式蝕刻待移除之一膜部份之密度低於通過濕式蝕刻保留之一膜部份之密度。
實施例2
在表5所示之條件下沉積該等SiN膜，其中以與實施例1相同之方式測定該臨限RF功率為約400W。接著將該等SiN膜在表5所示之條件下進行濕式蝕刻。圖8顯示該等氮矽化合物膜之橫截面之掃描穿透式電子顯微鏡(STEM)相片。如可由圖8所見，當RF功率為700W時，藉由濕式蝕刻選擇性地移除該膜之頂/底部份，且實質上在頂表面上及該溝槽之底部處未留下膜(未觀察到殘餘膜)。當RF功率為500W時，藉由濕式蝕刻較該膜之側壁部份更主要地移除該膜之頂/底部份，但在頂表面上及該溝槽之底部處留下殘餘膜，而該膜之側壁部份大多數保留。當RF功率為300W時，藉由濕式蝕刻較該膜之頂/底部份更主要地移除該膜之側壁部份，且在該側壁之某些區域未留下殘餘膜，而該膜之頂/底部份大多數保留。
Figure 106100823-A0305-02-0024-5
實施例3
以與實施例1相同之方式但RF功率為880W下沉積該SiN 膜。接著在與實施例1相同之條件下將該SiN膜進行濕式蝕刻。圖9顯示在該濕式蝕刻後該SiN膜之橫截面之掃描穿透式電子顯微鏡(STEM)相片。如可由圖9所見，實質上在頂表面上及該溝槽之底部處未留下膜(未觀察到殘餘膜)。
實施例4(預測實施例)
藉由PEALD在與實施例1相同之方式但RF功率為600W下在具有溝槽之Si基板(Φ300mm)上形成SiN膜。其後，在相同反應器中，以電漿在下表6所示之條件下處理該膜，其中RF功率為800W，其高於該臨限RF功率，因而對該基板之頂表面及該溝槽之底表面造成損害並使膜品質劣化。在自該反應室取出該基板後，在下表6所示之條件下使該基板接受濕式蝕刻。
表6(數字為近似值)
Figure 106100823-A0305-02-0026-6
圖10說明氮矽化合物膜之橫截面圖。由於在一基板51中形成之溝槽之側壁51c上形成之該膜之部份52不接受實質電漿轟擊，因此部份52維持膜性質且在濕式蝕刻後保留。相反地，由於在一頂表面51b上形成之膜之一部份及一底表面51a上形成之膜之一部份接受電漿轟擊，因此該等部份使膜性質劣化且在濕式蝕刻後移除。
實施例5(預測實施例)
藉由PEALD在具有溝槽之一Si基板(Φ300mm)上形成SiN膜，其中一循環係在如下表7(沉積循環)所示之條件下使用圖1A所示之PEALD裝置及圖1B所示之氣體供應系統(FPS)進行。
在自該反應室取出該基板後，在下表7所示之條件下使該基板接受濕式蝕刻。
Figure 106100823-A0305-02-0027-7
圖11說明氮矽化合物膜之橫截面圖。由於RF功率為100W，其低於該臨限RF功率(其預期為600W)，藉由濕式蝕刻相對於該膜 之頂部份53b及該膜之底部份53a選擇性地移除該膜之側壁部份，其中在該濕式蝕刻後僅保留該等頂/底部份53a、53b。可使用此膜做為罩蓋層。
熟悉本技術之人士應了解可在不背離本發明之精神下進行許多及各種修正。因此，應清楚了解本發明之形式僅作說明之用，且未意欲限制本發明之範疇。
S11~S13:製程步驟

Claims (15)

  1. 一種用於在一基板之一上表面中形成之一溝槽中製造一層結構之方法，該層結構係由含有Si-N鍵之一介電膜構成，該方法包含：(i)同時在上表面、及溝槽之底表面及側壁上形成含有一Si-N鍵之一介電膜，其中以藉由在兩電極間施加電壓而激發之電漿轟擊在上表面及底表面上形成之該介電膜之頂/底部份與在該等側壁上形成之介電膜之側壁部份提供不同之化學抗性，該基板係平行於該等兩個電極放置於其間；及(ii)藉由濕式蝕刻實質上移除該介電膜之頂/底部份及該側壁部份中之任一者而非兩者，該濕式蝕刻依不同之化學抗性較該介電膜之該頂/底部份及該側壁部份之另一者更主要地移除其中一者；其中該電漿係藉由向該等兩個電極中之一者施加RF功率所激發之電容耦合電漿(CCP)；及其中該RF功率高於參考RF功率，在該參考RF功率下，該介電膜之頂/底部份及該介電膜之側壁部份之化學抗性實質上相等，其中該濕式蝕刻相對於該介電膜之側壁部份選擇性地移除該介電膜之頂/底部份。
  2. 如申請專利範圍第1項所述之方法，其中該電漿係Ar、N2或O2電漿。
  3. 如申請專利範圍第1項所述之方法，其進一步包含在步驟(i)及(ii)之前重覆以下步驟以測定參考RF功率：在與步驟(i)相同的條件下同時形成一介電膜，除了RF功率改變而做為一變數；及 在與步驟(ii)相同的條件下藉由濕式蝕刻實質上移除該介電膜之頂/底部份及該側壁部份之任一者而非兩者。
  4. 如申請專利範圍第1項所述之方法，其中該介電膜係SiN膜。
  5. 如申請專利範圍第1項所述之方法，其中該濕式蝕刻係使用氟化氫(HF)之溶液進行。
  6. 一種用於在一基板之一上表面中形成之一溝槽中製造一層結構之方法，該層結構係由含有Si-N鍵之一介電膜構成，該方法包含：(i)同時在上表面、及溝槽之底表面及側壁上形成含有一Si-N鍵之一介電膜，其中以藉由在兩電極間施加電壓而激發之電漿轟擊在上表面及底表面上形成之該介電膜之頂/底部份與在該等側壁上形成之介電膜之側壁部份提供不同之化學抗性，該基板係平行於該等兩個電極放置於其間；及(ii)藉由濕式蝕刻實質上移除該介電膜之頂/底部份及該側壁部份中之任一者而非兩者，該濕式蝕刻依不同之化學抗性較該介電膜之該頂/底部份及該側壁部份之另一者更主要地移除其中一者；其中該步驟(i)包含：在該等電極之間放置其上表面中具有一溝槽之基板；及藉由電漿增強原子層沉積(PEALD)使用氮氣做為一反應氣體在該基板上沉積該介電膜，其中該電漿係電容耦合電漿(CCP)，該電漿藉由在該PEALD之每一循環中向該等兩個電極中之一者施加RF功率而激發，其中該RF功率高於參考RF功率，在該參考RF功率下，該介電膜之頂/底部份與該介電膜之側壁部份之化學抗性實質上相等，使得在 步驟(ii)中之濕式蝕刻相對於該介電膜之側壁部份選擇性地移除該介電膜之頂/底部份。
  7. 如申請專利範圍第6項所述之方法，其中該PEALD使用胺基矽烷、鹵化矽烷、單矽烷、或二矽烷作為一前驅物。
  8. 如申請專利範圍第6項所述之方法，其中在步驟(i)及(ii)之間不進行退火。
  9. 如申請專利範圍第1項所述之方法，其中該步驟(i)包含：在該等電極之間放置其上表面上具有一溝槽之基板；及藉由電漿增強原子層沉積(PEALD)使用氮氣做為一反應氣體在該基板上沉積該介電膜，其中該電漿係電容耦合電漿(CCP)，該電漿藉由在該PEALD之每一循環中向該等兩個電極中之一者施加RF功率而激發，其中該RF功率低於參考RF功率，在該參考RF功率下，該介電膜之頂/底部份與該介電膜之側壁部份之化學抗性實質上相等，使得在步驟(ii)中之濕式蝕刻相對於該介電膜之頂/底部份選擇性地移除該介電膜之側壁部份。
  10. 如申請專利範圍第9項所述之方法，其中該PEALD使用胺基矽烷、鹵化矽烷、單矽烷、或二矽烷做為一前驅物。
  11. 如申請專利範圍第1項所述之方法，其中該步驟(i)包含：在其上表面中具有一溝槽之基板上沉積一介電膜；在該等兩個電極之間放置該基板；及在該等電極間激發該電漿以處理該經沉積介電膜之表面而不沉積 一膜，其中該電漿係電容耦合電漿(CCP)，其係藉由向該等兩電極之一者施加RF功率而激發，其中該RF功率高於參考RF功率，在該參考RF功率下，該介電膜之頂/底部份與該介電膜之側壁部份之化學抗性實質上相等，使得在步驟(ii)中之濕式蝕刻相對於該介電膜之側壁部份選擇性地移除該介電膜之頂/底部份。
  12. 如申請專利範圍第11項所述之方法，其中該介電膜係藉由原子層沉積(ALD)沉積在該基板上。
  13. 如申請專利範圍第12項所述之方法，其中該ALD為電漿增強ALD(PEALD)，且步驟(i)全部在相同室中進行。
  14. 如申請專利範圍第11項所述之方法，其中在沉積該介電膜之後與在步驟(ii)之前不進行退火。
  15. 如申請專利範圍第11項所述之方法，其中該經沉積介電膜具有10nm或更低之厚度。
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