CN112740372A - 选择性材料移除 - Google Patents

选择性材料移除 Download PDF

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CN112740372A
CN112740372A CN201980061177.3A CN201980061177A CN112740372A CN 112740372 A CN112740372 A CN 112740372A CN 201980061177 A CN201980061177 A CN 201980061177A CN 112740372 A CN112740372 A CN 112740372A
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containing precursor
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silicon nitride
hydrogen
etching method
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夏铭
D·杨
C-M·许
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Applied Materials Inc
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Abstract

用于移除氮化物的示例性方法可包括使含氟前驱物流动到半导体处理腔室的远程等离子体区域中。方法可进一步包括在远程等离子体区域内形成等离子体以产生含氟前驱物的等离子体流出物以及使等离子体流出物流动到容纳基板的半导体处理器腔室的处理区域中。基板可包括高深宽比特征。基板可进一步包括暴露的氮化物的区域及暴露的氧化物的区域。方法可进一步包括将含氢前驱物提供到处理区域以产生蚀刻剂。可用蚀刻剂移除暴露的氮化物的至少一部分。

Description

选择性材料移除
相关申请的交叉引用
此申请主张于2018年9月21日提交的美国专利申请第16/138,507号的优先权权益，此申请的全部内容由此出于所有目的以引用方式并入本文中。
技术领域
本技术涉及半导体工艺及设备。更具体而言，本技术涉及氮化物和/或氧化物材料的选择性蚀刻。
先前技术
集成电路可能由在基板表面上产生复杂图案化的材料层的工艺来制造。在基板上产生图案化的材料需要用于移除暴露的材料的受控方法。出于各种目的使用化学蚀刻，包括将光刻胶中的图案转移至下层中、薄化层或薄化已经在表面上存在的特征的横向尺寸。通常期望具有与另一种材料相比更快速地蚀刻一种材料的蚀刻工艺，从而促进例如图案转移工艺。认为此蚀刻工艺对第一材料具有选择性。由于材料、电路及工艺的多样性，已经开发对各种材料具有选择性的蚀刻工艺。
蚀刻工艺可基于在工艺中使用的材料而被称为湿法或干法。与其他介电质及材料相比，湿法HF蚀刻优先移除氧化硅。然而，湿法工艺可能难以穿透一些受限沟槽，并且有时也可能使剩余的材料变形。在基板处理区域内形成的局部等离子体中产生的干法蚀刻可以穿透更受限的沟槽，并且展现脆弱剩余结构的较少形变。然而，局部等离子体可经由当它们放电时产生电弧从而损坏基板。
因此，存在对可以用于产生高品质器件及结构的经改进的系统及方法的需要。这些及其他需要由本技术解决。
发明内容
用于选择性蚀刻氮化物材料的示例性方法可包括使含氟前驱物流动到半导体处理腔室的远程等离子体区域中。方法可进一步包括在远程等离子体区域内形成等离子体以产生含氟前驱物的等离子体流出物、以及使等离子体流出物流动到半导体处理腔室的处理区域中。处理区域可容纳基板。基板可包括高深宽比特征。基板可进一步包括暴露的氮化硅的区域及暴露的氧化物的区域。方法还可包括将含氢前驱物提供到半导体处理腔室的处理区域中。方法可进一步包括相对于暴露的氧化物选择性移除暴露的氮化硅的至少一部分。
在一些实施例中，当被提供到处理区域时，含氢前驱物可绕过远程等离子体区域。在一些实施例中，含氟前驱物可包括三氟化氮。在一些实施例中，含氢前驱物可包括双原子氢或氟化氢中的一个。在一些实施例中，含氢前驱物可为无氧的。在一些实施例中，含氟前驱物的流动速率与含氢前驱物的流动速率的比率可在约1:10与约2:1之间的范围中。在一些实施例中，在蚀刻方法期间，基板温度可维持在约0℃与约150℃之间。在一些实施例中，在半导体处理腔室内的压力可维持在约0.5托(Torr)与约50托之间。在一些实施例中，蚀刻方法可包括大于或为约500:1的氮化硅相对于氧化物的选择性。在一些实施例中，蚀刻方法可产生暴露的氮化硅的凹陷侧壁，并且凹陷侧壁可包括实质上笔直的凹陷轮廓。在一些实施例中，暴露的氧化物可包括氧化硅。在一些实施例中，基板可进一步包括暴露的硅的区域。可进一步相对于暴露的硅选择性移除暴露的氮化硅的部分。
用于选择性蚀刻氮化物材料的进一步示例性方法可包括使含氟前驱物流动到半导体处理腔室的远程等离子体区域中。方法还可包括在远程等离子体区域内形成等离子体以产生含氟前驱物的等离子体流出物。方法可进一步包括使等离子体流出物流动到半导体处理腔室的处理区域中。处理区域可容纳基板。基板可包括在两个垂直柱之间形成的沟槽。两个垂直柱中的每一个可包括氮化硅及氧化物材料的交替层。在一些实施例中，方法还可包括当使含氟前驱物流动到处理区域中时，将含氢前驱物提供到处理区域以产生蚀刻剂。方法可进一步包括用蚀刻剂从氮化硅的每个层选择性移除氮化硅的至少一部分。
在一些实施例中，在蚀刻方法期间，基板温度可维持在约30℃与约85℃之间。在一些实施例中，在半导体处理腔室内的压力可维持在约1托与约5托之间。在一些实施例中，含氟前驱物的流动速率与含氢前驱物的流动速率的比率可大于或为约1:2。在一些实施例中，基板可包括暴露的硅的区域。可相对于暴露的硅选择性移除来自氮化硅的每个层的氮化硅的部分。在一些实施例中，氧化物材料可包括氧化硅。
用于选择性蚀刻氮化物材料的进一步示例性方法可包括使含氟前驱物流动到半导体处理腔室的远程等离子体区域中。方法还可包括在远程等离子体区域内形成等离子体以产生含氟前驱物的等离子体流出物。方法可进一步包括使含氢前驱物流动到半导体处理腔室的远程等离子体区域中。方法还可包括在远程等离子体区域内形成等离子体以产生含氢前驱物的等离子体流出物。方法可进一步包括使含氟前驱物的等离子体流出物及含氢前驱物的等离子体流出物流动到半导体处理腔室的处理区域中。处理区域可容纳基板。基板可包括高深宽比特征。基板可进一步包括暴露的氮化硅的区域及暴露的氧化硅的区域。方法可进一步包括相对于暴露氧化硅来选择性移除暴露的氮化硅的至少一部分。在一些实施例中，基板可进一步包括暴露的硅的区域，并且其中可相对于暴露的硅移除暴露的氮化硅的部分。
本技术可提供优于常规技术的数个益处。蚀刻副产物可以是挥发性的并且因此可以简单地移除。此外，本技术可允许调谐蚀刻的凹陷轮廓以获得凸起、笔直和/或凹入的凹陷轮廓的能力。与可使用含氧化物前驱物的蚀刻方法相比，本技术还可达成非常高的选择性。结合下文描述及附图更详细描述这些及其他实施例，以及众多其优点及特征。
附图说明
可通过参考说明书的剩余部分及附图来实现对所公开的技术的性质及优点的进一步理解。
图1示出了根据本技术的实施例的示例性处理系统的一个实施例的俯视平面图。
图2示出了示例性处理系统的横截面图。
图3示出了根据本技术的一些实施例的方法中的示例性操作。
图4A和图4B示出了根据本技术的一些实施例的被处理的基板的横截面图。
图5示出了根据本技术的一些实施例的方法中的示例性操作。
图6A示出了根据本技术的一些实施例的在前驱物的蚀刻量与流动速率之间的关系以及在前驱物的选择性与流动速率之间的关系。
图6B示出了根据本技术的一些实施例的在蚀刻量与蚀刻时间之间的关系以及在选择性与蚀刻时间之间的关系。
图6C示出了根据本技术的一些实施例的在蚀刻量与温度之间的关系以及在选择性与温度之间的关系。
图7A及图7B示出了根据本技术的一些实施例的被处理的基板的横截面图。
图8A及图8B示出了根据本技术的一些实施例的在不同温度下在前驱物的蚀刻量与流动速率之间的关系以及在前驱物的选择性与流动速率之间的关系。
图9示出了根据本技术的一些实施例的在针对各种材料的前驱物的蚀刻量与流动速率之间的关系。
图10示出了根据本技术的一些实施例的方法中的示例性操作。
图11示出了根据本技术的一些实施例的在蚀刻量与蚀刻时间之间的关系。
若干附图作为示意图被包括在内。将理解附图是出于说明目的，并且除非特别声明为按比例，否则不认为附图为按比例的。此外，作为示意图，提供附图以辅助理解，且与现实表示相比可能不包括所有方面或信息，并且出于说明目的可包括放大的材料。
在附图中，类似部件和/或特征可具有相同的参考标号。另外，相同类型的各个部件可通过参考标号之后跟有在类似部件之间进行区分的字母来进行区分。若在本说明书中仅使用第一参考标号，则本说明适用于具有相同第一参考标号的类似部件中的任一个，而与字母无关。
具体实施方式
对移动计算及数据数据中心的增长需求继续驱使对高容量、高性能NAND闪存技术的需要。利用接近实际缩放极限的平面NAND，3D NAND正在替换2D NAND以用于存储器器件。制造3D NAND结构可需要沉积两种或多种材料的交替层，诸如氧化硅及氮化硅的交替层，其中堆叠层的总厚度高达数微米。可蚀刻这些堆叠层以产生沟槽或接触孔。此外，可从沟槽选择性蚀刻这样的两种交替材料中的一种或其至少一部分以形成存储器单元。由于3D NAND结构在所形成的单元的数量上增长，沟槽和其他结构的深宽比显著增加。由于沟槽的高深宽比，常规的湿法方法在特征内从顶部至底部均匀地蚀刻材料并且完全移除在特征内部形成的残留副产物是有挑战性的。此外，使用湿法工艺蚀刻的材料(诸如氮化硅)的凹陷轮廓可以是凸起的并且不可以调谐或调整。在一些应用中，可能期望相对笔直的凹陷轮廓。也已经研发使用NF3及O2的干法蚀刻来用于相对于氧化物选择性蚀刻氮化物。然而，通过常规的干法蚀刻而获得的选择性可能是相对低的。
本技术通过执行干法蚀刻工艺来克服这些问题，所述干法蚀刻工艺允许在具有高深宽比的沟槽内部的均匀的顶部到底部的氮化物材料蚀刻。蚀刻副产物可为挥发性的并且因此可以简单地移除，从而如与常规的湿法方法相比，实质上不余留或余留较少的残留副产物。另外，本技术可提供调谐蚀刻的凹陷轮廓以获得凸起、笔直、和/或凹入的凹陷轮廓的能力。与可使用含氧化物前驱物的蚀刻方法相比，本技术还可达成非常高的选择性。
尽管剩余的公开内容将常规地确认利用所公开的技术的具体蚀刻工艺，但是将容易理解系统及方法等效地应用于可在所描述的腔室中发生的沉积及清洁工艺。由此，技术不应当被认为限制为与蚀刻工艺一起使用或用于单独的腔室。此外，尽管将示例性腔室描述为提供本技术的基础，但是将理解本技术可以应用于几乎任何的半导体处理腔室，所述半导体处理腔室可允许所描述的单腔室操作。
图1示出了根据实施例的沉积、蚀刻、烘焙、以及固化腔室的处理系统100的一个实施例的俯视平面图。在附图中，一对前开式晶片标准舱(front opening unified pod；FOUP)102供应各种大小的基板，所述基板由机械臂104接收并且放置到低压固持区域106中，然后放置到基板处理腔室108a-f中的一个中，在串列部分109a-c中定位。第二机械臂110可用于将基板晶片从固持区域106运输到基板处理腔室108a-f并且返回。每个基板处理腔室108a-f可以经配备以执行多个基板处理操作，除了循环层沉积(cyclical layerdeposition；CLD)、原子层沉积(atomic layer deposition；ALD)、化学气相沉积(chemicalvapor deposition；CVD)、物理气相沉积(physical vapor deposition；PVD)、蚀刻、预清洁、除气、定向、及其他基板工艺之外，包括本文描述的干法蚀刻工艺。
基板处理腔室108a-f可包括用于在基板晶片上沉积、退火、固化和/或蚀刻介电膜的一个或多个系统部件。在一个配置中，两对处理腔室(例如，108c-d及108e-f)可用于在基板上沉积介电材料，并且第三对处理腔室(例如，108a-b)可用于蚀刻沉积的介电质。在另一配置中，所有三对腔室(例如，108a-f)可经配置为在基板上蚀刻介电膜。所描述的任何一个或多个工艺可在与不同实施例中示出的制造系统分离的(多个)腔室中执行。将了解，由系统100预期用于介电膜的沉积、蚀刻、退火、及固化腔室的额外配置。
图2示出了根据本技术的实施例的示例性处理系统200的示意性横截面图。系统200可包括处理腔室205及远程等离子体单元210。远程等离子体单元210可与具有一个或多个部件的处理腔室205耦接。远程等离子体单元210可与远程等离子体单元适配器215、隔离器220、压板225、及入口适配器230、扩散器235、或混合歧管240中的一个或多个耦接。混合歧管240可与处理腔室205的顶部耦接，并且可与到处理腔室205的入口耦接。
远程等离子体单元适配器215可在第一端211处与远程等离子体单元210耦接，并且可在与第一端211相对的第二端212处与隔离器220耦接。可穿过远程等离子体单元适配器215界定一个或多个通道。可在第一端211处界定到通道213的开口或端口。通道213可居中界定在远程等离子体单元适配器215内，并且其可通过与穿过远程等离子体单元适配器215的中心轴正交的方向上的第一横截面表面积而表征，所述方向可为在从远程等离子体单元210的流动方向上。通道213的直径可等于从远程等离子体单元210的出口端口或与所述出口端口一样。通道213可通过从第一端211到第二端212的长度而表征。通道213可延伸穿过远程等离子体单元适配器215的整个长度、或与从第一端211到第二端212的长度相比较小的长度。例如，通道213可延伸小于从远程等离子体单元适配器215的第一端211到第二端212的长度的一半，通道213可延伸从第一端211到第二段212的长度的一半，通道213可延伸大于从第一端211到第二段212的长度的一半，或通道213可延伸从第一端211到第二段212的长度的约一半。
远程等离子体单元适配器215还可界定一个或多个沟槽214，所述一个或多个沟槽界定在远程等离子体单元适配器215下面。沟槽214可为或包括在远程等离子体单元适配器215内界定的一个或多个环形凹陷以允许放置O形环或弹性元件，这可允许与隔离器220耦接。
在实施例中，隔离器220可与远程等离子体单元适配器215的第二端212耦接。隔离器220可为或包括围绕隔离器通道221的环形构件。隔离器通道221可在流过远程等离子体单元适配器215的方向上与中心轴轴向地对准。隔离器通道221可通过在与流过隔离器220的方向正交的方向上的第二横截面积而表征。第二横截面积可等于、大于、或小于通道213的第一横截面积。在实施例中，隔离器通道221可通过一直径表征，所述直径大于、等于、或大约与穿过远程等离子体单元适配器215的通道213的直径相同。
隔离器220可由与远程等离子体单元适配器215、混合歧管240、和/或任何其他腔室部件类似或不同的材料制成。在一些实施例中，尽管远程等离子体单元适配器215及混合歧管240可由铝制成或包括铝，包括铝的氧化物、在一个或多个表面上处理铝、或一些其他材料，隔离器220可为或包括与其他腔室部件相比较低导热性的材料。在一些实施例中，隔离器220可为或包括陶瓷、塑胶、或其他热绝缘的部件，所述部件经配置为在远程等离子体单元210与腔室205之间提供热断裂。在操作期间，远程等离子体单元210可经冷却或在相对于腔室205较低的温度下操作，而腔室205可经加热或在相对于远程等离子体单元210较的高温度下操作。提供陶瓷或热绝缘隔离器220可防止或限制在部件之间的热、电气、或其他干扰。
压板225可与隔离器220耦接。在实施例中，压板225可为或包括铝或另一材料，并且在实施例中，压板225可由与远程等离子体单元适配器215或混合歧管240类似或不同的材料制成或包括与远程等离子体单元适配器215或混合歧管240类似或不同的材料。压板225可界定穿过压板225的中心孔223。中心孔223可通过渐缩形状表征，所述渐缩形状从靠近隔离器通道221的一部分到压板225的相对侧面穿过压板225。靠近隔离器通道221的中心孔223的一部分可通过与流动方向正交的横截面积而表征，所述横截面积等于或类似于隔离器通道221的横截面积。中心孔223可通过跨压板225的长度大于或为约10％的渐缩百分比表征，并且在实施例中可通过大于或为约20％、大于或为约30％、大于或为约40％、大于或为约50％、大于或为约60％、大于或为约70％、大于或为约80％、大于或为约90％、大于或为约100％、大于或为约150％、大于或为约200％、大于或为约300％、或更大的渐缩百分比表征。压板225还可界定一个或多个沟槽224，所述一个或多个沟槽224界定在隔离器220下面。沟槽224可为或包括在压板225内界定的一个或多个环形凹陷，以允许放置O形环或弹性元件，这可允许与隔离器220耦接。
入口适配器230可在第一端226处与压板225耦接，并且在与第一端226相对的第二端227处与扩散器235耦接。入口适配器230可界定中心通道228，所述中心通道228穿过入口适配器230界定。中心通道228可通过第一部分229a及第二部分229b来表征。第一部分229a可从第一端226延伸到穿过入口适配器230的第一长度，其中中心通道228可过渡到第二部分229b，所述第二部分229b可延伸到第二端227。第一部分229a可通过第一横截面积或直径表征，并且第二部分229b可通过小于第一横截面积或直径的第二横截面积或直径表征。在实施例中，第一部分229a的横截面积或直径可为第二部分229b的横截面积或直径的两倍大，并且在实施例中可高达或大于约三倍大、大于或为约4倍大、大于或为约5倍大、大于或为约6倍大、大于或为约7倍大、大于或为约8倍大、大于或为约9倍大、大于或为约10倍大、或更大。在实施例中，中心通道228可经配置为提供从远程等离子体单元210递送的前驱物的等离子体流出物，所述等离子体流出物可穿过远程等离子体单元适配器215的通道213、隔离器220的隔离器通道221、和压板225的中心孔223。
入口适配器230还可界定一个或多个第二通道231，所述一个或多个第二通道231可从第一部分229a下方延伸到第二端227或延伸穿过第二端227。第二通道231可通过在与穿过入口适配器230的中心轴正交的方向上的第二横截面表面积表征。在实施例中第二横截面表面积可小于第一部分229a的横截面表面积，并且可大于第二部分229b的横截面表面积或直径。第二通道231可延伸到在第二端227处从入口适配器230的出口，并且可为从远程等离子体单元210交替地递送的前驱物(诸如第一旁路前驱物)提供从适配器230的排出口(egress)。例如，第二通道231可从沿着入口适配器230的外表面(诸如侧面)界定的第一端口232流体地进出，所述入口适配器230可绕过远程等离子体单元210。第一端口232可处于或低于沿着入口适配器230的长度的第一部分229a，并且可经配置为提供流体进入第二通道231。
第二通道231可穿过入口适配器230递送前驱物并且将前驱物递送出第二端227。第二通道231可界定在第一部分229a与第二端227之间的入口适配器230的区域中。在实施例中，第二通道231可能不从中心通道228进入。第二通道231可经配置为维持前驱物与从远程等离子体单元210递送到中心通道228中的等离子体流出物流体地隔离。第一旁路前驱物可能不接触等离子体流出物，直至穿过第二端227离开入口适配器230。第二通道231可包括在适配器230中界定的一个或多个通道。第二通道231可居中地位于适配器230内，并且可与中心通道228相关联。例如，在实施例中，第二通道231可同心地对准并且绕着中心通道228界定。在实施例中，第二通道231可为环形或圆柱形的通道，所述通道部分地延伸穿过入口适配器230的长度或垂直横截面。在一些实施例中，第二通道231还可为绕着中心通道228径向地延伸的多个通道。
入口适配器230还可界定一个或多个第三通道233，所述一个或多个第三通道233可从第一部分229a下方延伸到第二端227或延伸穿过第二端227，并且可从平分第一端口232的平面下方延伸。第三通道233可通过在与穿过入口适配器230的中心轴正交的方向上的第三横截面表面积表征。在实施例中，第三横截面表面积可小于第一部分229a的横截面表面积，并且可大于第二部分229b的横截面表面积或直径。第三横截面表面积还可等于或类似于所示出的第一部分229a的横截面表面积或直径。例如，第三通道233的外径可等同于第一部分229a的外径，或可小于第一部分229a的外径。第三通道233可延伸到在第二端227处从入口适配器230的出口，并且可为从远程等离子体单元210交替地递送的前驱物(诸如第二旁路前驱物)提供从适配器230的排出口。例如，第三通道233可从沿着入口适配器230的外表面(诸如侧面)界定的第二端口234流体地进入，所述入口适配器230可绕过远程等离子体单元210。第二端口234可位于入口适配器230的与第一端口232相对的侧面或部分上。第二端口234可沿着入口适配器230的长度处于第一部分229a处或低于第一部分229a，并且可经配置为提供流体进入第三通道233。在实施例中，第二端口234还可沿着入口适配器230的长度处于第一端口232处或低于的第一端口232。
第三通道233可穿过入口适配器230递送第二旁路前驱物并且将第二旁路前驱物递送出第二端227。第三通道233可界定在第一部分229a与第二端227之间的入口适配器230的区域中。在实施例中，第三通道233可能不从中心通道228进入。第三通道233可经配置为维持第二旁路前驱物与从远程等离子体单元210递送到中心通道228中的等离子体流出物流体地隔离，并且与穿过第一端口232递送到第二通道231中的第一旁路前驱物流体地隔离。第二旁路前驱物可能不接触等离子体流出物或第一旁路前驱物，直至穿过第二端227离开入口适配器230。第三通道233可包括在适配器230中界定的一个或多个通道。第三通道233可居中地位于适配器230内，并且可与中心通道228及第二通道231相关联。例如，在实施例中，第三通道233可同心地对准并且绕着中心通道228界定，并且可同心地对准并且绕着第二通道231界定。在实施例中，第三通道233可为第二环形或圆柱形通道，所述第二环形或圆柱形通道部分地延伸穿过入口适配器230的长度或垂直横截面。在一些实施例中，第三通道233还可为绕着中心通道228径向延伸的多个通道。
扩散器235可在入口适配器230与混合歧管240之间定位以维持流体地隔离穿过入口适配器230递送的前驱物，直至进入混合歧管240。扩散器235可通过一个或多个通道表征，诸如穿过扩散器235界定的圆柱形或环形通道。在实施例中，扩散器235可界定第一通道236或中心通道、第二通道237、和第三通道238。通道可通过与入口适配器230的中心通道228、第二通道231、和第三通道233的第二部分229b类似的尺寸或直径表征。例如，每个通道可将入口适配器通道延伸到混合歧管240。第二通道237及第三通道238可各自系绕着第一通道236界定的环形通道，并且第一通道236、第二通道237、和第三通道238在实施例中可同心地对准，且穿过扩散器235界定。
扩散器235可额外界定绕着扩散器235的一个或多个沟槽239。例如，扩散器235可在实施例中界定第一沟槽239a、第二沟槽239b、及第三沟槽239c，这可允许在入口适配器230与扩散器235之间放置O形环或弹性构件。每个沟槽239可在实施例中为环形沟槽，所述环形沟槽径向置于穿过扩散器235界定的一个或多个通道外部。第一沟槽239a可从第一通道236向外径向地定位，并且可在第一通道236与第二通道237之间定位。第二沟槽239b可从第二通道237向外径向地定位，并且可在第二通道237与第三通道238之间定位。第三沟槽239c可从第三通道238径向地向外定位。每个沟槽239的直径可大于所述沟槽与其相关联并且其可从其外部径向地定位的通道。沟槽可实现在入口适配器230与扩散器235之间改进的密封以确保维持前驱物在部件之间流体地隔离，且在通道之间不发生泄漏。
混合歧管240可在第一端241处与扩散器235耦接，并且可在第二端242处与腔室205耦接。混合歧管240可在第一端241处界定入口243。入口243可提供从扩散器235的流体出口，并且入口243可通过一直径表征，所述直径等于或大致与穿过扩散器235的第三通道238的直径相同。入口243可界定穿过混合歧管240的通道244的一部分，并且通道244可由界定通道244的轮廓的一个或多个部分构成。入口243可为在穿过混合歧管240的通道244的流动方向上的第一部分。入口243可通过一长度表征，所述长度可小于在混合歧管240的流动方向上的长度的一半。在实施例中，入口243的长度还可小于混合歧管240的长度的三分之一，并且可小于混合歧管240的长度的四分之一。入口243可从扩散器235接收每种前驱物，并且可允许混合前驱物，可维持这些前驱物流体隔离，直至递送到混合歧管240。
入口243可延伸到通道244的第二部分，所述第二部分可为或包括渐缩部分245。渐缩部分245可从等于或类似于入口243的直径的第一直径延伸到小于第一直径的第二直径。在一些实施例中，第二直径可为大约或小于第一直径的一半。在实施例中，渐缩部分245可通过大于或为约10％、大于或为约20％、大于或为约30％、大于或为约40％、大于或为约50％、大于或为约60％、大于或为约70％、大于或为约80％、大于或为约90％、大于或为约100％、大于或为约150％、大于或为约200％、大于或为约300％、或更大的渐缩百分比表征。
渐缩部分245可过渡到通道244的第三区域，所述第三区域可为扩口部分(flaredsection)246。扩口部分246可从渐缩部分245延伸到混合歧管240在第二端242处的出口。扩口部分246可从等于渐缩部分245的第二直径的第一直径延伸到大于第一直径的第二直径。在一些实施例中，第二直径可为大约或大于第一直径的两倍。在实施例中，扩口部分246可通过大于或为约10％、大于或为约20％、大于或为约30％、大于或为约40％、大于或为约50％、大于或为约60％、大于或为约70％、大于或为约80％、大于或为约90％、大于或为约100％、大于或为约150％、大于或为约200％、大于或为约300％、或更大的扩口百分比表征。
扩口部分246可向被递送穿过混合物歧管240前驱物提供经由出口247的穿过第二端242的排出口。通道244穿过混合歧管240的部分可经配置为在将混合的前驱物提供到腔室205中之前，提供足够或充分混合递送到混合歧管的前驱物。不同于常规技术，通过在递送到腔室之前执行蚀刻剂或前驱物混合，本发明系统可提供在绕着腔室及基板分布之前具有均匀性质的蚀刻剂。以此方式，利用本技术执行的工艺可具有跨基板表面更均匀的结果。
腔室205可包括呈堆叠布置的多个部件。腔室堆叠可包括气盒250、阻隔板260、面板270、离子抑制元件280、及盖间隔件290。部件可用于穿过腔室分布前驱物或前驱物集合以提供将蚀刻剂或其他前驱物均匀递送到基板来用于处理。在实施例中，此部件可为堆叠板，各个板至少部分界定腔室205的外部。
气盒250可界定腔室入口252。中心通道254可穿过气盒250界定以将前驱物递送到腔室205中。入口252可与混合歧管240的出口247对准。在实施例中，入口252和/或中心通道254可通过类似直径来表征。中心通道254可延伸穿过气盒250并且经配置为将一种或多种前驱物递送到容积257中，所述容积257由气盒250从上方界定。气盒250可包括第一表面253(诸如顶表面)和与第一表面253相对的第二表面255，诸如气盒250的底表面。在实施例中，顶表面253可为平坦或实质上平坦的表面。加热器248可与顶表面253耦接。
在实施例中，加热器248可经配置为加热腔室205，且可传导地加热每个盖堆叠部件。加热器248可为任何种类的加热器，包括流体加热器、电气加热器、微波加热器、或经配置为将热传导地递送到腔室205的其他元件。在一些实施例中，加热器248可为或包括绕着气盒250的第一表面253以环形图案形成的电加热器。加热器可跨气盒250并且围绕混合歧管240界定。加热器可为板加热器或电阻式元件加热器，所述加热器可经配置为提供多达、大约、或大于约2000W的热，并且可经配置为提供大于或为约2500W、大于或为约3000W、大于或为约3500W、大于或为约4000W、大于或为约4500W、大于或为约5000W、或更大功率。
加热器248可经配置为产生高达、大约、或大于约50℃的可变腔室部件温度，并且在实施例中可经配置为产生大于或为约75℃、大于或为约100℃、大于或为约150℃、大于或为约200℃、大于或为约250℃、大于或为约300℃或更高的腔室部件温度。加热器248可经配置为将独立部件(诸如离子抑制元件280)升高到任何这些温度以促进处理操作，诸如退火。在一些处理操作中，基板可朝向离子抑制元件280升高来用于退火操作，并且加热器248可经调节为传导地将加热器的温度升高到上文提及的任何特定温度、或在任何所提及温度内或之间的任何温度范围内。
气盒250的第二表面255可与阻隔板260耦接。阻隔板260可通过一直径表征，所述直径等于或类似于气盒250的直径。阻隔板260可界定穿过阻隔板260的多个孔263，仅示出这些孔的样本，这些孔可允许分布来自容积257的前驱物(诸如蚀刻剂)，并且可开始穿过腔室205分布前驱物用于均匀递送到基板。尽管仅示出数个孔263，但将理解阻隔板260可具有穿过所述结构界定的任何数量的孔263。阻隔板260可通过在阻隔板260的外径处升高的环形部分265以及在阻隔板260的外径处降低的环形部分266来表征。在实施例中，升高的环形部分265可为阻隔板260提供结构刚性，并且可界定容积257的侧面或外径。阻隔板260还可从下方界定容积257的底部。容积257可允许在经过阻隔板260的孔263之前分布来自气盒250的中心通道254的前驱物。在实施例中，降低的环形部分266还可为阻隔板260提供结构刚性，且可界定第二容积258的侧面或外径。阻隔板260还可从上方界定容积258的顶部，而容积258的底部可由面板270从下方界定。
面板270可包括第一表面272及与第一表面272相对的第二表面274。面板270可在第一表面272处与阻隔板260耦接，所述面板可接合阻隔板260的降低的环形部分266。面板270可在第二表面274的内部处界定突出部273，从而延伸到在面板270内或由面板270至少部分界定的第三容积275。例如，面板270可界定第三容积275的侧面或外径以及从上方界定容积275的顶部，而离子抑制元件280可从下方界定第三容积275。面板270可界定穿过面板的多个通道，尽管未在图2中示出。
离子抑制元件280可靠近面板270的第二表面274定位，且可在第二表面274处与面板270耦接。离子抑制元件280可经配置为减少离子迁移到容纳基板的腔室205的处理区域中。离子抑制元件280可界定穿过所述结构的多个孔，尽管未在图2中示出。在实施例中，气盒250、阻隔板260、面板270、及离子抑制元件280可耦接在一起，且在实施例中可直接耦接在一起。通过直接耦接部件，由加热器248产生的热量可穿过部件传导以维持特定腔室温度，所述特定腔室温度可维持有部件之间的较小变化。离子抑制元件280还可接触盖间隔件290，其一起可至少部分界定在处理期间维持基板的等离子体处理区域。
先前论述的腔室可在执行包括蚀刻方法的示例性方法时使用。图3示出了根据本技术的实施例的方法300中的示例性操作。在方法300的第一操作之前，基板(可包括硅基板)可以以一种或多种方式进行处理。例如，膜或层可在基板上沉积、生长、或以其他方式形成。特征(诸如沟槽、孔洞)、或其他特征可在基板上的膜或层中形成。图4A示出了这种经处理结构400的一部分。经处理结构400可包括在覆盖基板415的堆叠层的相邻垂直柱410之间形成的一个或多个沟槽405(仅示出一个)。堆叠层可包括介电层，这些介电层可包括氧化物及氮化物的交替层，诸如如图4A所示的氧化硅420及氮化硅425的层的交替层。基板415可包括硅基板。这两种交替材料中的一种、或其至少一部分可从沟槽选择性蚀刻以例如产生3DNAND结构或任何其他半导体结构。尽管图4A仅示出了氧化硅420的四层及氮化硅425的三层，但经处理结构400可包括每种材料的任何数量层，诸如多达或大于约10、大于或为约15、大于或为约20、大于或为约25、大于或为约30、大于或为约35、大于或为约40、大于或为约45、大于或为约50、大于或为约55、大于或为约60、大于或为约65、大于或为约70、大于或为约80、大于或为约90、大于或为约100、或者每种材料的更多层。这可产生具有数十纳米或更小的宽度的沟槽405，而其高度可在数微米或更大的数量级上。所得的沟槽405的深宽比或高度与宽度比可大于20:1、大于40:1、大于75:1、大于100:1、或甚至更大。在一些实施例中，经处理结构400可在与其中可执行方法300的处理腔室相同的处理腔室中产生，或可在不同处理腔室中产生并且随后传递到其中可执行方法300的处理腔室。
一旦经处理结构400可在容纳经处理结构400的半导体处理腔室的处理区域内定位，那么方法300可开始于操作305，使含卤素前驱物流动到半导体处理腔室的远程等离子体区域中。示例性处理腔室可为先前描述的腔室205，所述腔室205可包括RPS单元210或腔室内的等离子体区域中的一或两个，所述等离子体区域可与处理区域流体耦接，但可经实体划分以将等离子体限制于基板水平。这些区域中的任一个或两个可为在操作305中使用的远程等离子体区域。等离子体可在操作310在远程等离子体区域内产生，这可产生含卤素前驱物的等离子体流出物。在操作315，等离子体流出物可流动到腔室的处理区域。在操作320，可将含氢前驱物连同等离子体流出物提供到处理区域。在操作325，等离子体流出物及含氢前驱物可改变暴露的氮化硅425并且与其相互作用以形成挥发性物质，诸如氟硅酸铵，这些挥发性物质可随后从腔室移除。在一些实施例中，等离子体流出物及含氢前驱物可能不与暴露的氧化硅420反应或反应可受限。由此，如图4B所示，方法300可相对于暴露的氧化硅420来选择性移除暴露的氮化硅425，从而在氮化硅425的层中形成横向凹陷或凹陷侧壁430。
在一些实施例中，诸如方法300，含氢前驱物可绕过远程等离子体区域。具体而言，尽管含卤素前驱物可流过远程等离子体区域以产生含卤素前驱物的等离子体流出物，但含氢前驱物可绕过远程等离子体区域。含氢前驱物可通过腔室顶部处的旁路绕过远程等离子体区域，或可流动到与远程等离子体区域分离的腔室区域中。含氢前驱物可随后在腔室的处理区域或一些其他区域中与等离子体流出物混合。在一些实施例中，可将含卤素前驱物及含氢前驱物的等离子体流出物递送到混合歧管(诸如上文描述的混合歧管240)中，以在提供到腔室的处理区域中之前实现足够或充分混合。
参考图5，示出了根据本技术的实施例的另一方法500中的示例性操作。方法500类似于方法300，不同之处在于含氢前驱物还可流动到处理腔室的远程等离子体区域中。具体而言，一旦经处理结构400可在处理腔室的处理区域内定位，那么方法500可开始在操作505，使含卤素前驱物流动到处理腔室的远程等离子体区域中。在操作510，含氢前驱物可流动到远程等离子体区域中。在操作515，等离子体可在远程等离子体区域内产生，所述远程等离子体区域可产生含卤素前驱物的等离子体流出物及含氢前驱物的等离子体流出物。在操作520，等离子体流出物可流动到腔室的处理区域。在操作525，含卤素前驱物的等离子体流出物及含氢前驱物的等离子体流出物可改变暴露的氮化硅425并且与其相互作用以形成挥发性物质，诸如氟硅酸铵，这些挥发性物质可随后从腔室移除。类似于方法300的含卤素前驱物及含氢前驱物的等离子体流出物的组合，方法500的组合的含卤素前驱物的等离子体流出物及含氢前驱物的等离子体流出物可能不与暴露的氧化硅420反应或反应可受限。由此，方法500可相对于暴露的氧化硅420来选择性移除暴露的氮化硅425，从而在氮化硅425的层中形成凹陷侧壁430。
在方法300和/或方法500中使用的含卤素前驱物可包括含氟前驱物。示例性含氟前驱物可为三氟化氮(NF3)。氟的其他来源可与三氟化氮结合使用或作为三氟化氮的替代品。在一些实施例中，含氟前驱物可包括选自下列的群组中的至少一种前驱物：原子氟、双原子氟、三氟化氮、四氟化碳、氟化氢、二氟化氙、和在半导体处理时使用或可用的各种其他含氟前驱物。前驱物还可包括任何数量的载气，所述载气可以包括氮、氦、氩、或其他稀有、惰性、或可用气体。
在方法300和/或方法500中使用的含氢前驱物可包括双原子氢(H2)或氟化氢(HF)。氢的其他来源可与氢和/或氟化氢结合使用或作为氢和/或氟化氢的替代品。在一些实施例中，含氢前驱物可包括选自下列的群组的至少一种前驱物：双原子氢、氟化氢、烃、醇、过氧化氢、及在半导体处理时使用或可用的各种其他含氢前驱物。在一些实施例中，含氢前驱物可能不包括氧或可为无氧的。当含氢前驱物可为无氧时，使含氢前驱物流动到处理腔室中可能不将氧来源引入处理腔室中。通过消除氧，一些实施例可实现显著较高的选择性，所述较高的选择性可能不通过含氧前驱物实现。如下文将论述，本技术可实现大于或为约100:1、大于或为约200:1、大于或为约300:1、大于或为约400:1、大于或为约500:1、大于或为约600:1、大于或为约700:1、大于或为约800:1、或更大的氮化硅对氧化硅的选择性。前驱物还可包括任何数量的载气，所述载气可以包括氮、氦、氩、或其他稀有、惰性、或可用气体。
含卤素前驱物及含氢前驱物可以以类似速率流动或可以以不同速率流动。含卤素前驱物和/或含氢前驱物可以以至少10sccm的速率流动，并且在一些实施例中可以以大于或为约20sccm、大于或为约40sccm、大于或为约60sccm、大于或为约80sccm、大于或为约100sccm、大于或为约120sccm、大于或为约140sccm、大于或为约160sccm、大于或为约180sccm、大于或为约200sccm、大于或为约220sccm、大于或为约240sccm、大于或为约260sccm、大于或为约280sccm、大于或为约300sccm、大于或为约350sccm、大于或为约400sccm、大于或为约500sccm、大于或为约600sccm、大于或为约700sccm、大于或为约800sccm、大于或为约900sccm、大于或为约1000sccm、大于或为约1200sccm、大于或为约1400sccm、大于或为约1600sccm、大于或为约1800sccm、大于或为约2000sccm的速率流动。含卤素前驱物的流动速率与含氢前驱物的流动速率的比率可至少约1:10，并且在各个实施例中可大于或为约1:9、大于或为约1:8、大于或为约1:7、大于或为约1:6、大于或为约1:5、大于或为约1:4、大于或为约1:3、大于或为约1:2、大于或为约1:1、大于或为约2:1或更大。
通过调节含卤素前驱物的流动速率和/或含氢前驱物的流动速率，和/或通过调节含卤素前驱物的流动速率与含氢前驱物的流动速率的比率，可实现氮化硅相对于氧化硅的高选择性。图6A示出了在前驱物的蚀刻量与流动速率之间的关系以及在前驱物的选择性与流动速率之间的关系。因为使前驱物流动达针对收集的每个数据点的类似时间段，图6A还可反映在前驱物的蚀刻速率与流动速率之间的关系。在图6A所示的实施例中，尽管当可使用其他含卤素前驱物或其他含氢前驱物(诸如氟化氢)时可观察到类似趋势或关系，含卤素前驱物包括三氟化氮，并且含氢前驱物包括双原子氢。在一些实施例中，暴露的氮化硅可包括等离子体增强氮化硅，诸如使用等离子体增强化学气相沉积、等离子体增强原子层沉积、或其他等离子体增强沉积技术沉积的氮化硅。等离子体增强氮化硅可通常用于产生3DNAND结构。在一些实施例中，暴露的氮化硅可包括低压氮化硅，诸如使用低压化学气相沉积来沉积的氮化硅。与等离子体增强氮化硅相比，低压氮化硅可包括较大密度和/或强度，和/或在所沉积膜中的较少杂质量。在一些实施例中，暴露的氮化硅可包括在各个温度下使用原子层沉积(atomic layer deposition；ALD)沉积的氮化硅。暴露的氧化硅可包括热氧化物。尽管在本文中将等离子体增强氮化硅、低压氮化硅、使用ALD沉积的氮化硅、及热氧化物描述为实例，本技术可相对于热氧化物或其他类型的氧化硅选择性地蚀刻其他类型的氮化硅。
含卤素前驱物和/或含氢前驱物的流动速率可维持在约10sccm与约2000sccm之间。含卤素前驱物的流动速率与含氢前驱物的流动速率的比率可在约1:5与约1:1之间变化或可大于1:1。在一些实施例中，当可增加含卤素前驱物的流动速率时，或当含卤素前驱物的流动速率与含氢前驱物的流动速率的比率可从约1:5增加至约1:2时，可增加流动到处理区域(其中可容纳基板)中的含卤素前驱物的等离子体流出物的量。由于可增加等离子体流出物的量，可用蚀刻剂也可增加，并且可增加针对氮化硅及氧化硅两者的蚀刻量和/或蚀刻速率。
当含卤素前驱物可以以增加的流动速率流动时，或当含卤素前驱物的流动速率与含氢前驱物的流动速率的比率可为约1:2或更大时，针对氮化硅及氧化硅两者的蚀刻量和/或蚀刻速率可增加。不意欲受限于任何特定理论，针对氧化硅及氧化硅的蚀刻量和/或蚀刻速率的减小可归因于含卤素前驱物与含氢前驱物的流动速率比。具体而言，尽管可增加含卤素前驱物的等离子体流出物的量，当流动速率比可增加为大于或为约1:2时，可减少蚀刻剂(包括可由等离子体流出物及含氢前驱物形成的氟化铵)的总量。然而，与氮化硅的蚀刻量和/或蚀刻速率减小相比，氧化硅的蚀刻量和/或蚀刻速率减小可为更显著的。如图6A所示，当流动速率比可进一步增加到约1:1时，可实质上抑制氧化硅的蚀刻，而仍可维持氮化硅的蚀刻。
因为与氮化硅的蚀刻相比，氧化硅的蚀刻可更显著地减小，或当含卤素前驱物与含氢前驱物的流动速率比可从约2:1增加至约1:1或更大时，可实质上抑制氧化硅的蚀刻，可实现氮化硅相对于氧化硅的非常高选择性。在一些实施例中，本技术可实现大于或为约100:1、大于或为约200:1、大于或为约300:1、大于或为约400:1、大于或为约500:1、大于或为约600:1、大于或为约700:1、大于或为约800:1或更大的氮化硅相对于氧化硅的选择性。甚至当可将含卤素前驱物与含氢前驱物的流动速率比维持于约1:2或更小时，本技术仍可相对于氧化硅选择性蚀刻氮化硅，从而实现大于1:1、大于或为约1.2:1、大于或为约1.4:1、大于或为约1.6:1、大于或为约1.8:1、大于或为约2:1、大于或为约3:1、大于或为约4:1、大于或为约5:1、大于或为约6:1、大于或为约7:1、大于或为约8:1、大于或为约9:1、大于或为约10:1或更大的选择性。换言之，本文描述的方法可相对于氧化硅选择性蚀刻氮化硅，不论含卤素前驱物的流动速率可小于、类似还是实质上与含氢前驱物的流动速率相同、或大于含氢前驱物的流动速率。由此，取决于特定的应用，可调整含卤素前驱物和/或含氢前驱物的流动速率和/或流动速率比以实现高选择性、高蚀刻量或蚀刻速率、对前驱物的节省等等、或其平衡或组合。
除了实现高选择性的能力之外，本文描述的方法还可随时间维持氮化硅的蚀刻速率。如图6B所示，氮化硅的蚀刻量可随时间增加，并且在一些实施例中，氮化硅的蚀刻量可实质上线性地取决于蚀刻时间。换言之，氮化硅的蚀刻速率可随时间维持，并且随着蚀刻操作可继续，氮化硅的蚀刻速率可能不减小。此外，不同于一些常规蚀刻方法(其中无论如何氧化硅或待保护的其他材料的蚀刻可发生并且甚至可随时间增加)，随着氮化硅的蚀刻可继续，本文描述的方法可实质上抑制氧化硅的蚀刻。因此，这些常规蚀刻方法的选择性可能不维持并且可随时间减小。相比之下，本文描述的方法可随时间维持氮化硅相对于氧化硅及待保护的其他材料的选择性，并且氮化硅的选择性可能不随时间减小，也如图6B所示。
工艺条件还可影响在方法300或500中执行的操作、以及根据本发明技术的其他移除方法。在实施例中，在处理腔室内或在基板水平处的温度可维持在约-10℃或更低与约200℃或更高之间。例如，在一些实施例中，处理温度可以维持在约0℃与约150℃之间、在约10℃与约125℃之间、在约20℃与约100℃之间、在约30℃与约85℃之间、在约40℃与约80℃之间、在约50℃与约75℃之间、或在约60℃与约70℃之间。
图6C示出了在蚀刻量与温度之间的关系以及在选择性与温度之间的关系。因为使前驱物流动达针对收集的每个数据点的类似时间段，图6C还可反映在前驱物的蚀刻速率与流动速率之间的关系。如图6C所示，由于处理腔室内的温度可从0℃或更低逐渐增加至在约30℃与约85℃之间的温度，氮化硅的蚀刻量和/或蚀刻速率可逐渐增加。然而，随着温度可继续增加，氮化硅的蚀刻量和/或蚀刻速率可能不增加、或可减少。还如图6C所示，尽管选择性可在不同温度下变化，方法可在温度的整个操作范围内相对于氧化硅选择性蚀刻氮化硅，类似于氮化硅的蚀刻量和/或蚀刻速率可如何在不同温度下变化。
不意欲受限于任何特定理论，当温度可从0℃或更低逐渐增加至在约30℃与约85℃之间的温度时，蚀刻剂可获得更多能量以到达待吸附在基板表面上的基板，并且与待蚀刻的结构反应。由于更多蚀刻剂可吸附在基板表面上，蚀刻量、蚀刻速率、和/或选择性可逐渐增加。当温度可继续增加时，蚀刻剂可从基板表面解吸附并且可能不简单地吸附到表面，这继而可导致减小的蚀刻量、蚀刻速率、和/或选择性。取决于应用，在处理腔室内的温度可维持在约30℃与约85℃之间、在约40℃与约80℃之间、在约50℃与约75℃之间、或在约60℃与约70℃之间以获得高蚀刻速率和/或选择性。
除了实现期望的蚀刻速率和/或选择性之外，可维持或选择处理腔室的温度以实现均匀蚀刻。如上文论述，在图4A和图4B所示的经处理结构400中的沟槽405可具有非常高的深宽比。为了实现从沟槽405的顶部到底部的均匀蚀刻，也称为顶部到底部装载的1:1比率，可维持相对低的在处理腔室内的温度。在一些实施例中，可维持低于约125℃、低于约100℃、低于约95℃、低于约90℃、低于约85℃或更低的温度。在一些实施例中，通过维持在约30℃与约85℃之间的温度，可实现顶部到底部装载的1:1比率。
另外，通过调节处理腔室的温度，可调谐所蚀刻的氮化硅的每个层的凹陷轮廓。在一些实施例中，当处理腔室的温度可维持在约30℃与约85℃之间时，可获得如图4B所示的凹陷侧壁430的相对笔直并且在一些实施例中实质上笔直的蚀刻轮廓或凹陷轮廓。在一些实施例中，当处理腔室可维持在相对较低的温度(诸如低于或约30℃)下时，可获得如图7A所示的凹陷侧壁430的凸起轮廓。可维持的温度越低，可导致的凸起轮廓越多。不意欲受限于任何特定理论，可形成凸起轮廓，因为由凹陷侧壁430及氧化硅420的相邻层界定的拐角可大体为蚀刻剂提供低能吸附位点，并且当温度可维持相对低时，吸附的蚀刻剂可较不易于移动或变得解吸附，从而导致拐角处蚀刻更多的氮化硅。
其他处理条件(诸如处理腔室内的压力)还可影响氮化硅层的凹陷侧壁的蚀刻轮廓。在一些实施例中，当处理腔室的压力可维持相对低(诸如低于或约1托)时，可获得如图7A所示的凹陷侧壁430的凸起轮廓。当处理腔室的压力可维持高于约1托(诸如高于或约5托)时，可实现如图7B所示的凹陷侧壁430的凹入轮廓。当处理腔室的压力可维持在约1托与约5托之间或在约2托与约4托之间时，可实现凹陷侧壁430的相对笔直蚀刻轮廓。在一些实施例中，当处理腔室的压力可维持在约3托时，如图4B所示，凹陷侧壁430的蚀刻轮廓可实质上笔直。由此，取决于应用及期望的凹陷轮廓，在处理腔室内的压力可维持在约0.5托与约50托之间的任何适宜水平。例如，在处理腔室内的压力可维持在约0.5托与约1托之间以实现氮化硅的凸起凹陷轮廓，在处理腔室内的压力可维持在约1托与约5托之间以实现相对笔直的凹陷轮廓，并且在腔室内的压力可维持在约5托与约50托之间以实现凹入的凹陷轮廓。压力还可维持在此等范围内、由此等范围涵盖的较小范围内、或任何此等范围之间的任何压力下。
图8A和图8B示出了氮化硅相对于氧化硅的选择性的可调谐性。在图8A和图8B所示的实施例中，尽管当可使用其他含卤素前驱物或其他含氢前驱物(诸如氟化氢)时可观察到类似趋势或关系，含卤素前驱物包括三氟化氮，并且含氢前驱物包括双原子氢。暴露的氮化硅可包括等离子体增强氮化硅、低压氮化硅、使用ALD沉积的氮化硅等等，并且暴露的氧化硅可包括热氧化物。因为低压氮化硅可包括较大密度和/或强度、和/或在所沉积膜中的较少杂质量，可能难以实现使用常规蚀刻方法相对于氧化硅选择性蚀刻低压氮化硅。本文描述的方法可相对于氧化硅选择性蚀刻各种类型的氮化硅，包括相对于氧化硅选择性蚀刻低压氮化硅，并且可实现大于1:1、大于或为约1.1:1、大于或为约1.2:1、大于或为约1.3:1、大于或为约1.4:1、大于或为约1.5:1、大于或为约1.6:1、大于或为约1.7:1、大于或为约1.8:1、大于或为约1.9:1、大于或为约2:1、或更大的低压氮化硅相对于氧化硅的选择性。
含卤素前驱物的流动速率可维持在约10sccm与约2000sccm之间，并且含氢前驱物的流动速率可维持在约10sccm与约2000sccm之间。此外，通过调节含卤素前驱物的流动速率与含氢前驱物的流动速率的比率，可实现不同选择性。由此，本文描述的方法可允许氮化硅相对于氧化硅的选择性的可调谐性。在一些实施例中，通过在约1:1与约1:3之间调节含卤素前驱物与含氢前驱物的流动速率比，氮化硅与氧化硅的选择性可从大于1:1至约2:1或更大(诸如从约1:1至约1.8:1)调谐。此外，本文描述的方法可允许在不同温度下的氮化硅相对于氧化硅的选择性的可调谐性。在图8A所示的实施例中，处理腔室的温度可维持在约30℃下。当处理腔室的温度可增加(诸如在图8B所示的实施例中增加到约60℃)时，选择性还可调谐。通过在约1:1与约1:9之间调节含卤素前驱物与含氢前驱物的流动速率比，氮化硅与氧化硅的选择性可从大于1:1调谐至约2:1或更大(诸如从约1.2:1至约1.5:1)。尽管将30℃及60℃描述为示例性操作温度，选择性的可调谐性可在其他温度下实现，诸如低于约30℃、在约30℃与约60℃之间、高于约60℃、或者其他温度或温度范围。类似于使用低压沉积技术沉积的氮化硅，通过调节前驱物在各个温度(诸如低于约30℃、在约30℃与约60℃之间、高于约60℃、或者其他温度或温度范围)下的流动速率比，本文描述的方法还可允许将使用原子层沉积来沉积的氮化硅的选择性从1:1调谐至2:1或更大。
图9示出了在各种材料的蚀刻量与含氢前驱物的流动速率之间的关系。在图9所示的实施例中，尽管当可使用其他含卤素前驱物或其他含氢前驱物(诸如氟化氢)时可观察到类似趋势或关系，含卤素前驱物包括三氟化氮，并且含氢前驱物包括双原子氢。如图9所示，本文描述的方法可能不仅相对于氧化硅选择性蚀刻氮化硅，而还可相对于硅(包括多晶硅)选择性蚀刻氮化硅。具体而言，当含卤素前驱物与含氢前驱物的流动速率比可从约1:1调节至小于约1:3或更大以获得氮化硅的各种蚀刻量时，实质上可不发生多晶硅的蚀刻。另外，当含卤素前驱物与含氢前驱物的流动速率比可维持接近约1:1(诸如在约1:1与约1:1.3之间)时，可抑制氧化硅及多晶硅的蚀刻两者，并且方法可相对氧化硅及多晶硅选择性蚀刻各种氮化硅，包括使用等离子体增强沉积、低压沉积、原子层沉积、或其他可用沉积技术沉积的氮化硅。
图10示出了根据本技术的一些实施例用于相对于氮化硅选择性蚀刻氧化硅的方法1000中的示例性操作。方法1000可开始操作1005，将含卤素前驱物提供到处理腔室的处理区域，所述处理腔室中可容纳基板或经处理结构。基板可包括暴露的氮化物(诸如氮化硅)、及暴露的氧化物(诸如氧化硅)。在操作1010，可将含氢前驱物提供到处理区域。在操作1015，含卤素前驱物及含氢前驱物可改变暴露的氧化硅并且与其相互作用以形成挥发性物质，诸如氟硅酸铵，所述挥发性物质可随后从腔室移除。含卤素前驱物及含氢前驱物可能不与暴露的氮化硅反应或反应可受限。由此，方法1000可相对于暴露的氮化硅选择性移除暴露的氧化硅。
在方法1000中使用的含卤素前驱物可包括含氟前驱物。示例性含氟前驱物可包括三氟化氮(NF3)和/或氟化氢(HF)。氟的其他来源可与三氟化氮和/或氟化氢结合使用或作为三氟化氮和/或氟化氢的替代品。在一些实施例中，含氟前驱物可包括选自下列的群组的至少一种前驱物：原子氟、双原子氟、三氟化氮、四氟化碳、氟化氢、二氟化氙、及在半导体处理时使用或可用的各种其他含氟前驱物。前驱物还可包括任何数量的载气，这些载气可包括氮、氦、氩、或其他稀有、惰性、或可用气体。
在方法1000中使用的含氢前驱物可包括氨(NH3)。氢的其他来源可与氨结合使用或作为氨的替代品。在一些实施例中，含氢前驱物可包括选自下列的群组的至少一种前驱物：氨、烃、醇、过氧化氢、及在半导体处理时使用或可用的各种其他含氢前驱物。前驱物还可包括任何数量的载气，所述载气可包括氮、氦、氩、或其他稀有、惰性、或可用气体。
在一些实施例中，含卤素前驱物及含氢前驱物两者可流动到处理腔室的远程等离子体区域中以形成含卤素前驱物及含氢前驱物的等离子体流出物。在一些实施例中，含卤素前驱物及含氢前驱物的仅一者可提供到远程等离子体区域以形成等离子体流出物，并且含卤素前驱物及含氢前驱物的另一者可绕过远程等离子体区域并且可提供到处理区域中而不形成其等离子体。在一些实施例中，含卤素前驱物及含氢前驱物两者可绕过远程等离子体区域，并且前驱物可提供到处理腔室而不形成任一前驱物的等离子体流出物。因此，取决于实施方式，在方法1000中提供到处理腔室的处理区域的前驱物可包括含卤素前驱物及含氢前驱物两者的等离子体流出物、含卤素前驱物及含氢前驱物的仅一者的等离子体流出物、或无等离子体流出物。不论等离子体是否可由含卤素前驱物和/或含氢前驱物形成，方法1000可相对于氮化硅选择性蚀刻氧化硅。
此外，氧化硅相对于氮化硅的选择性可通过调节流动速率比、温度、压力、及其他操作条件中的一个或多个来调谐。在一些实施例中，当含卤素前驱物的流动速率与含氢前驱物的流动速率的比率可维持在约1:2与约1:3(诸如约1:2.5)之间时，可实质上抑制氮化硅的蚀刻。方法1000可具有大于或为约20:1、大于或为约30:1、大于或为约40:1、大于或为约50:1、大于或为约60:1、大于或为约70:1、大于或为约80:1、大于或为约90:1、大于或为约100:1、大于或为约110:1、大于或为约120:1、大于或为约130:1、大于或为约140:1、大于或为约150:1、或更大的氧化硅相对于氮化硅的选择性。
处理腔室的温度可维持在约0℃与约150℃之间以实现氧化硅相对于氮化硅的高选择性。在一些实施例中，处理腔室或在基板水平处的温度可维持低于或约150℃、低于或约100℃、低于或约60℃、低于或约50℃、低于或约40℃、低于或约35℃、低于或约30℃、低于或约25℃、低于或约20℃、低于或约15℃、低于或约10℃、低于或约5℃、低于或约0℃或更低，同时将氧化硅相对于氮化硅的选择性维持在大于或为约30:1、大于或为约50:1、大于或为约70:1、大于或为约80:1、大于或为约90:1、大于或为约100:1或更大。另外，选择性可维持或可能不随时间减小。甚至当操作可在相对低的温度(诸如约10℃或更低)下执行时，方法1000可实现和/或维持氧化硅相对于氮化硅的高选择性。方法1000还可维持氮化硅随时间的蚀刻速率。如图11所示，在一些实施例中，氧化硅的蚀刻量可随时间增加并且可实质上线性地取决于蚀刻时间。相比之下，随着氧化硅的蚀刻可继续，可实质上抑制或可能实质上不增加氮化硅的蚀刻。因此，随着氧化硅的蚀刻可继续，氧化硅相对于氮化硅的蚀刻选择性可维持并且可能不减小。
在处理腔室内的压力可维持在约0.5托与约50托之间。在一些实施例中，在处理腔室内的压力可维持低于或约40托、低于或约30托、低于或约20托、低于或约10托、低于或约5托、低于或约4托、低于或约3托、低于或约2托、低于或约1托、低于或约0.5托、或更低。压力还可维持在此等范围内、由此等范围涵盖的较小范围内、或任何此等范围之间的任何压力下。
本文描述的各种蚀刻方法提供众多优点。本文描述的方法可使用气体蚀刻剂来到达可具有高深宽比的3D NAND结构或其他特征中的沟槽底部，由此与常规湿法蚀刻工艺相比，改进蚀刻均匀性或顶部到底部装载。由本文描述的方法形成的副产物可为挥发性的，并且因此可通过将处理腔室和/或基板的温度增加或维持于或高于约125℃来简单地移除，从而如与常规湿法工艺相比，实质上不余留残留副产物或余留较少残留副产物。另外，本文描述的方法可提供调谐蚀刻的凹陷轮廓(诸如蚀刻的氮化硅的凹陷轮廓)以实现凸起、笔直、和/或凹入的凹陷轮廓的能力。本文描述的方法还可提供调谐氮化硅和/或氧化硅的选择性的能力。通过选择前驱物，和/或调节前驱物的流动速率比、处理器腔室的温度、和/或处理腔室内的压力，方法在一些实施例中可相对于氧化物选择性蚀刻氮化物，或在其他实施例中可相对于氮化物选择性蚀刻氧化物。取决于前驱物和/或操作条件，方法在一些实施例中可实现从约1:1至约500:1或更大的氮化物相对于氧化物的选择性，并且在其他实施例中可实现从约1:1至约100:1或更大的氧化物相对于氮化物的选择性。通过使用含卤素前驱物及含氢前驱物，与其中可使用含氧前驱物的蚀刻方法相比，本文描述的方法可大体实现较高选择性。
在前述描述中，出于解释的目的，已经阐述数个细节以便提供对本技术的各个实施例的理解。然而，对于本领域技术人员来说将明显的是，可在没有这些细节中的一些细节的情况下或具有额外细节的情况下实践某些实施例。
在已公开若干实施例的情况下，本领域技术人员将认识到可使用各种修改、替代构造、和等效方案而不脱离实施例的精神。此外，尚未描述数种公知的工艺和元素，以便避免不必要地混淆本技术。由此，以上描述不应当被认为限制技术的范围。此外，方法或工艺可按顺序或步骤描述，但将理解，操作可同时执行或以与所列出者不同的次序执行。
在提供值的范围的情况下，将理解除非上下文另外明确指出，也具体地公开每个中间值到在所述范围的上限与下限之间的下限单位的最小分数。涵盖在任何提及值或在所提及的范围中未提及的中间值与在所提及的范围中的任何其他提及值或中间值之间的任何较窄范围。这些较小范围的上限及下限可独立地包括或排除在范围中，并且每个范围(其中任一限值、无任一限值、或两个限值包括在较小范围中)也在技术内涵盖，具有在所提及范围中任何具体排除的限值。在所提及范围包括一或两个限值的情况下，也包括排除这些所包括的限值的任一个或两个的范围。
如在本文及所附权利要求中所使用，除非上下文另外明确指出，否则单数形式“一(a)”、“一(an)”、和“所述(the)”包括复数引用。因此，例如，提及“一前驱物”包括多个此种前驱物，并且提及“所述层”包括提及一层或多层及本领域技术人员已知的其等效物等等。
此外，当在此说明书及所附权利要求中使用时，词语“包括(comprise(s)、comprising)”、“含有(contain(s)、containing)”、及“包括(include(s)、including)”意欲规定存在所提及的特征、整数、部件、或操作，但这些词语不排除存在或添加一个或多个其他特征、整数、部件、操作、动作或群组。

Claims (15)

1.一种蚀刻方法，包括：
使含氟前驱物流动到半导体处理腔室的远程等离子体区域中；
在所述远程等离子体区域内形成等离子体以产生所述含氟前驱物的等离子体流出物；
使所述等离子体流出物流动到所述半导体处理腔室的处理区域中，其中所述处理区域容纳基板，其中所述基板包括高深宽比特征，并且其中所述基板进一步包括暴露的氮化硅的区域和暴露的氧化物的区域；
将含氢前驱物提供到所述半导体处理腔室的所述处理区域中；以及
相对于所述暴露的氧化物来选择性地移除所述暴露的氮化硅的至少一部分。
2.如权利要求1所述的蚀刻方法，其中所述含氢前驱物在被提供到所述处理区域时绕过所述远程等离子体区域。
3.如权利要求1所述的蚀刻方法，其中所述含氟前驱物包括三氟化氮。
4.如权利要求1所述的蚀刻方法，其中所述含氢前驱物包括双原子氢或氟化氢中的一种。
5.如权利要求1所述的蚀刻方法，其中所述含氢前驱物是无氧的。
6.如权利要求1所述的蚀刻方法，其中在所述蚀刻方法期间将所述基板的温度维持在约0℃与约150℃之间。
7.如权利要求1所述的蚀刻方法，其中在所述半导体处理腔室内的压力维持在约0.5托与约50托之间。
8.如权利要求1所述的蚀刻方法，其中所述蚀刻方法具有大于或为约500:1的氮化硅相对于氧化物的选择性。
9.如权利要求1所述的蚀刻方法，其中所述暴露的氧化物包括氧化硅。
10.如权利要求1所述的蚀刻方法，其中所述基板进一步包括暴露的硅的区域，并且其中相对于所述暴露的硅进一步选择性地移除所述暴露的氮化硅的所述部分。
11.一种蚀刻方法，包括：
使含氟前驱物流动到半导体处理腔室的远程等离子体区域中；
在所述远程等离子体区域内形成等离子体以产生所述含氟前驱物的等离子体流出物；
使所述等离子体流出物流动到所述半导体处理腔室的处理区域中，其中所述处理区域容纳基板，其中所述基板包括在两个垂直柱之间形成的沟槽，并且其中所述两个垂直柱中的每一个包括氮化硅和氧化物材料的交替层；
当使所述含氟前驱物流动到所述处理区域中时，将含氢前驱物提供到所述处理区域以产生蚀刻剂；以及
用所述蚀刻剂从氮化硅的每层选择性地移除氮化硅的至少一部分。
12.如权利要求11所述的蚀刻方法，其中在所述蚀刻方法期间将所述基板的温度维持在约30℃与约85℃之间，并且其中所述半导体处理腔室维持在约1托与约5托之间。
13.如权利要求11所述的蚀刻方法，其中所述含氟前驱物的流动速率与所述含氢前驱物的流动速率的比率大于或为约1:2。
14.如权利要求11所述的蚀刻方法，其中所述基板包括暴露的硅的区域，并且其中相对于所述暴露的硅从氮化硅的每层选择性地移除氮化硅的所述部分。
15.如权利要求11所述的蚀刻方法，其中所述氧化物材料包括氧化硅。
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