WO2009084194A1 - Etching method for metal film and metal oxide film, and manufacturing method for semiconductor device - Google Patents

Etching method for metal film and metal oxide film, and manufacturing method for semiconductor device Download PDF

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Publication number
WO2009084194A1
WO2009084194A1 PCT/JP2008/003946 JP2008003946W WO2009084194A1 WO 2009084194 A1 WO2009084194 A1 WO 2009084194A1 JP 2008003946 W JP2008003946 W JP 2008003946W WO 2009084194 A1 WO2009084194 A1 WO 2009084194A1
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Prior art keywords
film
gas
metal
etching
titanium
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PCT/JP2008/003946
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French (fr)
Inventor
Tetsuya Nishizuka
Masaji Inoue
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Tokyo Electron Limited
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Priority to US61/009,502 priority
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes, e.g. for surface treatment of objects such as coating, plating, etching, sterilising or bringing about chemical reactions
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192Microwave generated discharge
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes, e.g. for surface treatment of objects such as coating, plating, etching, sterilising or bringing about chemical reactions
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192Microwave generated discharge
    • H01J37/32211Means for coupling power to the plasma
    • H01J37/3222Antennas
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Abstract

An etching method for a metal film formed on an insulating film and a metal oxide film formed on the metal film includes the step of etching the metal film and the metal oxide film in a gas including nitrogen (N2) and any one of chlorine (Cl2) and hydrogen bromine (HBr). The metal film is selected from the group consisting of titanium (Ti), tantalum (Ta), hafnium (Hf), zirconium (Zr) and aluminum (Al). The gas includes not less than 50% of the nitrogen (N2) to a total flow rate of the gas.

Description

ETCHING METHOD FOR METAL FILM AND METAL OXIDE FILM, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE

The present invention relates to an etching method for a metal film and a metal oxide film that are formed on a substrate and a manufacturing method for a semiconductor device.

In a manufacturing process for semiconductor devices, a so-called lithography process is repeated for a number of times. The lithography process includes a series of processes, such as, application of photoresist on a wafer, exposure, development, etching, and removal of the photoresist. In such a lithography process, there may be cases where a metal oxide film is unintentionally formed on a metal film. Because such a metal oxide film is originally an unnecessary film, the metal oxide film needs to be removed accordingly when manufacturing semiconductor devices.

For example, figures 10A to 10D illustrate an example of a manufacturing process for a semiconductor device.

First, figure 10A illustrates a condition where a silicon dioxide (SiO2) film 502, a silicon carbonitride (SiCN) film 506, an oxygen added silicon carbide (SiCO) film 508, a titanium (Ti) film 510, and an oxygen added silicon carbide (SiCO) film 512 are formed in order on a silicon substrate 500. A copper (Cu) interconnection 504 is buried in the SiO2 film 502, and a photoresist pattern 514a is formed on the oxygen added silicon carbide (SiCO) film 512.

Next, the SiCO film 512 is etched using the photoresist pattern 514a as a mask. As a result, a SiCO film pattern 512a is formed as shown in figure 10B. At this time, the titanium film 510, which is a lower layer, is exposed at a portion where the SiCO film 512 is removed.

Next, the photoresist pattern 514a is removed. Concretely, an ashing process is applied to the photoresist pattern 514a in an atmosphere including oxygen (O2). Thereby, the photoresist pattern 514a is removed. However, oxygen reacts with titanium on the titanium film 510 surface during the ashing process. As a result, a titanium oxide (TiO) film 516 is formed inevitably on the titanium film 510 as shown in figure 10C.

Next, the titanium film 510 along with the titanium oxide film 516 is etched using the SiCO film pattern 512a as a mask. At this time, a mixed gas of chlorine (Cl2) gas and argon (Ar) gas, and a hydrogen bromide (HBr) gas etc. have been generally used as an etching gas.

However, in a case when the mixed gas of Cl2 gas and Ar gas or the HBr gas etc. is used, the metal oxide film, such as the titanium oxide film 516 etc., may not be removed sufficiently. Thus, etching residues 516a of the titanium oxides film 516 are remained on a plurality of places on the titanium film 510. The etching residues 516a become partial masks (so-called micro mask) to the titanium film 510 on the lower layer. When the etching is progressed in this condition, the portion of the micro mask is not etched and a reactive gas is concentrated around the micro mask. Therefore, the surface of the SiCO film 508 is in a rough state. Further, when the etching selectivity of the titanium film 510, which is an etching object film, with the insulating film (SiCO film 508), which is an underlying film, is insufficient, an abnormal etching will progress around the micro mask. Thereby, the etching progresses to the underlying layer and an opening section 518 will also be formed unintentionally.

Meanwhile, in order to remove the metal oxide film sufficiently, addition of boron trichloride(BCl3) gas or use of fluorocarbon(CF) series gas can be considered. However, the metal oxide film can be removed sufficiently using these gases, but there is a problem of low selectivity with a film, which becomes a mask, or an underlying film due to a high reactivity.

In addition, the titanium film is used as an example of a metal film in the example described above. However, the similar problem occurs with tantalum (Ta), hafnium (Hf), zirconium (Zr), and aluminum (Ar) that have similar property as the titanium. Further, an example in which a metal oxide is formed in the ashing process, is shown in the example described above. However, a metal oxide film may also be formed on the metal film after the etching in a case when etching a film on a metal film using a gas including oxygen.

Meanwhile, Japanese Unexamined Patent Application Publication No. 2006-156675 discloses a gas condition for etching a tungsten nitride (WN) film and a tungsten (W) film on an underlying layer. Here, the publication discloses that a mixed gas of chlorine (Cl2) and oxygen (O2) is favorable.

Therefore, an objective of the present invention is to provide an etching method for metal films and metal oxide films, and a manufacturing method for semiconductor devices that can sufficiently remove a metal film and a metal oxide film at an etching process for the metal film and metal oxide film formed on an insulating film, and that the selectivity with the underlying insulating film is sufficiently secured.

In accordance with a first aspect of the invention, an etching method for a metal film formed on an insulating film and a metal oxide film formed on the metal film, the etching method including the step of:
etching the metal film and the metal oxide film in a gas including nitrogen (N2) and any one of chlorine (Cl2) and hydrogen bromine (HBr);
wherein the metal film is selected from a group consisting of titanium (Ti), tantalum (Ta), hafnium (Hf), zirconium (Zr) and aluminum (Al); and
the gas includes not less than 50% of the nitrogen (N2) to a total flow rate of the gas.

According to the first aspect of the present invention, a mixed gas of either one of Cl2 gas or HBr gas and N2 gas is used as an etching gas. Further, the flow ratio of the N2 gas against the total etching gas is not less than 50 %. For this reason, the selectivity with the insulating layer as an underlying layer can be sufficiently secured while the metal oxide film on the metal film formed from titanium etc. can be effectively removed.

In the first aspect of the invention, the metal film may be a nitride of the metal. The present invention may be applied even in a case when the metal film is a nitride of the metal as described in this aspect.

In the first aspect of the invention, the gas may include not greater than 80% of the nitrogen (N2) to the total flow rate of the gas.

As described in the aspect, it is practical in a standpoint of not significantly decreasing the etching rate when the flow rate of the N2 gas is not greater than 80%.

In the first aspect of the invention, the gas may not include oxygen (O2).

According to this aspect, the etching gas does not include oxygen. Namely, the film formed from titanium etc. is the etching object in the present invention. In such a case, the selectivity with the underlying film can be increased by using the etching gas not including oxygen.

In the first aspect of the invention, the metal oxide film may include the same element as is included in the metal film.

In the first aspect of the invention, the insulating film may constitute an interlayer insulating film or a gate insulating film.

In the first aspect of the invention, the insulating film may be oxygen added silicon carbide (SiCO).

According to this aspect, the SiCO film is used as an insulating film. Because SiCO is a low permittivity (low-k) material, it is favorable as an insulating film.

In the first aspect of the invention, the metal film and the metal oxide film may be etched with the gas changed into plasma by microwave radiated from a Radial Line Slot Antenna.

According to this aspect, the etching is applied by using a RLSA device. The RLSA device is capable of generating microwave excited plasma of a high-electron density and a low electron temperature. For this reason, the RLSA device is superior in shape controllability of the etching. Further, the RLSA device has a high disassociation degree of etching gas to ion. For this reason, a large flow rate of nitrogen can be added to the etching gas by the RLSA device.

In the first aspect of the invention, the metal film and the metal oxide film may be etched at a pressure of not greater than 10 mTorr.

According to this aspect, nitrogen ion can be effectively generated.

In accordance with a second aspect of the invention, a manufacturing method for a semiconductor device, the method including the steps of:
forming a first insulating layer, a metal layer and a second insulating layer in this order on a semiconductor substrate, the metal layer including titanium (Ti), tantalum (Ta), hafnium (Hf), zirconium (Zr) or aluminum (Al);
patterning the second insulating layer using a resist mask;
removing the resist mask in an atmosphere including oxygen (O2);
etching the metal layer in a gas including nitrogen (N2) and any one of chlorine (Cl2) and hydrogen bromine (HBr);
wherein the gas includes not less than 50% of the nitrogen (N2) to a total flow rate of the gas.

According to the second aspect of the present invention, a metal oxide film may be unintentionally formed on a metal film formed from titanium etc. by removing a resist mask in an atmosphere including oxygen. Even in such a case, the selectivity with the insulating layer as an underlying layer can be sufficiently secured while the metal oxide film can be effectively removed by using the etching gas described above when etching the metal film.

In the second aspect of the invention, the first and the second insulating layer may be oxygen added silicon carbide (SiCO).

According to this aspect, the SiCO film is used as the first insulating layer and the second insulating layer. Because SiCO is a low-permittivity (low-k) material, it is favorable as an insulating film.

In the second aspect of the invention, the second insulating layer patterned by the resist mask may be a hard mask for the metal layer.

According to this aspect, the metal layer is etched using the second insulating layer, which is patterned, as a hard mask. The present invention may be applied even in such a case.

In the second aspect of the invention, the gas may include not greater than 80% of the nitrogen (N2) to the total flow rate of the gas.

It is practical in a standpoint of not significantly decreasing the etching rate in a case when the flow rate of the N2 gas is not greater than 80% as described in this aspect.

In accordance with a third aspect of the invention, a manufacturing method for a semiconductor device, the method including the steps of:
forming a gate insulating film, a metal film and a conductive film in this order on a semiconductor substrate, the metal film including titanium (Ti), tantalum (Ta), hafnium (Hf), zirconium (Zr) or aluminum (Al);
patterning the conductive film using a mask pattern in an atmosphere including oxygen (O2);
etching a part of the metal film that is not covered by the patterned conductive film in a mixed gas including nitrogen (N2) and any one of chlorine (Cl2) and hydrogen bromine (HBr);
wherein the mixed gas includes not less than 50% of the nitrogen (N2) to a total flow rate of the gas.

According to the third aspect of the present invention, a metal oxide film may be unintentionally formed on a metal film formed from titanium etc. by patterning the conductive film in an atmosphere including oxygen. Even in such as case, the selectivity with the insulating layer as an underlying layer can be sufficiently secured while the metal oxide can be effectively removed by using the etching gas described above when etching the metal film. .

In the third aspect of the invention, the gate insulating film may include silicon dioxide (SiO2).

In the third aspect of the invention, the conductive film may include polycrystal silicon.

In the third aspect of the invention, the mask pattern may include silicon nitride.

In the third aspect of the invention, the part of the metal film may be etched while the mask pattern remains on the patterned conductive film.

According to this aspect, the metal film can be etched using the etching gas described above even in a case when the mask pattern is remained on the conductive film.

In the third aspect of the invention, the mixed gas may include not greater than 80% of the nitrogen (N2) to the total flow rate of the mixed gas.

As described in the aspect, it is practical in a stand point of not significantly decreasing the etching rate when the flow rate of the N2 gas is not greater than 80%.

Figure 1 is a cross sectional view illustrating an example of an etching apparatus for performing the present invention. Figure 2 is a plain view illustrating a planar antenna member of the etching apparatus shown in figure 1. Figure 3 is a plain view illustrating a shower head section of the etching apparatus shown in figure 1. Figure 4 is a partial sectional view of a processing object for an etching method of the present invention. Figures 5A to 5D are process cross sectional views illustrating an embodiment of a manufacturing method for semiconductor devices pertaining to the present invention. Figures 6A to 6C are the process cross sectional views illustrating another embodiment of a manufacturing method for semiconductor devices pertaining to the present invention. Figures 7A to 7C are SEM photographs illustrating an evaluation result of the present invention. Figures 8A to 8B are diagrams illustrating characteristics of electron density and electron temperature by a RLSA device. Figures 9A to 9C are diagrams illustrating characteristics of disassociation degree to ion by a RLSA device. Figures 10A to 10D are process cross sectional views illustrating a manufacturing method for semiconductor devices pertaining to the background art.

Preferred embodiments of the present invention will hereinafter be explained with reference to the attached drawings. In addition, the same reference numbers are used to denote the same components and the explanation of those will be omitted.

(Configuration of Etching Apparatus)
Figure 1 is a cross sectional view illustrating an example of an etching apparatus for performing the present invention. Figure 2 is a plain view illustrating a planar antenna member of the etching apparatus shown in figure 1. Figure 3 is a plain view illustrating a shower head section of the etching apparatus shown in figure 1. Here, an etching apparatus having a planar antenna member of a Radial Line Slot Antenna (RLSA) system is explained as an example. In addition, the RLSA is a planar shaped antenna having a plurality of slots arranged in a way that an even microwave is generated. Therefore, the etching apparatus using the RLSA is a plasma etching apparatus, in which plasma is excited by emitting a microwave in a treatment container from the RLSA and ionizing the gas in a vacuum container by electrolysis of the microwave.

As shown in figure 1, in an etching apparatus 22 using plasma, a side wall and a bottom section are formed from a conductor, such as aluminum. Further, the etching apparatus 22 has a treatment container 24 entirely formed into a cylinder form, and inside of the container 24 is formed as a hermetical treatment space. Plasma is formed in this treatment space. This treatment container 24 itself is grounded.

Inside of the treatment container 24, a table 26 for placing a processing object, such as a wafer S, on the upper surface is stored. This table 26 is formed in a substantially flat disk shape, for example, by alumite treated aluminum etc. Further, the table 26 is standing from the bottom of the container through a column 28 formed from aluminum, for example.

On a side wall of this treatment container 24, a gate valve 30 is provided to open and close when transferring a wafer in and out from inside. Further, an exhaust outlet 32 is provided to a bottom portion of the treatment container 24. An exhaust path 38 provided with a pressure control value 34 and a vacuum pump 36 in series is connected to this exhaust outlet 32. This enables to vacuum inside of the treatment container 24 to a predetermined pressure.

On a ceiling section of the treatment container 24 is opened and a top plate 40 is provided hermetically on the opening through a sealing member 42, such as an O-ring. The top plate 40 is formed from a ceramic material, such as aluminum oxide (Al2O3), and having a permeability to microwaves. Further, the thickness of the top plate 40 is, for example, made to about 20 mm considering the pressure resistance.

A plasma forming unit 44 for generating plasma in the treatment container 24 is provided on an upper surface of this top plate 40. Concretely, this plasma forming unit 44 has a disk shaped planar antenna member 46 provided on the upper surface of the top plate 40, and a slow-wave structure 48 is provided on the planar antenna member 46. The slow-wave structure 48 has a high permittivity characteristic to shorten the wavelength of a microwave. The planar antenna member 46 is formed as a bottom plate of a waveguide box 50 and is provided so as to face the table 26 in the treatment container 24. The waveguide box 50 is formed from a conductive harrow cylinder shaped container, which covers the entire upper surface of the slow-wave structure 48. A cooling jacket 52 is provided on an upper portion of the wave guide box 50 for flowing a cooling medium to cool the waveguide box 50.

The peripheral sections of the waveguide box 50 and the planar antenna member 46 are both conducted to the treatment container 24. Further, an outer tube 54A of the coaxial waveguide 54 is connected to the upper center of the waveguide box50. An internal cable 54B inside of the coaxial waveguide 54 passes through a through hole on the center of the slow-wave structure 48 and connected to the center portion of the planar antenna member 46. And, this coaxial waveguide 54 is connected to a microwave generator 60 through a mode exchanger 56 and a waveguide 58 to transmit a microwave to the planar antenna member 46. The microwave generator 60 generates a microwave in a frequency of 2.45 GHz, for example. This frequency is not limited to 2.45 GHz and another frequency, such as 8.35 GHz, may be used. As the waveguide 58, a waveguide or coaxial waveguide with a circular or rectangular cross section may be used. And the slow-wave structure 48 is a member having high-permittivity characteristics provided to an upper surface side of the planar antenna member 46, which is also inside the waveguide box 50. Guide wavelength of the microwave is shortened due to the wavelength shortening effect of the slow-wave structure 48. As the slow-wave structure 48, aluminum nitride (AlN) may be used, for example.

The planar antenna member 46 is a disk formed from a conductive material in a diameter of 400 to 500 mm and a thickness of 1 to a few mm when a 300mm size wafer is used. Concretely, the planar antennal member 46 is formed from a copper plate or an aluminum plate with a silver-plated surface, for example. A plurality of microwave irradiation holes 62 formed from through holes in a long groove form are formed on the planar antenna member 46. The arrangement of these microwave irradiation holes 62 is not limited specifically, and may be arranged in, for example, a concentric circle form, a spiral form, or a radial form, or may be distributed evenly on the entire surface of the antenna member. As shown in figure 2, two microwave irradiation holes 62 are arranged in substantially a T-shape with slight spacing. A plurality of such a pair of microwave irradiation holes is arranged in a concentric circle form. By forming in this way, this planar antenna member 46 is in an antenna structure of RLSA system. Therefore, the features of high-density plasma and low-electron energy can be obtained.

A gas supply unit 64 is provided on the upper side of the placing table 26 to supply the gas necessary for etching into the treatment container 24. Concretely, the gas supply unit 64 has a shower head section 70 as shown in figure 3. In the shower head section 70, a gas channel 66 is formed in a lattice shape. Further, a plurality of gas ejection holes 68 are formed in the midstream of the gas channel 66. In such a case, each of both end sections of the gas channel 66 is connected to a gas channel 66a formed in a ring shape. In this way, gas can be sufficiently flown into each of the gas channel 66. In this shower head section 70, a plurality of openings 72 that are passing through in a vertical direction at a position where each of the gas channels 66 and 66a are avoided, are formed. And, the gas can be distributed in a vertical direction through the opening 72. The entire shower head section 70 is formed from quartz or aluminum etc. to maintain resistance in relation with the etching gas. However, quartz is preferred especially when a chorine series gas is used.

A gas passage 74, which extends to outside of the treatment container 24, is connected to the gas channel 66a. The gas passage 74 bifurcates into plural branches in the midstream. Each of the bifurcated paths is provided with a flow rate controller 78, such as a valve 76 and a mass flow controller, and then connected to each of the gas sources. Here, a mixed gas of chlorine (Cl2) gas and nitrogen (N2) gas is used as an etching gas in the embodiment. Concretely, as a gas source, Cl2 gas source 80A for storing Cl2 gas and N2 gas source 80B for stroing N2 gas are used. In addition, the similar effect can be obtained by using a hydrogen bromide (HBr) gas, instead of the Cl2 gas. Further, it may be formed such that providing the shower heads 70 as described above in two tiers above and below and flow the Cl2 gas or HBr gas to one side and N2 gas to the other.

On the lower side of the placing table 26, a plurality of, for example three, elevation pins 82, are provided to move the wafer S vertically when the wafer S is transferred(only two pins are shown in figure 1). The elevation pin 82 is moved vertically by an elevation rod 86. The elevation rod 86 is passing through the bottom section of the treatment container 24 through an expandable bellows 84. Further, a pin insertion hole 88 is formed on the table 26 to insert the elevation pin 82. The entire table 26 is formed from a heat resistance material, for example, ceramic, such as aluminum oxide (Al2O3). A heating unit 90 is provided in the ceramic. The heating unit 90 has a resistive heater 92 in a plate shape buried across substantially entire area of the table 26. The resistive heater 92 is connected to a heater power source 96 through a wiring 94 passing the column 28.

Further, a thin electrostatic chuck 100 having a conductor line 98, which is arranged internally, for example, in a net shape, is provided on an upper surface side of the table 26. By the electrostatic chuck 100, the wafer S placed on the table 26, accurately, on the electrostatic shuck 100, can be adsorbed by electrostatic adsorption force. The conductor line 98 of the electrostatic chuck 100 is connected to a direct current (DC) power source 104 through a wiring 102 to exercise the electrostatic suction. Further, a high-frequency power source for bias 106 is connected to this wiring 102 to apply a high-frequency power of, for example, 13.56 MHz to the conductor line 98 of the electrostatic chuck 100 when applying the etching.

Overall operation of the etching apparatus 22 is controlled by a control unit 108 formed from a microcomputer etc., for example. A computer program for executing this operation is stored in a memory medium 110, such as a hard disk, a floppy disk, a CD (Compact Disc), a DVD (Digital Versatile Disk), and a flash memory etc. Concretely, according to an instruction from this control unit 108, supply of each gas and flow rate control of each gas, supply of microwave and high-frequency and power control, and control of process temperature and process pressure are performed.

(Etching method)
An etching method using the etching apparatus 22 formed as described above will be explained with reference to figures 1 and 4. In addition, figure 4 is a partial cross sectional view of a wafer S, which is a processing object of an etching method pertaining to the present invention.

First, the wafer S is stored in the treatment container 24 by a transfer arm (not shown) through the gate valve 30. The wafer S is placed on a placing surface located on the upper surface of the table 26 by moving the elevation pin 82 up and down. Then, the wafer S is vacuumed and retained by the electrostatic chuck 100.

Here, the wafer S is in a state shown in figure 4, for example. Concretely, the wafer S is in a state that an oxygen added silicon carbide (SiCO) film 202 as a insulating layer, a titanium (Ti) film 204 as a metal film, and a titanium oxide (TiO) film 206 as a metal oxide film are formed in series on a silicon substrate (Si) 200 as a semiconductor substrate. The wafer S is treated in advance in a preceding process to bring the wafer S into the state described above. In addition, as an insulating layer, a silicon oxide (SiO2) film, a BPSG film (Boron Phosphorus Silicate Glass; silicon oxide film including boron and phosphorus), a PSG film (Phosphorus Silicate Glass; silicon oxide film including phosphorus) and a NSG film (Non-doped Silicate Glass: non-doped silicon oxide film) etc. may be used other than the SiCO film. Further, a metal film of zirconium (Zr), hafnium (Hf), aluminum (Al), and tantalum (Ta) that have the similar property as the titanium may be used as a metal film. This is because zirconium (Zr) and hafnium (Hf) are the elements belong to IV-A group, as titanium, and aluminum (Al) and tantalum (Ta) have been used as a wiring material, the same as titanium. The present invention may be applied to these metal films. Similarly, nitride of the metal film described above may be used as a metal film. Namely, the nitride of the metal film described above are titanium nitride (TiN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN) and aluminum nitride (AlN). Further, the titanium oxide film includes those formed from various chemical structures, such as, TiO2, Ti2O3, and Ti3O5. The same is true for other metal oxide film. The metal oxide film is a film including the same element as that included in a metal film. For example, when a metal film is tantalum (Ta), its metal oxide film is a tantalum oxide (Ta2O5). Further, the titanium oxide film 206 may be formed on the titanium film 204 unintentionally. The titanium oxide film 206 may be formed partially sparse on the titanium film 204. Further, a mask pattern formed from a photoresist etc. may be formed as necessary on the titanium film 204 or titanium oxide film 206.

Further, the etching object layer here is the titanium oxide film 206 as a metal oxide film and the titanium film 204 as a metal film. Namely, the titanium oxide film 206 and the titanium film 204 are etched continuously here.

The wafer S is maintained to a predetermined process temperature by the heating unit 90. Further, Cl2 gas and N2 gas are flown to the shower head section 70 from each of the gas sources 80A and 80B. The flown Cl2 gas and N2 gas are supplied to the treatment container 24 from the shower head section70. Here, the flow ratio of the N2 gas against the total flow rate of the etching gas is not less than 50 %. By including a high flow rate N2 gas of not less than 50%, the metal oxide film, such as titanium oxide film 206, can be removed efficiently by the reduction action of nitrogen ion. Further, the flow ratio of the N2 gas against the total flow rate of the etching gas is preferably not greater than 80%. This is because the etching rate is significantly decreased and it becomes not practical in the case when the flow rate of the N2 gas is greater than 80%. This is because Cl2 and HBr that contribute to etching are decreased in the case when the flow rate of the N2 gas is greater than 80%. In addition, the similar effect can be obtained using HBr gas instead of Cl2 gas. Further, the etching gas does not include oxygen (O2) in the embodiment. In a case when the etching object film is tungsten (W), it is necessary to add oxygen to the etching gas to increase selectivity with an underlying film. This is because W has a relatively low reactive property and the selectivity with an underlying layer can be increased by increasing the reactive property by adding oxygen to the etching gas. However, the etching object layer is the titanium film or a film having similar property in the embodiment. Because these films have higher reactive properties compared to W, the selectivity with an underlying layer can rather be secured without adding oxygen.

Further, inside of the treatment container 24 is maintained to a predetermined process pressure by controlling the pressure control valve 34. Here, the process pressure is more preferably maintained not greater than 10mTorr. This is because the nitrogen ion can be generated effectively. Concurrently, the microwave generator 60 of the plasma forming unit 44 is driven. The microwave generated by the microwave generator 60 is supplied to the planar antenna member 46 through the waveguide 58 and coaxial waveguide 54. Thereby, the microwave whose wavelength has been shorten by the slow-wave structure 48 is introduced to the treatment space. In this way, the etching process is performed using predetermined plasma by generating the plasma in the treatment space.

When the microwave is introduced in the treatment container 24 from the planar antenna member 46 in this way, each of Cl2 and N2 gases is plasmanized and activated by the microwave. TiO film 206 and Ti film 204, that are etching object layers formed on the wafer S, are etched and removed in order by the active species generated at this time. And each gas described above is flown downward while diffusing substantially evenly on the peripheral section of the placing table 26, and exhausted from the exhaust channel 38 through the exhaust outlet 32. At the time of etching process, a high-frequency for bias is applied to the conductor line 98 in the electrostatic chuck 100 from the high-frequency power source for bias 106. Thereby, the etching shape is retained as much as possible by drawing the active species etc. to the wafer surface with a favorable linearity.

In this way, a mixed gas of either one of Cl2 gas or HBr gas and N2 gas is used in the etching method pertaining to the present invention. Further, the flow ratio of the N2 gas against the total etching gas is not less than 50%. Therefore, the selectivity with the insulating layer as an underlying layer can be sufficiently secured while the metal oxide film, such as the titanium oxide film 206, as described above can be effectively removed. In another word, the surface roughness of the etching object layer due to the generation of micro mask as shown in figure 10D can be suppressed. Therefore, the metal film and metal oxide film can be sufficiently removed and the selectivity with the underlying insulating film can be secured according to the etching method pertaining to the present invention.

(Manufacturing method for semiconductor device)
Next, a manufacturing method for semiconductor devices using the etching method pertaining to the present invention described above will be explained with reference to figures 5A to 5D and 6A to 6C. In addition, since the items explained in the etching method pertaining to the present invention described above may also be applicable to the manufacturing method for semiconductor devices hereinafter explained, thus the explanation of the same items may be omitted.

First, an embodiment, in which the etching method of the present invention is applied to an interlayer insulating film forming process, will be explained using figures 5A to 5D.

Figure 5A illustrates a state where an interlayer insulating film is formed on a semiconductor substrate in the middle of the manufacturing process for semiconductor devices. Namely, it is in a state where a silicon dioxide (SiO2) film 302, a silicon carbonitride (SiCN) film 306, an oxygen added silicon carbide (SiCO) film 308, titanium (Ti) film 310 and an oxygen added silicon carbide (SiCO) film 312 are formed on the silicon (Si) substrate 300 in order. In the SiO2 film 302, a copper (Cu) interconnection 304 is buried, and a photoresist pattern 314a is formed on the oxygen added silicon carbide (SiCO) film 312. In the present invention, the silicon substrate 300 corresponds to the semiconductor substrate, the SiCO film 308 corresponds to the first insulating layer, the titanium film 310 corresponds to the metal layer, and the SiCO film 312 corresponds to the second insulating layer. Each component will be explained in detail below.

The silicon substrate 300 is a substrate formed from single crystal silicon. Further, the silicon substrate 300 may be a SOI (Silicon on Insulator) substrate, a SOS (Silicon on Sapphire) substrate or a SOQ (Silicon on Quartz) substrate, other than a bulk silicon substrate.

The Cu interconnection 304 is a so-called buried interconnection that is buried in the SiO2 film 302. The Cu interconnection 304 is electrically connected to an impurity area (not shown) on the silicon substrate 300 and each electrode etc. of transistors (not shown). Instead of the Cu interconnection 304, an interconnection formed from aluminum (Al) or tungsten (W) may be formed on the SiO2 film 302.

The SiCO film 308 is a film, which functions as an interlayer insulating film. Further, the SiCO film 312 is a film, which functions as a hard mask in a subsequent process. The reason for using the SiCO film for the fist insulating layer and the second insulating layer is that the SiCO is a low permittivity (low-k) material and is favorable for an interlayer insulating film. However, other than the SiCO film, a favorable insulating film, such as a silicon oxide (SiO2)film, BPSG film (Boron Phosphorus Silicate Glass; a silicon oxide film including boron and phosphorus), PSG film (Phosphorus Silicate Glass; silicon oxide film including phosphorus), and NSG film (Non-doped Silicate Glass; non-doped silicon oxide film) may be used for the first insulating layer and the second insulating layer arbitrarily.

A titanium film 310 is a film patterned in a subsequent process and functions as a hard mask. The titanium film 310 is an etching object layer in the embodiment. The reason for using the titanium film is that titanium has been used as a wiring material or a barrier metal and thus it is a material easy to use. However, other than the titanium film, a film formed from tantalum (Ta), hafnium (Hf), zilconium (Zr) and aluminum (Al) that have similar property as the titanium may be used as a metal film. Similarly, nitride of the metal layer described above may also be used as a metal film. Namely, the nitrides of the metal layer described above are; titanium nitride (TiN), tantalum nitride (TaN), hafnium nitrode (HfN), zirconium nitride, and aluminum nitride (AlN).

Next, the SiCO film 312 is etched using the photoresist pattern 314a as a mask. As a result, a SiCO film pattern 312a is formed as shown in figure 5B. The SiCO film pattern 312a functions as a hard mask for patterning the titanium film 310 on the lower layer. At this time, the titanium film 310 on the lower layer is exposed at a portion where the SiCO film 312 is removed.

Next, the photoresist pattern 314a is removed. Concretely, an ashing process is applied to the photoresist pattern 314a in an atmosphere including oxygen (O2). Thus, the photoresist pattern 314a is removed. However, oxygen and titanium react on the titanium film 310 surface during this ashing process. As a result, a titanium oxide (TiO) film 316 is formed inevitably on the titanium film 310 as shown in figure 5C. This titanium oxide film is originally an unnecessary film and is formed unintentionally. Further, the titanium oxide film includes those formed from various chemical structures, such as TiO2, Ti2O3, Ti3O5 etc. The same is true for other metal oxide films. Further, the metal oxide film is a film including the same element included in the metal film. For example, in a case when the metal film is tantalum (Ta), its metal oxide film is tantalum oxide (Ta2O5). Further, the titanium oxide film 316 may be formed partially sparse on the titanium film 310.

Next, a portion of the titanium film 310 is removed by etching using the SiCO film pattern 312a as a mask. At this time, the titanium oxide film 316 can be removed simultaneously by applying the etching method pertaining to the present invention. Namely, the etching gas is a mixed gas of either one of the Cl2 gas or HBr gas and N2 gas. Further, the flow ratio of the N2 gas against the total etching gas is not less than 50%. By using such a condition, the metal oxide film, such as the titanium oxide film 316, can be removed effectively while the selectivity with the insulating film as an underlying layer can be sufficiently secured. Further, the selectivity with the SiCO film pattern 312a, which is a mask, can also be secured sufficiently. Further, it is favorable that the flow ratio of the N2 gas against the total etching gas is not greater than 80%.

As a result, as shown in Fig. 5D, the patterning is applied to the titanium film 310 and the titanium film 310 becomes a titanium film pattern 310a. Further, the surface area of the SiCO film 308 that is not covered by the SiCO film pattern 312a and the titanium film pattern 310a is exposed. Namely, a desired etching form is obtained.

Thereafter, the substrate is diced into semiconductor chips after a desired multilayer interconnection is formed. Each of the semiconductor chips is sealed with resin and completed as a semiconductor device.

In this way, the etching method pertaining to the present invention described above is applied when the pattering is performed to the titanium film 310 by the etching. Namely, a mixed gas of either one of Cl2 gas or HBr gas, and N2 gas is used as the etching gas. Further, the flow ratio of the N2 gas against the total etching gas is not less than 50 %. Therefore, the metal oxide film, such as the titanium oxide film 316, can be removed effectively while the selectivity with the insulating film, which is an underlying layer, can be sufficiently secured. In other words, the surface roughness of the etching object layer due to the generation of micro mask as shown in figure 10D can be suppressed. Therefore, according to the etching method pertaining to the present invention, the metal film and metal oxide film can be sufficiently removed and the selectivity with the underlying insulating film can be secured.

Next, an embodiment of applying the etching method pertaining to the present invention to a gate electrode forming process will be explained with reference to figures 6A to 6C.

Figure 6A illustrates a state where a gate electrode of a transistor is formed on a semiconductor substrate in a mid-course of the manufacturing process for semiconductor devices. Namely, it is in a state where a silicon dioxide (SiO2) film 402, a titanium (Ti) film 404, a poly silicon (Poly-Si) film 406, and a silicon nitride Si3N4) film pattern 408a are formed on a silicon (Si) substrate 400 in order. In the present invention, the silicon substrate 400 corresponds to the semiconductor substrate, the silicon dioxide film 402 corresponds to the gate insulating film, the titanium film 404 corresponds to the metal film, the poly-silicon film 406 corresponds to the conductive film, and the silicon nitride film pattern 408a corresponds to the mask pattern respectively. Each element will be explained in detailed below.

The silicon substrate 400 is a substrate formed from single crystal silicon. Further, the silicon substrate 400 may also be a SOI (Silicon on Insulator) substrate, a SOS (Silicon on Sapphire) substrate or a SOQ (Silicon on Quartz) substrate other than a bulk silicon substrate.

The silicon dioxide film 402 becomes a film, which functions as a gate insulating film of the transistor by applying the patterning in a subsequent process. Other than the silicon dioxide, an oxynitride film, in which nitrogen in introduced in the film, or a high-k material, such as aluminum oxide (Al2O3), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zirconium oxide (ZrO3), may be used as the gate insulating film.

The titanium film 404 is a film, which is patterned in a subsequent process and becomes a portion of the gate electrode of the transistor. By using the titanium film as a portion of the gate electrode, a poly-metal gate electro can be formed. Further, the titanium film 404 is an etching object layer in the embodiment. However, a metal film of zirconium (Zr), hafnium (Hf), aluminum (Al), and tantalum (Ta) may be used as a metal film. This is because zirconium (Zr) and hafnium (Hf) are the elements belong to IV-A group, as titanium, and aluminum and tantalum have been used as a wiring material, the same as titanium. The present invention may be applied to these metal films. Similarly, nitride of the metal film described above may be used as a metal film. That is, the nitrides of the metal film described above are, titanium nitride (TiN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN) and aluminum nitride (AlN).

The poly-silicon film 406 is a film, which becomes a portion of the gate electrode of the transistor by patterning in a subsequent process. Impurities, such as borom (B) and phosphorus (P) etc. may be introduced in the poli-silicon film 406. A silicide film, such as tungusten (W) and titanium (Ti) etc., may be stacked on the poly-silicon film 406.

The silicon nitride film pattern 408a is formed by etching the silicon nitride film in a desired pattern. The silicon nitride film pattern 408a functions as a hard mask pattern for patterning the poly-silicon film 406 and the titanium film 404.

Next, the poly-silicon film 406 is etched using the silicon nitride film pattern 408 as a mask. This etching is a dry etching process using a mixed gas of hydrogen bromide (HBr) and oxygen (O2). As a result, a poly-silicon film pattern 406a is formed as shown in figure 6B. However, oxygen included in the etching gas reacts with titanium on the titanium film 404 surface during this etching. As a result, a titanium oxide (TiO) film 410 is also formed inevitably on the titanium film 404 as shown in figure 6B. This titanium oxide film is originally an unnecessary film and is formed unintentionally. Further, the titanium oxide film includes those formed from various chemical structures, such as TiO2, Ti2O3, Ti3O5 etc. The same is true for other metal oxide film. Further, the metal oxide film is a film including the same element included in the metal film. For example, in a case when the metal film is tantalium (Ta), its metal oxide film is tantalum oxide (Ta2O5). Further, the titanium oxide film 410 may be formed partially sparse on the titanium film 404.

Next, a portion of the titanium film 404 is removed by etching using the silicon nitride film pattern 408a and the poly-silicon film pattern 406a as a mask. In other words, a portion of the titanium film 404 is etched while the silicon nitride film pattern 408a is remained on the poly-silicon film pattern 406a. At this time, the titanium oxide film 410 may be removed simultaneously by applying the etching method pertaining to the present invention. Namely, the etching gas is a mixed gas of either one of the Cl2 gas or HBr gas, and N2 gas. Further, the flow ratio of the N2 gas against the total etching gas is not less than 50%. By using such a condition, the metal oxide film, such as the titanium oxide film 410, can be effectively removed while the selectivity with the insulating film, which is an underlying layer, can be sufficiently secured. Here, the selectivity with the silicon nitride film pattern 408a, which is a mask, can also be secured sufficiently. Further, it is favorable that the flow ratio of the N2 gas against the total etching as is not greater than 80%.

As a result, the surface area of the SiO2 film 402 that is not covered by the poly-silicon pattern 406a is exposed as shown in figure 6C. Further, the titanium film 404 is patterned and becomes a titanium film pattern 404a. That is, a desired etching form is obtained. Based on this, a poly-metal gate electrode formed from a stacking structure of the titanium film pattern 404a and the polysilicon film pattern 406a is formed. The poly-metal gate electrode has an advantage of suppressing the forming of a depleted layer, which becomes a problem in a poly-Si gate electrode.

Thereafter, the substrate is diced into semiconductor chips after the patterning of the gate insulating film and the forming of multilayer interconnection etc. are performed. Each of the semiconductor chips is sealed with resin and completed as a semiconductor device.

In this way, the etching method pertaining to the present invention described above is applied when the pattering is performed to the titanium film 404 by the etching. Namely, a mixed gas of either one of Cl2 gas or HBr gas, and N2 gas is used as the etching gas. Further, the flow ratio of the N2 gas against the total etching gas is not less than 50 %. Therefore, the metal oxide film, such as the titanium oxide film 316, can be effectively removed while the selectivity with the insulating film, which is an underlying layer, can be sufficiently secured. In other words, the surface roughness of the etching object layer due to the generation of micro mask as shown in figure 10D can be suppressed. Therefore, according to the etching method pertaining to the present invention, the metal film and the metal oxide film can be sufficiently removed and the selectivity with the underlying insulating film can be sufficiently secured.

(Evaluation Result)
Next, an evaluation result of the present invention will be explained with reference to figures 7A to 7C.

Figures 7A to 7C are SEM photographs illustrating the conditions of etching object layers in cases when a conventional technique is applied to a processing object and when the present invention is applied to a processing object.

Figure 7A illustrates an initial state of the processing object. Namely, the titanium film 504 is formed on the insulating film 502 formed from a low-K material. The silicon nitride (Si3N4) film pattern 508a is formed on the titanium film 504. Further, the titanium oxide (TiO) film 506 is formed on the area of the titanium film 504 that is not covered by the silicon nitride film pattern 508a. The titanium film 504 and the titanium oxide film 506 are the etching object layers.

Figure 7B illustrates a state after applying an etching method pertaining to the conventional technique to the processing object in the initial state. Namely, the processing object in the initial state is etched by using a mixed gas of chlorine (Cl2) and argon (Ar). The flow rate of the chlorine is 40sccm and the flow rate of the Argon is 200 sccm. It can be understood from the figure 7B that the surface of the insulating film 502 is rough and the micro mask is generated.

Figure 7C illustrates a state after applying the etching method pertaining to the present invention to the processing object in the initial state. Namely, the processing object in the initial state is etched by using a mixed gas of chlorine (Cl2) and nitrogen (N2). The flow rate of the chlorine is 40sccm and the flow rate of the nitrogen is 200 sccm. The nitrogen content against the total flow rate of the mixed gas is not less than 50%. It can be understood from the figure 7C that the surface of the insulating film 502 is smooth and the micro mask is not generated.

(Characteristics of RLSA apparatus)
Next, it will be explained with reference to figures 8A to 8B and figures 9A to 9C that the etching apparatus using a planar antenna member of RLSA method (hereinafter referred as RLSA apparatus) is favorable for performing the etching method pertaining to the present invention.

Figures 8A and 8B are diagrams comparing the characteristics of a RLSA apparatus and an ICP (Induced Coupled Plasma) apparatus, which is a type of a plasma etching apparatus. Here, the comparisons of electron density and electron temperatures are concretely illustrated.

Figure 8A illustrates a comparison of electron densities. As it can be seen from figure 8A that the RLSA apparatus shows a higher electron density at the same top power.

Figure 8B illustrates a comparison of electron temperatures. As it can be seen from figure 8B that the RLSA apparatus shows a lower electron temperature at the same top power.

Therefore, it can be understood that the RLSA apparatus can generate a microwave excited plasma of a high electron density and a low electron temperature. This indicates that the RLSA apparatus is superior in the controllability of the etching form.

Figures 9A and 9B are diagrams illustrating a comparison of the characteristics of the RLSA apparatus and the ICP apparatus. Here, the comparison of disassociation degree of the etching gas to ion is concretely illustrated.

Figures 9A is a result of OES (Optical Emission Spectroscopy). As it can be understood from figure that the RLSA apparatus has higher relative intensities of ion (N2+, Cl2+, Cl+) compared to the ICP.

Figures 9B and 9C illustrate the top power dependence property of ion/radial peak ratio in the RLSA apparatus and the ICP apparatus by the OES.

Figure 9B illustrates a ratio of N2 + (ion) against the N2 (radical). And the RLSA apparatus shows a higher ion ratio at the same power.

Figure 9C illustrating a ratio of Cl2 + (ion) against the Cl2 (radical). And the RLSA apparatus shows a higher ion ratio at the same power.

Therefore, it can be understood that the RLSA apparatus has a high disassociation degree to the ion of the etching gas. Based on this, it can also be understood that the nitrogen of a high flow rate can be added to the etching gas according to the RLSA apparatus.

The preferred embodiments of the present invention have been explained with reference to the attached figures. Needless to say, the present invention is not limited to those embodiments. It is obvious that one skilled in the art can easily make various changes and modifications within the scope of the claims.

For example, examples of applying the present invention to the interlayer insulating film forming process and the gate electrode forming process have been explained in the preferred embodiments. However, the present invention can be applied to other processes.

Further, an example of using the RLSA apparatus as an etching apparatus is explained in the preferred embodiment. However, the other apparatuses may be used.

Claims (19)

  1. An etching method for a metal film formed on an insulating film and a metal oxide film formed on the metal film, the etching method comprising the step of:
    etching the metal film and the metal oxide film in a gas including nitrogen (N2) and any one of chlorine (Cl2) and hydrogen bromine (HBr);
    wherein the metal film is selected from the group consisting of titanium (Ti), tantalum (Ta), hafnium (Hf), zirconium (Zr) and aluminum (Al); and
    the gas includes not less than 50% of the nitrogen (N2) to a total flow rate of the gas.
  2. The etching method of claim 1, wherein the metal film is a nitride of the metal.
  3. The etching method of claim 1, wherein the gas includes nitrogen (N2), whose flow ratio to the gas is not greater than 80%.
  4. The etching method of claim 1, wherein the gas does not include oxygen (O2).
  5. The etching method of claim 1, wherein the metal oxide film includes the same element as included in the metal film.
  6. The etching method of claim 1, wherein the insulating film constitutes an interlayer insulating film or a gate insulating film.
  7. The etching method of claim 1, wherein the insulating film is oxygen added silicon carbide (SiCO).
  8. The etching method of claim 1, wherein the metal film and the metal oxide film are etched with the gas changed into plasma by a microwave radiated from a Radial Line Slot Antenna.
  9. The etching method of claim 1, wherein the metal film and the metal oxide film are etched at a pressure of not greater than 10 mTorr.
  10. A manufacturing method for a semiconductor device, the method comprising the steps of:
    forming a first insulating layer, a metal layer and a second insulating layer in this order on a semiconductor substrate, the metal layer including titanium (Ti), tantalum (Ta), hafnium (Hf), zirconium (Zr) or aluminum (Al);
    patterning the second insulating layer using a resist mask;
    removing the resist mask in an atmosphere including oxygen (O2);
    etching the metal layer in a gas including nitrogen (N2) and any one of chlorine (Cl2) and hydrogen bromine (HBr);
    wherein the gas includes not less than 50% of the nitrogen (N2) to a total flow rate of the gas.
  11. The manufacturing method of claim 10, wherein the first and the second insulating layers are structured by oxygen added silicon carbide (SiCO).
  12. The manufacturing method of claim 10, wherein the second insulating layer patterned by the resist mask functions as a hard mask for the metal layer.
  13. The manufacturing method of claim 10, wherein the gas includes not greater than 80% of the nitrogen (N2) to the total flow rate of the gas.
  14. A manufacturing method for a semiconductor device, the method comprising the steps of:
    forming a gate insulating film, a metal film and a conductive film in this order on a semiconductor substrate, the metal film including titanium (Ti), tantalum (Ta), hafnium (Hf), zirconium (Zr) or aluminum (Al);
    patterning the conductive film using a mask pattern in an atmosphere including oxygen (O2);
    etching a part of the metal film that is not covered by the patterned conductive film in a mixed gas including nitrogen (N2) and any one of chlorine (Cl2) and hydrogen bromine (HBr);
    wherein the mixed gas includes not less than 50% of the nitrogen (N2) to a total flow rate of the gas.
  15. The manufacturing method of claim 14, wherein the gate insulating film includes silicon dioxide (SiO2).
  16. The manufacturing method of claim 14, wherein the conductive film includes polycrystal silicon.
  17. The manufacturing method of claim 14, wherein the mask pattern includes silicon nitride.
  18. The manufacturing method of claim 14, wherein the part of the metal film is etched while the mask pattern remains on the patterned conductive film.
  19. The manufacturing method of claim 14, wherein the mixed gas includes not greater than 80% of the nitrogen (N2) to the total flow rate of the mixed gas.
PCT/JP2008/003946 2007-12-28 2008-12-25 Etching method for metal film and metal oxide film, and manufacturing method for semiconductor device WO2009084194A1 (en)

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