CN113614900A - 具有导电电极的陶瓷喷头 - Google Patents
具有导电电极的陶瓷喷头 Download PDFInfo
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- CN113614900A CN113614900A CN201980088573.5A CN201980088573A CN113614900A CN 113614900 A CN113614900 A CN 113614900A CN 201980088573 A CN201980088573 A CN 201980088573A CN 113614900 A CN113614900 A CN 113614900A
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
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- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
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- H01J37/32431—Constructional details of the reactor
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
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- C23C16/34—Nitrides
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45563—Gas nozzles
- C23C16/45574—Nozzles for more than one gas
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
- C23C16/4581—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber characterised by material of construction or surface finish of the means for supporting the substrate
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3244—Gas supply means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
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Abstract
示例性半导体处理腔室喷头可包括介电板,其特征在于第一表面和与第一表面相对的第二表面。介电板可界定穿过介电板的多个孔。介电板可在介电板的第一表面中界定第一环形通道,且第一环形通道可围绕多个孔延伸。介电板可在介电板的第一表面中界定第二环形通道。第二环形通道可以从第一环形通道径向向外形成。喷头还可包括嵌入在介电板内并围绕多个孔延伸而不会被孔暴露的导电材料。导电材料可在第二环形通道处暴露。
Description
相关申请的交叉引用
本申请要求2019年1月11日提交的美国专利申请第16/245,698号的优先权的权益,其内容通过引用其全文的方式结合于此以用于所有目的。
技术领域
本技术涉及半导体工艺和装备。更具体地,本技术涉及可用作系统电极的陶瓷腔室部件。
背景技术
通过在基板表面上产生复杂图案化的材料层的工艺使得集成电路成为可能。在基板上产生图案化材料需要受控的方法以移除暴露的材料。化学蚀刻用于多种目的,包括将光刻胶中的图案转移到下面的层中、减薄层或减薄表面上已经存在的特征的横向尺寸。通常期望具有比另一种材料更快地蚀刻一种材料的蚀刻工艺,从而促进(例如)图案转移工艺。据说这种蚀刻工艺对第一材料是选择性的。由于材料、电路和工艺的多样性,已经开发出对多种材料具有选择性的蚀刻工艺。
基于工艺中使用的材料,蚀刻工艺可称为湿法或干法。例如,与其他介电质和材料相比,湿法蚀刻可优先移除一些氧化物介电质。但是,湿法工艺可能难以穿透某些受约束的沟槽,并且有时可能会使残留材料变形。在基板处理区域内形成的等离子体中产生的干法蚀刻可穿透更多受约束的沟槽,并表现出较小的精细残留结构变形。然而,等离子体可能会经由在它们放电时所产生的电弧和经由轰击和蚀刻系统部件而损坏基板或腔室部件。
因此,存在有可用以生产高品质器件和结构的改进的系统和方法的需求。这些和其他需求由本技术解决。
发明内容
示例性半导体处理腔室喷头可包括介电板,其特征在于第一表面和与第一表面相对的第二表面。介电板可界定穿过介电板的多个孔。介电板可在介电板的第一表面中界定第一环形通道,且第一环形通道可围绕多个孔延伸。介电板可在介电板的第一表面中界定第二环形通道。第二环形通道可从第一环形通道径向向外形成。喷头还可包括嵌入在介电板内并围绕多个孔延伸而不会被孔暴露的导电材料。导电材料可在第二环形通道处暴露。
在一些实施例中,第二环形通道可在介电板内界定到比第一环形通道更大的深度。导电材料可在介电板内以大于第一环形通道的深度的深度延伸通过介电板。导电材料可被第二环形通道暴露而不被第一环形通道暴露。喷头还可包括安置于第二环形通道内且配置成将导电材料用作电极的RF垫圈。喷头还可包括安置于第一环形通道内的弹性体元件。导电材料可包括跨由第一环形通道界定的喷头的内部区域而延伸的箔或网。导电材料可包括从喷头的内部区域延伸到第二环形通道的多个突片(tab)。
本技术的一些实施例还可涵盖半导体处理腔室喷头,所述半导体处理腔室喷头可包括板,所述板包括第一介电材料。板的特征在于第一表面和与第一表面相对的第二表面。板可界定穿过板的多个孔。喷头可包括设置在板的第一表面上的导电材料,且导电材料可保持在距多个孔中的每个孔的第一径向距离处。喷头还可包括涂层,涂层包括第二介电材料。涂层可跨导电材料延伸,且涂层可保持在距多个孔中的每个孔的第二径向距离处。第二径向距离可小于第一径向距离。
在一些实施例中,导电材料可在喷头的径向边缘处暴露,以提供喷头的电耦合。喷头可在板的第一表面中在多个孔的径向外侧,且在暴露的导电材料的径向内侧在喷头的径向边缘处界定环形通道。涂层可为或包括多层涂层。第一介电材料和第二介电材料可为或包括不同的材料。导电材料可为或包括穿孔的箔或网。
本技术的一些实施例可涵盖具有盖和基板支撑件的半导体处理腔室。腔室还可包括位于盖和基板支撑件之间的喷头。第一等离子体区域可界定在喷头和盖之间,且第二等离子体区域可界定在喷头和基板支撑件之间。盖和基板支撑件可各自与产生等离子体的功率源耦合。喷头可与接地电耦合,且喷头可包括板,所述板包括第一介电材料。板的特征在于第一表面和与第一表面相对的第二表面。板可界定穿过板的多个孔,且喷头可在板的第一表面中在多个孔的径向外侧界定第一环形通道。喷头还可包括与板结合的导电材料。导电材料的暴露可限制在第一环形通道的径向外侧的区域。
在一些实施例中,板可在板的第一表面中界定第二环形通道。第二环形通道可形成为从第一环形通道径向向外,且导电材料可被嵌入板内并被第二环形通道暴露。第二环形通道可在板内界定到比第一环形通道更大的深度。导电材料可以在板内以比第一环形通道的深度要大的深度延伸通过板。导电材料可被第二环形通道暴露而不被第一环形通道暴露。处理腔室还可包括安置于第二环形通道内并被配置成将导电材料电耦合至接地的RF垫圈。腔室还可包括安置于第一环形通道内的弹性体元件。导电材料可设置在板的第一表面上,且可将导电材料保持在距多个孔中的每个孔的第一径向距离处。喷头还可包括可为第二介电材料的涂层。涂层可跨导电材料延伸,且涂层可保持在距多个孔中的每个孔的第二径向距离处。第二径向距离可小于第一径向距离。涂层可为或包括多层涂层。导电材料可为或包括穿孔的箔或网。
这样的技术可提供相较于常规系统和技术的许多益处。例如,在等离子体处理期间,喷头可用作接地电极。另外,喷头可在等离子体形成期间限制用等离子体物种对金属的轰击。结合以下的具体实施方式和附图来更详细地描述这些和其他实施例及它们的许多优点和特征。
附图说明
通过参考说明书的其余部分和附图,可实现对所公开的技术的本质和优点的进一步理解。
图1示出了根据本技术的一些实施例的示例性处理系统的一个实施例的顶部平面图。
图2A示出了根据本技术的一些实施例的示例性处理腔室的示意性横截面图。
图2B示出了根据本技术的一些实施例的图2A所示的处理腔室的一部分的详细示意图。
图3示出了根据本技术的一些实施例的示例性喷头的底部平面图。
图4示出了根据本技术的一些实施例的方法中的示例性操作。
图5A示出了根据本技术的一些实施例的示例性喷头的示意性部分顶部平面图。
图5B示出了根据本技术的一些实施例的示例性喷头的示意性部分横截面图。
图6示出了根据本技术的一些实施例的方法中的示例性操作。
图7A至图7C示出了根据本技术的一些实施例的示例性喷头的示意性顶部平面图。
图7D示出了根据本技术的一些实施例的示例性喷头的示意性部分横截面图。
图8示出了根据本技术的一些实施例的方法中的示例性操作。
图9A至图9B示出了根据本技术的一些实施例的示例性喷头的示意性顶部平面图。
包括几个附图作为示意图。应当理解附图仅用于说明目的,且除非特别说明是按比例绘制的,否则不应视为按比例绘制的。另外,作为示意图,提供了附图以帮助理解,并且与实际表示相比,附图可能不包括所有方面或信息,且出于说明目的,附图可能包括额外的或夸大的材料。
在所附的附图中,相似的部件和/或特征可具有相同的附图标记。此外,相同类型的各种部件可通过在附图标记后面加上一个在相似部件之间进行区分的字母来进行区分。若在说明书中仅使用第一元件符号,则描述适用于具有相同第一元件符号的任何类似部件,而与字母无关。
具体实施方式
干法蚀刻处理可在处理区域的某些区域内产生等离子体物种。不同的等离子体区域可包括本地区域或邻近基板表面的区域、以及远程区域(诸如在处理腔室的流体耦合但物理上分开的部分中)。许多处理腔室包括许多不同的材料部件,所述材料部件界定了腔室内的内部空间。例如,可并入金属部件以用作腔室内的电极,诸如用于电容耦合等离子体操作。另外,可包括介电材料以分开电极或用作材料涂层。
可用作等离子体电极或可更一般地辅助等离子体物种的流动的喷头可接触和/或以其他方式暴露于等离子体流出物。许多蚀刻剂材料可能会与这些电极相互作用,从而剥落涂层或轰击暴露的区域。作为一个非限制性示例,在某些本地或晶片级等离子体操作中,喷头或歧管可用作接地电极,以在基板处理区域中产生等离子体,其中基板支撑件或某些其他部件可用作产生等离子体的电极。用作接地电极的喷头可能受到等离子体物种的轰击,这在暴露的金属上可能导致金属物种污染基板,这可能导致操作期间发生短路。因此,一些常规设计可例行地更换喷头或用可抵抗轰击的材料涂布喷头。
在某些常规设计中使用的涂层可能足以抵抗轰击或侵蚀,但可能不足以抵抗与等离子体流出物物种的化学反应,这可能导致涂层腐蚀。因此,这些部件可能例行地需要重新涂布或更换。此外,许多喷头包括许多孔,用于通过腔室输送物种。若涂层不能完全涂布每个孔侧壁和所有暴露的表面,则可远程产生的等离子体物种可能引起与本地产生的等离子体物种相同的问题。此外,若孔不够小,则本地等离子体可能会通过这些孔泄漏,从而损坏其他上游部件。然而,当形成足够小的孔时,许多视线涂布装置不能在孔内提供完整的涂层。因此,许多常规的喷头不能长期、稳定地用作电极。
本技术通过将介电质或陶瓷材料用于喷头而克服了所述问题。通常,陶瓷材料由于其介电性质而不能用作电极。本技术在陶瓷内结合了一种或多种导电材料,这允许部件用作电极。导电材料可包括在陶瓷或介电材料内在暴露于等离子体的区域中,这可防止上述污染或轰击问题。通过将特定的材料用于部件,可制造出具有减小孔尺寸的喷头,其可完全覆盖导电材料。另外,材料可抵抗等离子体暴露引起的侵蚀和/或腐蚀。
尽管其余公开内容将例行地利用所公开的技术来识别具体的蚀刻工艺,但是将容易理解系统和方法同样适用于可能在所描述的腔室或其他腔室中发生的沉积和清洁工艺以及腔室。因此,技术不应被视为仅限制于与任何特定蚀刻工艺或腔室一起使用的技术。此外,尽管描述了示例性腔室以为本技术提供基础,但是应该理解本技术实际上可应用于可允许所描述的操作的任何半导体处理腔室。
图1示出了根据实施例的沉积、蚀刻、烘烤和固化腔室的处理系统100的一个实施例的顶部平面图。在附图中,一对前开式标准舱(FOUP)102供应具有各种尺寸的基板,所述基板在放置到基板处理腔室108a-108f中的一个中之前,由机械臂104接收并放置在低压保持区域106中,基板处理腔室108a-108f定位在串联(tandem)部分109a-c中。第二机械臂110可用以将基板晶片从保持区域106传送到基板处理腔室108a-f并返回。每个基板处理腔室108a-f可装配成执行许多基板处理操作,除了循环层沉积(CLD)、原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)、蚀刻、预清洗、除气、定向和其他基板工艺之外,还包括在本文所述的干法蚀刻工艺。
基板处理腔室108a-f可包括一个或多个系统部件,用于在基板晶片上沉积、退火、固化和/或蚀刻介电膜。在一种配置中,可使用两对处理腔室(例如,108c-d和108e-f)以在基板上沉积介电材料,且可使用第三对处理腔室(例如,108a-b)以蚀刻沉积的介电质。在另一种配置中,所有三对腔室(例如,108a-f)可配置成蚀刻基板上的介电膜。所描述的工艺中的任一个或多个可在与不同实施例中所示的制造系统分离的(多个)腔室中实施。将理解系统100构想到用于介电膜的沉积、蚀刻、退火和固化腔室的其他配置。
图2A示出了示例性处理腔室系统200的横截面图,处理腔室系统200在处理腔室内具有分隔的等离子体产生区域。在膜蚀刻(例如,氮化钛、氮化钽、钨、硅、多晶硅、氧化硅、氮化硅、氮氧化硅、碳氧化硅等)期间,工艺气体可通过气体入口组件205流入第一等离子体区域215中。远程等离子体系统(RPS)201可任选地包括在系统中,且可处理第一气体,第一气体接着行进通过气体入口组件205。入口组件205可包括两个或更多个不同的气体供应通道,其中第二通道(未示出)可绕过RPS 201(若有的话)。
示出了并可根据实施例分别包括冷却板203、面板217、离子抑制器223、喷头225和其上设置有基板255的基板支撑件265。在一些实施例中,冷却板和面板可用作盖组件的方面。基座265可具有热交换通道,热交换流体流经热交换通道以控制基板的温度,热交换流体可在处理操作期间被操作以加热和/或冷却基板或晶片。基座265的晶片支撑盘(其可包括铝、陶瓷或其组合)也可以使用嵌入式电阻加热器元件而被电阻加热,以实现相对较高的温度,诸如从高达或为约100℃到高于或为约1100℃。
面板217可为金字塔形的、圆锥形的、或具有从狭窄的顶部扩展到宽广的底部的另一类似结构。如图所示,面板217可另外是平坦的,并包括用以分配处理气体的多个穿通通道。取决于RPS 201的使用,产生等离子体的气体和/或激发等离子体的物种可穿过在面板217中的多个孔,如图2B所示,用于更均匀地输送到第一等离子体区域215中。
示例性配置可包括使气体入口组件205打开到通过面板217而与第一等离子体区域215隔开的气体供应区域258中,使得气体/物种流过面板217中的孔进入第一等离子体区域215中。可选择结构和操作特征以防止等离子体从第一等离子体区域215大量回流到供应区域258、气体入口组件205和流体供应系统210中。面板217(或腔室的导电顶部)和喷头225示出具有位于特征之间的绝缘环220,这允许相对于喷头225和/或离子抑制器223将AC电位施加到面板217。绝缘环220可位于面板217和喷头225和/或离子抑制器223之间,使得能够在第一等离子体区域中形成电容耦合等离子体(CCP)。挡板(未示出)可另外位于第一等离子体区域215中,或者以其他方式与气体入口组件205耦合,以影响流体通过气体入口组件205进入区域中的流动。
离子抑制器223可包括板或其他几何形状,其在整个结构中界定了多个孔,所述多个孔配置成抑制离子带电物种从第一等离子体区域215迁移出来,同时允许不带电的中性或自由基物种通过离子抑制器223进入在抑制器与喷头之间的活化气体输送区域。在实施例中,离子抑制器223可包括具有各种孔配置的穿孔板。所述不带电荷的物种可包括高反应性物种,其以较低反应性的载气通过孔而运输。如上所述,可减少离子物种通过孔的迁移,且在某些情况下可完全抑制。控制通过离子抑制器223的离子物种的量可有利地提供对与下面的晶片基板接触的气体混合物的增加控制,这继而可增加对气体混合物的沉积和/或蚀刻特性的控制。例如,调整气体混合物的离子浓度可显著改变其蚀刻选择性,如,SiNx:SiOx蚀刻率、Si:SiOx蚀刻率等。在执行沉积的替代实施例中,它也可改变用于介电材料的从保形到可流动类型的沉积的平衡。
离子抑制器223中的多个孔可配置成控制活化气体(即,离子,自由基和/或中性物种)穿过离子抑制器223。例如,可控制孔的深宽比、或孔的直径比长度、和/或孔的几何形状,以减少通过离子抑制器223的活性气体中的带电离子物种的流动。离子抑制器223中的孔可以包括面对等离子体激发区域215的锥形部分和面对喷头225的圆柱形部分。圆柱形部分可经调整形状和尺寸以控制通到喷头225的离子物种的流动。也可将可调节的电偏压施加到离子抑制器223上,作为控制离子物种流过抑制器的附加手段。
离子抑制器223可起到减少或消除从等离子体产生区域行进到基板的离子带电物种的量的作用。不带电的中性和自由基物种仍可通过离子抑制器中的开口与基板反应。应当注意在实施例中可不执行完全消除围绕基板的反应区域中的离子带电物种。在某些情况下,离子物种旨在到达基板以便执行蚀刻和/或沉积工艺。在这些情况下,离子抑制器可以帮助将反应区域中离子物种的浓度控制在有助于工艺的水平。
喷头225与离子抑制器223结合可允许存在于第一等离子体区域215中的等离子体避免直接激发在基板处理区域233中的气体,同时仍允许被激发的物种从腔室等离子体区域215行进到基板处理区域233中。以此方式,腔室可配置成防止等离子体接触正被蚀刻的基板255。这可有利地保护在基板上图案化的各种复杂结构和膜,若它们直接与所产生的等离子体接触,则它们可能被损坏、移位或以其他方式翘曲。另外,当允许等离子体接触基板或接近基板水平时,氧化物物种蚀刻的速率可增加。因此,若材料的暴露区域是氧化物,则可通过使等离子体远离基板来进一步保护此材料。
处理系统可进一步包括与处理腔室电耦合的功率源240,以向面板217、离子抑制器223、喷头225和/或基座265提供电功率,以在第一等离子体区域215或处理区域233中产生等离子体。取决于所执行的工艺,功率供应器可配置成向腔室输送可调节的功率量。所述配置可允许在正在执行的工艺中使用可调谐的等离子体。与通常存在有开或关功能的远程等离子体单元不同,可调谐的等离子体可配置成向等离子体区域215输送特定量的功率。这又可允许发展特定的等离子体特性,使得前驱物可以特定方式解离,以增强由所述前驱物所产生的蚀刻轮廓。
可在喷头225上方的腔室等离子体区域215或喷头225下方的基板处理区域233中的任一者中点燃等离子体。等离子体可存在于腔室等离子体区域215中,以从(例如)含氟前驱物或其他前驱物的流入中产生自由基前驱物。可将通常在射频(RF)范围中的AC电压施加在处理腔室的导电顶部(诸如面板217)和喷头225和/或离子抑制器223之间,以在沉积期间点燃腔室等离子体区域215中的等离子体。RF功率供应器可生成13.56MHz的高RF频率,但也可单独生成其他频率或也可与13.56MHz频率组合生成其他频率。
图2B示出了影响通过面板217的处理气体分布的特征的详细的视图253。在图2A和图2B中,面板217、冷却板203和气体入口组件205相交以界定气体供应区域258,工艺气体可从气体入口205输送到气体供应区域258中。气体可填充气体供应区域258并通过面板217中的孔259而流到第一等离子体区域215。孔259可配置成以基本单向的方式引导流动,使得工艺气体可流入处理区域233中,但可在穿过面板217之后部分或完全防止其回流到气体供应区域258中。
在处理腔室部分200中使用的气体分配组件(诸如喷头225)可被称为双通道喷头(DCSH),并且在图3中所描述的实施例中另外进行了详细描述。双通道喷头可提供允许蚀刻剂在处理区域233的外侧的分离的蚀刻工艺,以提供在被传送到处理区域之前与腔室部件之间及彼此之间有限的相互作用。
喷头225可包括上板214和下板216。板可彼此耦接以在板之间界定容积218。板的耦接可使得提供穿过上板和下板的第一流体通道219以及穿过下板216的第二流体通道221。形成的通道可配置成提供仅经由第二流体通道221从容积218穿过下板216的流体通道,且第一流体通道219可与在板和第二流体通道221之间的容积218流体隔离。可经由气体分配组件225的侧面流体地接近容积218。
图3是根据实施例的与处理腔室一起使用的喷头325的底视图。喷头325可对应于图2A中所示的喷头225。示出第一流体通道219的图的通孔365可具有多个形状和配置,以便控制并影响通过喷头225的前驱物的流动。示出第二流体通道221的图的小孔375可基本上均匀地分布在喷头的表面上,甚至在通孔365之间,并且可以帮助当前驱物离开喷头时提供前驱物的比其他配置更均匀的混合。
转向图4示出了根据本技术的一些实施例的用于制造喷头的方法400中的示例性操作。如上所述,在等离子体操作期间可用作电极的一些喷头或腔室部件(包括等离子体产生电极或接地电极)可由陶瓷或介电材料形成,并且可包括与介电质结合或在介电质内的导电材料。贯穿本公开内容所讨论的喷头可用作先前描述的任何部件,包括面板、离子抑制器、气体分配组件或如上所述的在腔室中使用的其他喷头或歧管,或可在等离子体操作中利用此部件的任何其他腔室。因此,尽管将示出某些设计,但应当理解本技术同样涵盖许多不同的配置。
在一些实施例中,在形成操作期间,导电材料可结合或嵌入在喷头内。因为所描述的一些部件可为陶瓷,所以可在模制操作中形成部件,其中可使用热和/或压力来形成部件。例如,烧结可用以从一个或多个模制的生坯主体形成喷头。在用于制造喷头的方法400的一些实施例中,可在操作405中形成生坯主体,诸如可结合在一起并被烧结以产生示例性喷头的两个生坯主体。生坯主体可为盘形的,或其特征可在于任何其他形状,以便安置于示例性的处理腔室中。可将生坯主体模制为包括一个或多个塞孔或螺柱,其可允许两个部件在烧结(firing)操作之前耦接,并且主体可包括一些较大的组,或可包括分布在主体之间的多个螺柱和/或塞孔。
一旦形成生坯主体,就可在操作410处将导电材料施加或安置在生坯主体中的一个上。导电材料可为施加到特定区域内的一个或两个生坯主体的网、箔或涂层,如将于以下所述。导电材料可被预先形成为包括孔,所述孔可具有与可稍后被钻入喷头中以提供气流的孔类似的图案。示例性喷头可包括数十个、数百个或数千个孔,且因此可执行导电材料的定位以确保孔的形成不会暴露导电材料。如上所述,可暴露于等离子体流出物的导电材料可被等离子体蚀刻、溅射或以其他方式损坏。因此,可以执行示例性的喷头的开发以明确地限制导电材料在可能发生等离子体暴露的区域中的暴露。
例如,可经由完成的陶瓷形成或钻出孔。因此,可将导电材料形成或施加到生坯主体以包括孔,所述孔将允许在不暴露导电材料的情况下产生喷头孔。在一些实施例中,当导电材料位于生坯主体上时,导电材料本身可包括孔。例如,可生产包括要界定的孔的箔。额外的孔可对应于生坯主体的塞孔或螺柱,其可为箔孔提供定位功能以用于后续的机械加工。作为另一个例子,因为生坯主体可被模制,所以塞孔和螺柱可围绕生坯主体模具分布以对应于可在其中产生孔的位置,这可限制在烧结操作期间的移位。例如,可将网或箔围绕螺柱压配到生坯主体。网尖齿可在螺柱周围分开,这可允许在模具上均匀地施加导电材料,并且限制切割时的锋利边缘。
一旦施加导电材料,就可在操作415中烧结生坯主体以产生喷头。烧结可包括施加热和/或压力以产生陶瓷部件。例如,这种烧结可包括多种操作,包括低温加热然后高温加热。在形成部件之后,可在操作420中图案化喷头,这可在机械加工期间提供孔、通道和其他特征以产生最终的喷头。所述产生的喷头可在喷头的内部区域中界定多个孔,所述孔可不暴露整个喷头上包括的导电材料。因此,喷头既可用作流量分配部件,又可用作电极,同时限制或防止导电材料在腔室处理区域内暴露。
图5A示出了根据本技术的一些实施例的示例性喷头500的示意性部分顶视平面图。喷头可包括介电板505,介电板505例如可以是陶瓷,且喷头还可包括结合的导电材料510。图5B示出了根据本技术的一些实施例的示例性喷头500的示意性部分横截面图,并且可与图5A一起考虑,以示出喷头的各种特征。如上所述,喷头500仅仅是本技术所涵盖的部件的一种示例性配置。喷头500示出了根据本技术可包括在各种喷头中的特征,但是无意于限制类似地涵盖的其他设计。喷头500可为先前讨论的任何歧管,并且可为单件式部件,或者在一些实施例中可为部件的组合之一,以便产生如前所述的气体分配组件。如前所述,喷头500可被包括在半导体处理腔室中,或者在本技术的实施例中的任何其他处理腔室或系统中。
如图所示,介电板505可为通过以上所讨论的方法400或通过任何其他方法而形成的陶瓷板,并且可包括结合的导电材料510。介电板505可包括第一表面507和第二表面509,第二表面509可以与第一表面507相对。介电板505可界定穿过板的多个孔515,孔515从第一表面507延伸穿过第二表面509,并可为前驱物提供穿过喷头的路径。如上所述,在烧结之后且在导电材料510已被结合之后,可通过喷头形成孔515。在一些实施例中,孔515可不接触或暴露导电材料510。如图所示,导电材料510可在孔515的一些或全部周围延伸。如图5B所示,导电材料510可在每个孔周围保持间隔或间隙518,以确保孔在形成时不会暴露导电材料。
介电板505可界定一个或多个通道及一个或多个凹入特征,一个或多个通道及一个或多个凹入特征可在结合导电材料510之后被机械加工。在烧结操作期间,材料的性质和特性可能会变化,这可分布导电材料、箔或网眼。例如,在烧结之前,可知道介电板内的导电材料510的确切深度。然而,在烧结之后,此位置可能会稍微改变。径向间隙518可确保在孔形成期间可容纳任何横向运动。然而,因为在一些实施例中,导电材料的厚度可仅为几百纳米,尽管可使用任何厚度,但是深度的微小变化可能令定位用于电极耦合及用于特征形成的导电材料产生挑战。例如,一些示例性的喷头可包括在第二表面509的内部区域处形成的凹部520。若导电材料510的位置在烧结期间已偏移,则在形成凹部520时导电材料510可能会无意地暴露出来。本技术可以以多种方式执行定位,以限制或防止介电板中的导电材料暴露。
介电板505可在介电板505的第一表面507中界定第一环形通道525。第一环形通道525可围绕多个孔515延伸,并可界定喷头的内部区域526。第一环形通道525可配置成安置O形环或弹性体元件527,以在真空操作期间产生密封。因此,例如,内部区域526可为喷头500的一部分,其可在腔室内暴露于所执行的任何处理,诸如等离子体处理。在一些实施例中,导电材料510可不暴露在内部区域526中的任何地方,包括形成孔515的地方。
因为可将导电材料510作为电极耦合,所以可在至少一个位置暴露导电材料以提供耦合。在一些实施例中,介电板505可在介电板505的第一表面507中界定第二环形通道530。第二环形通道530可配置为安置RF垫圈533或可接触导电材料510的任何其他导电连接。第二环形通道530可从第一环形通道525径向向外形成,且因此可定位在腔室的处理区域之外的位置。因此,例如,第二环形通道530可不暴露于腔室内发生的事件,并且可不暴露于任何等离子体流出物。
导电材料510可暴露在第二环形通道530内的至少一个位置,且可暴露在第二环形通道530内的多个位置。因为第二环形通道530可形成在第一环形通道525的径向外侧,所以导电材料510可延伸越过第一环形通道525。为了防止导电材料暴露在第一环形通道525中,可在介电板505内将第二环形通道530界定到比第一环形通道525更大的深度。因此,如图5B所示,导电材料510可在第一环形通道525下方的深度处延伸越过第一环形通道525,这可防止导电材料在第一环形通道处暴露。当RF垫圈533安置于第二环形通道530内时,垫圈可接触在所述通道内暴露的导电材料510,这可提供路径来将导电材料用作腔室内的电极。
如上所述,导电材料可位于介电板内以确保已知导电材料的深度。因此,在一些实施例中,可在喷头的其他特征之前机械加工或形成第二环形通道530。导电材料510可完全延伸到喷头的外部区域,或导电材料510可包括一个或多个翼或突片535,从内部区域526中的更均匀的覆盖范围延伸到可形成外部通道530的外部区域。例如,可向下形成穿过外部区域的一个或多个定位孔或凹槽,以定位导电材料510的正确深度,诸如,当包括突片535时在突片535之间。一旦知道,第二环形通道530可形成为完全暴露通道内的导电材料510。因为导电材料可围绕喷头延伸,且RF垫圈533或其他电子耦合也可围绕喷头延伸,所以在定位期间外部区域中导电材料的任何穿孔都不会影响作为电极的导电材料的操作,这是由于围绕喷头的多个接触点。
介电板505可包括可保护免受等离子体物种轰击且可对等离子体流出物(诸如含卤素的等离子体流出物)呈惰性的任何数量的材料。例如,介电板505可包括任何数量的金属的氧化物或氮化物,包括铝、钇、锆、硅或其他元素或组合。导电材料可为可操作或用作电极的任何数量的导电材料,并且可包括铝、钨、钼、钽、铂、钛、钒或包括所述或其他导电材料中的任何一种的合金的任何其他材料。尽管如下所述的一些实施例可能不包括烧结操作,但是当可根据方法400开发喷头时,烧结温度可能远高于1000℃。因此,较低熔点的金属(诸如铝,例如)可能不是适合的候选。另外,可选择陶瓷材料和导电材料以产生与烧结温度有关的匹配量,以控制烧结期间的膨胀/收缩。
介电板也可形成为控制所产生的喷头的孔隙率的数量。因为部件可能在真空条件下操作,所以孔隙率可保持相对较低,以限制在真空条件下的效果或通过喷头除气。类似地,特征在于较高孔隙率的部件可能易于吸收等离子体物种,例如,在执行处理之前可能需要增加调节。因此,在一些实施例中,可将用于介电板505的材料的孔隙率限制在约5%以下,且在一些实施例中,可将孔隙率限制在3%以下或约3%、2%以下或约2%、1%以下或约1%、0.9%以下或约0.9%、0.8%以下或约0.8%、0.7%以下或约0.7%、0.6%以下或约0.6%、0.5%以下或约0.5%、0.4%以下或约0.4%、0.3%以下或约0.3%、0.2%以下或约0.2%、0.1%以下或约0.1%或更低。
当在涂布之前形成孔时,诸如用许多金属部件形成孔时,较小的孔可能是不可行的,或者可能不会发生完整的涂布。然而,为了促进涂布而形成的孔越大,等离子体泄漏的可能性就越大。本技术克服了所述问题,因为孔仅可延伸穿过介电板505而不接触导电材料510。因此,因为通过使用陶瓷材料克服了涂层的问题,其中孔的形成可能不会暴露导电材料,因此与常规材料相比,可钻出可进行后续涂布的较小的孔。因此,在一些实施例中,孔515的特征可在于小于或约10mm的直径,且在一些实施例中,特征可在于具有小于或约9mm、小于或约8mm、小于或约7mm、小于或约6mm、小于或约5mm、小于或约4mm、小于或约3mm、小于或约2mm、小于或约1mm或以下的直径。孔的尺寸可影响可保持的间隙518以及在形成期间可能经历的行进量。因此,间隙518(间隙518可为径向间隙)可围绕每个孔延伸小于或约5mm,并且在一些实施例中可延伸小于或约4mm、小于或约3mm、小于或约2mm、小于或约1mm、小于或约0.5mm、或小于约每个孔,这可确保在孔的形成期间不暴露导电材料。
根据本技术的喷头还可包括一个或多个涂层,以限制或防止导电材料暴露于内部腔室环境。图6示出了根据本技术的一些实施例的方法600中的示例性操作。方法600可产生类似于以上所讨论的喷头,以及如上所述的其他腔室歧管或扩散器。方法600可包括用于制造介电部件的方法400的任何操作,并且所产生的喷头可包括如前所述的任何材料、性质或特性。
与方法400相似,方法600可包括一个或多个任选操作,一个或多个任选操作可或可不与根据本技术的方法的一些实施例具体相关联。例如,描述了许多操作以便提供更广泛的结构形式,但是对技术不是关键的,或者可通过替代方法来执行,如将在下文进一步讨论的。方法600描述了在图7A至图7C中的示例性喷头700的顶部平面图中示意性示出的操作,将结合方法600的操作来描述其附图。在本技术的实施例中,喷头700可类似地结合在任何处理腔室中。应当理解为了说明的目的,图7仅示出了总体示意图,且示例性的喷头可含有将要描述的任何数量的孔或结构元件。
方法600可包括在操作605处蚀刻板以产生孔和其他特征。例如,可穿过陶瓷或介电板钻出孔,陶瓷或介电板可具有以上所述的喷头500的任何特征、材料或特性。如图7A所示,当生产喷头700时,可通过介电板705钻出或形成孔715。在操作610处,可将导电性或金属材料的网、箔、印刷或喷涂在一个或多个表面上施加到板。导电材料可为如前所述的任何导电材料,并且可定位或形成在一个或多个表面上,诸如在喷头的第一表面上。图7B示出了在喷头700的第一表面上形成导电材料710。如图所示,尽管可在每个孔周围保持间隙712,但是导电材料710可跨喷头的第一表面延伸。例如,导电材料可保持距每个孔第一径向距离而远离孔,第一径向距离可对应于上述的任何间隙距离。间隙712可执行确保不暴露导电材料的类似特征,尽管所述间隙也可为随后添加的涂层提供空间,如将于下所述。间隙可被包括在预形成的导电材料中,或者可执行另一掩蔽操作以产生间隙。
可接着在任选的操作615处掩蔽形成的孔。可仅在孔周围执行掩蔽,并围绕每个孔径向地或横向地延伸有限的距离。可接着在操作620处施加涂层以覆盖导电材料710。在施加涂层之后,可在任选操作625中移除掩模。涂层也可为介电材料,且可为对比于板的第一介电材料的第二介电材料。图7C示出喷头随后施加涂层720以跨导电材料710延伸。还可施加涂层720以保持与每个孔715的间隙722,且可将涂层720保持距每个孔第二径向距离。在一些实施例中,第二径向距离可小于第一径向距离,这可确保涂层720完全覆盖导电材料710。
图7C还示出了导电材料710可沿着喷头700的外部或径向边缘725在一个或多个位置中暴露。暴露可发生在环形通道730的径向外部,环形通道730可为弹性体元件可安置的位置。环形通道730可界定在孔的径向外部,且可界定在喷头的内部区域和外部区域之间的边界,内部区域可在腔室内暴露,而外部区域可不暴露于腔室处理。尽管在图7C中示出,但是应当理解通道可在孔形成期间预先形成以确保材料的连续性,以允许用作电极。因此,导电材料在区域725处暴露的地方可允许用于电极操作的耦合,同时限制或防止腔室环境内的导电材料的暴露。在一些实施例中,可施加混合涂层,且可包括在整个喷头之上施加的第一涂层,而第二较厚的涂层(诸如如下所述的第二层)可不施加至边缘区域。较薄的涂层因为其厚度可允许通过涂层的电连接,尽管可防止一些等离子体流出物,但是所述厚度可能无法与电接触完全绝缘。在一些实施例中,此选项可以在制造期间提供额外的灵活性。
图7D示出了根据本技术的一些实施例的示例性喷头的示意性部分横截面图,并且例如可示出喷头700的另一视图。附图示出了喷头的一部分,包括介电板705、导电材料710和涂层720,因为它们可围绕孔715形成。孔715示出为具有倒角的边缘,但是附图仅用于说明任何孔设计都可适用于本技术的任一者,且喷头500、700或生产的任何其他喷头的特征可在于任何孔轮廓。
图7D示出了如何跨板705的第一表面707形成导电材料710。与第一表面相对的第二表面709可不包括导电材料或涂层720,尽管在一些实施例中,第二表面也可包括一个或多个材料。例如,取决于喷头或腔室组件的取向,部件的一侧可能会更多地暴露于轰击,而一侧可能更多地暴露于化学反应性等离子体流出物,且涂层可能会相应地施加,尽管如上所述涂层可施加到喷头的任一侧或两侧。如图所示,导电材料710可保持远离孔715相距第一距离或间隙712。涂层720可施加在导电材料710之上并且可施加到第二距离或间隙722,第二距离或间隙722可小于第一间隙。因此,在本技术的实施例中,导电材料710可在喷头的内部区域中被完全覆盖。
用于板和涂层两者的介电材料可为先前描述的任何材料,且导电材料也可为先前提到的任何材料。另外,在一些实施例中,涂层720可为混合或多层涂层的类型。例如,可包括涂层720的第一层以限制导电材料暴露于涂层的第二层,这可以例如限制对导电材料的氧化或其他作用。
根据本技术的一些实施例的腔室可用以执行改性操作,其中可在基板处理区域中形成偏压等离子体。这个操作可为对基板上结构的物理轰击,并且可利用惰性或反应性较小的前驱物。另外,可通过在远程区域产生反应性等离子体流出物来执行反应性蚀刻。前驱物可包括卤素前驱物,所述卤素前驱物可配置成从基板移除改性的材料。因此,腔室的部件(诸如所描述的喷头)可暴露于化学反应性等离子体流出物(诸如氟、氯或其他含卤素的流出物)及在偏压等离子体中产生的用于物理改性的离子。例如,示例性的喷头可暴露于等离子体流出物(诸如接触面对基板的表面并在孔内的偏压等离子体流出物)及在与基板相互作用之前行进通过孔的反应性流出物两者。以上所述的其他部件也可暴露于一种或两种等离子体流出物,包括来自回流的等离子体流出物。尽管常规的部件可能由于导电部件暴露于等离子体材料而劣化,但本技术的喷头可限制或防止任何导电材料暴露,同时仍用作等离子体电极。
等离子体流出物可对腔室部件产生不同的影响。例如,离子可被喷头从远程产生的化学反应性等离子体流出物至少部分地过滤出。然而,反应性流出物(诸如含氟流出物)例如可诸如通过在常规部件设计中形成氟化铝而引起暴露材料的腐蚀。随着时间的流逝,此工艺可腐蚀暴露的金属部件,而需要更换。另外,由基板处理区域中的偏压等离子体形成的等离子体物种可能会撞击部件,从而导致物理损坏和溅射,随着时间的流逝,它们会侵蚀部件。因此,任何描述的部件都可能受到在腔室的一个或多个区域内产生的等离子体流出物的化学腐蚀及物理侵蚀的影响。
腐蚀可通过在材料之上形成涂层720或使用用于涂层的特定材料的一些方式来控制。例如,尽管铝可能因暴露于含氟等离子体流出物而腐蚀,但是氧化铝或其他镀层或涂层在与等离子体流出物接触时可能不会腐蚀。因此,可通过阳极氧化、氧化、原子层沉积、化学气相沉积、等离子体喷涂、化学镀镍、电镀镍、钛酸钡或可保护暴露的导电材料免于化学腐蚀的任何其他材料(诸如铝、钼、铂或任何先前提到的材料)来涂布或保护任何所述的部件。类似地,侵蚀可通过在材料之上形成涂层或使用用于底板705的某些材料的一些方式来控制。例如,可包括或可不包括附加材料(例如包括铝或锆)的高性能材料(诸如氧化钇)可保护部件免受由偏压等离子体流出物而引起的物理损坏。然而,当结构受到腐蚀性等离子体流出物和侵蚀性等离子体流出物的接触时,仍然可能发生部件的损坏。因此,涂层720可包括所述的多种材料,且底板705也可包括附加的涂层。在实施例中,材料可相同、不同或结合。例如,在一些实施例中,涂层720可包括等离子体喷涂氧化钇及所提及的用以增强对等离子体流出物的抵抗力的任何其他材料。
另外,混合涂层720的第一层可跨导电材料710共形地延伸。如前所解释的,第一层可为耐腐蚀层,配置成保护导电材料不受反应性蚀刻剂(包括含卤素的流出物或蚀刻剂材料)的影响。在实施例中,第一层可为或包括阳极氧化、化学镀镍、电镀镍、氧化铝或钛酸钡。由于抗腐蚀涂层的形成工艺,可实现导电材料的完全覆盖。覆盖深度可小于或约25μm,且可小于或约20μm、小于或约15μm、小于或约10μm、小于或约5μm、小于或约3μm、小于或约1μm、小于或约750nm、小于或约500nm、小于或约250nm、小于或约100nm、小于或约50nm或更低。因为在一些实施例中达到增加厚度的时间可能相对较长,所以在一些实施例中涂层厚度可在约100nm与约300nm之间。在第一层的厚度可大于或约3μm或约5μm的实施例中,可不包括第二层。
混合涂层的第二层也可被包括在第一层的外部。第二层可包括氧化钇或其他高性能材料,诸如电子束涂层或氧化钇(包括铝、锆或其他材料)。第二层可至少部分地跨第一表面707延伸,并且可跨部件的面向等离子体表面延伸。混合涂层的第二层的特征可在于小于或约25μm的厚度,且在一些实施例中特征可在于小于或约20μm、小于或约15μm、小于或约10μm、小于或约5μm、小于或约1μm、小于或约750nm、小于或约500nm、小于或约300nm、小于或约100nm或更低的厚度。
如先前所讨论的,可在施加涂层720之前执行掩蔽操作。因为在一些实施例中可通过喷涂机构施加涂层,因此可能难以通过如前所述的尺寸的孔进行输送。若不执行掩蔽,则涂层可能无法形成完整的涂层,并且可能会出现由不一致的涂层形成的点蚀现象(pitting),这会促进随着时间在处理期间移除涂层,并限制涂布的可重复性。因此,在这可能是个问题且这可能限制涂层明确沿着导电材料和板的第一表面的一些实施例中,可执行掩蔽。
若使用两层,则在一些实施例中,可在形成涂层的第一层或第二层中的任何一个或两个之前,对板705和/或导电材料710进行纹理化处理。例如,涂层可具有对纹理化表面的改进粘附力。在一些实施例中,可将纹理进行到高达或大于混合涂层的任一个或两个层深度的深度。例如,在涂布第一层之前,或在第一涂层和第二层涂层之间,可经由机械加工、珠击或其他喷砂技术或其他粗糙化或纹理化操作对板和/或导电材料进行纹理化。纹理化可执行到至少约50nm的深度,并且可执行到至少约100nm、至少约250nm、至少约500nm、至少约750nm、至少约1μm、至少约3μm、至少约5μm或更大的深度,虽然纹理化可能不会延伸到大于材料的总厚度的深度,以限制下层材料的暴露并确保覆盖。
图8示出了根据本技术的一些实施例的方法800中的示例性操作。方法800可包括上文用方法600讨论的喷头形成的变型。将参考图9A至图9B描述所述方法,图9A至图9B示出了根据本技术的一些实施例的示例性喷头900的示意性顶部平面图。方法800与方法600的不同之处可在于孔可在方法800中的涂布之后形成。例如,方法800可通过在介电板之上形成掩模而在操作805处开始,在介电板处可随后钻出孔。在掩蔽之后,可在操作810处施加导电网、箔或涂层,其可通过包括金属印刷或金属沉积的多种先前提到的技术来执行,并且其可如先前所述地发生,且可保持随后将形成孔的间隙距离。在操作815处,可在导电材料之上施加涂层,导电材料可保持第二间隙,如前所述。
图9A可示出在操作815处的示例性喷头后续涂布。如图所示,喷头900可类似于与图7所讨论的喷头,尽管孔可不穿过板905形成。可在操作820处移除掩模材料,且可接着在操作825处通过板机械加工出孔。如图9B所示,最终的喷头可类似于图7的最终喷头,尽管在涂布之后形成了孔915。
根据本技术的实施例的喷头可提供比可基于导电基底材料的常规喷头更好的耐腐蚀性和耐侵蚀性。如上所述,通过将导电材料与陶瓷或其他介电材料结合或结合在陶瓷或其他介电质内,仍可提供作为电极的操作,同时允许减小孔的尺寸并改善处理腔室内的导电材料的覆盖范围,包括完全覆盖范围。
在前面的描述中,出于解释的目的,已经阐述了许多细节以便提供对本技术的各种实施例的理解。然而,对于本领域技术人员将显而易见的是,可在没有所述细节中的一些或具有其他细节的情况下实施某些实施例。
已经公开了几个实施例,本领域技术人员将认识到在不背离实施例的精神的情况下,可使用各种修改、替代结构和等效元件。另外,为了避免不必要地混淆本技术,没有描述许多已知的工艺和元件。因此,以上描述不应被视为限制本技术的范围。另外,方法或工艺可被描述为顺序的或分步骤的,但是应当理解操作可同时执行,或者以与所列顺序不同的顺序执行。
在提供值的范围的情况下,应理解的是除非上下文另外明确指出,否则在所述范围的上限和下限之间的每个中间值(至下限单位的最小分数)也特别地公开。涵盖了在那个宣称范围中的任何宣称值或未宣称中间值与宣称范围内的任何其他宣称或中间值之间的任何较窄范围。那些较小范围的上限和下限可独立地包括或排除在范围中,且包括在较小范围中的上下限中的任一个、两个皆无或两个的每个范围也涵盖在本技术内,但受到宣称范围中任何特定排除的限制规范。在所宣称范围包括上下限中的一个或两个的情况下,还包括排除那些包括的上下限中的任一个或两个的范围。
如于此和所附的权利要求中所使用的,单数形式“一(a)”、“一(an)”和“所述(the)”包括多引用,除非上下文另外明确指出。因此,例如,对“一前驱物”的引用包括多个这样的前驱物,而对“所述层”的引用包括对一个或多个层及本领域技术人员已知的其等效元件的引用等等。
此外,当在本说明书和所附的权利要求中使用时,词语“包括(comprise(s))”、“包括(comprising)”、“含有(contain(s))”、“含有(containing)”、“包括(include(s))”和“包括(including)”旨在指定所宣称的特征、整数、部件或操作的存在,但是它们不排除一个或多个其他特征、整数、部件、操作、动作或群组的存在或者增加。
Claims (15)
1.一种半导体处理腔室喷头,包括:
介电板,所述介电板的特征在于第一表面和与所述第一表面相对的第二表面,其中所述介电板界定穿过所述介电板的多个孔,其中所述介电板在所述介电板的所述第一表面中界定第一环形通道,所述第一环形通道围绕所述多个孔延伸,并且其中所述介电板在所述介电板的所述第一表面中界定第二环形通道,所述第二环形通道从所述第一环形通道径向向外形成;以及
导电材料,所述导电材料嵌入在所述介电板内并且围绕所述多个孔延伸而不被所述孔暴露,其中所述导电材料在所述第二环形通道处暴露。
2.如权利要求1所述的半导体处理腔室喷头,其中所述第二环形通道在所述介电板内界定到比所述第一环形通道要大的深度。
3.如权利要求2所述的半导体处理腔室喷头,其中所述导电材料在所述介电板内以比所述第一环形通道的所述深度要大的深度延伸通过所述介电板,并且其中所述导电材料被所述第二环形通道暴露而不被所述第一环形通道暴露。
4.如权利要求1所述的半导体处理腔室喷头,进一步包括RF垫圈,所述RF垫圈安置于所述第二环形通道内并且配置成将所述导电材料用作电极。
5.如权利要求1所述的半导体处理腔室喷头,进一步包括弹性体元件,所述弹性体元件安置于所述第一环形通道内。
6.如权利要求1所述的半导体处理腔室喷头,其中所述导电材料包括箔或网,所述箔或网跨由所述第一环形通道界定的所述喷头的内部区域而延伸。
7.如权利要求6所述的半导体处理腔室喷头,其中所述导电材料包括多个突片,所述多个突片从所述喷头的所述内部区域延伸到所述第二环形通道。
8.一种半导体处理腔室喷头,包括:
板,所述板包括第一介电材料,所述板的特征在于第一表面和与所述第一表面相对的第二表面,其中所述板界定穿过所述板的多个孔;
导电材料,所述导电材料设置在所述板的所述第一表面上,其中所述导电材料保持在距所述多个孔中的每个孔的第一径向距离处;以及
涂层,所述涂层包括第二介电材料,其中所述涂层跨所述导电材料延伸,并且其中所述涂层保持在距所述多个孔中的每个孔的第二径向距离处,其中所述第二径向距离小于所述第一径向距离。
9.如权利要求8所述的半导体处理腔室喷头,其中所述导电材料在所述喷头的径向边缘处暴露,以提供所述喷头的电耦合。
10.如权利要求9所述的半导体处理腔室喷头,其中所述喷头在所述板的所述第一表面中在所述多个孔的径向外侧界定环形通道,并且在暴露的所述导电材料的径向内侧在所述喷头的所述径向边缘处界定环形通道。
11.如权利要求8所述的半导体处理腔室喷头,其中所述导电材料包括穿孔的箔或网。
12.一种半导体处理腔室,包括:
盖;
基板支撑件;以及
喷头,所述喷头位于所述盖与所述基板支撑件之间,其中第一等离子体区域界定在所述喷头与所述盖之间,其中第二等离子体区域界定在所述喷头与所述基板支撑件之间,其中所述盖和所述基板支撑件各自与产生等离子体的功率源耦合,其中所述喷头与接地电耦合,并且其中所述喷头包括:
板,所述板包括第一介电材料,所述板的特征在于第一表面和与所述第一表面相对的第二表面,其中所述板界定穿过所述板的多个孔,并且其中所述喷头在所述板的所述第一表面中在所述多个孔的径向外侧界定第一环形通道;以及
导电材料,所述导电材料与所述板结合,其中所述导电材料的暴露限制在所述第一环形通道的径向外侧的区域。
13.如权利要求12所述的半导体处理腔室,其中所述板在所述板的所述第一表面中界定第二环形通道,所述第二环形通道形成为从所述第一环形通道径向向外,并且其中所述导电材料被嵌入所述板内并且被所述第二环形通道暴露,其中所述第二环形通道在所述板内界定到比所述第一环形通道要大的深度,其中所述导电材料在所述板内以比所述第一环形通道的所述深度要大的深度延伸通过所述板,并且其中所述导电材料被所述第二环形通道暴露而不被所述第一环形通道暴露。
14.如权利要求13所述的半导体处理腔室,进一步包括:
RF垫圈,所述RF垫圈安置于所述第二环形通道内并且被配置成将所述导电材料电耦合至接地;以及
弹性体元件,所述弹性体元件安置于所述第一环形通道内。
15.如权利要求12所述的半导体处理腔室,其中所述导电材料设置在所述板的所述第一表面上,其中所述导电材料保持在距所述多个孔中的每个孔的第一径向距离处,所述喷头进一步包括:
涂层,所述涂层包括第二介电材料,其中所述涂层跨导电材料延伸,并且其中所述涂层保持在距所述多个孔中的每个孔的第二径向距离处,其中所述第二径向距离小于所述第一径向距离。
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