CN100336426C - 多层印刷电路板以及多层印刷电路板的制造方法 - Google Patents
多层印刷电路板以及多层印刷电路板的制造方法 Download PDFInfo
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- CN100336426C CN100336426C CNB018056385A CN01805638A CN100336426C CN 100336426 C CN100336426 C CN 100336426C CN B018056385 A CNB018056385 A CN B018056385A CN 01805638 A CN01805638 A CN 01805638A CN 100336426 C CN100336426 C CN 100336426C
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Images
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Abstract
多层印刷电路板,在芯衬底30预先内藏IC芯片20,而在该IC芯片20的焊盘(pad)24上配设过渡(transition)层38。因此,可不使用引线(lead)零件和封装树脂,取得IC芯片与多层印刷电路板的电连接。另外,通过在管芯焊盘(die pad)24上设置铜制的过渡层38,可防止焊盘24上的树脂残留,并能使焊盘24与通孔(via hole)60的连接性与可靠性提高。
Description
技术领域
本发明是关于增层(build up)多层印刷电路板,特别是关于内藏IC芯片等的电子元件的多层印刷电路板及多层印刷电路板的制造方法。
背景技术
IC芯片是通过线接合(wire bonding)、TAB、倒装片接合(flip-chip)等的安装方法,而取得与印刷电路板的电连接。
电线连接是通过粘接剂使IC芯片模接于印刷电路板,以金属等的电线连接该印刷电路板的焊盘与IC芯片的焊盘后,为了保护IC芯片与电线而施加热硬化性树脂或热可塑性树脂等的封装树脂。
TAB是通过焊锡称为引线(lead)的线等一起连接IC芯片的焊盘与印刷电路板的焊盘后,以树脂进行封装。
倒装片接合是通过凸块而使IC芯片与印刷电路板的焊盘部分连接,并以树脂填充与凸块的空隙而进行。
然而,各个安装方法,是在IC芯片与印刷电路板之间通过连接用的引线部件(电线、引线、凸块)而进行电连接。这些引线部件容易切断、腐蚀,因此成为与IC芯片的连接中断、错误动作的原因。
另外,各个安装方法,为了保护IC芯片以环氧树脂等的热可塑性树脂进行封装,但是填充该树脂时因含有气泡,气泡成为起点,导致引线部件的破坏和IC焊盘的腐蚀、可靠性的降低。以热可塑性树脂封装,必须结合各个零件而做成树脂填装用柱塞(plunger)、模型,另外,即使是热硬化性树脂也必须选定考虑引线部件、焊锡阻挡层(solder resist)的材料等的树脂,因此也成为成本较高的原因。
本发明为了解决上述课题,其目的为提供一种不通过引线部件,而得到与IC芯片直接电连接的多层印刷电路板及多层印刷电路板的制造方法。
本发明人等经过详细研究之后,提出在树脂绝缘性衬底设置开口部、通孔和铳孔(ザグリ)部而预先内藏IC芯片等的电子元件,而积层间绝缘层,在该IC芯片的管芯焊盘上,以光蚀刻或激光,设置通孔,形成导电的导体电路后,再重复层间绝缘层与导电层而设置多层印刷电路板,不使用封装树脂,通过无引线(leadless)而可取得与IC芯片的电连接构造。
再者,本发明人等,提出在树脂绝缘性衬底设置开口部、通孔和铳孔部而预先内藏IC芯片等的电子元件,积层间绝缘层,在该IC芯片的管芯焊盘上,以光蚀刻或激光,设置通孔,而形成导电层导体电路后,再重复层间绝缘层与导电层,并在多层印刷电路板的表层也安装IC芯片等的电子元件的构造。因此,不使用封装树脂,以无引线而能取得与IC芯片的电连接。另外,可安装各个功能不同的IC芯片等的电子元件,可得到更高功能的多层印刷电路板。具体例,为在内藏IC芯片埋入快速缓冲存储器(cache memory),通过在表层安装具有运算功能的IC芯片,可分别制造成品率低的快速缓冲存储器与IC芯片,但可相近配置IC芯片与快速缓冲存储器。
并且,本发明人等详细研究的结果,提出在树脂绝缘性衬底设置开口部、通孔和铳孔部而预先收容IC芯片等的电子元件,在该IC芯片的管芯焊盘上形成至少2层以上组成的过渡层。在过渡层的上层积层间树脂绝缘层,在该IC芯片的过渡层的通孔上,通过光蚀刻或激光设置通孔,形成导电层导体电路后,再重复层间绝缘层与导电层,而设置多层印刷电路板,不使用封装树脂,并以无引线而能取得与IC芯片的电连接。另外,在IC芯片部分形成过渡层,由于IC芯片部分被平坦化,所以上层的层间绝缘层也被平坦化,膜厚度也变得平均。并且,通过前述的过渡层,形成上层的通孔时,也可保持形状的稳定性。
在IC芯片的焊盘上设置过渡层的理由,如下所述。第1管芯焊盘微细且尺寸小,形成通孔时的对位变得困难,因此设置过渡层使对位容易。设置过渡层的话,管芯焊盘节距(pitch)150μm以下,焊盘尺寸20μm以下也可稳定形成增层(build up)层。没有形成过渡层的管芯焊盘,以光蚀刻形成层间绝缘层的通孔时,通孔直径比管芯焊盘的直径大,在进行除去通孔底残渣,层间树脂绝缘层表面粗化处理时,管芯焊盘表面的保护层聚亚酰胺(polyimide)层将溶解、损伤。另一方面,激光的场合,通孔直径比管芯焊盘的直径大的时候,管芯焊盘及钝态保护(passivation)膜聚亚酰胺层(IC的保护膜)将被激光破坏。并且IC芯片的管芯焊盘非常小,通孔直径比管芯焊盘尺寸大,不论是以光蚀刻方法,或激光方法都非常难对合位置,常发生管芯焊盘与通孔的连接不良。
相对于此,在管芯焊盘上设置过渡层,管芯焊盘节距150μm以下,焊盘尺寸20μm以下,也可可靠地在管芯焊盘上连接通孔(via),使焊盘与通孔的连接性和可靠性提高。并且,IC芯片的焊盘上通过比较大直径的过渡层,在去残渣(desmear)、电镀步骤等的后续步骤时,即使浸渍于酸和蚀刻液,经过各种回火步骤,也不会有溶解管芯焊盘及IC的保护膜溶解、损伤的危险。
即使分别仅得到多层印刷电路板功能,视场合做为半导体装置的安装衬底的功能,为了外部衬底的母板和子板的连接,也可设置BGA、焊锡凸块、和PGA(导电连接拴)。另外,该构成,在已知的安装方法连接的场合也可缩短配线长,也可减低回路感抗。
下列说明本发明定义的过渡层。
过渡层尚未用于已知技术的IC芯片安装技术,为了取得半导体元件IC芯片与印刷电路板的直接连接,是指设置的中间的中介层。其特征是以2层以上的金属层形成。而且,比半导体元件IC芯片的管芯焊盘大。借此,提高电连接和位置接合性,且不会造成管芯焊盘损伤,可用激光和光蚀刻加工通孔。因此,可可靠地埋入、收容、收纳和连接IC芯片于印刷电路板。另外,过渡层上,可直接形成印刷电路板的导体层金属。该导体层之一例为层间树脂绝缘层的通孔和衬底上的通孔等。
本发明使用的内藏IC芯片等的电子元件的树脂制衬底,是用将玻璃环氧树脂等的加强材料或芯材含浸于环氧树脂、BT树脂、酚树脂等的树脂,与含浸环氧树脂的预烤(プリプレグ)积层形成物,但也可使用一般印刷电路板使用的材料。除此以外也可使用两面铜张积层板、单面板、没有金属膜的树脂板、树脂薄膜。但是,施加350℃以上的温度时,树脂会完全溶解、炭化。另外,陶瓷的话,由于外型加工性差,不可使用。
在芯衬底等的预先树脂制绝缘衬底上收容IC芯片等的电子元件的凹洞(cavity)形成铳孔、通孔、开口之处以粘接剂等接合该IC芯片。
在内藏IC芯片的芯衬底全面地进行蒸镀、溅射等,而全面性形成导电特性的金属膜(第1薄膜层)。该金属以锡、铬、钛、镍、锌、钴、金、铜等为佳。厚度以在0.001~2.0μm之间为佳。未满0.001μm,无法全面性平均积层,超过2.0μm形成困难,也无法提高效果。特佳为0.01~1.0μm。铬的场合以0.1μm的厚度为佳。
通过第1薄膜层,进行管芯焊盘的披覆,可在过渡层与IC芯片上提高与管芯焊盘的界面的密着性。用这些金属披覆管芯焊盘,可防止水分侵入至界面,以及管芯焊盘的溶解、腐蚀,提高可靠性。另外,通过该第1薄膜层,可以没有引线等的安装方法取得与IC芯片的连接。在此,使用铬、镍、钛,是因为可防止水分侵入至界面,金属密着性优良。铬、钛的厚度,为在溅射层不造成裂痕且可获得上层与金属的密着性的厚度。于是,以IC芯片的定位标记为基准在芯衬底上形成定位标记。
在第1薄膜层上,以溅射、蒸镀或无电解电镀形成第2薄膜层。该金属为镍、铜、金、银等。以电特性、经济性、还有在后续形成的厚度施加层主要为铜来说,使用铜较好。
在此设置第2薄膜层的理由,是第1薄膜层无法取得形成后述的厚度施加层的电解电镀用的引线。第2薄膜层36被用为施加厚度的引线。该厚度以0.01~5μm的范围进行为佳。未满0.01μm,无法得到做为引线的作用,超过5μm,蚀刻时,比下层的第1薄膜层多去除而产生空间,水分容易侵入,可靠性降低。
第2薄膜层上,以无电解或电解电镀施加厚度。因为电特性、经济性,做为过渡层的强度和构造上的耐性,还有后续形成的增层的导体层主要为铜,较好的是使用铜电解电镀形成。该厚度以1~20μm的范围进行为佳。比1μm薄时,与上层的通孔的连接可靠性降低,比20m厚,蚀刻时将引起底切(undercut),形成的过渡层与通孔界面发生空隙。另外,视场合,可在第1薄膜层上直接电镀施加厚度,也可再积层多层。
之后,以芯衬底的定位标记为基准形成蚀刻阻挡层,曝光、显像而露出过渡层以外部分的金属而进行蚀刻,在IC芯片的管芯焊盘上形成第1薄膜层、第2薄膜层、厚度施加层组成的过渡层。
再者,以减层工序(subtractive process)形成过渡层的场合,金属膜上,以无电解或电解电镀,施加厚度。形成的电镀的种类为铜、镍、金、银、锌、铁等。由于电特性、经济性、还有后续形成的增层导体层主要为铜,因此使用铜较好。该厚度以1~20μm的范围进行为佳。比该厚度厚时,蚀刻时引起底切,形成的过渡层与通孔的界面发生空隙。之后,形成蚀刻阻挡层,曝光显像而露出过渡层以外的部分的金属而进行蚀刻,在IC芯片的焊盘上形成过渡层。
如上所述,本发明人等,提出在形成于芯衬底的凹部收容IC芯片,在该芯衬底上积层间树脂绝缘层与导体电路,而在安装衬底内内藏IC芯片的方案。
该方法,在收纳IC芯片的芯衬底上全面形成金属膜,而披覆、保护电子元件IC芯片的焊盘,视场合,通过在该焊盘上形成过渡层,取得焊盘与层间树脂绝缘层的通孔的电连接。
然而,由于全面性施加金属膜,在IC芯片上形成的定位标记完全被隐藏,因此描绘有配线等的掩膜和激光装置等无法吻合衬底的位置。所以,该IC芯片的焊盘与通孔的位置发生偏差,无法取得电连接。
发明内容
本发明即为了解上述问题,其目的为提供与内藏IC芯片可取得适当连接的多层印刷电路板的制造方法。
本发明的多层印刷电路板的制造方法,是在衬底上重复形成层间绝缘层与导体层,在该层间绝缘层形成通孔,并通过该通孔而电连接,该方法至少具备以下(a)~(c)步骤:
(a)在前述衬底收容电子元件;
(b)根据前述电子元件的定位标记,在前述衬底形成定位标记;以及
(c)根据前述衬底的定位标记进行加工或形成。
在本发明中,根据电子元件的定位标记,在收容电子元件的衬底形成定位标记,并根据衬底的定位标记进行加工或形成。因此,电子元件与位置正确地封合,可在衬底上的层间树脂绝缘层形成通孔。
该场合的加工,是指在电子元件IC芯片或衬底上形成的全部。例如,IC芯片的焊盘上的过渡层、识别字符(英文字母、数字等)、定位标记等。
另外,该场合的形成,是指在芯衬底上施加的层间树脂绝缘层(未含有玻璃布等的加强材料者)上形成的全部。例如,通孔、配线、识别字符(英文字母、数字等)、定位标记等。
本发明的多层印刷电路板的制造方法,是在衬底上重复形成层间绝缘层与导体层,在该层间绝缘层形成通孔,并通过该通孔而电连接,该方法至少具备以下(a)~(d)步骤:
(a)在前述衬底收容电子元件;
(b)根据前述电子元件的定位标记,以激光在前述衬底形成定位标记;
(c)在前述衬底的定位标记上形成金属膜;以及
(d)根据前述衬底的定位标记进行加工或形成。
在本发明中,是根据电子元件的定位标记,以激光在收容电子元件的衬底上穿设定位标记,在以激光穿设的定位标记形成金属膜后,根据衬底的定位标记进行加工或形成。因此,电子元件与位置正确地封合,可在衬底上的层间树脂绝缘层形成通孔。另外,以激光穿设的定位标记上形成金属膜,因此可容易地以反射认出定位标记,可正确地封合位置。
本发明的多层印刷电路板的制造方法,在衬底上重复形成层间绝缘层与导体层,在该层间绝缘层形成通孔,并通过该通孔而电连接,该方法至少具备以下(a)~(e)步骤:
(a)在前述衬底收容电子元件;
(b)根据前述电子元件的定位标记,而以激光在前述衬底形成定位标记;
(c)在前述衬底的定位标记上形成金属膜;
(d)在前述衬底形成层间绝缘层;以及
(e)根据前述衬底的定位标记在前述层间绝缘层进行加工或形成通孔用开口。
在本发明中,是根据电子元件的定位标记,而在收容电子元件的衬底上形成定位标记,在定位标记形成金属膜后,根据衬底的定位标记进行加工或形成。因此,电子元件与位置正确地封合,可在衬底上的层间树脂绝缘层形成通孔。另外,在以激光穿设的定位标记上也形成金属膜,即使在该定位标记上形成层间绝缘层,以反射方式进行图像识别,可容易地识别定位标记,可正确地决定位置。
如上所述,本发明人等,提出通过由在树脂绝缘性衬底上设置开口部、通孔和铳孔部,而预先内藏IC芯片等的电子元件,积层间绝缘层,并在该IC芯片的焊盘上,以光蚀刻或激光,设置通孔,而形成导电层导体电路后,再重复设置层间绝缘层与导体层,而形成多层印刷电路板,可不使用封装树脂,以无引线、无凸块取得与IC芯片的电连接的构造。
然而,IC芯片的焊盘,一般是以铝等制造,在制造步骤中氧化,在表面形成氧化薄膜。因此,通过在表面形成的氧化薄膜,凸块的连接电阻增加,无法取得到IC芯片适当的电连接。另外,管芯焊盘上残存氧化膜,焊盘与过渡层的密着性不充足无法满足可靠性。
本发明为了解决上述课题,其目的为提供在IC芯片上可以无引线而取得适当地电连接的多层印刷电路板及多层印刷电路板的制造方法。
为了达到上述目的,本发明的多层印刷电路板的制造方法,至少具有以下(a)~(e)步骤:
(a)在前述衬底收容电子元件;
(b)将前述电子元件的管芯焊盘的表面的薄膜除去;
(c)在前述管芯焊盘上,形成用以与最下层的层间绝缘层的通孔连接的过渡层;
(d)在前述衬底上,形成层间绝缘层;以及
(e)在前述层间绝缘层上,形成导体电路以及连接过渡层的通孔。
在本发明中,为了在衬底内收容IC芯片,可以无引线而取得与IC芯片的电连接。并且,因为在IC芯片等的电子元件的管芯焊盘的连接面施予氧化薄膜除去处理,因此管芯焊盘的电阻减少,可提高导电特性。另外,由于在IC芯片部分设置过渡层,IC芯片部分被平坦化,上层的层间绝缘层也被平坦化,膜厚度变得平均。再者,上层的通孔形成时,也可保持形状的稳定性。较理想的为完全地除去薄膜。
在本发明中,是以逆溅射、等离子处理完去地除去氧化薄膜而提高IC芯片的管芯焊盘的导电特性。
进行逆溅射的场合,是以氩等的惰性气体做为溅射气体,对管芯焊盘表面的氧化薄膜进行逆溅射,而完全地除去氧化薄膜。以等离子进行处理的场合,将衬底放置于真空状态的装置内,在氧、或氮、碳酸气体、四氟化碳中放出等离子,而除去管芯焊盘表面的氧化薄膜。
在本发明中,因为除去薄膜,与过渡层的最下层的形成,连续地在非氧氛围中进行,因此不会在焊盘表面再形成氧化薄膜,可提高IC芯片的管芯焊盘与过渡层之间的导电特性与密着性。
本发明中的多层印刷电路板,是在衬底上重复形成层间绝缘层与导体层,在该层间绝缘层形成通孔,并通过该通孔而电连接,
在前述衬底中内藏电子元件;
在前述电子元件的管芯焊盘上,形成与最下层的层间绝缘层的通孔连接的过渡层;以及
除去前述管芯焊盘的表面的薄膜。
在本发明中,因为在衬底内收容IC芯片,可以无引线取得与IC芯片的电连接。并且,由于对IC芯片等的电子元件的管芯焊盘的连接面施加氧化薄膜除去处理,因此可减低管芯焊盘的电阻,提高导电特性。另外,通过在IC芯片部分设置过渡层,由于IC芯片部分被平坦化,上层的层间绝缘层也被平坦化,膜厚度也变得平均。再者,形成上层的通孔时,也可保持形状的稳定性。较理想的是薄膜完全地除去。
本发明提供一种多层印刷电路板,具有在芯衬底上重复形成的导体层和层间绝缘层、形成在该层间绝缘层中的通孔,并且通过该通孔建立电连接,其特征在于,
所述芯衬底包括其上放置有定位标记的电子元件,所述芯衬底具有基于所述电子元件的所述定位标记形成的定位标记;
将被连接到最下层的层间绝缘层的通孔的过渡层形成在所述电子元件的焊盘部分上,基于所述芯衬底的定位标记形成所述最下层的层间绝缘层的通孔;和所述过渡层大于所述焊盘部分。
本发明还提供一种多层印刷电路板的制造方法,该多层印刷电路板具有在芯衬底上重复形成的导体层和层间绝缘层、形成在该层间绝缘层中的通孔,并且通过该通孔建立电连接,其特征在于,该方法至少包括以下(a)~(d)步骤:
(a)使得所述芯衬底包含其上放置有定位标记的电子元件;
(b)基于所述电子元件的所述定位标记,在所述芯衬底上形成定位标记;
(c)将被连接到最下层的层间绝缘层的通孔的过渡层被形成在所述电子元件的焊盘上;以及
(d)基于所述衬底的定位标记形成将被连接到所述电子元件的所述焊盘的通孔。
附图说明:
第1图是本发明的实施例1的多层印刷电路板的制造工序图。
第2图是实施例1的多层印刷电路板的制造工序图。
第3图是实施例1的多层印刷电路板的制造工序图。
第4图是实施例1的多层印刷电路板的制造工序图。
第5图是实施例1的多层印刷电路板的制造工序图。
第6图是实施例1的多层印刷电路板的剖面图。
第7图,(A)是扩大显示第3图(A)中的过渡层,(B)是第7图(A)的B箭头处放大图,(C)、(D)、(E)是过渡层的改变例的说明图。
第8图,(A)是实施例1的多层印刷电路板的透视图,(B)是扩大显示该多层印刷电路板的一部分的说明图。
第9图,(A)是实施例1的第1改变例的多层印刷电路板的透视图,(B)是扩大显示该多层印刷电路板的一部分的说明图。
第10图是实施例1的第2改变例的多层印刷电路板的剖面图。
第11图是实施例1的第3改变例的多层印刷电路板的剖面图。
第12图是实施例1的第4改变例的多层印刷电路板的剖面图。
第13图是实施例1的多层印刷电路板的制造工序图。
第14图是实施例1的多层印刷电路板的制造工序图。
第15图是实施例1的多层印刷电路板的制造工序图。
第16图是实施例1的多层印刷电路板的制造工序图。
第17图是实施例1的多层印刷电路板的制造工序图。
第18图是实施例1的多层印刷电路板的制造工序图。
第19图,(A)是第13图(D)中的芯衬底的平面图,(B)是第13图(E)的平面图。
第20图,(A)是光掩膜载置前的芯衬底的平面图,(B)是载置光掩膜状态的芯衬底的平面图。
第21图是实施例2的第1改变例的多层印刷电路板的剖面图。
第22图是实施例3的多层印刷电路板的制造工序图。
第23图是实施例3的多层印刷电路板的制造工序图。
第24图是实施例3的多层印刷电路板的制造工序图。
第25图是实施例3的多层印刷电路板的制造工序图。
第26图是实施例3的多层印刷电路板的剖面图。
第27图,(A)是扩大显示第22图(C)中的模焊盘部分的说明图,(B)是扩大显示第23图(A)中的模焊盘部分的说明图,(C)是扩大显示第24图(A)中的模焊盘部分的说明图。
第28图是实施例32的第1改变例的多层印刷电路板的剖面图。
第29图是扩大显示实施例3的第1改变例的模焊盘部分的图,(A)是显示氧化薄膜除去处理前的状态的图,(B)是显示氧化薄膜除去处理后的状态的图,(C)是显示在管芯焊盘上形成过渡层后的图。
第30图是显示进行评价实施例3与比较例的多层印刷电路板的1)剖面状态、2)电阻测定值、3)可靠性试验后的剖面状态、4)电阻测定值的共4个项目的结果的图表。
具体实施方式
以下,参照图而说明本发明的实施例。
实施例1
首先,参照第6图所示的多层印刷电路板10的剖面而说明本发明的实施例1的多层印刷电路板的构成。
第6图所示的多层印刷电路板,是由收容IC芯片20的芯衬底30,与层间树脂绝缘层50、层间树脂绝缘层150所组成。层间树脂绝缘层50上,形成通孔60以及导体电路58,层间树脂绝缘层150上,形成通孔160以及导体电路158。
IC芯片20上,披覆着钝化膜24,在该钝化膜24的开口内配设构成输出端子的管芯焊盘24。在铝制的管芯焊盘24之上,形成过渡层38。该过渡层38是由第1薄膜层33、第2薄膜层36、施加厚度膜37这3层所组成。
层间树脂绝缘层150上,配设着焊锡阻挡层70。在焊锡阻挡层70的开口部71下的导体电路158上,设置与未图示的子板、母板等的外部衬底连接用的BGA76。
在实施例1的多层印刷电路板10,在芯衬底30预先内藏IC芯片20,而在该IC芯片20的管芯焊盘24上配设过渡层38。因此,可不使用引线部件和封装树脂,而取得IC芯片与多层印刷电路板(安装衬底)的电连接。另外,因为在IC芯片部分形成过渡层38,所以IC芯片部分被平坦化,因此上层的层间绝缘层50也被平坦化,膜厚度也变得平均。并且,通过过渡层,也可在形成上层的通孔60时保持形状的稳地性。
再者,在管芯焊盘24上设置铜制的过渡层38,可防止管芯焊盘24上的树脂残留,另外,在后续步骤时即使经过浸渍于酸和氧化剂或蚀刻液中、各种回火步骤也不会产生管芯焊盘的变色,溶解。借此,使IC芯片的管芯焊盘与通孔的连接性和可靠性提高。且,40μm前后的直径的管芯焊盘24上通过60μm以上的过渡层38,而可可靠地连接60μm直径的通孔。
接着,参照第1~5图说明参照第6图的上述的多层印刷电路板的制造方法。
(1)首先,以将玻璃布等的心材与含浸于环氧等的树脂的预烤层积的绝缘树脂衬底(芯衬底)30为出发材料(参照第1图(A))。接着,在芯衬底30的一面上,以激光加工形成IC芯片收容用的凹部32(参照第1图(B))。在此,通过激光加工设置凹部,但也可通过将设有开口的绝缘树脂衬底与未设开口的树脂绝缘衬底贴合,而形成具备收容部的芯衬底。
(2)之后,在凹部32上,使用印刷机而涂布粘接材料34。此时,除了涂布以外,也可灌注(potting)。接着在粘接材料34上载置IC芯片20(参照第1图(C))。
(3)于是,挤压,或轻敲IC芯片20的上面而完全地收容于凹部32内(参照第1图(D))。借此,可平滑芯衬底30。
(4)之后,在收容IC芯片20的芯衬底30的全面进行蒸镀、溅射等,而全面形成导电特性的第1薄膜层33(第2图(A))。该金属可为锡、铬、钛、镍、锌、钴、金、铜等。特别是,使用镍、铬、钛,可抑制在界面的水分侵入,且在膜形成上与电特性上更适合。厚度较好是以0.001~2.0μm的范围形成,特别是,0.01~1.0μm为更佳。在铬的场合,较好为0.1μm的厚度。
通过第1薄膜层33,可进行管芯焊盘24的披覆,并提高过渡层与在IC芯片上与管芯焊盘24的界面的密着性。另外,以这些金属披覆管芯焊盘24,可防止水分往界面的侵入,以及管芯焊盘的溶解、腐蚀,并提高可靠性。另外,通过该第1薄膜层33,可以没有引线的安装方法取得与IC芯片的连接。
在此,使用铬、钛、镍,可抑制在界面的水分侵入,提高金属密着性。
(5)在第1薄膜层33上,通过溅射、蒸镀、或无电解电镀,形成第2薄膜层36(第2图(B))。该金属为镍、铜、金、银等。由于电特性、经济性、在后续步骤中形成的增层的导体层主要为铜,因此使用铜较好。
设置第2薄膜层的理由,是因为在第1薄膜层,无法取得用以形成后述的厚度施加层的电解电镀用的引线。第2薄膜层36,被用为施加厚度的引线。其厚度较好是以0.01~5μm的范围进行。特别是,较好为0.1~3μm之间,最适合第1薄膜层的披覆与引线。未满0.01μm,无法得到作为引线的部分,一超过5μm,蚀刻的时候,下层的第1薄膜层多去除而产生空隙,水分容易侵入,可靠性降低。
再者,较好的第1薄膜层与第2薄膜层的组合,是铬-铜、铬-镍、钛-铜、钛-镍等。以于金属的接合性和电特性传达性的观点比其他的组合为优。
(6)之后,涂布阻挡层、曝光、显像而在IC芯片的管芯焊盘的上部设置开口那样设置电镀阻挡层35,以下列条件施予电解电镀,而设置电解电镀膜(施加厚度膜)37(第2图(C))。
[电解电镀水溶液]
硫酸2.24mol/l
硫酸铜0.26mol/l
添加剂(アトテツクジヤパン制造,カパラシド HL)
19.5ml/l
[电解电镀条件]
电流密度1A/dm2
时间65分钟
温度22±2℃
除去电镀阻挡层35后,以蚀刻除去电镀阻挡层35下的无电解第2薄膜层36、第1薄膜层33,而在IC芯片的管芯焊盘24上形成过渡层38(第2图(D))。在此,通过电镀阻挡层而形成过渡层,但是也可在无电解第2薄膜层36上平均地形成电解电镀膜后,形成蚀刻阻挡层,曝光、显像露出过渡层以外的部分的金属而进行蚀刻,而在IC芯片的管芯焊盘上形成过渡层。电解电镀膜的厚度较好为1~20μm的范围。如果比该厚度厚,则蚀刻时会引起底切,因为在形成的过渡层、通孔与界面会产生空隙。
(7)接着,以喷洒方式吹付蚀刻液于衬底上,通过蚀刻而将过渡层38的表面形成粗化面38a(图3A)。也可使用无电解电镀和氧化还原处理形成粗化面。第7图(A)是扩大显示第3图(A)中的过渡层38,第7图(A)的B箭头所指处示于第7图(B)。过渡层38,是由第1薄膜层33、第2薄膜层36、施加厚度膜37的3层构造组成。如第7图(A)所示,过渡(transition)是以圆形形成,但是也可如第7图(C)所示的椭圆形、第7图(D)所示的矩形、第7图(E)所示的形状取而代之。
(8)经过上述步骤的衬底上,一边升温至温度50~150℃一边以压力5kg/cm2真空压着层压(laminate)厚度50μm的热硬化型树脂片(sheet),而设置层间树脂绝缘层50(参照第3图(B))。真空压着的真空度为10mmHg。
(9)之后,以波长10.4μm的CO2气体激光,并以光束直径5μm、最热模式、脉冲波宽5.0μm秒、掩膜的孔径0.5mm、1射程的条件,在层间树脂绝缘层50上设置直径80μm的通孔用开口48(参照第3图(C))。使用铬酸而除去开口48内的树脂残留。在管芯焊盘上设置铜制的过渡层38,可防止管芯焊盘24上的树脂残留,借此,使管芯焊盘24与后述的通孔60的连接性和可靠性提高。并且,在40μm直径前后的管芯焊盘24上通过60μm以上的过渡层38,而可可靠地连接60μm直径的通孔用开口48。再者,此处,是使用过锰酸而除去树脂残留,但也可使用氧等离子而进行去残渣处理。
(10)接着,通过浸渍于铬酸、过锰酸盐等的氧化剂中,而设置层间树脂绝缘层50的粗化面50α(参照第3图(D))。该粗化面50α可以在0.05-5μm的范围。作为一例,在过锰酸钠溶液50g/l,在温度60℃中浸渍5-25分钟,设置1-5μm的粗化面50α。除了上述以外,也可使用日本真空技术有限公司制造的SV-4540进行等离子处理,在层间树脂绝缘层50的表面形成粗化面50a。此时,使用氩气为惰性气体,以电力200W、气压0.6Pa、温度70℃的条件,实施2分钟等离子处理。
(11)在形成粗化面50α的层间树脂绝缘层50上,设置金属层52(参照第4图(A))。金属层52,是以无电解电镀形成。通过预先在层间树脂绝缘层50的表面施加钯(pallodoum)等的触媒,并浸渍于无电解电镀液中5~60分钟,设置以0.1~5μm的范围的电镀膜的金属层52。其一例为,
[无电解电镀水溶液]
NiSO4 0.003mol/l
酒石酸 0.200mol/l
硫酸铜 0.030mol/l
HCHO 0.050mol/l
NaOH 0.100mol/l
α,α′-吡啶 100mg/l
聚乙烯乙二醇(PEG) 0.10g/l
浸渍于34℃的液体温度40分钟。
除了上述以外也可使用与上述的等离子处理同样装置,交换内部的氩气体后,以Ni及Cu为靶材而溅射,以气压0.6Pa、温度80℃、电力200W时间5分钟的条件进行,而在层间树脂绝缘层50的表面形成Ni/Cu金属层52。此时,形成的Ni/Cu金属层52的厚度为0.2μm。另外,也可以蒸镀、电着等取代溅射形成金属膜。并且,以溅射、蒸镀、电着等的物理性方法形成施加薄层后,也可施予无电解电镀。
(12)在完成上述处理的衬底30上,贴合市售的感光性干膜,并载置铬气掩膜,而以40mJ/cm2曝光后,以0.8%碳酸钠显像处理,而设置厚度25μm的电镀阻挡层54。接着,以下列条件施予电解电镀,而形成厚度18μm的电镀阻挡层膜56(参照第4图(B))。再者,电解电镀水溶液中的添加剂为アトテツクジヤパン制造,カパラシド HL。
[电解电镀水溶液]
硫酸 2.24mol/l
硫酸铜0.26mol/l
添加剂(アトテツクジヤパン制造,カパラシド HL)
19.5ml/l
[电解电镀条件]
电流密度1A/dm2
时间65分钟
温度22±2℃
(13)以5%NaOH剥离除去电镀阻挡层54后,使用硝酸及硫酸与过氧化氢的混合液蚀刻该电镀阻挡层下的金属层52而溶解除去,形成金属层52与电解电镀膜56组成的厚度16μm的导体电路58及通孔60,以含有第二铜错体与有机酸的蚀刻液,形成粗化面58α、60α(参照第4图(C))。也可使用无电解电镀和氧化还原处理形成粗化面。
(14)接着,通过重复上述(9)~(13)的步骤,在形成上层的层间150及导体电路158(含有通孔160)(参照第5图(A))。
(15)接着,混合60重量%的甲酚酶(cresol)酚醛固形物(novolak)型环氧树脂(日本化学医药公司制造)的环氧基50%烷基化的给予感光性的低聚合物(oligomer)(分子量4000)46.67重量份、溶解于甲基乙基酮的80重量%的双酚A型环氧树脂(油化シエル制造、Epicote 1001)15重量份、咪唑硬化剂(四国化成制造、2E4MZ-CN)1.6重量份、具有感光性单体的多价烷基单体(共荣化学制造、R604)3重量份、相同多价烷基单体(共荣化学制造、DPE6A)1.5重量份、分散系消泡剂(サンノプコ公司制造、S-65)0.71重量份溶解于DMDG中放入容器中,搅拌、混合而调整成混合组成物,再对该混合组成物加入光起始剂二苯基酮(benzophenone)(关东化学制造)2.0重量份、光增感剂米其勒酮(Michler’s ketone)(关东化学制造)0.2重量份,而得到在25℃的黏度调整至2.0Pa.s的焊锡阻挡层组成物(有机树脂绝缘材料)。
再者,黏度测定是以B型黏度剂(东京计器公司制造、DVL-B型在60rpm的场合是以转子No.4、6rpm的场合则以转子No.3而得。
(16)接着,在衬底30上,以20μm的厚度涂布上述焊锡阻挡层组成物,并以70℃ 20分钟、70℃30分钟的条件进行干燥处理后,使描绘有焊锡阻挡层开口部的图案的厚度5mm的掩膜密着于焊锡阻挡层70而以1000mJ/cm2的紫外线暴光,以DMTG溶液显像处理,而形成陆(land)直径620μm、开口直径460μm的开口71(参照第5图(B))。
(17)接着,将形成焊锡阻挡层(有机树脂绝缘层)70的衬底,浸渍于含有氯化镍(2.3×10-1mol/l)、次亚磷酸钠(2.8×10-1mol/l)、柠檬酸钠(1.6×10-1mol/l)的pH=4.5的无电解电镀液中20分钟,而在开口部71形成厚度5μm的镍电镀层72。再将该衬底于含有氰化金钾(7.6×10-3mol/l)、氯化铵(1.9×10-1mol/l)、柠檬酸钠(1.2×10-1mol/l)、次亚磷酸钠(1.7×10-1mol/l)的无电解电镀液中,在80℃的条件浸渍7.5分钟,而在镍电镀层72上形成厚度0.03μm的金电镀层74,而于导体电路158上形成焊锡焊盘75(参照第5图(C))。
(18)之后,在焊锡阻挡层70的开口部71上印刷焊锡膏材(paste),在200℃通过回流(reflow)形成BGA76。以此而内藏IC芯片20,可得到具有BGA76的多层印刷电路板10(参照第6图)。也可配设PGA(导电连接拴)取代PGA。
在上述的实施例中,层间树脂绝缘层50、150是使用热硬化性树脂片。该热硬化性树脂片是含有难溶性树脂、可溶性粒子、硬化剂、其他成分者。以下分别加以说明。
实施例1的热硬化性树脂片使用而得的环氧系树脂,是在酸或氧化剂中分散可溶性的粒子(以下称为可溶性粒子)酸或氧化剂中分散难溶性的树脂(以下称为难溶性树脂)者。
再者,所谓实施例1使用的“难溶性”“可溶性”,是在同一时间浸渍于同一种酸或氧化剂组成的溶液中时,相对溶解速度快的简称为“可溶性”,相对地,溶解速度慢的简称为“难溶性”。
上述可溶性粒子,举例为酸或氧化剂中可溶性的树脂粒子(以下称为可溶性树脂粒子)、酸或氧化剂中可溶性的无机粒子(以下称为可溶性无机粒子)、酸或氧化剂中可溶性的金属粒子(以下称为可溶性金属粒子)等。这些可溶性粒子可单独使用,也可两种以上并用。
上述可溶性粒子的形状并无特别限制,例如球状、碎片状等。又上述可溶性粒子的形状较好为一样的形状。因为可形成具有平均粗度的凹凸的粗化面。
上述可溶性粒子的平均粒径较好0.1~10μm。该粒径的范围也可含有两种以上不同粒径者。也就是说,含有平均粒径为0.1~0.5μm的可溶性粒子与平均粒径1~3μm的可溶性粒子等。借此可形成较复杂的粗化面,与导体电路的密着性也优良。再者,实施例1中,可溶性粒子的粒径是可溶性粒子的最长部分的长度。
上述可溶性树脂粒子举例如热硬化树脂、热可塑性树脂所组成者,浸渍于酸或氧化剂所组成的溶液时,若为比上述难溶性树脂溶解速度快者没有特别限定。
上述可溶性树脂粒子的具体例为例如环氧树脂、酚树脂、聚亚酰胺树脂、聚苯基树脂、聚烯烃树脂、氟树脂等所组成者,可为选自上述树脂一种,或为两种以上的树脂的混合物。
另外,上述可溶性树脂粒子也可使用橡胶组成的树脂粒子。上述橡胶可举例如聚丁二烯橡胶、环氧改质、胺脂改质、(甲基)丙烯腈改质等的各种改质聚丁二烯橡胶、含有羧基的(甲基)丙烯腈·丁二烯橡胶等。通过使用上述的橡胶,可溶性树脂粒子变得容易溶解于酸或氧化剂中。最后,使用酸而溶解可溶性树脂粒子时,也可以强酸以外的酸溶解,使用氧化剂溶解可溶性树脂粒子时,也可以氧化力比较弱的过锰酸盐溶解。另外,使用铬酸时,也可以低浓度溶解。因此,在树脂表面没有酸或氧化剂残留,如后述那样,粗化面形成后,施加氯化钯等的触媒时,给予触媒,触媒不会氧化。
上述可溶性无机粒子,可举例如至少一种选自铝化合物、钙化合物、钾化合物、镁化合物以及矽化合物组成的群组所组成的粒子。
上述铝化合物举例有铝、氢氧化铝等,上述钙化合物可举例如碳酸钙、氢氧化钙等,上述钾化合物可举例如碳酸钾等,上述镁化合物可举例如镁、白云石(dolomite)、氯卤性碳酸镁等,上述矽素化合物可举例如矽、沸石(zeolite)等。这些化合物可单独使用,也可两种以上并用。
上述可溶性金属粒子可举例如至少一种选自铜、镍、铁、锌、铅、金、银、铝、镁、钙以及矽素所组成的粒子等。另外,这些可溶性金属粒子,为了确保绝缘性,也可在表层披覆树脂。
上述可溶性粒子混合两种以上使用时,混合两种的可溶性粒子的组合较好为树脂粒子与无机粒子的组合。两者导电特性皆低,因此可确保树脂薄膜的绝缘性,同时可容易地调整与难溶性树脂之间的热膨胀,不会发生树脂薄膜所组成的层间树脂绝缘层的断裂,而层间树脂绝缘层与导体电路间也不会发生剥离。
上述难溶性树脂,在层间树脂绝缘层上使用酸或氧化剂形成粗化面时,只要能保持粗化面的形状,并无特别限定,例如热硬化树脂、热可塑性树脂、上述的复合体等。
另外,也可为施加上述树脂感光性的感光性树脂。通过使用感光性树脂,可使用暴光、显像处理在层间树脂绝缘层形成通孔用开口。
上述之中,较好为含有热硬化树脂者。据此,即使以电镀液或各种的加热处理,也可保持粗化面的形状。
上述难溶性树脂的具体例为例如环氧树脂、酚树脂、苯氧(phenoxy)树脂、聚亚酰胺树脂、聚苯基(polyphenylene)树脂、聚烯烃树脂、氟素树脂等。这些树脂可单独使用,或两种以上并用也可。热硬化性树脂、热可塑性树脂、这些复合体也可。
此外,较好为在1分子中,具有2个以上的环氧基的环氧树脂。可形成前述的粗化面,耐热性等也优良,因此即使在热循环条件下,也不会在金属层发生应力的集中,且难以引起金属层的剥离。
上述环氧树脂可举例如甲酚酶(cresol)酚醛固形物(novolak)型环氧树脂、双酚A型环氧树脂、双酚F型环氧树脂、酚醛固形物型环氧树脂、烷基酚醛固形物型环氧树脂、双酚F型环氧树脂、奈型环氧树脂、双环戊二烯型环氧树脂、具有酚类与酚性氢氧基的芳香族醛的缩合物的环氧化物、三环氧(glycidyl)异三聚氰酸酯(cyanurate)、脂环式环氧树脂等。上述可单独使用也可两种以上并用。借此可成为耐热性等优良者。
关于实施例1使用的树脂薄膜,上述可溶性粒子较好为在上述难溶性树脂中几乎平均分散者。因为可形成具有平均的粗糙度的凹凸的粗化面,也可在树脂薄膜上形成通孔与通孔,而可确保形成于其上的导体电路的金属层的紧密性。此外,也可仅在形成粗化面的表层部使用含有可溶性粒子的树脂薄膜。借此,在树脂薄膜的表层部以外可不以酸或氧化剂暴光,因此可可靠地保持通过层间树脂绝缘层的导体电路间的绝缘性。
上述树脂薄膜中,分散于难溶性树脂中的可溶性粒子的配合量较好为树脂薄膜的3~40重量%。可溶性粒子的配合量未满3重量%时,无法形成具有所期望的凹凸的粗化面,而超过40重量%时,使用酸或氧化剂而溶解可溶性粒子时,不能溶解到树脂薄膜的深部,而不能维持通过树脂薄膜组成的层间树脂绝缘层的导体电路间的绝缘性,将成为短路的原因。
上述树脂薄膜除了上述可溶性粒子、上述难溶性树脂以外,较好为含有硬化剂、其他成分等。
上述硬化剂举例有咪唑系硬化剂、胺系硬化剂、胍(guanidine)系硬化剂、上述硬化剂的环氧加成物(adduct)和上述硬化剂微胶囊化(microcapsule)者,三酚膦(triphenolephosphine)、四酚磷根(phosphonium)·四酚硼酸盐(borate)等的有机膦系化合物等。
上述硬化剂的含有量较好为树脂薄膜的0.05~10重量%。未满0.05重量%时,树脂薄膜的硬化不充分,因此酸和氧化剂侵入树脂薄膜的程度增加,而损坏树脂薄膜的绝缘性。另一方面,超过10重量%时,过剩的硬化剂成分将使树脂的组成变质,而导致可靠性的降低。
上述的其他成分,例如有不影响粗化面的形成的无机化合物或树脂等的填充剂。上述无机化合物例如有矽、铝、白云石等,上述树脂例如有聚亚酰胺树脂、聚丙烯酸树脂、聚酰胺亚酰胺树脂、聚伸苯基树脂、黑素(melanin)树脂、烯烃系树脂等。通过含有上述的填充剂,可达到热膨胀系数的整合以及耐热性、耐药品性的增加等,而提高印刷电路板的性能。
另外,上述树脂填充剂也可含有溶剂。上述溶剂例如有丙酮、甲基乙基酮、环己酮等的酮类,乙基乙酸、丁基乙酸、赛珞苏乙酸盐(cellosolveacetate)和甲苯、二甲苯等的芳香族碳氢化合物。上述溶剂可单独使用,也可两种类以上并用。但是,这些的层间树脂绝缘层,加入350℃以上的温度时将完全溶解、碳化。
贴附上述树脂薄膜后,以激光开口,而在层间树脂绝缘层上开口通孔。之后,浸渍于酸或氧化剂,而在层间树脂绝缘层形成粗化层。酸可使用硫酸、磷酸、盐酸、蚁酸等的强酸,氧化剂可使用铬酸、铬硫酸、过锰盐酸等。借此,可将可溶性粒子溶解或使其脱落而在层间树脂绝缘层的表面上形成粗化层。形成该粗化层的层间树脂绝缘层上,使施加Pb等的触媒后,施予无电解电镀。在无电解电镀膜上施加阻挡层,通过暴光、显影而形成电镀阻挡层的非形成部。在该非形成部上施予电解电镀而剥离阻挡层,通过蚀刻而除去层间树脂绝缘层上的无电解电镀膜形成通孔与导体电路。
第8图(A)是为实施例1的多层印刷电路板10的侧视图,第8图(B)是扩大显示该多层印刷电路板10的一部分的说明图。在实施例1的多层印刷电路板10的表面上,以多格子状在衬底全面配设焊锡焊盘(BGA)76。在实施例1,在IC芯片20上也形成BGA 76,可缩短从IC芯片20的配线长度。
[实施例1的第1改变例]
第9图(A)是实施例1的第1改变例的多层印刷电路板的侧视图,第9图(B)是扩大显示该多层印刷电路板10的一部分的说明图。在改变例的多层印刷电路板10的表面,除了四个角落以外以多格子状于IC芯片20配设焊锡焊盘(BGA)76。该改变例中,具有避免IC芯片,BGA76不易受到来自IC芯片的热的、电磁影响的优点。
[实施例1的第2改变例]
接着,参照第10图说明实施例1的第2改变例的多层印刷电路板。上述的实施例1中,是以配设BGA的场合说明。
第2改变例与实施例1相同,但是是通过如第10图所示的导电连接拴96而取得连接的PGA方式而构成。
[实施例1的第3改变例]
接着,参照第11图说明实施例1的第3改变例的多层印刷电路板。
上述的实施例1中,是在以凹部设置于芯衬底30的凹部32收容IC芯片。相对于此,第3改变例,是在形成于芯衬底30通孔32收容IC芯片20。该第3改变例,因为可直接安装散热槽(heat sink)于IC芯片20的里侧,因此具有可有效地冷却IC芯片20的优点。
[实施例1的第4改变例]
接着,参照第12图说明实施例1的第4改变例的多层印刷电路板。
上述的实施例1,是在多层印刷电路板内收容IC芯片。
相对于此,第4改变例中,在多层印刷电路板内收容IC芯片20的同时,在表面载置IC芯片120。内藏的IC芯片20被用为发热量较小的快速缓冲储存存储器,而表面的IC芯片120是载置运算用的CPU。
IC芯片20的管芯焊盘24与IC芯片120的管芯焊盘124是通过过渡层38-通孔-60-导体电路58-通孔-160-导体电路158-BGA 76而连接着。另一方面,IC芯片120的管芯焊盘124与子板90的焊盘92是通过BGA-76U-导体电-158-通孔160-导体电路58-通孔60-通孔136-通孔60-导体电路58-通孔160-导体电路158-BGA 76U而连接着。
第4改变例,可分别制造成品率低的快速缓冲存储器20与CPU用的IC芯片120,但可相近配置IC芯片120与快速缓冲储存存储器20,且IC芯片的动作也可高速进行。该第4改变例,内藏IC芯片的同时也在表面载置,可安装备功能相异的IC芯片的电子元件,可得到更高功能的多层印刷电路板。
根据实施例1的构造,可不通过引线部件,取得IC芯片与印刷电路板的连接。因此,也不需要树脂封装。不会引起因引线部件和封装树脂的不适合,而能提高连接性和可靠性。另外,因为可直接连接IC芯片的管芯焊盘与印刷电路板的导电层,而能使电特性提高。
此外,比起已知的IC芯片的安装方法,也可缩短到IC芯片~衬底~外部衬底的配线长,也具有可减低回路感抗(loop inductance)的效果。
[实施例2]
接着,参照第18图所示的多层印刷电路板的剖面说明本发明的实施例2的多层印刷电路板的构造。
第18图所示的多层印刷电路板210,是由收容IC芯片220的芯衬底230与层间树脂绝缘层250、层间树脂绝缘层350所组成。层间树脂绝缘层250上形成通孔260及导体电路258,层间树脂绝缘层350上则形成通孔360及导体电路358。
IC芯片220上披覆钝化膜224,在该钝化膜224的开口内配设构成输出端子的管芯焊盘224,及定位标记223。在焊盘224的上面,形成主要由铜组成的过渡层238。
层间树脂绝缘层350上,配设着焊锡阻挡层270。焊锡阻挡层270的开口部271下的导体电路358上,设置与未图示的子板、母板等的外部衬底连接用的BGA 276。
实施例2的多层印刷电路板210,在芯衬底230预先内藏IC芯片220,该IC芯片220的焊盘224上配设过渡层238。因此,可不使用引线部件和封装树脂,取得IC芯片与多层印刷电路板(安装衬底)的电连接。
另外,在管芯焊盘224上设置铜制的过渡层238,可防止焊盘224上的树脂残留,另外,即使在后序步骤时浸渍在酸和氧化剂或蚀刻液中,各种回火步骤也不会发生焊盘224的变色、溶解。
并且,在后述的制造步骤中,以IC芯片220的定位标记223为基准在芯衬底230上形成定位标记231,以符合该定位标记231而形成通孔260。因此,在IC芯片220的焊盘224上正确地决定通孔260的位置,可可靠地连接焊盘224与通孔260。
接着,参照第13~17图说明参照第18图的上述的多层印刷电路板的制造方法。
(1)首先,以将玻璃布等的心材与含浸于环氧等树脂的预烤层积的绝缘树脂衬底(芯衬底)230为出发材料(参照第13图(A))。接着,在芯衬底230的一面上,以挖洞加工形成IC芯片收容用的凹部232(参照第13图(B))。
(2)之后,在凹部232,用印刷机涂布粘接材料234。此时,除了涂布以外,也可灌注。接着,在粘接材料234上载置IC芯片220(参照到13图(C))。
(3)于是,挤压、或轻敲IC芯片220的上面而完全地收容于凹部232内(参照第13图(D))。第19图(A)是显示第13(D)图所示的IC芯片220及芯衬底230的平面图。收容于芯衬底230的凹部232的IC芯片220,因为凹部的加工精密度,还有通过粘接材料234,而无法正确地对芯衬底决定位置。
(4)以照相机(camera)280于IC芯片220的4个角落摄影定位标记223,并以该定位标记223为基准,以激光在芯衬底230的4个角落穿设定位标记用凹部231a(第13图(E))。第19图(B)是显示第13图(E)中所示的IC芯片220及芯衬底230的平面图。
(5)之后,在收容IC芯片220的芯衬底230的全面进行蒸镀、溅射等物理性蒸镀,而全面性形成导电特性的金属膜233(第14图(A))。该金属也可为一种以上的锡、铬、钛、镍、锌、钴、金、铜等所形成,视场合,也可以2层以上不同金属形成。厚度较好是以0.01~2.0μm之间形成。特别好为0.01~1.0μm。
在金属膜233上,在通过无电解电镀、电解电镀或这些的复合电镀,形成电镀膜236(第14图(B))。形成的电镀的种类为铜、镍、金、银、锌、铁等。由于电特性、经济性、在后续步骤中形成的增层的导体层主要为铜,因此可以使用铜。其厚度较好是以0.01~5μm的范围进行。未满0.01μm将无法全面性形成电镀膜,超过5μm的话,难以用蚀刻除去,且定位标记将完全被埋住,难以认出。较好的范围为0.1~3.0μm。也可以溅射、蒸镀形成。
(6)之后,施予阻挡层235a,载置描绘有对应焊盘224的图案239a及定位标记239b的掩膜239(第14图(C))。该掩膜239的决定位置,是在描绘环(ring)状的定位标记239b内,放入芯衬底230侧的定位标记用通孔231a,从上方照射光,以照相机289进行照相来自定位标记231的反射光。实施例2,因为在定位标记231上也形成铜电镀膜,因此反射光容易穿透阻挡层235a,且能容易地封合衬底与掩膜的位置。
(7)暴光、显像而在IC芯片的焊盘224的上部以设置开口的状态形成电镀阻挡层235,施予电解电镀而设置电解电镀膜237(第14图(D))。除去电镀阻挡层235后,除去电镀阻挡层235下的无电解电镀膜236、金属膜233,而在IC芯片的焊盘224上形成过渡层238,又在凹部231a上形成定位标记231(第14图(E))。
(8)接着,以喷洒方式吹付蚀刻液于衬底上,通过蚀刻而将过渡层238的表面形成粗化面238a(参照第15图(A))。也可使用无电解电镀和氧化还原处理形成粗化面。
(9)经过上述步骤的衬底上,用与实施例1同样的真空压着层压热硬化树脂片,而设置层间树脂绝缘层250(参照第15图(B))。
(10)接着,透过层间树脂绝缘层250以照相机280照相定位标记231进行位置封合,以波长10.4μm的CO2气体激光,并以光束直径5μm、脉冲波宽5.0m秒、掩膜的孔径0.5mm、1射程的条件,在层间树脂绝缘层250上设置直径80μm的通孔用开口248(参照第15图(C))。
(11)接着,将层间树脂绝缘层250的表面粗化,形成粗化面250a(参照第15图(E))。
(12)接着,在层间树脂绝缘层250的表面形成金属膜252(参照第16图(A))。
(13)在完成上述处理的衬底230上,贴合市售的感光性干膜254a,并载置描绘有对应焊盘的图案253a及定位标记253b的掩膜膜253。第20图(A)显示载置掩膜膜253前的芯衬底230的平面图,而第20图(B)显示载置掩膜膜253的状态。该记号253的决定位置,是在描绘环状的定位标记253b,放入芯衬底230侧的定位标记231,从上方照射光,以照相机289进行照相从定位标记231的反射光。实施例2,因为在定位标记231上也形成电镀膜237,因此反射光容易穿透层间树脂绝缘层250及薄膜254a,可正确地进行决定位置。再者,如上述对构成定位标记231的铜电镀膜237施予粗化处理,但是因为表面的反射率高,不进行该粗化处理,或进行粗化处理后,可以药液、激光等进行表面的平滑化处理。
(14)之后,以100mJ/cm2暴光,以0.8%碳酸钠显像处理,而设置厚度15μm的电镀阻挡层254。(第16图(C))。
(15)接着,以与实施例1相同的条件施予电解电镀,而形成厚度15μm的电镀阻挡层膜256(参照第16图(D))。
(16)以5%NaOH剥离除去电镀阻挡层254后,以蚀刻溶解除去该电镀阻挡层下的金属层252而进行溶解除去,形成金属层252与电解电镀膜256组成的厚度16μm的导体电路258及通孔260,以蚀刻液,形成粗化面258a、260a(参照第17图(A))。
(17)接着,通过重复上述(6)~(12)的步骤,在形成上层的层间树脂绝缘层350及导体电路358(含有通孔360)(参照第17图(B))。
(18)接着,在衬底230上,以20μm的厚度涂布与实施例1同样的焊锡阻挡层组成物,进行干燥处理后,使掩膜密着于焊锡阻挡层270而暴光,以DMTG溶液显像处理,而形成直径200μm的开口271(参照第17图(C))。
(19)接着,将形成焊锡阻挡层(有机树脂绝缘层)270的衬底,浸渍于无电解电镀液中,而在开口部271形成厚度5μm的镍电镀层272。再将该衬底浸渍于无电解电镀液中,而在镍电镀层272上形成厚度0.03μm的金电镀层274,在导体电路358上形成焊锡焊盘275(参照第17图(D))。
(20)之后,在焊锡阻挡层270的开口部271上印刷焊锡膏材(paste),在200℃通过回流(reflow)形成BGA276。以此而内藏IC芯片220,可得到具有BGA 276的多层印刷电路板210(参照第18图)。也可配设PGA(导电连接拴)取代BGA。
[实施例2的第1改变例]
接着,参照第21图说明实施例2的第1改变例的多层印刷电路板。
上述的实施例2,是在多层印刷电路板内收容IC芯片。
相对于此,实施例2的第1改变例中,是在多层印刷电路板内收容IC芯片220的同时,在表面载置IC芯片320。内藏的IC芯片220被用为发热量较小的快速缓冲存储器,而表面的IC芯片320则载置运算用的CPU。
该实施例2的第1改变例,构成芯衬底230的通孔336的贯通孔335,是以芯衬底的定位标记231为基准而形成。
[实施例3]
接着,参照第26图所示的多层印刷电路板410的剖面说明本发明的实施例3的多层印刷电路板的构造。
第26图所示的多层印刷电路板410,是由收容IC芯片420的芯衬底430,与层间树脂绝缘层450、层间树脂绝缘层550所组成。层间树脂绝缘层450上形成通孔460及导体电路458,层间树脂绝缘层550上则形成通孔560及导体电路558。
IC芯片420上披覆IC保护膜(钝化+聚亚酰胺)422,在该IC保护膜422的开口内配设构成输出端子的铝制的管芯焊盘424。在管芯焊盘424的表面,形成氧化薄膜426。在管芯焊盘424上,形成过渡层438,并除去管芯焊盘424与过渡层438的接触面的氧化薄膜426。
层间树脂绝缘层550上,配设着焊锡阻挡层470。焊锡阻挡层470的开口部471下的导体电路558上,设置与未图示的子板、母板等的外部衬底连接用的焊锡凸块476,或设置未图示的导电连接拴。
本实施例的多层印刷电路板410,在芯衬底430预先内藏IC芯片420,该IC芯片420的管芯焊盘424上配设过渡层438。因此,容易进行形成通孔时的对位,即使管芯焊盘节距150μm以下、焊盘尺寸20μm以下也可稳定形成增层。未形成过渡层的管芯焊盘,以光蚀刻形成层间绝缘层的通孔时,通孔直径比管芯焊盘直径大,进行通孔底部残渣去除、层间树脂绝缘层表面粗化处理的去残渣处理时将溶解、损伤管芯焊盘表面的保护层聚亚酰胺层。另一方面,激光的场合,通孔直径比管芯焊盘直径大时,管芯焊盘及钝态保护、聚亚酰胺层(IC的保护膜)因激光而被破坏。再者,IC芯片的焊盘非常小,通孔直径比管芯焊盘尺寸大,不论以光蚀刻、激光,位置封合都非常困难,多发生管芯焊盘与通孔的连接不良。
相对于此,管芯焊盘424上设置过渡层438,即使管芯焊盘节距150μm以下、焊盘尺寸20μm以下也可在管芯焊盘424上可靠地连接通孔460,可提高焊盘424与通孔460的连接性和可靠性。并且,通过比IC芯片的焊盘更大直径的过渡层,即使在去残渣、电镀等后续步骤时,浸渍于酸和蚀刻液中,经过各种回火步骤,也不会发生溶解、损伤管芯焊盘及IC保护膜(钝态保护、聚亚酰胺层)的危险。
另外,在铝制的管芯焊盘424表面上形成的氧化薄膜426,因为以后述的氧化薄膜除去处理管芯焊盘424与过渡层438的接触面,而可减低管芯焊盘424的电阻,并可提高导电特性。
接着,参照第22~27图说明参照第26图的上述的多层印刷电路板的制造方法。
(1)首先,以将玻璃布等的心材与含浸于环氧等的树脂的预烤层积的绝缘层树脂衬底(芯衬底)430为出发材料(参考第22图(A))。接着,在芯衬底430的一面上,以挖洞加工形成IC芯片收容用的凹部432(参照第22图(B))。
(2)之后,在凹部432,用印刷机涂布粘接材料434。此时,除了涂布以外,也可灌注。接着,在粘接材料434上载置IC芯片420。IC芯片420上,披覆IC保护膜(钝态保护+聚亚酰胺)422,在IC保护膜422的开口内配设构成输出端子的管芯焊盘424。另外,管芯焊盘424的表面覆盖氧化薄膜426(参照第22图(C))。在此,第27图(A)是扩大显示IC芯片420的管芯焊盘424部分的说明图。
(3)于是,挤压、或轻敲IC芯片420的上面而完全地收容于凹部432内(参照第22图(D))。借此,可平滑芯衬底430。
(4)接着,将收容IC芯片420的芯衬底430放入为真空状态的溅射装置内,以惰性气体氩气做为溅射气体,露出管芯焊盘424表面而以氧化薄膜为靶材进行逆溅射,除去露出的氧化薄膜426(参照第23图(A))。在此,第127图(B)是扩大IC芯片420的管芯焊盘424部分的说明图。
借此,可减低管芯焊盘424的电阻,并提高导电特性,且增加与过渡层的密着性。在此,使用逆溅射为氧化薄膜除去处理,但是除了逆溅射外也可使用等离子处理。以等离子处理进行的场合,是将衬底放入真空状态的装置内,在氧、或氮、碳酸气体、四氟化碳中放出等离子,而除去管芯焊盘表面的氧化薄膜。再者,除了逆溅射、等离子处理以外,也可以酸处理管芯焊盘表面而除去氧化薄膜。氧化薄膜除去处理,较好是使用磷酸。在此,虽是除去氧化薄膜,但也可在管芯焊盘上形成防锈用的氮化膜等的薄膜时,而进行用于提高导电特性的除去处理。
(5)之后,连续地使用相同装置,不在氧氛围中暴光IC芯片,在芯衬底430的全面进行以Cr及Cu为靶材的溅射,而全面性形成导电特性的金属膜433(参照第23图(B))。金属膜433可为一层以上锡、铬、镍、锌、钴、金、铜等的金属形成。厚度以0.001~2.0μm之间为佳。特别好为0.01~1.0μm。铬的厚度,是不在溅射层中导入裂痕,且与铜溅射层的密着充足的厚度。在实施例3,因为除去薄膜,与过渡层的最下层(金属膜)433的形成是以同一装置连续在非氧素氛围中进行,不再于焊盘表面形成氧化薄膜,可提高IC芯片的管芯焊盘424与过渡层438之间的导电特性。
在金属膜433上,也可通过无电解电镀、电解电镀、或该复合电镀,形成电镀膜436(参照第23图(C))。形成的电镀的种类为铜、镍、金、银、锌、铁等。从电特性、经济性、还有在后序形成的增层的导体层主要为铜来说,使用铜为佳。其厚度较好为以0.01~5μm的范围进行。特佳为0.1~3μm。也可以溅射、蒸镀形成。再者,较好的第1薄膜层与第2薄膜层的组合为铬-铜、铬-镍、钛-铜、钛-镍等。以与金属的接合性和电传导性来说比其他的组合为优。
(6)之后,涂布阻挡层、或层压感光性薄膜,暴光、显像而在IC芯片420的焊盘的上部以设置开口的状态设置电镀阻挡层435,并设置电解电镀膜437(第23图(D))。电解电镀膜437的厚度1~20μm为佳。除去电镀阻挡层435后,以蚀刻除去电镀阻挡层435下的无电解电镀膜436、金属膜433,而在IC芯片的焊盘424上形成过渡层438(参照第24图(A))。另外,第27图(C)是扩大显示IC芯片420的管芯焊盘424部分的说明图。
在此,是以电镀阻挡层形成过渡层438,但是也可在无电解电镀膜436之上均一地形成电解电镀膜437后,形成蚀刻阻挡层,暴光、显像而露出过渡层以外的部分的金属而进行蚀刻,在IC芯片420的管芯焊盘424上形成过渡层438。在该场合,电解电镀膜437的厚度较好为1~20μm的范围。如果比该厚度厚时,在蚀刻的时候会引起底切,因为形成的过渡层与通孔的界面会发生空隙。
(7)接着,以喷洒方式吹付蚀刻液于衬底上,通过蚀刻而将过渡层438的表面形成粗化面438a(参照第24图(B))。也可使用无电解电镀和氧化还原处理形成粗化面。
(8)经过上述步骤的衬底上,用与实施例1同样的真空压着层压热硬化树脂片,而设置层间树脂绝缘层450(参照第24图(C))。
(9)接着,以CO2气体激光在层间树脂绝缘层450上设置通孔用开口448(参照第24图(D))。之后,也可使用铬酸、过锰酸等的氧化剂除去开口448内的树脂残留。管芯焊盘424上设置铜制的过渡层438,形成通孔时的对位容易,且在管芯焊盘424上可可靠地连接通孔,而提高焊盘与通孔的连接性和可靠性。借此,可稳定形成增层。通过在IC芯片的焊盘上以更大直径的过渡层进行通孔底部残渣去除,层间树脂绝缘层表面粗化处理时,电镀步骤等的后续步骤时,浸渍于酸和蚀刻液中,即使通过各种回火,也不会有溶解、损伤管芯焊盘424及IC的保护膜(钝态保护、聚亚酰胺层)422的危险。再者,此处虽使用过锰酸除去树脂残渣,也可使用氧等离子进行去残渣处理。
(10)接着,将层间树脂绝缘层450的表面粗化,形成粗化面450a(参照第25图(A))。再者,也可省略该粗化工序。
(11)接着,在层间树脂绝缘层450的表面施加钯触媒后,浸渍衬底于无电解电镀液中,在层间树脂绝缘层450的表面形成无电解电镀膜452(参照第25图(B))。
(12)在完成上述处理的衬底430上,贴合市售的感光性干膜,并载置铬玻璃掩膜,而以40mJ/cm2暴光后,以0.8%碳酸钠显像处理,设置厚度25μm的电镀阻挡层454。接着,以与实施例1相同的条件施予电解电镀,而形成厚度18μm的电镀阻挡层膜456(参照第25图(C))。
(13)以5%NaOH剥离除去电镀阻挡层454后,以蚀刻溶解除去该电镀阻挡层下的无电解电镀膜452而溶解除去,形成无电解电镀膜452与电解电镀膜456组成的厚度16μm的导体电路458及通孔460,以蚀刻液,形成粗化面458a、460a(参照第25图(D))。之后的步骤,与上述实施例1的(13)~(17)相同因此省略说明。
[实施例3的第1改变例]
接着,参照第28图及第29图说明实施例3的第1改变例的多层印刷电路板。第28图是显示多层印刷电路板510双剖面,第29图则扩大管芯焊盘424部分而显示的图,第29图(A)是显示氧化薄膜被除去处理前的状态的图,第29图(B)是显示氧化膜除去处理后的状态的图,第29图(C)是显示管芯焊盘424上形成过渡层438后的图。
上述的实施例3中,是以配设BGA的场合说明。实施例3的第1改变例,与实施例3相同,但是是通过如第28图所示的导电连接拴496而取得连接的PGA方式而构成。
实施例3的第1改变例的制造方法如第29图(B)所示将管芯焊盘424的氧化薄膜426的一部分施予逆溅射、等离子处理、酸处理的任一种氧化膜除去处理而除去。之后,如第29图(C)所示在管芯焊盘424上,形成金属膜433及无电解电镀膜436、电解电镀膜437组成的过渡层438。借此,可与实施例3同样地降低管芯焊盘426的电阻,并提高导电特性。
[比较例]
除了不除去薄膜以外,与实施例3同样形成过渡层而得到多层印刷电路板。
试验结果
将实施例3与比较例的多层印刷电路板以1)剖面状态、2)电阻测定值、3)可靠性试验后的剖面状态、4)电阻测定值的共计4个项目进行评价的结果示于第30图中的图表。
(1)剖面状态
形成过渡层后,切断剖面,以显微镜(×100)观察焊盘上的氧化膜的有无。
(2)电阻测定值
形成过渡层后,测定连接电阻。测定的数值是在20处测定的平均值。
(3)可靠性试验后的剖面状态
形成多层印刷电路板后,热循环试验以((130℃/3分钟)+(-60℃/3分钟)为1循环实施1000循环)完成后,切断剖面,以显微镜(×100)观察焊盘上的氧化薄膜的有无、及过渡层的剥离的有无。
(4)可靠性试验后的电阻测定值
形成多层印刷电路板后,热循环试验以((130℃/3分钟)+(-60℃/3分钟)为1循环实施1000循环)完成后,切断剖面,测定连接电阻。测定的数值是在20处测定的平均值。
如第30图中的图表所示,实施例3的多层印刷电路板,由于没有氧化膜,连接电阻值小,因此不会发生电连接问题。另外,可靠性试验后也不会恶化。即,重复热循环试验2000循环后,也未发现这样程度的电阻值的增加。
比较例中,氧化膜既会残留,连接电阻值也大。视场合也发现完全没取得电连接。可靠性试验发现该倾向更为明显。
Claims (12)
1.一种多层印刷电路板,具有在芯衬底上重复形成的导体层和层间绝缘层,形成在该层间绝缘层中的通孔,并且通过该通孔建立电连接,其特征在于,
所述芯衬底包括其上放置有定位标记的电子元件,所述芯衬底具有基于所述电子元件的所述定位标记形成的定位标记;
将被连接到最下层的层间绝缘层的通孔的过渡层形成在所述电子元件的焊盘部分上,基于所述芯衬底的定位标记形成所述最下层的层间绝缘层的通孔;和
所述过渡层大于所述焊盘部分。
2.如权利要求1所述的多层印刷电路板,其特征在于,所述衬底是封装衬底。
3.如权利要求1所述的多层印刷电路板,其特征在于,过渡层由至少两层构成。
4.如权利要求1所述的多层印刷电路板,其特征在于,过渡层包括第1薄膜层、第2薄膜层、厚度施加层。
5.如权利要求4所述的多层印刷电路板,其特征在于,所述第1薄膜层是选自锡、铬、钛、镍、锌、钴、金和铜所构成的组中的一种类型或者多种类型。
6.如权利要求4所述的多层印刷电路板,其特征在于,所述第2薄膜层是选自镍、铜、金和银中的一种类型或者多种类型。
7.如权利要求4所述的多层印刷电路板,其特征在于,所述厚度施加层是由铜制成。
8.一种多层印刷电路板的制造方法,该多层印刷电路板具有在芯衬底上重复形成的导体层和层间绝缘层,形成在该层间绝缘层中的通孔,并且通过该通孔建立电连接,其特征在于,
该方法至少包括以下(a)~(d)步骤:
(a)使得所述芯衬底包含其上放置有定位标记的电子元件;
(b)基于所述电子元件的所述定位标记,在所述芯衬底上形成定位标记;
(c)将被连接到最下层的层间绝缘层的通孔的过渡层被形成在所述电子元件的焊盘上;以及
(d)基于所述衬底的定位标记形成将被连接到所述电子元件的所述焊盘的通孔。
9.如权利要求8所述的多层印刷电路板的制造方法,其特征在于,所述定位标记包括金属膜。
10.如权利要求8所述的多层印刷电路板的制造方法,其特征在于,还包括除去所述电子元件的所述焊盘表面上的薄膜的步骤。
11.如权利要求8所述的多层印刷电路板的制造方法,其特征在于,所述薄膜的除去是通过逆溅射和等离子处理的任一方式进行。
12.如权利要求8所述的多层印刷电路板的制造方法,其特征在于,所述薄膜的除去和最下层的过渡层的形成是在非氧氛围中进行。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104067299A (zh) * | 2012-01-24 | 2014-09-24 | 德国捷德有限公司 | 生产避免芯片和数据载体主体之间的机械应力的数据载体的方法 |
CN111524873A (zh) * | 2019-02-01 | 2020-08-11 | 台达电子企业管理(上海)有限公司 | 嵌入式封装模块及其封装方法 |
Families Citing this family (308)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4186756B2 (ja) * | 2003-08-29 | 2008-11-26 | 松下電器産業株式会社 | 回路基板及びその製造方法 |
EP1818975A3 (en) | 2000-02-25 | 2010-09-29 | Ibiden Co., Ltd. | Multilayer printed circuit board and multilayer printed circuit board manufacturing method |
US6713859B1 (en) | 2000-09-13 | 2004-03-30 | Intel Corporation | Direct build-up layer on an encapsulated die package having a moisture barrier structure |
CN100539106C (zh) | 2000-09-25 | 2009-09-09 | 揖斐电株式会社 | 半导体元件及其制造方法、多层印刷布线板及其制造方法 |
US20050097727A1 (en) * | 2001-03-28 | 2005-05-12 | Tomoo Iijima | Multi-layer wiring board, method for producing multi-layer wiring board, polishing machine for multi-layer wiring board, and metal sheet for producing wiring board |
US20020175402A1 (en) * | 2001-05-23 | 2002-11-28 | Mccormack Mark Thomas | Structure and method of embedding components in multi-layer substrates |
JP2003030250A (ja) * | 2001-07-12 | 2003-01-31 | Oki Electric Ind Co Ltd | プリント基板設計工数見積りシステムと見積りプログラム |
US7402457B2 (en) * | 2001-09-28 | 2008-07-22 | Siemens Aktiengesellschaft | Method for making contact with electrical contact with electrical contact surfaces of substrate and device with substrate having electrical contact surfaces |
TW503496B (en) | 2001-12-31 | 2002-09-21 | Megic Corp | Chip packaging structure and manufacturing process of the same |
US6673698B1 (en) | 2002-01-19 | 2004-01-06 | Megic Corporation | Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers |
TW584950B (en) | 2001-12-31 | 2004-04-21 | Megic Corp | Chip packaging structure and process thereof |
TW517361B (en) * | 2001-12-31 | 2003-01-11 | Megic Corp | Chip package structure and its manufacture process |
TW544882B (en) | 2001-12-31 | 2003-08-01 | Megic Corp | Chip package structure and process thereof |
KR100481216B1 (ko) * | 2002-06-07 | 2005-04-08 | 엘지전자 주식회사 | 볼 그리드 어레이 패키지 및 그의 제조 방법 |
AU2003253227A1 (en) * | 2002-06-19 | 2004-01-06 | Sten Bjorsell | Electronics circuit manufacture |
US7485489B2 (en) | 2002-06-19 | 2009-02-03 | Bjoersell Sten | Electronics circuit manufacture |
JP4190269B2 (ja) * | 2002-07-09 | 2008-12-03 | 新光電気工業株式会社 | 素子内蔵基板製造方法およびその装置 |
US6964881B2 (en) * | 2002-08-27 | 2005-11-15 | Micron Technology, Inc. | Multi-chip wafer level system packages and methods of forming same |
US20070197030A1 (en) * | 2002-10-10 | 2007-08-23 | Samsung Electronics Co., Ltd. | Center pad type ic chip with jumpers, method of processing the same and multi chip package |
US6998328B2 (en) * | 2002-11-06 | 2006-02-14 | Irvine Sensors Corp. | Method for creating neo-wafers from singulated integrated circuit die and a device made according to the method |
JP3888302B2 (ja) * | 2002-12-24 | 2007-02-28 | カシオ計算機株式会社 | 半導体装置 |
JP4489411B2 (ja) * | 2003-01-23 | 2010-06-23 | 新光電気工業株式会社 | 電子部品実装構造の製造方法 |
JP4137659B2 (ja) * | 2003-02-13 | 2008-08-20 | 新光電気工業株式会社 | 電子部品実装構造及びその製造方法 |
US7208347B2 (en) * | 2003-02-28 | 2007-04-24 | Siemens Aktiengesellschaft | Connection technology for power semiconductors comprising a layer of electrically insulating material that follows the surface contours |
JP4181510B2 (ja) * | 2003-02-28 | 2008-11-19 | 日本特殊陶業株式会社 | 樹脂製配線基板 |
CN1784785A (zh) * | 2003-05-09 | 2006-06-07 | 松下电器产业株式会社 | 电路元件内置模块 |
TWI246761B (en) * | 2003-05-14 | 2006-01-01 | Siliconware Precision Industries Co Ltd | Semiconductor package with build-up layers formed on chip and fabrication method of the semiconductor package |
EP1487019A1 (en) * | 2003-06-12 | 2004-12-15 | Koninklijke Philips Electronics N.V. | Electronic device and method of manufacturing thereof |
JP3678239B2 (ja) | 2003-06-30 | 2005-08-03 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
US7141884B2 (en) * | 2003-07-03 | 2006-11-28 | Matsushita Electric Industrial Co., Ltd. | Module with a built-in semiconductor and method for producing the same |
JP2005101506A (ja) * | 2003-08-21 | 2005-04-14 | Seiko Epson Corp | 電子部品実装体の製造方法、電気光学装置の製造方法、電子部品実装体、電気光学装置 |
DE10343053A1 (de) * | 2003-09-16 | 2005-04-07 | Siemens Ag | Elektronisches Bauelement und Anordnung mit einem elektronischen Bauelement |
US7489032B2 (en) * | 2003-12-25 | 2009-02-10 | Casio Computer Co., Ltd. | Semiconductor device including a hard sheet to reduce warping of a base plate and method of fabricating the same |
JP4516320B2 (ja) * | 2004-01-08 | 2010-08-04 | シチズン電子株式会社 | Led基板 |
JP4298559B2 (ja) * | 2004-03-29 | 2009-07-22 | 新光電気工業株式会社 | 電子部品実装構造及びその製造方法 |
TWI233323B (en) | 2004-04-22 | 2005-05-21 | Phoenix Prec Technology Corp | Circuit board with identifiable information and method for fabricating the same |
JP4339739B2 (ja) * | 2004-04-26 | 2009-10-07 | 太陽誘電株式会社 | 部品内蔵型多層基板 |
US7229936B2 (en) * | 2004-05-03 | 2007-06-12 | International Business Machines Corporation | Method to reduce photoresist pattern collapse by controlled surface microroughening |
JP4211674B2 (ja) * | 2004-05-12 | 2009-01-21 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、電気光学装置及びその製造方法、並びに電子機器 |
EP1753278A4 (en) * | 2004-05-27 | 2010-05-19 | Ibiden Co Ltd | MULTILAYER PRINTED CIRCUIT BOARD |
TWI280657B (en) * | 2004-05-28 | 2007-05-01 | Sanyo Electric Co | Circuit device |
US20060030069A1 (en) * | 2004-08-04 | 2006-02-09 | Chien-Wei Chang | Packaging method for manufacturing substrates |
JP4559163B2 (ja) * | 2004-08-31 | 2010-10-06 | ルネサスエレクトロニクス株式会社 | 半導体装置用パッケージ基板およびその製造方法と半導体装置 |
KR100651124B1 (ko) * | 2004-11-08 | 2006-12-06 | 삼성전자주식회사 | Wbga형 반도체 패키지 및 그 제조방법 |
FI20041525A (fi) | 2004-11-26 | 2006-03-17 | Imbera Electronics Oy | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
DE102004059389B4 (de) * | 2004-12-09 | 2012-02-23 | Infineon Technologies Ag | Halbleiterbauelement mit Ausgleichsmetallisierung |
KR100688769B1 (ko) * | 2004-12-30 | 2007-03-02 | 삼성전기주식회사 | 도금에 의한 칩 내장형 인쇄회로기판 및 그 제조 방법 |
TWI283050B (en) * | 2005-02-04 | 2007-06-21 | Phoenix Prec Technology Corp | Substrate structure embedded method with semiconductor chip and the method for making the same |
KR100716815B1 (ko) * | 2005-02-28 | 2007-05-09 | 삼성전기주식회사 | 칩 내장형 인쇄회로기판 및 그 제조방법 |
JP4581759B2 (ja) * | 2005-03-14 | 2010-11-17 | セイコーエプソン株式会社 | 発光装置、画像形成装置および電子機器 |
JP3914239B2 (ja) * | 2005-03-15 | 2007-05-16 | 新光電気工業株式会社 | 配線基板および配線基板の製造方法 |
CN100536102C (zh) * | 2005-03-28 | 2009-09-02 | 松下电器产业株式会社 | 倒装片安装体和倒装片安装方法及倒装片安装装置 |
US7468545B2 (en) * | 2005-05-06 | 2008-12-23 | Megica Corporation | Post passivation structure for a semiconductor device and packaging process for same |
JP4146864B2 (ja) | 2005-05-31 | 2008-09-10 | 新光電気工業株式会社 | 配線基板及びその製造方法、並びに半導体装置及び半導体装置の製造方法 |
FI119714B (fi) | 2005-06-16 | 2009-02-13 | Imbera Electronics Oy | Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi |
US7327006B2 (en) * | 2005-06-23 | 2008-02-05 | Nokia Corporation | Semiconductor package |
US7582556B2 (en) * | 2005-06-24 | 2009-09-01 | Megica Corporation | Circuitry component and method for forming the same |
TWI297941B (en) * | 2005-10-13 | 2008-06-11 | Phoenix Prec Technology Corp | Semiconductor device with electroless plating metal connecting layer and method for fabricating the same |
US8101868B2 (en) | 2005-10-14 | 2012-01-24 | Ibiden Co., Ltd. | Multilayered printed circuit board and method for manufacturing the same |
JP5164362B2 (ja) | 2005-11-02 | 2013-03-21 | キヤノン株式会社 | 半導体内臓基板およびその製造方法 |
WO2007069789A1 (ja) * | 2005-12-16 | 2007-06-21 | Ibiden Co., Ltd. | 多層プリント配線板およびその製造方法 |
JP2007173468A (ja) * | 2005-12-21 | 2007-07-05 | Shinko Electric Ind Co Ltd | 炭酸ガスレーザによるザグリ加工方法 |
JP5114041B2 (ja) * | 2006-01-13 | 2013-01-09 | 日本シイエムケイ株式会社 | 半導体素子内蔵プリント配線板及びその製造方法 |
KR100736635B1 (ko) | 2006-02-09 | 2007-07-06 | 삼성전기주식회사 | 베어칩 내장형 인쇄회로기판 및 그 제조 방법 |
TWI310968B (en) * | 2006-02-09 | 2009-06-11 | Phoenix Prec Technology Corp | Electrically connecting structure of circuit board with semiconductor chip embedded therein |
US8012566B2 (en) * | 2006-07-12 | 2011-09-06 | Hewlett-Packard Development Company, L.P. | Microneedles formed by electroplating and selectively releasing temperature sensitive layers |
JP2008085310A (ja) * | 2006-08-28 | 2008-04-10 | Clover Denshi Kogyo Kk | 多層プリント配線基板 |
TWI326484B (en) * | 2006-09-21 | 2010-06-21 | Advanced Chip Eng Tech Inc | Chip package and chip package array |
JP5042591B2 (ja) * | 2006-10-27 | 2012-10-03 | 新光電気工業株式会社 | 半導体パッケージおよび積層型半導体パッケージ |
TWI335643B (en) * | 2006-11-21 | 2011-01-01 | Unimicron Technology Crop | Circuit board structure having embedded semiconductor chip and fabrication method thereof |
JP5214139B2 (ja) * | 2006-12-04 | 2013-06-19 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
KR101281972B1 (ko) * | 2006-12-07 | 2013-07-03 | 삼성전자주식회사 | 적층형 인쇄회로 기판 |
DE102007034402B4 (de) * | 2006-12-14 | 2014-06-18 | Advanpack Solutions Pte. Ltd. | Halbleiterpackung und Herstellungsverfahren dafür |
AT11664U1 (de) * | 2007-02-16 | 2011-02-15 | Austria Tech & System Tech | Verfahren zum entfernen eines teilbereichs einer flächigen materialschicht sowie mehrlagige struktur und verwendung hiefür |
JP2008218552A (ja) * | 2007-03-01 | 2008-09-18 | Nec Corp | 電子部品の実装基板および実装方法 |
TWI353661B (en) * | 2007-04-09 | 2011-12-01 | Unimicron Technology Corp | Circuit board structure capable of embedding semic |
KR100856209B1 (ko) * | 2007-05-04 | 2008-09-03 | 삼성전자주식회사 | 집적회로가 내장된 인쇄회로기판 및 그 제조방법 |
TW200906263A (en) * | 2007-05-29 | 2009-02-01 | Matsushita Electric Ind Co Ltd | Circuit board and method for manufacturing the same |
JP4588046B2 (ja) * | 2007-05-31 | 2010-11-24 | 三洋電機株式会社 | 回路装置およびその製造方法 |
JP5263918B2 (ja) * | 2007-07-24 | 2013-08-14 | 日本電気株式会社 | 半導体装置及びその製造方法 |
KR101409648B1 (ko) * | 2007-08-31 | 2014-06-19 | 삼성전자주식회사 | 집적회로 패키지 및 그 제조방법 |
KR101424137B1 (ko) * | 2007-09-07 | 2014-08-04 | 삼성전자주식회사 | 리세스부를 갖는 수지기판을 구비하는 반도체 패키지 및그의 제조방법 |
US8238114B2 (en) * | 2007-09-20 | 2012-08-07 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing same |
US7851246B2 (en) * | 2007-12-27 | 2010-12-14 | Stats Chippac, Ltd. | Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device |
TW200930173A (en) * | 2007-12-31 | 2009-07-01 | Phoenix Prec Technology Corp | Package substrate having embedded semiconductor element and fabrication method thereof |
KR100895820B1 (ko) * | 2008-01-02 | 2009-05-06 | 주식회사 하이닉스반도체 | 반도체 패키지용 회로 기판, 이의 제조 방법 및 이를 갖는반도체 패키지 |
EP2083443A1 (en) * | 2008-01-28 | 2009-07-29 | Phoenix Precision Technology Corporation | Carrier board structure with embedded semiconductor chip and fabrication method thereof |
JP5510795B2 (ja) * | 2008-01-30 | 2014-06-04 | 日本電気株式会社 | 電子部品の実装構造、電子部品の実装方法、並びに電子部品実装用基板 |
US8024858B2 (en) * | 2008-02-14 | 2011-09-27 | Ibiden Co., Ltd. | Method of manufacturing printed wiring board with built-in electronic component |
US7935893B2 (en) * | 2008-02-14 | 2011-05-03 | Ibiden Co., Ltd. | Method of manufacturing printed wiring board with built-in electronic component |
JP5262188B2 (ja) * | 2008-02-29 | 2013-08-14 | 富士通株式会社 | 基板 |
US8234593B2 (en) * | 2008-03-07 | 2012-07-31 | Freedom Scientific, Inc. | Synchronizing a visible document and a virtual document so that selection of text in the virtual document results in highlighting of equivalent content in the visible document |
JP2009218545A (ja) * | 2008-03-12 | 2009-09-24 | Ibiden Co Ltd | 多層プリント配線板及びその製造方法 |
JP2009231818A (ja) * | 2008-03-21 | 2009-10-08 | Ibiden Co Ltd | 多層プリント配線板及びその製造方法 |
JP2009239247A (ja) * | 2008-03-27 | 2009-10-15 | Ibiden Co Ltd | 多層プリント配線板の製造方法 |
TWI363585B (en) * | 2008-04-02 | 2012-05-01 | Advanced Semiconductor Eng | Method for manufacturing a substrate having embedded component therein |
KR100932938B1 (ko) * | 2008-04-24 | 2009-12-21 | 삼성모바일디스플레이주식회사 | 기판 제조방법 및 상기 기판을 구비하는 유기 발광디스플레이 장치 |
FI123205B (fi) | 2008-05-12 | 2012-12-31 | Imbera Electronics Oy | Piirimoduuli ja menetelmä piirimoduulin valmistamiseksi |
JP2009290124A (ja) * | 2008-05-30 | 2009-12-10 | Fujitsu Ltd | プリント配線板 |
JP5217639B2 (ja) * | 2008-05-30 | 2013-06-19 | 富士通株式会社 | コア基板およびプリント配線板 |
JP5217640B2 (ja) * | 2008-05-30 | 2013-06-19 | 富士通株式会社 | プリント配線板の製造方法およびプリント基板ユニットの製造方法 |
JP2009290135A (ja) * | 2008-05-30 | 2009-12-10 | Fujitsu Ltd | プリント配線板の製造方法および導電性接合剤 |
EP2286446A1 (en) * | 2008-06-02 | 2011-02-23 | Nxp B.V. | Electronic device and method of manufacturing an electronic device |
WO2009147936A1 (ja) * | 2008-06-02 | 2009-12-10 | イビデン株式会社 | 多層プリント配線板の製造方法 |
KR100996914B1 (ko) * | 2008-06-19 | 2010-11-26 | 삼성전기주식회사 | 칩 내장 인쇄회로기판 및 그 제조방법 |
TWI363411B (en) * | 2008-07-22 | 2012-05-01 | Advanced Semiconductor Eng | Embedded chip substrate and fabrication method thereof |
US20100025848A1 (en) | 2008-08-04 | 2010-02-04 | Infineon Technologies Ag | Method of fabricating a semiconductor device and semiconductor device |
KR101109287B1 (ko) * | 2008-08-18 | 2012-01-31 | 삼성전기주식회사 | 전자부품 내장형 인쇄회로기판 및 그 제조방법 |
US8334590B1 (en) * | 2008-09-04 | 2012-12-18 | Amkor Technology, Inc. | Semiconductor device having insulating and interconnection layers |
US8114708B2 (en) * | 2008-09-30 | 2012-02-14 | General Electric Company | System and method for pre-patterned embedded chip build-up |
JPWO2010052942A1 (ja) * | 2008-11-06 | 2012-04-05 | イビデン株式会社 | 電子部品内蔵配線板及びその製造方法 |
KR101484786B1 (ko) * | 2008-12-08 | 2015-01-21 | 삼성전자주식회사 | 집적회로 패키지 내장 인쇄회로기판 및 그 제조방법 |
JP5026400B2 (ja) * | 2008-12-12 | 2012-09-12 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
US8261435B2 (en) * | 2008-12-29 | 2012-09-11 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing the same |
US8188380B2 (en) * | 2008-12-29 | 2012-05-29 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing printed wiring board |
US8082537B1 (en) * | 2009-01-28 | 2011-12-20 | Xilinx, Inc. | Method and apparatus for implementing spatially programmable through die vias in an integrated circuit |
US7989959B1 (en) | 2009-01-29 | 2011-08-02 | Xilinx, Inc. | Method of forming stacked-die integrated circuit |
FI20095110A0 (fi) | 2009-02-06 | 2009-02-06 | Imbera Electronics Oy | Elektroniikkamoduuli, jossa on EMI-suoja |
TWI384603B (zh) * | 2009-02-17 | 2013-02-01 | Advanced Semiconductor Eng | 基板結構及應用其之封裝結構 |
US7902661B2 (en) * | 2009-02-20 | 2011-03-08 | National Semiconductor Corporation | Integrated circuit micro-module |
US7898068B2 (en) * | 2009-02-20 | 2011-03-01 | National Semiconductor Corporation | Integrated circuit micro-module |
US7901981B2 (en) * | 2009-02-20 | 2011-03-08 | National Semiconductor Corporation | Integrated circuit micro-module |
US8187920B2 (en) * | 2009-02-20 | 2012-05-29 | Texas Instruments Incorporated | Integrated circuit micro-module |
US7842544B2 (en) * | 2009-02-20 | 2010-11-30 | National Semiconductor Corporation | Integrated circuit micro-module |
US7901984B2 (en) * | 2009-02-20 | 2011-03-08 | National Semiconductor Corporation | Integrated circuit micro-module |
US7843056B2 (en) * | 2009-02-20 | 2010-11-30 | National Semiconductor Corporation | Integrated circuit micro-module |
US8987868B1 (en) | 2009-02-24 | 2015-03-24 | Xilinx, Inc. | Method and apparatus for programmable heterogeneous integration of stacked semiconductor die |
KR101055509B1 (ko) * | 2009-03-19 | 2011-08-08 | 삼성전기주식회사 | 전자부품 내장형 인쇄회로기판 |
JP5106460B2 (ja) * | 2009-03-26 | 2012-12-26 | 新光電気工業株式会社 | 半導体装置及びその製造方法、並びに電子装置 |
TW201110275A (en) * | 2009-05-13 | 2011-03-16 | Seiko Instr Inc | Electronic component, manufacturing method for electronic component, and electronic device |
FI20095557A0 (fi) * | 2009-05-19 | 2009-05-19 | Imbera Electronics Oy | Valmistusmenetelmä ja elektroniikkamoduuli, joka tarjoaa uusia mahdollisuuksia johdevedoille |
US8525335B2 (en) | 2009-07-03 | 2013-09-03 | Teramikros, Inc. | Semiconductor construct and manufacturing method thereof as well as semiconductor device and manufacturing method thereof |
KR101038482B1 (ko) * | 2009-07-08 | 2011-06-02 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
US9466719B2 (en) | 2009-07-15 | 2016-10-11 | Qualcomm Incorporated | Semiconductor-on-insulator with back side strain topology |
US9496227B2 (en) | 2009-07-15 | 2016-11-15 | Qualcomm Incorporated | Semiconductor-on-insulator with back side support layer |
US9390974B2 (en) | 2012-12-21 | 2016-07-12 | Qualcomm Incorporated | Back-to-back stacked integrated circuit assembly and method of making |
TWI538173B (zh) | 2009-07-15 | 2016-06-11 | 瑟藍納半導體美國股份有限公司 | 具背側散熱能力之絕緣體上半導體結構、自絕緣體上半導體元件進行散熱之方法及製造具有絕緣體上半導體晶圓之積體電路之方法 |
US8912646B2 (en) | 2009-07-15 | 2014-12-16 | Silanna Semiconductor U.S.A., Inc. | Integrated circuit assembly and method of making |
US8400782B2 (en) * | 2009-07-24 | 2013-03-19 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
TWI528514B (zh) * | 2009-08-20 | 2016-04-01 | 精材科技股份有限公司 | 晶片封裝體及其製造方法 |
DE102009038674B4 (de) * | 2009-08-24 | 2012-02-09 | Epcos Ag | Trägervorrichtung, Anordnung mit einer solchen Trägervorrichtung sowie Verfahren zur Herstellung eines mindestens eine keramische Schicht umfassenden struktururierten Schichtstapels |
US20110048777A1 (en) * | 2009-08-25 | 2011-03-03 | Chien-Wei Chang | Component-Embedded Printed Circuit Board |
US8432022B1 (en) | 2009-09-29 | 2013-04-30 | Amkor Technology, Inc. | Shielded embedded electronic component substrate fabrication method and structure |
KR101113501B1 (ko) * | 2009-11-12 | 2012-02-29 | 삼성전기주식회사 | 반도체 패키지의 제조 방법 |
US8435837B2 (en) * | 2009-12-15 | 2013-05-07 | Silicon Storage Technology, Inc. | Panel based lead frame packaging method and device |
US9420707B2 (en) | 2009-12-17 | 2016-08-16 | Intel Corporation | Substrate for integrated circuit devices including multi-layer glass core and methods of making the same |
US8207453B2 (en) | 2009-12-17 | 2012-06-26 | Intel Corporation | Glass core substrate for integrated circuit devices and methods of making the same |
JP5544872B2 (ja) | 2009-12-25 | 2014-07-09 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
US8901724B2 (en) * | 2009-12-29 | 2014-12-02 | Intel Corporation | Semiconductor package with embedded die and its methods of fabrication |
US8513062B2 (en) * | 2010-02-16 | 2013-08-20 | Infineon Technologies Ag | Method of manufacturing a semiconductor device with a carrier having a cavity and semiconductor device |
JP5115573B2 (ja) * | 2010-03-03 | 2013-01-09 | オムロン株式会社 | 接続用パッドの製造方法 |
US20110215450A1 (en) * | 2010-03-05 | 2011-09-08 | Chi Heejo | Integrated circuit packaging system with encapsulation and method of manufacture thereof |
KR101104210B1 (ko) * | 2010-03-05 | 2012-01-10 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
CN102208383B (zh) * | 2010-03-31 | 2013-08-28 | 南亚电路板股份有限公司 | 电路板的形成方法 |
US9015023B2 (en) | 2010-05-05 | 2015-04-21 | Xilinx, Inc. | Device specific configuration of operating voltage |
JP2011253911A (ja) * | 2010-06-01 | 2011-12-15 | Shinko Electric Ind Co Ltd | 配線基板 |
KR20110139462A (ko) * | 2010-06-23 | 2011-12-29 | 삼성전기주식회사 | 절연수지 조성물 및 이를 이용하여 제조된 인쇄회로기판 |
US9049497B2 (en) | 2010-06-29 | 2015-06-02 | Qualcomm Incorporated | Signaling random access points for streaming video data |
TWI421956B (zh) * | 2010-07-13 | 2014-01-01 | 矽品精密工業股份有限公司 | 晶片尺寸封裝件及其製法 |
CN102348324B (zh) * | 2010-07-23 | 2016-02-10 | 伊姆贝拉电子有限公司 | 布线图案之间具有馈通导体的电子模块 |
KR101138542B1 (ko) * | 2010-08-09 | 2012-04-25 | 삼성전기주식회사 | 다층 인쇄회로기판의 제조방법 |
US8421212B2 (en) | 2010-09-22 | 2013-04-16 | Stats Chippac Ltd. | Integrated circuit packaging system with active surface heat removal and method of manufacture thereof |
JP2012069739A (ja) * | 2010-09-24 | 2012-04-05 | Shinko Electric Ind Co Ltd | 配線基板の製造方法 |
US8546922B2 (en) | 2010-09-30 | 2013-10-01 | Ibiden Co., Ltd. | Wiring board |
US8841171B2 (en) | 2010-11-22 | 2014-09-23 | Bridge Semiconductor Corporation | Method of making stackable semiconductor assembly with bump/flange heat spreader and dual build-up circuitry |
US20120126399A1 (en) | 2010-11-22 | 2012-05-24 | Bridge Semiconductor Corporation | Thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry |
US8343808B2 (en) | 2010-11-22 | 2013-01-01 | Bridge Semiconductor Corporation | Method of making stackable semiconductor assembly with bump/base/flange heat spreader and build-up circuitry |
US8927339B2 (en) | 2010-11-22 | 2015-01-06 | Bridge Semiconductor Corporation | Method of making thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry |
JP2012129452A (ja) * | 2010-12-17 | 2012-07-05 | Toshiba Corp | 半導体装置、半導体パッケージおよび半導体装置の製造方法 |
TWI426584B (zh) | 2010-12-22 | 2014-02-11 | 矽品精密工業股份有限公司 | 半導體封裝件及其製法 |
CN102024389B (zh) * | 2010-12-29 | 2014-08-27 | 利亚德光电股份有限公司 | Led显示板及led显示器 |
CN102013218B (zh) * | 2010-12-29 | 2013-07-10 | 利亚德光电股份有限公司 | Led显示板及led显示器 |
US20120175763A1 (en) * | 2011-01-06 | 2012-07-12 | International Business Machines Corporation | Integrated circuit packaging including auxiliary circuitry |
JP5827476B2 (ja) * | 2011-03-08 | 2015-12-02 | 株式会社東芝 | 半導体モジュール及びその製造方法 |
US8595927B2 (en) * | 2011-03-17 | 2013-12-03 | Ibiden Co., Ltd. | Method for manufacturing multilayer printed wiring board |
KR101283821B1 (ko) * | 2011-05-03 | 2013-07-08 | 엘지이노텍 주식회사 | 인쇄회로기판의 제조 방법 |
JP2012256675A (ja) * | 2011-06-08 | 2012-12-27 | Shinko Electric Ind Co Ltd | 配線基板、半導体装置及びその製造方法 |
CA2849865A1 (en) * | 2011-09-21 | 2013-03-28 | Mosaid Technologies Incorporated | Method and apparatus for connecting inlaid chip into printed circuit board |
US8963313B2 (en) * | 2011-12-22 | 2015-02-24 | Raytheon Company | Heterogeneous chip integration with low loss interconnection through adaptive patterning |
US9117730B2 (en) * | 2011-12-29 | 2015-08-25 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing printed wiring board |
US20130168132A1 (en) * | 2011-12-29 | 2013-07-04 | Sumsung Electro-Mechanics Co., Ltd. | Printed circuit board and method of manufacturing the same |
KR101443959B1 (ko) * | 2012-01-05 | 2014-09-29 | 완-링 유 | 반도체 패키지 구조 및 그 제작방법 |
EP2615638A3 (en) * | 2012-01-16 | 2013-09-25 | Yu, Wan-Ling | Semiconductor Package Structure and Method for Manufacturing The Same |
US8772058B2 (en) * | 2012-02-02 | 2014-07-08 | Harris Corporation | Method for making a redistributed wafer using transferrable redistribution layers |
US20130229777A1 (en) * | 2012-03-01 | 2013-09-05 | Infineon Technologies Ag | Chip arrangements and methods for forming a chip arrangement |
US9445496B2 (en) | 2012-03-07 | 2016-09-13 | Intel Corporation | Glass clad microelectronic substrate |
JP5903337B2 (ja) * | 2012-06-08 | 2016-04-13 | 新光電気工業株式会社 | 半導体パッケージ及びその製造方法 |
US8810020B2 (en) * | 2012-06-22 | 2014-08-19 | Freescale Semiconductor, Inc. | Semiconductor device with redistributed contacts |
US10373930B2 (en) * | 2012-08-10 | 2019-08-06 | Cyntec Co., Ltd | Package structure and the method to fabricate thereof |
TWI574355B (zh) * | 2012-08-13 | 2017-03-11 | 矽品精密工業股份有限公司 | 半導體封裝件及其製法 |
US8901435B2 (en) | 2012-08-14 | 2014-12-02 | Bridge Semiconductor Corporation | Hybrid wiring board with built-in stopper, interposer and build-up circuitry |
US9087847B2 (en) | 2012-08-14 | 2015-07-21 | Bridge Semiconductor Corporation | Thermally enhanced interconnect substrate with embedded semiconductor device and built-in stopper and method of making the same |
JP5236826B1 (ja) * | 2012-08-15 | 2013-07-17 | 太陽誘電株式会社 | 電子部品内蔵基板 |
DE102012107876A1 (de) * | 2012-08-27 | 2014-02-27 | Epcos Ag | Trägerplatte, Vorrichtung mit Trägerplatte sowie Verfahren zur Herstellung einer Trägerplatte |
US8890628B2 (en) | 2012-08-31 | 2014-11-18 | Intel Corporation | Ultra slim RF package for ultrabooks and smart phones |
US9673162B2 (en) * | 2012-09-13 | 2017-06-06 | Nxp Usa, Inc. | High power semiconductor package subsystems |
US9001520B2 (en) | 2012-09-24 | 2015-04-07 | Intel Corporation | Microelectronic structures having laminated or embedded glass routing structures for high density packaging |
US8664656B1 (en) * | 2012-10-04 | 2014-03-04 | Apple Inc. | Devices and methods for embedding semiconductors in printed circuit boards |
KR102042033B1 (ko) * | 2012-10-30 | 2019-11-08 | 엘지이노텍 주식회사 | 칩 실장형 인쇄회로기판 및 그 제조방법 |
KR101420526B1 (ko) * | 2012-11-29 | 2014-07-17 | 삼성전기주식회사 | 전자부품 내장기판 및 그 제조방법 |
US9538633B2 (en) * | 2012-12-13 | 2017-01-03 | Nvidia Corporation | Passive cooling system integrated into a printed circuit board for cooling electronic components |
CN104584208B (zh) * | 2012-12-21 | 2018-01-30 | 松下知识产权经营株式会社 | 电子部件封装以及其制造方法 |
JP5624699B1 (ja) * | 2012-12-21 | 2014-11-12 | パナソニック株式会社 | 電子部品パッケージおよびその製造方法 |
US9425122B2 (en) | 2012-12-21 | 2016-08-23 | Panasonic Intellectual Property Management Co., Ltd. | Electronic component package and method for manufacturing the same |
WO2014097642A1 (ja) | 2012-12-21 | 2014-06-26 | パナソニック株式会社 | 電子部品パッケージおよびその製造方法 |
WO2014097643A1 (ja) | 2012-12-21 | 2014-06-26 | パナソニック株式会社 | 電子部品パッケージおよびその製造方法 |
JP5708903B2 (ja) * | 2013-02-14 | 2015-04-30 | 株式会社村田製作所 | 回路基板およびその製造方法 |
JP2014167053A (ja) * | 2013-02-28 | 2014-09-11 | 3M Innovative Properties Co | 高熱伝導性プリプレグ、プリプレグを用いた配線板および多層配線板、ならびに多層配線板を用いた半導体装置 |
US9048222B2 (en) | 2013-03-06 | 2015-06-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating interconnect structure for package-on-package devices |
US9275925B2 (en) | 2013-03-12 | 2016-03-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | System and method for an improved interconnect structure |
US9763370B2 (en) | 2013-03-15 | 2017-09-12 | National Technology & Engineering Solutions Of Sandia, Llc | Apparatus for assembly of microelectronic devices |
CN105121835B (zh) * | 2013-04-04 | 2017-06-23 | 三菱电机株式会社 | 发动机自动停止再起动装置以及发动机自动停止再起动方法 |
US9000490B2 (en) | 2013-04-19 | 2015-04-07 | Xilinx, Inc. | Semiconductor package having IC dice and voltage tuners |
WO2014203603A1 (ja) * | 2013-06-18 | 2014-12-24 | 株式会社村田製作所 | 樹脂多層基板の製造方法 |
JP2015026774A (ja) * | 2013-07-29 | 2015-02-05 | 京セラサーキットソリューションズ株式会社 | 配線基板の製造方法 |
KR101863462B1 (ko) * | 2013-08-21 | 2018-05-31 | 인텔 코포레이션 | 범프리스 빌드업 층을 위한 범프리스 다이 패키지 인터페이스 |
CN104427747B (zh) * | 2013-08-30 | 2017-10-10 | 深南电路有限公司 | 一种内层埋铜的电路板及其加工方法 |
US20150380369A1 (en) * | 2013-09-30 | 2015-12-31 | Nantong Fujitsu Microelectronics Co., Ltd | Wafer packaging structure and packaging method |
NL2011575C2 (en) * | 2013-10-08 | 2015-04-09 | Besi Netherlands B V | Method for positioning a carrier with electronic components and electronic component produced with such method. |
US9318411B2 (en) | 2013-11-13 | 2016-04-19 | Brodge Semiconductor Corporation | Semiconductor package with package-on-package stacking capability and method of manufacturing the same |
CN105934823A (zh) | 2013-11-27 | 2016-09-07 | At&S奥地利科技与系统技术股份公司 | 印刷电路板结构 |
TWI503902B (zh) * | 2013-11-29 | 2015-10-11 | 矽品精密工業股份有限公司 | 半導體封裝件及其製法 |
US10056294B2 (en) * | 2013-12-02 | 2018-08-21 | Maxim Integrated Products, Inc. | Techniques for adhesive control between a substrate and a die |
US9209154B2 (en) | 2013-12-04 | 2015-12-08 | Bridge Semiconductor Corporation | Semiconductor package with package-on-package stacking capability and method of manufacturing the same |
AT515101B1 (de) | 2013-12-12 | 2015-06-15 | Austria Tech & System Tech | Verfahren zum Einbetten einer Komponente in eine Leiterplatte |
US9583420B2 (en) * | 2015-01-23 | 2017-02-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method of manufactures |
TWI517322B (zh) | 2014-02-19 | 2016-01-11 | 鈺橋半導體股份有限公司 | 半導體元件及其製作方法 |
US9343434B2 (en) | 2014-02-27 | 2016-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Laser marking in packages |
US9589900B2 (en) | 2014-02-27 | 2017-03-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal pad for laser marking |
AT515447B1 (de) * | 2014-02-27 | 2019-10-15 | At & S Austria Tech & Systemtechnik Ag | Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte |
US11523520B2 (en) * | 2014-02-27 | 2022-12-06 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Method for making contact with a component embedded in a printed circuit board |
CN104902676A (zh) * | 2014-03-06 | 2015-09-09 | 常熟东南相互电子有限公司 | 印刷电路板及其制法 |
US9281297B2 (en) | 2014-03-07 | 2016-03-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Solution for reducing poor contact in info packages |
US9305874B2 (en) | 2014-04-13 | 2016-04-05 | Infineon Technologies Ag | Baseplate for an electronic module and method of manufacturing the same |
KR102250997B1 (ko) | 2014-05-02 | 2021-05-12 | 삼성전자주식회사 | 반도체 패키지 |
JP2015222753A (ja) * | 2014-05-22 | 2015-12-10 | イビデン株式会社 | プリント配線板及びその製造方法 |
US9666522B2 (en) | 2014-05-29 | 2017-05-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Alignment mark design for packages |
US9449947B2 (en) | 2014-07-01 | 2016-09-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package for thermal dissipation |
US9515181B2 (en) | 2014-08-06 | 2016-12-06 | Qualcomm Incorporated | Semiconductor device with self-aligned back side features |
US9721799B2 (en) | 2014-11-07 | 2017-08-01 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with reduced via hole width and reduced pad patch and manufacturing method thereof |
US10079156B2 (en) | 2014-11-07 | 2018-09-18 | Advanced Semiconductor Engineering, Inc. | Semiconductor package including dielectric layers defining via holes extending to component pads |
US9673096B2 (en) * | 2014-11-14 | 2017-06-06 | Infineon Technologies Ag | Method for processing a semiconductor substrate and a method for processing a semiconductor wafer |
US9420695B2 (en) | 2014-11-19 | 2016-08-16 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and semiconductor process |
US9426891B2 (en) | 2014-11-21 | 2016-08-23 | Advanced Semiconductor Engineering, Inc. | Circuit board with embedded passive component and manufacturing method thereof |
JP6247629B2 (ja) * | 2014-12-11 | 2017-12-13 | Ckd株式会社 | コイル用シートの製造方法、及びコイルの製造方法 |
JP6352791B2 (ja) | 2014-12-11 | 2018-07-04 | Ckd株式会社 | コイル用シート、コイル、及びコイルの製造方法 |
US10306777B2 (en) * | 2014-12-15 | 2019-05-28 | Bridge Semiconductor Corporation | Wiring board with dual stiffeners and dual routing circuitries integrated together and method of making the same |
US9947625B2 (en) | 2014-12-15 | 2018-04-17 | Bridge Semiconductor Corporation | Wiring board with embedded component and integrated stiffener and method of making the same |
US10217710B2 (en) | 2014-12-15 | 2019-02-26 | Bridge Semiconductor Corporation | Wiring board with embedded component and integrated stiffener, method of making the same and face-to-face semiconductor assembly using the same |
CN105762138B (zh) * | 2014-12-15 | 2019-01-25 | 财团法人工业技术研究院 | 整合式毫米波芯片封装结构 |
US10269722B2 (en) | 2014-12-15 | 2019-04-23 | Bridge Semiconductor Corp. | Wiring board having component integrated with leadframe and method of making the same |
US9941226B2 (en) * | 2014-12-15 | 2018-04-10 | Industrial Technology Research Institute | Integrated millimeter-wave chip package |
TWI649848B (zh) * | 2014-12-26 | 2019-02-01 | 聯華電子股份有限公司 | 具有凸塊下層金屬的半導體結構及其製作方法 |
US10177130B2 (en) | 2015-04-01 | 2019-01-08 | Bridge Semiconductor Corporation | Semiconductor assembly having anti-warping controller and vertical connecting element in stiffener |
US10062663B2 (en) | 2015-04-01 | 2018-08-28 | Bridge Semiconductor Corporation | Semiconductor assembly with built-in stiffener and integrated dual routing circuitries and method of making the same |
JP2016207940A (ja) * | 2015-04-27 | 2016-12-08 | イビデン株式会社 | 電子部品内蔵配線板及びその製造方法 |
CN109560183B (zh) * | 2015-04-29 | 2020-04-17 | 光宝光电(常州)有限公司 | 多层式电路板及发光二极管封装结构 |
US10109588B2 (en) * | 2015-05-15 | 2018-10-23 | Samsung Electro-Mechanics Co., Ltd. | Electronic component package and package-on-package structure including the same |
US10049970B2 (en) * | 2015-06-17 | 2018-08-14 | Samsung Electronics Co., Ltd. | Methods of manufacturing printed circuit board and semiconductor package |
TWI602482B (zh) * | 2015-06-30 | 2017-10-11 | To solder paste embedded electronic components within the circuit board manufacturing method | |
KR101666757B1 (ko) * | 2015-07-13 | 2016-10-24 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 |
US10096573B2 (en) * | 2015-07-28 | 2018-10-09 | Bridge Semiconductor Corporation | Face-to-face semiconductor assembly having semiconductor device in dielectric recess |
US9570387B1 (en) * | 2015-08-19 | 2017-02-14 | Nxp Usa, Inc. | Three-dimensional integrated circuit systems in a package and methods therefor |
US9893058B2 (en) * | 2015-09-17 | 2018-02-13 | Semiconductor Components Industries, Llc | Method of manufacturing a semiconductor device having reduced on-state resistance and structure |
US10182499B2 (en) * | 2015-11-09 | 2019-01-15 | The University Of Memphis Research Foundation | Multilayer additive printed circuit |
US9570372B1 (en) | 2016-03-24 | 2017-02-14 | Bridge Semiconductor Corporation | Thermally enhanced semiconductor assembly with heat spreader and integrated dual build-up circuitries and method of making the same |
JP2017183635A (ja) * | 2016-03-31 | 2017-10-05 | ソニー株式会社 | 半導体装置、半導体装置の製造方法、集積基板、及び、電子機器 |
US11272619B2 (en) * | 2016-09-02 | 2022-03-08 | Intel Corporation | Apparatus with embedded fine line space in a cavity, and a method for forming the same |
CN107809852A (zh) * | 2016-09-08 | 2018-03-16 | 鹏鼎控股(深圳)股份有限公司 | 无导线表面电镀方法及由该方法制得的电路板 |
WO2018063383A1 (en) | 2016-09-30 | 2018-04-05 | Intel Corporation | Active package substrate having anisotropic conductive layer |
TWI611538B (zh) * | 2016-10-25 | 2018-01-11 | 旭德科技股份有限公司 | 封裝載板及其製作方法 |
US20180166356A1 (en) * | 2016-12-13 | 2018-06-14 | Globalfoundries Inc. | Fan-out circuit packaging with integrated lid |
KR102055593B1 (ko) * | 2017-02-03 | 2019-12-13 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
CN209572247U (zh) * | 2017-02-23 | 2019-11-01 | 株式会社村田制作所 | 电子部件及电子设备 |
EP3373714B1 (en) * | 2017-03-08 | 2023-08-23 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Hybrid component carrier and method for manufacturing the same |
US11081448B2 (en) * | 2017-03-29 | 2021-08-03 | Intel Corporation | Embedded die microelectronic device with molded component |
WO2018181552A1 (ja) | 2017-03-31 | 2018-10-04 | 国立研究開発法人産業技術総合研究所 | ウェハ上のアライメントマークを用いる半導体パッケージの製造方法 |
US10257925B2 (en) * | 2017-04-10 | 2019-04-09 | Tactotek Oy | Method for manufacturing an electronic assembly |
US10872864B2 (en) | 2017-06-30 | 2020-12-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package and method |
DE102018108924A1 (de) | 2017-06-30 | 2019-01-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Halbleiter-Package und Verfahren |
KR102459308B1 (ko) * | 2017-07-31 | 2022-10-31 | 삼성전자주식회사 | 반도체 패키지의 제조 방법 |
KR102440119B1 (ko) | 2017-08-10 | 2022-09-05 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
JP7085328B2 (ja) | 2017-09-29 | 2022-06-16 | 日東電工株式会社 | 配線回路基板、その製造方法および撮像装置 |
CN107749395B (zh) * | 2017-10-30 | 2020-06-26 | 武汉新芯集成电路制造有限公司 | 一种晶圆打标的方法 |
KR20190075647A (ko) * | 2017-12-21 | 2019-07-01 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
JP7046639B2 (ja) * | 2018-02-21 | 2022-04-04 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
JP7056226B2 (ja) * | 2018-02-27 | 2022-04-19 | Tdk株式会社 | 回路モジュール |
EP3557608A1 (en) * | 2018-04-19 | 2019-10-23 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Packaged integrated circuit with interposing functionality and method for manufacturing such a packaged integrated circuit |
CN110557887B (zh) * | 2018-05-31 | 2021-10-12 | 京东方科技集团股份有限公司 | 电路对位组件及显示装置 |
US10340249B1 (en) * | 2018-06-25 | 2019-07-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method |
KR102542573B1 (ko) * | 2018-09-13 | 2023-06-13 | 삼성전자주식회사 | 재배선 기판, 이의 제조 방법, 및 이를 포함하는 반도체 패키지 |
TWI682480B (zh) * | 2018-09-19 | 2020-01-11 | 易華電子股份有限公司 | 印刷電路板佈線系統 |
KR102160035B1 (ko) * | 2018-11-06 | 2020-09-25 | 삼성전자주식회사 | 반도체 패키지 |
KR102443028B1 (ko) * | 2018-11-06 | 2022-09-14 | 삼성전자주식회사 | 반도체 패키지 |
US20200161206A1 (en) * | 2018-11-20 | 2020-05-21 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and semiconductor manufacturing process |
WO2020210284A1 (en) * | 2019-04-08 | 2020-10-15 | Nano-Dimension Technologies, Ltd. | Systems and methods for additive manufacturing of smt mounting sockets |
EP3739618A1 (en) * | 2019-05-15 | 2020-11-18 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Component carrier with surface-contactable component embedded in laminated stack |
CN114402703A (zh) * | 2019-09-25 | 2022-04-26 | 京瓷株式会社 | 印刷布线板以及印刷布线板的制造方法 |
TWI715214B (zh) * | 2019-09-26 | 2021-01-01 | 日商京瓷股份有限公司 | 印刷配線板及印刷配線板之製造方法 |
CN111564414B (zh) * | 2019-12-12 | 2021-09-24 | 奥特斯(中国)有限公司 | 部件承载件及制造部件承载件的方法 |
KR20210076583A (ko) * | 2019-12-16 | 2021-06-24 | 삼성전기주식회사 | 전자부품 내장기판 |
TWI744805B (zh) * | 2020-02-24 | 2021-11-01 | 頎邦科技股份有限公司 | 電路板 |
JP2022002249A (ja) * | 2020-06-19 | 2022-01-06 | キオクシア株式会社 | 半導体装置およびその製造方法 |
US11342248B2 (en) * | 2020-07-14 | 2022-05-24 | Gan Systems Inc. | Embedded die packaging for power semiconductor devices |
TWI731776B (zh) * | 2020-08-26 | 2021-06-21 | 友達光電股份有限公司 | 電子裝置 |
US20220312591A1 (en) * | 2021-03-26 | 2022-09-29 | Juniper Networks, Inc. | Substrate with conductive pads and conductive layers |
CN113451259B (zh) * | 2021-05-14 | 2023-04-25 | 珠海越亚半导体股份有限公司 | 一种多器件分次嵌埋封装基板及其制造方法 |
TWI834204B (zh) * | 2022-06-28 | 2024-03-01 | 山太士股份有限公司 | 加工方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10199886A (ja) * | 1997-01-06 | 1998-07-31 | Rohm Co Ltd | 半導体装置及びその製造方法 |
JPH1114574A (ja) * | 1997-06-20 | 1999-01-22 | Toshiba Corp | はんだ付け検査方法及びはんだ付け検査装置 |
JPH11233678A (ja) * | 1998-02-16 | 1999-08-27 | Sumitomo Metal Electronics Devices Inc | Icパッケージの製造方法 |
JPH11274734A (ja) * | 1998-03-20 | 1999-10-08 | Sony Corp | 電子回路装置およびその製造方法 |
Family Cites Families (165)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3495324A (en) * | 1967-11-13 | 1970-02-17 | Sperry Rand Corp | Ohmic contact for planar devices |
US3775844A (en) | 1970-06-25 | 1973-12-04 | Bunker Ramo | Method of fabricating a multiwafer electrical circuit structure |
US4372996A (en) | 1972-05-09 | 1983-02-08 | Massachusetts Institute Of Technology | Method for metallizing aluminum pads of an integrated circuit chip |
JPS49131863U (zh) * | 1973-03-10 | 1974-11-13 | ||
US3909590A (en) * | 1975-01-10 | 1975-09-30 | Howmedica | Furnace assembly for firing dental products |
US4356223A (en) * | 1980-02-28 | 1982-10-26 | Nippon Electric Co., Ltd. | Semiconductor device having a registration mark for use in an exposure technique for micro-fine working |
US4751146A (en) * | 1985-07-09 | 1988-06-14 | Showa Denko Kabushiki Kaisha | Printed circuit boards |
US4783695A (en) * | 1986-09-26 | 1988-11-08 | General Electric Company | Multichip integrated circuit packaging configuration and method |
US4835704A (en) * | 1986-12-29 | 1989-05-30 | General Electric Company | Adaptive lithography system to provide high density interconnect |
KR910006967B1 (ko) | 1987-11-18 | 1991-09-14 | 가시오 게이상기 가부시기가이샤 | 반도체 장치의 범프 전극 구조 및 그 형성 방법 |
JPH0258345A (ja) | 1988-08-24 | 1990-02-27 | Hitachi Ltd | 半導体装置 |
BE1002529A6 (nl) * | 1988-09-27 | 1991-03-12 | Bell Telephone Mfg | Methode om een elektronische component te monteren en geheugen kaart waarin deze wordt toegepast. |
US4894115A (en) * | 1989-02-14 | 1990-01-16 | General Electric Company | Laser beam scanning method for forming via holes in polymer materials |
JPH02312296A (ja) | 1989-05-26 | 1990-12-27 | Japan Radio Co Ltd | 高密度実装モジュールの製造方法 |
JPH0324786A (ja) | 1989-06-22 | 1991-02-01 | Sharp Corp | ホトエッチングされる回路基板の位置決め構造 |
JPH0338084A (ja) | 1989-07-04 | 1991-02-19 | Sharp Corp | 回路基板の接続方法 |
JPH0350734A (ja) | 1989-07-18 | 1991-03-05 | Seiko Epson Corp | 集積回路の製造方法 |
JPH03101234A (ja) | 1989-08-14 | 1991-04-26 | Nec Corp | 半導体装置の製造方法 |
JPH0377327A (ja) | 1989-08-19 | 1991-04-02 | Fujitsu Ltd | バンプ電極形半導体装置およびその製造方法 |
US5021016A (en) * | 1990-03-05 | 1991-06-04 | Currey Lesley B | Outboard motor support |
US5081563A (en) * | 1990-04-27 | 1992-01-14 | International Business Machines Corporation | Multi-layer package incorporating a recessed cavity for a semiconductor chip |
JP3091214B2 (ja) | 1990-05-11 | 2000-09-25 | 株式会社日立製作所 | マルチチップ・モジュールの製造方法 |
JP2785444B2 (ja) | 1990-05-16 | 1998-08-13 | 松下電器産業株式会社 | 半導体装置およびその製造方法ならびに半導体装置を用いた電子回路装置 |
JPH04233867A (ja) | 1990-06-27 | 1992-08-21 | Xerox Corp | サブミクロンの揺動補正を有する光学的走査システム |
US5357403A (en) * | 1990-06-29 | 1994-10-18 | General Electric Company | Adaptive lithography in a high density interconnect structure whose signal layers have fixed patterns |
US5161093A (en) | 1990-07-02 | 1992-11-03 | General Electric Company | Multiple lamination high density interconnect process and structure employing a variable crosslinking adhesive |
US5073814A (en) * | 1990-07-02 | 1991-12-17 | General Electric Company | Multi-sublayer dielectric layers |
DE4028776C2 (de) * | 1990-07-03 | 1994-03-10 | Samsung Electronics Co Ltd | Verfahren zur Bildung einer metallischen Verdrahtungsschicht und Füllen einer Kontaktöffnung in einem Halbleiterbauelement |
JPH0465832A (ja) | 1990-07-06 | 1992-03-02 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH04233258A (ja) | 1990-07-23 | 1992-08-21 | Internatl Business Mach Corp <Ibm> | 超小型電子回路パッケージ |
JPH04154197A (ja) | 1990-10-18 | 1992-05-27 | Nippon Chemicon Corp | 部品内蔵多層基板 |
US5386623A (en) | 1990-11-15 | 1995-02-07 | Hitachi, Ltd. | Process for manufacturing a multi-chip module |
US5126016A (en) * | 1991-02-01 | 1992-06-30 | International Business Machines Corporation | Circuitization of polymeric circuit boards with galvanic removal of chromium adhesion layers |
US5256875A (en) * | 1992-05-14 | 1993-10-26 | Teledyne Mec | Method for generating filtered noise signal and broadband signal having reduced dynamic range for use in mass spectrometry |
US5250843A (en) * | 1991-03-27 | 1993-10-05 | Integrated System Assemblies Corp. | Multichip integrated circuit modules |
US5111278A (en) | 1991-03-27 | 1992-05-05 | Eichelberger Charles W | Three-dimensional multichip module systems |
US5130889A (en) | 1991-06-28 | 1992-07-14 | Digital Equipment Corporation | Integrated circuit protection by liquid encapsulation |
JPH0546069A (ja) | 1991-08-08 | 1993-02-26 | Yamaha Corp | ピアノ運指表示装置 |
JPH0548000A (ja) | 1991-08-13 | 1993-02-26 | Fujitsu Ltd | 半導体装置 |
JP3081326B2 (ja) | 1991-12-04 | 2000-08-28 | 株式会社日立製作所 | 半導体モジュール装置 |
US5289631A (en) | 1992-03-04 | 1994-03-01 | Mcnc | Method for testing, burn-in, and/or programming of integrated circuit chips |
US5455459A (en) | 1992-03-27 | 1995-10-03 | Martin Marietta Corporation | Reconstructable interconnect structure for electronic circuits |
JPH0821782B2 (ja) | 1992-03-30 | 1996-03-04 | 日本碍子株式会社 | 多層回路基板の形成方法 |
US5304511A (en) | 1992-09-29 | 1994-04-19 | Mitsubishi Denki Kabushiki Kaisha | Production method of T-shaped gate electrode in semiconductor device |
US5309322A (en) | 1992-10-13 | 1994-05-03 | Motorola, Inc. | Leadframe strip for semiconductor packages and method |
US5376584A (en) * | 1992-12-31 | 1994-12-27 | International Business Machines Corporation | Process of making pad structure for solder ball limiting metallurgy having reduced edge stress |
US5353498A (en) * | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
US5306670A (en) | 1993-02-09 | 1994-04-26 | Texas Instruments Incorporated | Multi-chip integrated circuit module and method for fabrication thereof |
JPH06268101A (ja) | 1993-03-17 | 1994-09-22 | Hitachi Ltd | 半導体装置及びその製造方法、電子装置、リ−ドフレ−ム並びに実装基板 |
JPH06268098A (ja) | 1993-03-17 | 1994-09-22 | Oki Electric Ind Co Ltd | 半導体集積回路装置の製造方法 |
US5422514A (en) * | 1993-05-11 | 1995-06-06 | Micromodule Systems, Inc. | Packaging and interconnect system for integrated circuits |
JP3110922B2 (ja) | 1993-08-12 | 2000-11-20 | 富士通株式会社 | マルチチップ・モジュール |
EP0646959B1 (en) * | 1993-09-30 | 2001-08-16 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno | Metallization and bonding process for manufacturing power semiconductor devices |
US5410184A (en) * | 1993-10-04 | 1995-04-25 | Motorola | Microelectronic package comprising tin-copper solder bump interconnections, and method for forming same |
JPH07193184A (ja) | 1993-12-27 | 1995-07-28 | Fujitsu Ltd | マルチチップモジュールの製造方法及びマルチチップモジュール |
US5434751A (en) * | 1994-04-11 | 1995-07-18 | Martin Marietta Corporation | Reworkable high density interconnect structure incorporating a release layer |
US5503286A (en) | 1994-06-28 | 1996-04-02 | International Business Machines Corporation | Electroplated solder terminal |
JPH0878572A (ja) | 1994-08-31 | 1996-03-22 | Hitachi Ltd | 半導体パッケージおよび、それの製造方法および、それを実装した回路ボードと電子機器 |
JP3424344B2 (ja) | 1994-09-01 | 2003-07-07 | ヤマハ株式会社 | 半導体装置 |
US5524339A (en) * | 1994-09-19 | 1996-06-11 | Martin Marietta Corporation | Method for protecting gallium arsenide mmic air bridge structures |
US5527741A (en) * | 1994-10-11 | 1996-06-18 | Martin Marietta Corporation | Fabrication and structures of circuit modules with flexible interconnect layers |
US5539156A (en) * | 1994-11-16 | 1996-07-23 | International Business Machines Corporation | Non-annular lands |
US5561085A (en) * | 1994-12-19 | 1996-10-01 | Martin Marietta Corporation | Structure for protecting air bridges on semiconductor chips from damage |
US5972736A (en) * | 1994-12-21 | 1999-10-26 | Sun Microsystems, Inc. | Integrated circuit package and method |
US5563449A (en) | 1995-01-19 | 1996-10-08 | Cornell Research Foundation, Inc. | Interconnect structures using group VIII metals |
JP2625398B2 (ja) | 1995-03-17 | 1997-07-02 | 日本電気株式会社 | マルチチップ冷却装置 |
JP3356921B2 (ja) | 1995-03-24 | 2002-12-16 | 新光電気工業株式会社 | 半導体装置およびその製造方法 |
US5745984A (en) * | 1995-07-10 | 1998-05-05 | Martin Marietta Corporation | Method for making an electronic module |
JP3285294B2 (ja) * | 1995-08-08 | 2002-05-27 | 太陽誘電株式会社 | 回路モジュールの製造方法 |
DE69626747T2 (de) | 1995-11-16 | 2003-09-04 | Matsushita Electric Industrial Co., Ltd. | Gedruckte Leiterplatte und ihre Anordnung |
US5866952A (en) | 1995-11-30 | 1999-02-02 | Lockheed Martin Corporation | High density interconnected circuit module with a compliant layer as part of a stress-reducing molded substrate |
US5707893A (en) * | 1995-12-01 | 1998-01-13 | International Business Machines Corporation | Method of making a circuitized substrate using two different metallization processes |
US5862583A (en) * | 1995-12-28 | 1999-01-26 | Lucent Technologies Inc. | Panel positioning method and apparatus |
US5838361A (en) * | 1996-01-11 | 1998-11-17 | Micron Technology, Inc. | Laser marking techniques |
US5700716A (en) | 1996-02-23 | 1997-12-23 | Micron Technology, Inc. | Method for forming low contact resistance contacts, vias, and plugs with diffusion barriers |
JPH09266268A (ja) | 1996-03-28 | 1997-10-07 | Mitsubishi Electric Corp | 半導体装置の製造方法および半導体装置のパッケージ |
JPH09278494A (ja) | 1996-04-15 | 1997-10-28 | Corning Japan Kk | ガラス基板へのマーキング方法 |
US5841193A (en) * | 1996-05-20 | 1998-11-24 | Epic Technologies, Inc. | Single chip modules, repairable multichip modules, and methods of fabrication thereof |
JP2842378B2 (ja) | 1996-05-31 | 1999-01-06 | 日本電気株式会社 | 電子回路基板の高密度実装構造 |
US5710063A (en) * | 1996-06-06 | 1998-01-20 | Sun Microsystems, Inc. | Method for improving the alignment of holes with other elements on a printed circuit board |
TW331698B (en) * | 1996-06-18 | 1998-05-11 | Hitachi Chemical Co Ltd | Multi-layered printed circuit board |
US6064111A (en) * | 1996-07-31 | 2000-05-16 | Hitachi Company, Ltd. | Substrate for holding a chip of semi-conductor package, semi-conductor package, and fabrication process of semi-conductor package |
EP0827159B1 (en) * | 1996-08-29 | 2003-05-21 | Mitsubishi Denki Kabushiki Kaisha | Epoxy resin composition and semiconductor device encapsulated therewith |
JPH1098081A (ja) | 1996-09-24 | 1998-04-14 | Hitachi Cable Ltd | 半導体チップ実装用のテープキャリア及びその製造方法 |
EP1852208B1 (en) | 1996-11-20 | 2012-01-04 | Ibiden Co., Ltd. | Laser machining apparatus and method for manufacturing a multilayered printed wiring board |
US5920123A (en) * | 1997-01-24 | 1999-07-06 | Micron Technology, Inc. | Multichip module assembly having via contacts and method of making the same |
US6399230B1 (en) * | 1997-03-06 | 2002-06-04 | Sarnoff Corporation | Multilayer ceramic circuit boards with embedded resistors |
JPH10256429A (ja) | 1997-03-07 | 1998-09-25 | Toshiba Corp | 半導体パッケージ |
JPH10256737A (ja) | 1997-03-10 | 1998-09-25 | Ibiden Co Ltd | プリント配線基板の製造方法およびプリント配線基板 |
US5969424A (en) | 1997-03-19 | 1999-10-19 | Fujitsu Limited | Semiconductor device with pad structure |
JP3754171B2 (ja) | 1997-04-08 | 2006-03-08 | 富士通株式会社 | 回路基板及びその製造方法 |
WO1998047328A1 (fr) | 1997-04-15 | 1998-10-22 | Ibiden Co., Ltd. | Adhesif utile pour effectuer le depot autocatalytique, composition de matiere brute utile pour preparer l'adhesif pour depot autocatalytique et carte imprimee |
JP3081168B2 (ja) | 1997-04-30 | 2000-08-28 | イビデン株式会社 | 電子部品搭載用基板 |
US5887343A (en) * | 1997-05-16 | 1999-03-30 | Harris Corporation | Direct chip attachment method |
JPH10321634A (ja) | 1997-05-22 | 1998-12-04 | Citizen Watch Co Ltd | 突起電極の製造方法 |
KR19990002341A (ko) | 1997-06-19 | 1999-01-15 | 윤종용 | 이형칩부품 혼재실장용 인쇄회로기판 및 그 제조방법 |
JP3324973B2 (ja) | 1997-07-28 | 2002-09-17 | イビデン株式会社 | レジストパターン形成のための位置決めマーク及び多層プリント配線板の製造方法 |
JP3588230B2 (ja) | 1997-07-31 | 2004-11-10 | 京セラ株式会社 | 配線基板の製造方法 |
AT2341U1 (de) | 1997-08-22 | 1998-08-25 | Green One Tec Kanduth Produkti | Profilrahmen für ein gehäuse eines sonnenkollektors |
US6005197A (en) | 1997-08-25 | 1999-12-21 | Lucent Technologies Inc. | Embedded thin film passive components |
US6271046B1 (en) * | 1997-10-06 | 2001-08-07 | Enterix, Inc. | Apparatus and method for analyte detection |
JPH11111738A (ja) | 1997-10-07 | 1999-04-23 | Oki Electric Ind Co Ltd | Cob及びcobの製造方法,半導体素子及び半導体素子の製造方法 |
FI103197B (fi) * | 1997-10-08 | 1999-05-14 | Sunds Defibrator Panelhandling | Laitteisto levyjen pinoamiseksi |
JP3378185B2 (ja) | 1997-11-28 | 2003-02-17 | イビデン株式会社 | パッケージ基板 |
US6441487B2 (en) * | 1997-10-20 | 2002-08-27 | Flip Chip Technologies, L.L.C. | Chip scale package using large ductile solder balls |
JPH11126978A (ja) | 1997-10-24 | 1999-05-11 | Kyocera Corp | 多層配線基板 |
US6025995A (en) | 1997-11-05 | 2000-02-15 | Ericsson Inc. | Integrated circuit module and method |
JPH11145174A (ja) * | 1997-11-10 | 1999-05-28 | Sony Corp | 半導体装置およびその製造方法 |
JP3375555B2 (ja) | 1997-11-25 | 2003-02-10 | 松下電器産業株式会社 | 回路部品内蔵モジュールおよびその製造方法 |
JPH11163047A (ja) * | 1997-11-27 | 1999-06-18 | Toshiba Corp | 半導体装置の製造方法及びその装置 |
JPH11176977A (ja) | 1997-12-08 | 1999-07-02 | Mitsubishi Gas Chem Co Inc | 金属芯入りキャビティ型プリント配線板 |
DE69842092D1 (de) | 1997-12-11 | 2011-02-17 | Ibiden Co Ltd | Verfahren zur Herstellung einer mehrschichtigen gedruckten Leiterplatte |
US6087203A (en) * | 1997-12-19 | 2000-07-11 | Texas Instruments Incorporated | Method for adhering and sealing a silicon chip in an integrated circuit package |
JP3969875B2 (ja) | 1997-12-29 | 2007-09-05 | イビデン株式会社 | 多層プリント配線板 |
US6162652A (en) * | 1997-12-31 | 2000-12-19 | Intel Corporation | Process for sort testing C4 bumped wafers |
JP2958520B2 (ja) | 1998-01-07 | 1999-10-06 | カシオ計算機株式会社 | 半導体装置の接合方法 |
US5937320A (en) | 1998-04-08 | 1999-08-10 | International Business Machines Corporation | Barrier layers for electroplated SnPb eutectic solder joints |
US5943597A (en) | 1998-06-15 | 1999-08-24 | Motorola, Inc. | Bumped semiconductor device having a trench for stress relief |
SE513875C2 (sv) * | 1998-06-15 | 2000-11-20 | Ericsson Telefon Ab L M | Elektrisk komponent samt ett flerlagrigt kretskort |
JP2000021916A (ja) | 1998-07-02 | 2000-01-21 | Citizen Watch Co Ltd | 半導体装置とその製造方法 |
US6153829A (en) | 1998-09-15 | 2000-11-28 | Intel Corporation | Split cavity wall plating for an integrated circuit package |
JP2000151079A (ja) | 1998-11-09 | 2000-05-30 | Dainippon Printing Co Ltd | 微細配線及びビアホールの形成方法 |
JP2000150705A (ja) | 1998-11-10 | 2000-05-30 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2000150518A (ja) | 1998-11-17 | 2000-05-30 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法 |
US6294494B1 (en) * | 1998-12-18 | 2001-09-25 | Phillips Petroleum Company | Olefin polymerization processes and products thereof |
US6756295B2 (en) | 1998-12-21 | 2004-06-29 | Megic Corporation | Chip structure and process for forming the same |
US7405149B1 (en) | 1998-12-21 | 2008-07-29 | Megica Corporation | Post passivation method for semiconductor chip or wafer |
US6433360B1 (en) * | 1999-01-15 | 2002-08-13 | Xilinx, Inc. | Structure and method of testing failed or returned die to determine failure location and type |
US6327158B1 (en) * | 1999-01-15 | 2001-12-04 | National Semiconductor Corporation | Metal pads for electrical probe testing on wafer with bump interconnects |
TW444288B (en) | 1999-01-27 | 2001-07-01 | Shinko Electric Ind Co | Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device |
JP2000228423A (ja) | 1999-02-05 | 2000-08-15 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
US6232212B1 (en) | 1999-02-23 | 2001-05-15 | Lucent Technologies | Flip chip bump bonding |
JP2000243754A (ja) | 1999-02-24 | 2000-09-08 | Sanyo Electric Co Ltd | 半導体装置 |
JP3522571B2 (ja) | 1999-03-05 | 2004-04-26 | 日本特殊陶業株式会社 | 配線基板 |
US6205032B1 (en) * | 1999-03-16 | 2001-03-20 | Cts Corporation | Low temperature co-fired ceramic with improved registration |
US6110806A (en) * | 1999-03-26 | 2000-08-29 | International Business Machines Corporation | Process for precision alignment of chips for mounting on a substrate |
KR20010090354A (ko) * | 1999-03-26 | 2001-10-18 | 가나이 쓰토무 | 반도체 모듈 및 그 실장 방법 |
US6806428B1 (en) | 1999-04-16 | 2004-10-19 | Matsushita Electric Industrial Co., Ltd. | Module component and method of manufacturing the same |
JP2000323645A (ja) | 1999-05-11 | 2000-11-24 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US6337228B1 (en) * | 1999-05-12 | 2002-01-08 | Amkor Technology, Inc. | Low-cost printed circuit board with integral heat sink for semiconductor package |
JP3756041B2 (ja) | 1999-05-27 | 2006-03-15 | Hoya株式会社 | 多層プリント配線板の製造方法 |
US6330259B1 (en) * | 1999-06-24 | 2001-12-11 | Jonathan S. Dahm | Monolithic radial diode-pumped laser with integral micro channel cooling |
US6235453B1 (en) | 1999-07-07 | 2001-05-22 | Advanced Micro Devices, Inc. | Low-k photoresist removal process |
DE60023727D1 (de) * | 1999-08-23 | 2005-12-08 | Gore Enterprise Holdings Inc | Filter zur entfernung von verunreinigungen aus einem gehäuse |
US20020000239A1 (en) * | 1999-09-27 | 2002-01-03 | Krishna G. Sachdev | Removal of cured silicone adhesive for reworking electronic components |
US6271469B1 (en) | 1999-11-12 | 2001-08-07 | Intel Corporation | Direct build-up layer on an encapsulated die package |
US6154366A (en) * | 1999-11-23 | 2000-11-28 | Intel Corporation | Structures and processes for fabricating moisture resistant chip-on-flex packages |
US6370013B1 (en) | 1999-11-30 | 2002-04-09 | Kyocera Corporation | Electric element incorporating wiring board |
EP1818975A3 (en) | 2000-02-25 | 2010-09-29 | Ibiden Co., Ltd. | Multilayer printed circuit board and multilayer printed circuit board manufacturing method |
US6586836B1 (en) * | 2000-03-01 | 2003-07-01 | Intel Corporation | Process for forming microelectronic packages and intermediate structures formed therewith |
US6281046B1 (en) | 2000-04-25 | 2001-08-28 | Atmel Corporation | Method of forming an integrated circuit package at a wafer level |
US6606792B1 (en) * | 2000-05-25 | 2003-08-19 | Oak-Mitsui, Inc. | Process to manufacturing tight tolerance embedded elements for printed circuit boards |
US6292366B1 (en) | 2000-06-26 | 2001-09-18 | Intel Corporation | Printed circuit board with embedded integrated circuit |
US6657707B1 (en) | 2000-06-28 | 2003-12-02 | Advanced Micro Devices, Inc. | Metallurgical inspection and/or analysis of flip-chip pads and interfaces |
CN100539106C (zh) * | 2000-09-25 | 2009-09-09 | 揖斐电株式会社 | 半导体元件及其制造方法、多层印刷布线板及其制造方法 |
JP2002260902A (ja) | 2001-03-05 | 2002-09-13 | Matsushita Electric Ind Co Ltd | チップ形ptcサーミスタ |
US6586276B2 (en) * | 2001-07-11 | 2003-07-01 | Intel Corporation | Method for fabricating a microelectronic device using wafer-level adhesion layer deposition |
US6667230B2 (en) * | 2001-07-12 | 2003-12-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Passivation and planarization process for flip chip packages |
KR100389314B1 (ko) | 2001-07-18 | 2003-06-25 | 엘지전자 주식회사 | 도금인입선 없는 인쇄회로기판의 제조방법 |
US6974659B2 (en) | 2002-01-16 | 2005-12-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a solder ball using a thermally stable resinous protective layer |
US6782897B2 (en) | 2002-05-23 | 2004-08-31 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of protecting a passivation layer during solder bump formation |
US7008867B2 (en) | 2003-02-21 | 2006-03-07 | Aptos Corporation | Method for forming copper bump antioxidation surface |
JP2004281491A (ja) | 2003-03-13 | 2004-10-07 | Toshiba Corp | 半導体装置及びその製造方法 |
CN1291069C (zh) * | 2003-05-31 | 2006-12-20 | 香港科技大学 | 微细间距倒装焊凸点电镀制备方法 |
WO2006126557A1 (ja) | 2005-05-23 | 2006-11-30 | Credia Japan Co., Ltd. | 光増感作用を有する化合物、光電極、及び光増感型太陽電池 |
-
2001
- 2001-01-12 EP EP07108462A patent/EP1818975A3/en not_active Withdrawn
- 2001-01-12 CN CNB018056385A patent/CN100336426C/zh not_active Expired - Lifetime
- 2001-01-12 US US10/181,682 patent/US6909054B2/en not_active Expired - Lifetime
- 2001-01-12 DE DE60128656T patent/DE60128656T2/de not_active Expired - Lifetime
- 2001-01-12 EP EP08161671A patent/EP1990833A3/en not_active Withdrawn
- 2001-01-12 EP EP07108465A patent/EP1814154A1/en not_active Withdrawn
- 2001-01-12 WO PCT/JP2001/000177 patent/WO2001063991A1/ja active IP Right Grant
- 2001-01-12 EP EP01900747A patent/EP1259103B1/en not_active Expired - Lifetime
- 2001-01-12 KR KR1020027011073A patent/KR100890534B1/ko active IP Right Grant
- 2001-01-12 EP EP08161669A patent/EP1990831A3/en not_active Withdrawn
- 2001-01-12 KR KR1020087006498A patent/KR20080031522A/ko active Search and Examination
- 2001-01-12 EP EP08161670A patent/EP1990832A3/en not_active Withdrawn
- 2001-01-16 TW TW090100903A patent/TW582192B/zh not_active IP Right Cessation
- 2001-02-23 MY MYPI20010820A patent/MY128015A/en unknown
-
2004
- 2004-03-04 US US10/793,515 patent/US7435910B2/en not_active Expired - Lifetime
-
2007
- 2007-06-04 US US11/757,750 patent/US7842887B2/en not_active Expired - Fee Related
-
2008
- 2008-02-20 US US12/034,572 patent/US7888605B2/en not_active Expired - Fee Related
- 2008-02-20 US US12/034,586 patent/US7884286B2/en not_active Expired - Fee Related
- 2008-02-20 US US12/034,581 patent/US7888606B2/en not_active Expired - Fee Related
- 2008-04-15 US US12/103,414 patent/US8186045B2/en not_active Expired - Fee Related
- 2008-11-19 US US12/273,939 patent/US8079142B2/en not_active Expired - Fee Related
-
2009
- 2009-10-01 US US12/572,000 patent/US8046914B2/en not_active Expired - Fee Related
- 2009-10-01 US US12/571,973 patent/US8438727B2/en not_active Expired - Lifetime
-
2011
- 2011-09-16 US US13/234,721 patent/US8453323B2/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10199886A (ja) * | 1997-01-06 | 1998-07-31 | Rohm Co Ltd | 半導体装置及びその製造方法 |
JPH1114574A (ja) * | 1997-06-20 | 1999-01-22 | Toshiba Corp | はんだ付け検査方法及びはんだ付け検査装置 |
JPH11233678A (ja) * | 1998-02-16 | 1999-08-27 | Sumitomo Metal Electronics Devices Inc | Icパッケージの製造方法 |
JPH11274734A (ja) * | 1998-03-20 | 1999-10-08 | Sony Corp | 電子回路装置およびその製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104067299A (zh) * | 2012-01-24 | 2014-09-24 | 德国捷德有限公司 | 生产避免芯片和数据载体主体之间的机械应力的数据载体的方法 |
CN111524873A (zh) * | 2019-02-01 | 2020-08-11 | 台达电子企业管理(上海)有限公司 | 嵌入式封装模块及其封装方法 |
US11552039B2 (en) | 2019-02-01 | 2023-01-10 | Delta Electronics (Shanghai) Co., Ltd | Embedded packaging module and manufacturing method for the same |
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