JP5115573B2 - 接続用パッドの製造方法 - Google Patents
接続用パッドの製造方法 Download PDFInfo
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- JP5115573B2 JP5115573B2 JP2010046722A JP2010046722A JP5115573B2 JP 5115573 B2 JP5115573 B2 JP 5115573B2 JP 2010046722 A JP2010046722 A JP 2010046722A JP 2010046722 A JP2010046722 A JP 2010046722A JP 5115573 B2 JP5115573 B2 JP 5115573B2
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- conductive layer
- connection pad
- insulating
- recess
- manufacturing
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- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
- H01L2924/1617—Cavity coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Description
また、本発明にあっては、絶縁性部材によって囲まれた領域で導電層の表面に窪みが残るようにして一部の導電層を除去しているので、接続用パッドの縁が高くる。そのため、導電性接着剤やハンダを用いて接続用パッドの接合を行う場合、導電性接着剤やハンダが接続用パッドの外にはみ出しにくくなり、その外の導電層に接触するのを防止できる。
以下、図3〜図8を参照して本発明の実施形態1を説明する。半導体装置41は、カバー44(基材)と基板45からなるパッケージ内にセンサ42と回路素子43を納めたものであって、実施形態1の半導体装置41では、カバー44に銅張り積層板を用いている。図3は本発明の実施形態1による半導体装置41の断面図である。図4(a)はセンサ42と回路素子43を実装したカバー44の平面図、図4(b)は導電性部材56、57を塗布した基板45の下面図である。なお、図面では基板45の下面にカバー44を取り付けているが、これは製造工程を示唆するものであって、使用状態においては半導体装置41は任意の向きでありうる。
つぎに、図5(a)〜(e)、図6(a)〜(c)及び図7(a)〜(d)によって上記半導体装置41の製造工程を説明する。図5(a)に示すものはカバー44の原材料であって、上下両面に銅箔62a、62bを貼った例えば2層の銅貼り積層板61である。この上面の銅箔62aは、図5(b)に示すように、ボンディング用パッド48を形成しようとする領域の周囲をエッチング除去することによって分離溝64を形成され、ボンディング用パッド48を形成しようとする領域にアイランド63が形成される。ついで、銅貼り積層板61の上面にフォトレジストを塗布し、フォトリソグラフィ技術を用いて、分離溝64の部分にだけフォトレジストが残るようにフォトレジストをパターニングする。この結果、図5(c)に示すように、硬化したフォトレジストによりアイランド63の周囲に突枠状に絶縁部49が形成される。
本発明の実施形態2による半導体装置81は、成形品のカバー44を用いた実施形態である。図9は、この半導体装置81を示す断面図である。カバー44は、非導電性樹脂からなる樹脂成形品であって、その上面には凹部46が成形されている。このカバー44の凹部内面及び上面には電磁シールド用の導電層47とボンディング用パッド48が形成されている。凹部46内の底面にはセンサ42及び回路素子43が実装されており、回路素子43とボンディング用パッド48の間はボンディングワイヤ51によって結線されている。
図10(a)〜(c)及び図11(a)〜(c)は、実施形態2の半導体装置81の製造工程を示す概略断面図である。以下、これらの図に従って半導体装置81の製造工程を説明する。
本発明の実施形態3による半導体装置91は、導電性樹脂や金属からなる成形品のカバー44を用いた実施形態である。図12は、この半導体装置91を示す断面図である。カバー44は、導電性樹脂又は金属の成形品であって、その上面には凹部46が成形されている。このカバー44の凹部内面及び上面は絶縁膜92で覆われており、その上に電磁シールド用の導電層47とボンディング用パッド48が形成されている。凹部46内の底面で導電層47の上にはセンサ42及び回路素子43が実装されており、回路素子43とボンディング用パッド48の間はボンディングワイヤ51によって結線されている。
図13(a)〜(e)は、実施形態3の半導体装置91の製造工程を示す概略断面図である。以下、これらの図に従って半導体装置91の製造工程を説明する。
図14は、本発明の実施形態4による半導体装置101を示す断面図である。実施形態4の半導体装置101は、カバー44に金属板を用いたものである。
図15(a)〜(f)は、実施形態4による半導体装置の製造工程を示す概略断面図である。図15に従って半導体装置101の製造方法を説明する。
42 センサ
43 回路素子
44 カバー
45 基板
46 凹部
47 導電層
48 ボンディング用パッド
49 絶縁部
50、51 ボンディングワイヤ
52 入出力配線
53 接続パッド部
56、57 導電性部材
68a 立上り部
72 切欠き部
83 外部接続端子
Claims (8)
- 基材の表面の接続用パッドを形成しようとする領域を囲むようにして、前記基材の表面に絶縁性部材を突設する第1の工程と、
前記絶縁性部材を覆うようにして前記基材の表面に導電層を形成する第2の工程と、
前記絶縁性部材によって囲まれた領域で前記導電層の表面に窪みが残るようにして、前記導電層のうち前記絶縁性部材の上面を覆っている一部の導電層を除去して前記絶縁性部材の上面を全周にわたって前記導電層から露出させ、前記絶縁性部材によって囲まれた領域に前記導電層からなる接続用パッドを形成する第3の工程とを備えた接続用パッドの製造方法。 - 前記第1の工程において、前記絶縁性部材は、前記基材の表面に絶縁性材料を付加することによって形成されることを特徴とする、請求項1に記載の接続用パッドの製造方法。
- 前記第1の工程において、前記絶縁性部材は、前記基材とともに一体成形されることを特徴とする、請求項1に記載の接続用パッドの製造方法。
- 前記第2の工程において、導電性を有する基材の表面に絶縁性材料からなる被膜を介して前記導電層を設けたことを特徴とする、請求項1に記載の接続用パッドの製造方法。
- 前記第3の工程において、前記導電層は、機械加工によって除去されることを特徴とする、請求項1に記載の接続用パッドの製造方法。
- 前記絶縁性部材によって囲まれた領域の外側の前記導電層は、電磁シールド用であることを特徴とする、請求項1に記載の接続用パッドの製造方法。
- 前記基材は凹部を備え、
前記第1の工程においては、前記絶縁性部材は前記凹部の外側の領域で前記基材の表面に形成され、
前記第2の工程においては、前記導電層は前記凹部の内面を含む前記基材の表面全体に形成されることを特徴とする、請求項1に記載の接続用パッドの製造方法。 - 前記基材は半導体素子を収容するためのパッケージの少なくとも一部を構成する部材であることを特徴とする、請求項1に記載の接続用パッドの製造方法。
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EP10189054A EP2363883A1 (en) | 2010-03-03 | 2010-10-27 | Connecting pad producing method |
KR1020100109078A KR101253401B1 (ko) | 2010-03-03 | 2010-11-04 | 본딩용 패드의 제조 방법 |
CN2010105709482A CN102194720A (zh) | 2010-03-03 | 2010-12-02 | 连接用焊盘的制造方法 |
US12/976,473 US20110217837A1 (en) | 2010-03-03 | 2010-12-22 | Connecting pad producing method |
US13/744,558 US20130130493A1 (en) | 2010-03-03 | 2013-01-18 | Connecting pad producing method |
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US20110217837A1 (en) | 2011-09-08 |
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US20130130493A1 (en) | 2013-05-23 |
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