WO2016051973A1 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- WO2016051973A1 WO2016051973A1 PCT/JP2015/072933 JP2015072933W WO2016051973A1 WO 2016051973 A1 WO2016051973 A1 WO 2016051973A1 JP 2015072933 W JP2015072933 W JP 2015072933W WO 2016051973 A1 WO2016051973 A1 WO 2016051973A1
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Definitions
- the present invention relates to a semiconductor device and a method of manufacturing the semiconductor device.
- Patent Document 1 Japanese Patent Application Publication No. 2012-199577 Patent Document 2 International Publication 2013/100155 Pamphlet Patent Document 3 US Patent No. 6482681 Specification Patent Document 4 US Patent No. 6707111 Specification Patent Document 5 Japanese Patent Application Laid-Open No. 2001-160559 Patent Document 6 JP-A-2001-156299 Patent Document 7 JP-A-7-193218 Patent Document 8 US Patent Application Publication No. 2008-1257 Specification Patent Document 9 US Patent Application Publication No. 2008-54369 Specification
- low reverse recovery loss ie peak current Irp of small reverse recovery current and tail current of small reverse recovery current
- gradual reverse recovery ie slow reverse recovery voltage time rate of change dV / Dt
- the carrier lifetime distribution in the direction perpendicular to the surface of the semiconductor substrate As a method of controlling the carrier lifetime, there is a technique of irradiating an electron beam into a semiconductor substrate. However, when the carrier lifetime is controlled by electron beam irradiation, the carrier lifetime in the semiconductor substrate is uniformly shortened. In this case, the tail current can be reduced. However, dV / dt and Irp tend to be large.
- the semiconductor device may include an n-type semiconductor substrate.
- the semiconductor device may comprise a p-type anode region.
- the anode region may be formed on the surface side of the semiconductor substrate.
- the semiconductor device may comprise an n-type field stop region.
- the field stop region may be formed with a proton as a donor on the back surface side of the semiconductor substrate.
- the semiconductor device may comprise an n-type cathode region.
- the cathode region may be formed on the back surface side of the semiconductor substrate than the field stop region.
- the concentration distribution of donors in the depth direction in the field stop region has a first peak and a second peak whose concentration is lower than the first peak on the back surface side of the semiconductor substrate than the first peak. Good.
- the carrier lifetime in at least a partial region between the anode region and the cathode region may be longer than any of the carrier lifetimes in the anode region and the cathode region.
- the carrier lifetime at the depth position where the concentration distribution of the donor shows the first peak may be longer than any of the carrier lifetimes at the anode region and the cathode region.
- the concentration distribution of the donor in the depth direction in the field stop region may have a plurality of peaks, and the first peak may be the peak closest to the surface of the semiconductor substrate among the plurality of peaks.
- the region where the carrier lifetime is longer than that of the anode region may extend to the surface side of the semiconductor substrate than the position where the concentration distribution of the donor shows the first peak.
- the edge on the back surface side of the semiconductor substrate of the depletion layer extending from the boundary between the anode region and the n-type region of the semiconductor substrate It may have a first peak at a position corresponding to the part.
- the back surface side of the semiconductor substrate may have a local lifetime killer that shortens the carrier lifetime.
- the region where the local lifetime killer is present may be formed at a position not in contact with the depletion layer extending from the boundary between the anode region and the n-type region of the semiconductor substrate when the rated reverse voltage of the semiconductor device is applied.
- the injection amount of the local lifetime killer may be 1/300 or more of the injection amount of the peak proton at the back surface side of the semiconductor substrate in the concentration distribution of the donor.
- the injection amount of the local lifetime killer may be 1/150 or more, or 1/100 or more of the injection amount of the proton.
- a lifetime killer may be irradiated to shorten the carrier lifetime of the entire semiconductor substrate.
- the lifetime killer may be one in which crystal defects formed by the lifetime killer can be terminated by protons.
- the carrier lifetime of the cathode region may be longer than the carrier lifetime of the anode region.
- n-type semiconductor substrate An n-type semiconductor substrate, a p-type anode region formed on the front surface side of the semiconductor substrate, an n-type field stop region formed using a proton as a donor on the back surface side of the semiconductor substrate, and a semiconductor than the field stop region
- the donor concentration distribution in the depth direction in the field stop region is determined from the first peak and the first peak.
- a proton injection step may be provided in which protons are injected from the back surface side of the semiconductor substrate such that the back surface side of the semiconductor substrate has a second peak lower in concentration than the first peak.
- the semiconductor substrate is annealed to diffuse protons, whereby the carrier lifetime in at least a partial region between the anode region and the cathode region is longer than any of the carrier lifetimes in the anode region and the cathode region.
- a lifetime annealing step may be provided.
- the manufacturing method may further include a lifetime killer irradiation step of irradiating the semiconductor substrate with a lifetime killer that shortens the carrier lifetime of the entire semiconductor substrate. By diffusing the protons in the lifetime annealing step, the carrier lifetime in the region where the protons are diffused may be restored.
- the manufacturing method may further include a proton annealing step of annealing the semiconductor substrate between the proton injection step and the lifetime killer irradiation step. The position of the first peak may be adjusted according to the withstand voltage class of the semiconductor device.
- the semiconductor substrate may be irradiated with an electron beam.
- FIG. 14 is a schematic cross sectional view of the semiconductor device 100 and a diagram showing carrier concentration distribution in the FS region 40.
- FIG. 7 is a schematic view showing an example of distribution of carrier lifetimes in the depth direction of the semiconductor substrate 10;
- FIG. 6 is a diagram showing an example of a leak current waveform of the semiconductor device 100.
- FIG. 6 is a view showing an example of the manufacturing direction of the semiconductor device 100. It is a figure which shows an example of FS area
- FIG. 17 is a diagram showing an example of the end position of the depletion layer when a reverse voltage is applied to the semiconductor device 100. It is a figure which shows an example of the relationship between the irradiation amount of helium as a local lifetime killer, and the forward direction voltage of the semiconductor device. It is a figure which shows an example of the time waveform of the voltage between anode cathodes at the time of reverse recovery, and anode current.
- a 1/7 to 2/7 the depth region of the carrier lifetime shows the relationship between the time waveform of the anode current I A.
- the relationship between the carrier lifetime (forward voltage) in the depth region from 2/7 to 3/7 and the time waveform of the anode-cathode voltage VKA is shown.
- the carrier lifetime in the depth region of from 2/7 to 3/7 shows the relationship between the time waveform of the anode current I A.
- the relationship between the carrier lifetime (forward voltage) in the depth region from 3/7 to 4/7 and the time waveform of the anode-cathode voltage VKA is shown.
- the carrier lifetime in the depth region of from 3/7 to 4/7 shows the relationship between the time waveform of the anode current I A.
- the relationship between the carrier lifetime (forward voltage) in the depth region from 4/7 to 5/7 and the time waveform of the anode-cathode voltage VKA is shown.
- a 4/7 to 5/7 the depth region of the carrier lifetime (forward voltage) shows the relationship between the time waveform of the anode current I A.
- the relationship between the carrier lifetime (forward voltage) in the depth region from 5/7 to 6/7 and the time waveform of the anode-cathode voltage VKA is shown.
- the carrier lifetime in the depth region of from 5/7 to 6/7 shows the relationship between the time waveform of the anode current I A.
- the relationship between the carrier lifetime (forward voltage) in the depth region from 6/7 to the back surface of the semiconductor substrate 10 and the time waveform of the anode-cathode voltage VKA is shown.
- the carrier lifetime in the depth region of to the back surface of the semiconductor substrate 10 (forward voltage) from 6/7 shows the relationship between the time waveform of the anode current I A.
- FIG. 16 is a diagram showing an example of a method of manufacturing the semiconductor device 200.
- FIG. 16 is a view showing another example of the carrier concentration distribution in the FS region 40.
- FIG. 1 is a diagram showing an outline of a semiconductor device 100 according to an embodiment of the present invention.
- FIG. 1 shows a schematic view of a cross section of the semiconductor device 100.
- the semiconductor device 100 in this example is used, for example, as a free wheeling diode (FWD) provided in parallel with a high breakdown voltage switch such as an IGBT.
- the semiconductor device 100 of this example includes an n ⁇ -type semiconductor substrate 10, an insulating film 22, an anode electrode 24, and a cathode electrode 32. Further, a p + -type anode region is formed on the front surface side of the semiconductor substrate 10, and a field stop region (FS region 40) and an n + -type cathode region 30 are formed on the back surface side.
- FWD free wheeling diode
- IGBT high breakdown voltage switch
- the semiconductor device 100 of this example includes an n ⁇ -type semiconductor substrate 10, an insulating film 22, an anode electrode 24, and a cathode electrode 32
- the semiconductor substrate 10 is, for example, a silicon substrate.
- the insulating film 22 is formed to cover the surface of the semiconductor substrate 10. However, the insulating film 22 has an opening that exposes the anode region 20.
- the insulating film 22 is formed of, for example, an insulator such as silicon oxide or silicon nitride.
- the anode electrode 24 is formed on the anode region 20 exposed to the opening of the insulating film 22.
- the anode electrode 24 is formed of, for example, a metal such as aluminum.
- the FS region 40 is an n-type region formed using a proton (hydrogen ion) as a donor.
- the impurity concentration of the FS region (in this example, the donor concentration) is higher than the impurity concentration of the semiconductor substrate 10.
- the cathode region 30 is formed on the back surface side of the semiconductor substrate 10 than the FS region 40.
- the cathode region 30 is an n + -type region formed using, for example, phosphorus as a donor.
- the impurity concentration of the cathode region 30 is higher than both the impurity concentration of the semiconductor substrate 10 and the impurity concentration of the FS region 40.
- the cathode electrode 32 is formed on the back surface of the semiconductor substrate 10 and connected to the cathode region 30. With such a configuration, the semiconductor device 100 functions as a diode.
- FIG. 2 is a schematic cross-sectional view of the semiconductor device 100 and a diagram showing carrier concentration distribution in the FS region 40.
- the insulating film 22, the anode electrode 24, and the cathode electrode 32 are abbreviate
- the horizontal axis indicates the depth position from the end on the back surface side of the FS region 40, and the vertical axis indicates the carrier concentration.
- the carrier concentration corresponds to the donor concentration due to the proton injected into the FS region 40.
- the donor concentration distribution in the depth direction in the FS region 40 has a plurality of peaks.
- the peak indicates, for example, a maximum value.
- a first peak, a second peak, a third peak, and a fourth peak are present.
- the first peak is present in the FS region 40 at the deepest position as viewed from the back surface side (cathode side) of the semiconductor substrate 10.
- a place where the distance from the back surface side (cathode side) of the semiconductor substrate 10 is larger is referred to as a “deep position”
- a place where the distance is smaller is referred to as a “shallow position”.
- the second peak is present at a position shallower than the first peak.
- the donor concentration in the second peak is lower than the donor concentration in the first peak.
- the third peak is located shallower than the second peak.
- the donor concentration in the third peak is higher than both the donor concentration in the second peak and the donor concentration found in the first peak.
- the donor concentration in the third peak may be lower than at least one of the donor concentration in the second peak and the donor concentration in the first peak.
- the fourth peak is present at a position shallower than the third peak.
- the fourth peak is present at the shallowest position in the FS region 40.
- the fourth peak may be provided adjacent to the cathode region 30 or at a remote position.
- the plurality of peaks may be provided at equal intervals in the depth direction of the FS region 40, or may be provided at unequal intervals.
- the donor concentration in the fourth peak is higher than any donor concentration in the other peaks.
- the concentration of the peak decreases in the FS region 40 as the distance from the back surface side of the semiconductor substrate 10 decreases, but the concentration of the first peak at the deepest position is higher than the concentration of the second peak immediately before Become.
- the concentration of the first peak higher than the concentration of the second peak, the distribution of carrier lifetimes in the depth direction of the semiconductor substrate 10 can be appropriately controlled.
- the carrier lifetime is controlled by irradiating an electron beam or the like.
- bonds between atoms such as silicon crystals forming the semiconductor substrate 10 are broken to generate crystal defects. This shortens the carrier lifetime.
- the electron beam or the like is irradiated, the carrier lifetime is shortened almost equally in the whole of the semiconductor substrate 10.
- protons terminate broken atoms and repair the above-mentioned crystal defects. That is, the proton has a function of recovering the carrier lifetime. Therefore, by controlling the concentration distribution of protons implanted into the semiconductor substrate 10, the distribution of carrier lifetime can be controlled.
- FIG. 3 is a schematic view showing an example of distribution of carrier lifetimes in the depth direction of the semiconductor substrate 10.
- the horizontal axis indicates the position in the depth direction of the semiconductor substrate 10
- the vertical axis indicates the carrier lifetime.
- the distribution example shown in FIG. 3 is a schematic one, and the thickness of the semiconductor substrate 10 and the thickness of the FS region 40 do not coincide with the example of FIG.
- the first peak of the FS region is located near the center of the anode region 20 and the cathode region 30.
- the carrier lifetime in at least a partial region between the anode region 20 and the cathode region 30 is longer than any of the carrier lifetimes in the anode region 20 and the cathode region 30.
- the concentration distribution of protons to be injected is controlled so as to obtain such a carrier lifetime distribution.
- the carrier lifetime at the depth position indicating the first peak shown in FIG. 2 is longer than any of the carrier lifetimes in the anode region 20 and the cathode region 30.
- the peak current Irp and tail current of the reverse recovery current can be reduced to reduce reverse recovery loss, and the time change of the reverse recovery voltage A gradual reverse recovery can be realized by reducing the rate dV / dt.
- the amount of extension of the region is estimated to be about 30 to 40 ⁇ m from the first peak position, as described later in FIG. It is preferable to determine the depth position of the first peak in consideration of the amount of extension.
- FIG. 4 is a view showing an example of the leak current waveform of the semiconductor device 100.
- the horizontal axis indicates the reverse voltage between the anode and the cathode, and the vertical axis indicates the leak current.
- a leak current waveform of the semiconductor device in which the FS region 40 is not formed is indicated by a broken line.
- the semiconductor device 100 of this example in which the FS region 40 is formed has a leakage current substantially reduced as compared with the semiconductor device in which the FS region 40 is not formed.
- the slope of the increase in leakage current with respect to the reverse voltage is large until the reverse voltage is about 200 to 300 V. If the reverse voltage is further increased, the slope of the current decreases. The decrease in the current slope is considered to be due to the fact that the depletion layer expanded by the increase in voltage enters the region where the carrier lifetime has been recovered by proton.
- Vbi is a built-in voltage
- N A is an acceptor concentration
- N D is a donor concentration
- ⁇ is a dielectric constant of the semiconductor substrate 10
- q is a charge.
- the depletion layer width W corresponding to the voltage at the change point where the slope of the current changes is approximately 50 to 60 ⁇ m.
- the first peak is located about 30 ⁇ m from the back surface of the semiconductor substrate 10.
- the thickness of the semiconductor substrate 10 is about 110 ⁇ m. Therefore, as described in FIG. 3, it is estimated that protons are diffused by about 30 ⁇ m from the position of the first peak to the surface side of the semiconductor substrate 10.
- FIG. 5 is a view showing an example of the manufacturing direction of the semiconductor device 100.
- the semiconductor substrate 12 is prepared.
- the semiconductor substrate 12 functions as the semiconductor substrate 10 by grinding the back surface in a grinding step S320 described later. That is, the semiconductor substrate 12 is formed of the same material as the semiconductor substrate 10 and is thicker than the semiconductor substrate 10.
- the substrate specific resistance of the semiconductor substrate 12 and the semiconductor substrate 10 may be about 70 to 90 ⁇ cm.
- an element structure on the front side of the semiconductor substrate 12 is formed.
- the anode region 20, the insulating film 22 and the anode electrode 24 are formed on the surface of the semiconductor substrate 12.
- a protective film for protecting the element structure may be formed. The protective film may be removed after the semiconductor device 100 is manufactured. Since the structure on the surface side is formed using the thick semiconductor substrate 12, the possibility of the occurrence of cracking or the like of the semiconductor substrate 12 in the surface side forming step S310 can be reduced.
- the back surface side of the semiconductor substrate 12 is ground to form the semiconductor substrate 10.
- the thickness of the semiconductor substrate 10 after grinding is determined by the rated voltage of the semiconductor device 100 or the like. In the present example, the thickness of the semiconductor substrate 10 is about 100 to 130 ⁇ m.
- the cathode region 30 is formed on the back surface of the semiconductor substrate 10.
- n-type impurities such as phosphorus are ion implanted from the back surface side of the semiconductor substrate 10.
- the region where the cathode region 30 is to be formed is subjected to, for example, laser annealing to activate impurity ions to be donors. Thereby, the cathode region 30 is formed.
- protons are injected into the region where the FS region 40 is to be formed.
- S340 as shown in FIG. 2, protons are injected into the FS region 40 such that the concentration distribution of protons in the depth direction in the FS region 40 has a plurality of peaks.
- the first peak on the front surface side of the semiconductor substrate 10 is larger than the second peak on the back surface side of the semiconductor substrate 10 than the first peak.
- the FS region 40 is formed.
- the condition ranges of the acceleration voltage of the proton and the injection amount in this example are as follows. Values in parentheses are one example value. Thereby, the same concentration distribution as the example of FIG. 2 is formed.
- First peak 1 to 4 MeV (1.5 MeV), 3E12 to 3E13 cm -2 (1E13 cm -2 )
- Second peak 0.8 to 3 MeV (1 Mev), 1E12 to 1E13 cm -2 (7E12 cm -2 )
- Third peak 0.6 to 2 MeV (0.8 MeV), 3E12 to 3E13 cm -2 (1E13 cm -2 )
- Fourth peak 0.2 to 1 MeV (0.4 MeV), 3E13 to 1E15 cm -2 (3E14 cm -2 )
- region 40 in this example and the depth from a back surface is the following. Values in parentheses are one example value.
- the second peak, the third peak, and the fourth peak are formed in the passing region of protons in the further peak, so that the donor concentration is increased due to the influence of donorization in the passing region. Be done. Therefore, for example, even if the injection amount of protons of the first peak and the injection amount of protons of the third peak are the same, the donor concentration of the third peak is higher than that of the first peak. This is because the donor concentration in the proton passage region of the first and second peaks is added.
- the first peak 2E14 to 2E15 cm -3 (9E14 cm -3 ), 15 to 150 ⁇ m (30 ⁇ m)
- Second peak 1E14 to 1E15 cm -3 (5E14 cm -3 ), 10 to 100 ⁇ m (15 ⁇ m)
- Third peak 3E14 to 3E15 cm -3 (2E15 cm -3 ), 5 to 50 ⁇ m (10 ⁇ m)
- the position of the first peak may be determined according to the withstand voltage class of the semiconductor device 100. As described above, the protons diffuse toward the surface side of the semiconductor substrate 10 by a certain distance. Since it is determined according to the pressure resistance class of the semiconductor device 100 how much the region where protons do not diffuse on the surface side of the semiconductor substrate 10 is desired to be left, the position of the first peak may be determined in consideration of the diffusion distance of protons. . For example, the position of the first peak in the semiconductor device 100 with a withstand voltage of 1700 V is deeper than the position of the first peak in the semiconductor device 100 with a withstand voltage of 1200 V. Further, in the semiconductor device 100 having a withstand voltage of 600 V, the first peak is provided at a position shallower than the semiconductor device 100 having a withstand voltage of 1200 V.
- the lifetime killer is irradiated from the back surface side of the semiconductor substrate 10.
- an electron beam is irradiated from the back surface side of the semiconductor substrate 10.
- the lifetime killer is not limited to the electron beam, but the one that can recover the carrier lifetime reduced by the lifetime killer by protons is used.
- the semiconductor substrate 10 is annealed. As a result, protons diffuse in the semiconductor substrate 10, the carrier lifetime of a partial region is recovered, and the carrier lifetime distribution as shown in FIG. 3 is obtained.
- the cathode electrode 32 is formed on the back surface side of the semiconductor substrate 10. After the cathode electrode 32 is formed, heat treatment may be performed on the cathode electrode 32. Thus, the semiconductor device 100 can be manufactured.
- FIG. 6 is a diagram showing an example of the FS area formation step S340 and the lifetime control step S350.
- the FS region formation step S340 of this example has a proton injection step S342 and a proton annealing step S344.
- the lifetime control step S350 includes a lifetime killer irradiation step S352 and a lifetime annealing step S354.
- the semiconductor substrate 10 is annealed.
- the annealing temperature in the proton annealing step S344 is, for example, about 300 to 500 ° C.
- the annealing time is, for example, about 0.5 hour to 10 hours.
- a lifetime killer is irradiated (S352), and lifetime annealing is performed (S354).
- the annealing temperature in the lifetime annealing step S354 is, for example, about 300 to 500 ° C.
- the annealing time is, for example, about 0.5 hour to 10 hours.
- an electron beam of 80 kGy is irradiated.
- a proton annealing step S344 for annealing the semiconductor substrate 10 is provided between the proton implantation step S342 and the lifetime killer irradiation step S352, and excess protons are released from the semiconductor substrate 10 in the proton annealing step S344.
- FIG. 7 is a view showing another example of the FS area formation step S340 and the lifetime control step S350.
- the FS region forming step S340 does not have the proton annealing step S344. Others are the same as the example shown in FIG.
- FIG. 8 is a diagram comparing leakage current waveforms of the semiconductor device 100 manufactured by performing the proton annealing and the semiconductor device 100 manufactured without performing the proton annealing.
- lifetime annealing is performed after proton implantation and lifetime killer irradiation without performing proton annealing, a large amount of protons remain at the time of lifetime annealing, and almost all crystal defects formed by lifetime killer irradiation are recovered. It will For this reason, as shown in FIG. 8, the effect of lifetime killer irradiation disappears.
- the remaining amount of protons during lifetime killer annealing can be appropriately controlled. For this reason, distribution control of carrier lifetime becomes easy.
- FIG. 9 is a view showing another example of the carrier lifetime distribution.
- the carrier lifetime in the cathode region 30 is reduced compared to the distribution shown in FIG.
- a local lifetime killer for shortening the carrier lifetime is injected on the back surface side of the semiconductor substrate 10.
- the local lifetime killer in this example is helium. As described later, it is possible to reduce the tail current by reducing the carrier lifetime on the cathode region 30 side, and it is possible to reduce the reverse recovery loss.
- the depth not in contact with the depletion layer extending from the boundary between anode region 20 and the n-type region of semiconductor substrate 10 when the rated reverse voltage of semiconductor device 100 is applied.
- the region where the local lifetime killer is present is at a depth position not in contact with the depletion layer extending from the boundary between the anode region 20 and the n-type region of the semiconductor substrate 10 when the breakdown voltage is applied to the semiconductor device 100. It may be formed.
- FIG. 10 is a diagram showing an example of the end position of the depletion layer when a reverse voltage is applied to the semiconductor device 100.
- the doping concentration distribution of the impurities is also shown.
- FIG. 10 shows the distance from the back surface of the semiconductor substrate 10 of the end portion of the depletion layer in the case where the reverse voltage is 400V, 600V, 800V, 1000V, 1100V, and 1200V.
- the depletion layer spreads from the front surface to the back surface of the semiconductor substrate 10, and the end of the depletion layer reaches a position 4 ⁇ m from the back surface.
- the rated reverse voltage is 1200 V in the configuration of this example, it is preferable that the local lifetime killer is not injected and diffused to a position deeper than 2.5 ⁇ m from the back surface of the semiconductor substrate 10, for example.
- the injection position of the local lifetime killer and the fourth peak position of the proton injection overlap.
- the crystal defects generated by helium irradiation are affected by the defect recovery by proton as in the electron beam irradiation. Therefore, it is preferable to adjust the injection amount of the local lifetime killer according to the injection amount of protons in the region.
- FIG. 11 is a diagram showing an example of the relationship between the irradiation amount of helium as a local lifetime killer and the forward voltage of the semiconductor device 100. As shown in FIG. The forward voltage in the case of not irradiating helium was about 1.5 to 1.6 V.
- the injection amount of protons in the fourth peak is 3E14 cm ⁇ 2 .
- the injection amount of the local lifetime killer is preferably at least 1/300 of the injection amount of protons.
- the injection amount of the local lifetime killer may be 1/150 or more, or 1/100 or more of the proton injection amount. Further, the injection amount of the local lifetime killer is preferably 1/3 or less of the injection amount of protons.
- FIG. 12 is a diagram showing an example of time waveforms of the anode-cathode voltage and the anode current at the time of reverse recovery.
- the reverse recovery loss can be reduced by reducing the peak current value Irp and the tail current shown in FIG.
- the reverse recovery can be moderated by increasing the slope dV / dt of the voltage between the anode and the cathode.
- FIG. 13 is a diagram showing the relationship between the forward voltage and dV / dt when the semiconductor substrate 10 is divided into seven in the depth direction and the carrier lifetime of each region is changed.
- the relationship is calculated by device simulation.
- the forward voltage Vf is in a rising relationship.
- 14A is from the surface of the semiconductor substrate 10, showing the forward voltage Vf of changing the carrier lifetime in the region up to a depth of up to 1/7, the relationship between the time waveform of the anode-cathode voltage V KA There is.
- Figure 14B the surface of the semiconductor substrate 10, showing the forward voltage Vf of changing the carrier lifetime in the region up to a depth of up to 1/7, the relationship between the time waveform of the anode current I A.
- Figure 15A shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 1/7 to 2/7, the relationship between the time waveform of the anode-cathode voltage V KA.
- 15B is a surface of the semiconductor substrate 10, shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 1/7 to 2/7, the relationship between the time waveform of the anode current I A ing.
- Figure 16A shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 2/7 to 3/7, the relationship between the time waveform of the anode-cathode voltage V KA.
- 16B is a surface of the semiconductor substrate 10, shown from 2/7 and the forward voltage Vf of changing the carrier lifetime in the depth region up to 3/7, the relationship between the time waveform of the anode current I A ing.
- 17A shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 3/7 to 4/7, the relationship between the time waveform of the anode-cathode voltage V KA.
- 17B is a surface of the semiconductor substrate 10, shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 3/7 to 4/7, the relationship between the time waveform of the anode current I A ing.
- Figure 18A shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 4/7 to 5/7, the relationship between the time waveform of the anode-cathode voltage V KA.
- Figure 18B the surface of the semiconductor substrate 10, shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 4/7 to 5/7, the relationship between the time waveform of the anode current I A ing.
- Figure 19A shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 5/7 to 6/7, the relationship between the time waveform of the anode-cathode voltage V KA.
- 19B is a surface of the semiconductor substrate 10, shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 5/7 to 6/7, the relationship between the time waveform of the anode current I A ing.
- Figure 20A shows the relationship between the 6/7 and the forward voltage Vf of changing the carrier lifetime in the depth region of to the back surface of the semiconductor substrate 10, a time waveform of the anode-cathode voltage V KA.
- Figure 20B shows the forward voltage Vf of changing the carrier lifetime in the depth region of from 6/7 to the back surface of the semiconductor substrate 10, the relationship between the time waveform of the anode current I A.
- the carrier lifetime of the region may be shorter than the region from 3/7 to 5/7 and longer than the region from the surface of the semiconductor substrate 10 to 3/7.
- the above phenomenon can also be understood as follows. At the time of reverse recovery, the depletion layer spreads from the anode region 20 side. Carriers present in the depletion region are discharged and become reverse recovery current. Therefore, when the number of carriers on the surface side of the semiconductor substrate 10 is large, the peak Irp of the current flowing first tends to be high.
- the IGBT or the like draws a predetermined current from the semiconductor device 100. At this time, if there are many carriers in the semiconductor substrate 10, the current can be supplied to the IGBT or the like even if the depletion layer spreads slowly. On the other hand, when the number of carriers is small, the depletion layer is rapidly spread to supply the current, and the slope dV / dt of the reverse recovery voltage becomes large. For this reason, if the number of carriers in the middle of the semiconductor substrate 10 in the middle of the expansion of the depletion layer is large, the slope dV / dt of the reverse recovery voltage is reduced.
- the first peak is at the end of the back surface side of the semiconductor substrate 10 of the above described depletion layer when the voltage between the electrodes of the diode at the time of reverse recovery of the semiconductor device 100 becomes half of the applied voltage.
- they are provided at corresponding positions.
- the applied voltage at the time of reverse recovery is often set to about half of the device withstand voltage.
- reverse recovery is performed at an applied voltage of 600 V.
- the dV / dt becomes largest at the time of reverse recovery when the voltage between the anode and the cathode becomes half of the applied voltage.
- the semiconductor device 100 of this example injects protons to form the FS region 40, and diffuses the protons to recover the carrier lifetime.
- it since it has a distribution of protons as shown in FIG. 2 etc., it is possible to form a carrier lifetime distribution having a peak in the middle of the semiconductor substrate 10 as shown in FIG. 3 or FIG. .
- a small peak current Irp, a small tail current, and a gradual reverse recovery voltage slope dV / dt can be realized.
- FIG. 21 is a diagram showing a configuration example of a semiconductor device 200 according to another embodiment.
- the semiconductor device 200 of this example is an RC-IGBT device in which an IGBT element 140 and an FWD element 150 connected in reverse parallel are integrally formed.
- the semiconductor device 200 includes a semiconductor substrate 10, an insulating film 122, an emitter anode electrode 124, and a collector cathode electrode 132.
- the semiconductor substrate 10 has a p-type region 120 formed on the front side.
- the semiconductor substrate 10 also has a plurality of trenches 104 formed through the p-type region 120 from the surface of the semiconductor substrate 10.
- the tip of each trench 104 on the back surface side of the semiconductor substrate 10 protrudes more than the end of the p-type region 120.
- Each trench 104 has a trench gate 102 formed through the p-type region 120 from the surface of the semiconductor substrate 10.
- Each trench gate 102 and each semiconductor layer are insulated by the insulating film 103.
- n + -type region 106 and p + -type region 108 are formed in a part of p-type region 120 corresponding to IGBT element 140 among the plurality of p-type regions 120 separated by trench 104.
- the n + -type region 106 is provided adjacent to the trench 104 at the surface of the p-type region 120.
- the p + -type region 108 is provided between the n + -type region 106 on the surface of the p-type region 120.
- the p-type region 120 corresponding to the FWD element 150 functions as the anode region 20 described in FIGS. 1 to 20B.
- the n + -type region 106 and the p + -type region 108 may be formed in the p-type region 120 corresponding to the FWD element 150 as well.
- An emitter anode electrode 124 is connected to each p-type region 120.
- the emitter anode electrode 124 is connected to both the n + -type region 106 and the p + -type region 108.
- the emitter anode electrode 124 is connected to the p-type region 120.
- the emitter anode electrode 124 and the trench gate 102 are insulated by the insulating film 122.
- Each trench gate 102 is connected to a gate electrode not shown.
- a voltage to trench gate 102 By applying a voltage to trench gate 102, a channel in the vertical direction is formed in p type region 120 between n + type region 106 and semiconductor substrate 10.
- the semiconductor substrate 10 includes an FS region 40 formed on the back surface side.
- the FS area 40 has the same structure and characteristics as the FS area 40 described in FIGS. 1 to 20B. Further, p-type collector region 130 is formed in the region corresponding to IGBT element 140 in the back surface of FS region 40, and n-type cathode region 30 is formed in the region corresponding to FWD element 150.
- a common collector cathode electrode 132 is formed on the back surface of the collector region 130 and the cathode region 30.
- the RC-IGBT type semiconductor device 200 is effective to control the carrier lifetime by adjusting the proton injection concentration in the FS region 40 as described in FIGS. 1 to 20B. .
- FIG. 22 is a diagram showing an example of a method of manufacturing the semiconductor device 200.
- the semiconductor substrate 12 is prepared as in the example of FIG.
- the surface element structure formation step S402 the element structure on the surface side of the semiconductor substrate 12 is formed.
- the p-type region 120, the trench 104, the n + -type region 106, the p + -type region 108, the n-type region 110, and the insulating film 122 are formed on the surface of the semiconductor substrate 12.
- the emitter anode electrode 124 is formed in the surface electrode formation step S404.
- the back surface grinding step S406 the back surface of the semiconductor substrate 12 is ground.
- the back surface diffusion layer ion implantation step S408 p-type impurity ions and n-type impurity ions are respectively implanted into the region of the back surface of the semiconductor substrate 10 corresponding to the collector region 130 and the cathode region 30.
- the back surface laser annealing step S410 the collector region 130 and the cathode region 30 are formed by laser annealing the region in which the p-type impurity ions and the n-type impurity ions are implanted.
- the surface protective film formation step S412 a protective film is formed on the surface of the semiconductor substrate 10.
- the FS region 40 is formed in the proton injection step S412 and the proton annealing step S414.
- the proton injection step S412 and the proton annealing step S414 are the same as the proton injection step S342 and the proton annealing step S344 in FIG. Thereby, an FS region 40 having a concentration distribution of protons as shown in FIG. 2 is formed.
- the carrier lifetime is controlled in the lifetime killer irradiation step S416 and the lifetime annealing step S418.
- the lifetime killer irradiation step S416 and the lifetime annealing step S418 are the same as the lifetime killer irradiation step S352 and the lifetime annealing step S354 in FIG. Thereby, carrier lifetime distribution as shown in FIG. 3 or FIG. 9 is realized.
- the collector cathode electrode 132 is formed.
- the semiconductor device 200 is manufactured.
- FIG. 23 is a view showing another example of the carrier concentration distribution in the FS region 40.
- the horizontal axis indicates the depth position from the rear surface side end of the FS region 40, and the vertical axis indicates the carrier concentration.
- the carrier concentration corresponds to the donor concentration due to the proton injected into the FS region 40.
- the donor concentration distribution in the depth direction in the FS region 40 has a plurality of peaks.
- the first peak, the second peak, the third peak, and the fourth peak are present as in the example of FIG.
- the first to third peaks excluding the fourth peak closest to the rear surface side end of the FS region 40 have a larger carrier concentration as the distance from the rear surface end is larger. That is, the first peak has a higher carrier concentration than the second peak and the third peak, and the second peak has a higher carrier concentration than the third peak.
- the FS region 40 prevents the depletion layer extending from the boundary between the p + -type anode region 20 and the n ⁇ -type semiconductor substrate 10 from reaching the cathode region 30.
- the depletion layer may extend up to the peak closest to the rear end of the plurality of peaks.
- the concentrations of the first to third peaks gradually decrease from the substrate front side to the back side.
- the smallest peak concentration is larger than that in the example of FIG. Therefore, the slope dV / dt of the reverse recovery voltage can be reduced.
- FIG. 24 is a view showing an example of the impurity concentration distribution in the depth direction of the semiconductor substrate 10 together with the helium distribution and the hydrogen distribution.
- p-type and n-type impurity concentrations are shown together.
- a high concentration p-type anode region 20 is formed to a depth of about several ⁇ m from the surface of the semiconductor substrate 10.
- an n--type region as a drift region is formed to a depth of about 55 ⁇ m
- an FS region 40 and a cathode region 30 are formed at a migration depth of about 55 ⁇ m.
- the impurity concentration of Comparative Example 300 is indicated by a dotted line.
- the peak of the impurity concentration closest to the surface of the semiconductor substrate 10 is larger than the peak in the comparative example 300.
- helium ions are irradiated from the surface of the semiconductor substrate 10 in order to control the carrier lifetime on the surface side of the semiconductor substrate 10.
- the average range of helium ions is Rp
- the half-value width of the range distribution of helium ions is ⁇ Rp.
- the peak position of the range of helium ions irradiated from the surface of the semiconductor substrate 10 is the most peak of the semiconductor substrate 10 among the peaks of the donor concentration distribution of the FS region 40. It may be arranged in the range of 40 ⁇ m from the peak on the surface side. The distance from the peak may be measured from the position at which the donor concentration is half the maximum value of the peak on the substrate surface side of the peak maximum point.
- the half value position Rp ⁇ Rp of the range distribution of the helium ions may be set within a range of 40 ⁇ m from the relevant peak of the donor concentration distribution of the FS region 40. Thereby, the leakage current can be reduced more efficiently.
- the distribution position of helium ions is not limited to these ranges. Even if the peak position Rp of the range of helium ions is separated by 40 ⁇ m or more from the peak of the donor concentration distribution of the FS region 40, the leakage current can be reduced to some extent although hydrogen diffused from the peak is reduced.
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Abstract
Description
特許文献1 特開2012-199577号公報
特許文献2 国際公開第2013/100155号パンフレット
特許文献3 米国特許第6482681号明細書
特許文献4 米国特許第6707111号明細書
特許文献5 特開2001-160559号公報
特許文献6 特開2001-156299号公報
特許文献7 特開平7-193218号公報
特許文献8 米国特許出願公開第2008-1257号明細書
特許文献9 米国特許出願公開第2008-54369号明細書
半導体装置は、n型の半導体基板を備えてよい。半導体装置は、p型のアノード領域を備えてよい。アノード領域は、半導体基板の表面側に形成されてよい。半導体装置は、n型のフィールドストップ領域を備えてよい。フィールドストップ領域は、半導体基板の裏面側においてプロトンをドナーとして形成されてよい。半導体装置は、n型のカソード領域を備えてよい。カソード領域は、フィールドストップ領域よりも半導体基板の裏面側に形成されてよい。フィールドストップ領域における深さ方向のドナーの濃度分布は、第1のピークと、第1のピークよりも半導体基板の裏面側において第1のピークよりも濃度の低い第2のピークとを有してよい。アノード領域およびカソード領域の間における少なくとも一部の領域におけるキャリアライフタイムが、アノード領域およびカソード領域におけるキャリアライフタイムのいずれよりも長くてよい。
第1のピーク:1~4MeV(1.5MeV)、3E12~3E13cm-2(1E13cm-2)
第2のピーク:0.8~3MeV(1Mev)、1E12~1E13cm-2(7E12cm-2)
第3のピーク:0.6~2MeV(0.8MeV)、3E12~3E13cm-2(1E13cm-2)
第4のピーク:0.2~1MeV(0.4MeV)、3E13~1E15cm-2(3E14cm-2)
また、本例におけるFS領域40の各ピーク濃度および裏面からの深さの好ましい範囲は以下である。括弧内は1つの実施例となる値である。また、第2のピーク、第3のピーク、第4のピークは、それより奥のピークにおけるプロトンの通過領域に形成されるので、通過領域のドナー化の影響を受けて、ドナー濃度がかさ上げされる。そのため、例えば第1のピークのプロトンの注入量と、第3のピークのプロトンの注入量を同じとしても、第3のピークは、第1のピークよりもドナー濃度が増加する。第1および第2のピークのプロトンの通過領域のドナー濃度が追加されるからである。
第1のピーク:2E14~2E15cm-3(9E14cm-3)、15~150μm(30μm)
第2のピーク:1E14~1E15cm-3(5E14cm-3)、10~100μm(15μm)
第3のピーク:3E14~3E15cm-3(2E15cm-3)、5~50μm(10μm)
第4のピーク:3E14~3E16cm-3(5E15cm-3)、1.5~15μm(3μm)
・半導体基板10の表面(アノード側表面)から3/7までの領域は、順方向電圧Vfの変動はIrpへの影響が大きい。一方、順方向電圧Vfが高くなってもdV/dtは下がる傾向にある。このため、当該領域においては、Irpを小さくするためにキャリアライフタイムが短いことが好ましい。
・半導体基板10の表面から見て3/7から5/7までの領域は、順方向電圧Vfの変動はdV/dtへの影響が大きい。このため、緩やかなdV/dtを実現するために当該領域のキャリアライフタイムは長い方が好ましい。
・半導体基板10の表面から見て5/7から半導体基板10の裏面(カソード側表面)までの領域は、順方向電圧Vfの変動はテール電流への影響が大きい。このため、テール電流を小さくするためにはキャリアライフタイムは短い方がよい。一方、キャリアライフタイムを短くしすぎるとカソード側のキャリアが減少しすぎて、逆回復時に電圧、電流の発振現象を引き起こす場合がある。このため、当該領域のキャリアライフタイムは、3/7から5/7までの領域よりも短く、半導体基板10の表面から3/7までの領域よりも長くてよい。
Claims (13)
- n型の半導体基板と、
前記半導体基板の表面側に形成されたp型のアノード領域と、
前記半導体基板の裏面側においてプロトンをドナーとして形成されたn型のフィールドストップ領域と、
前記フィールドストップ領域よりも前記半導体基板の裏面側に形成されたn型のカソード領域と
を備え、
前記フィールドストップ領域における深さ方向の前記ドナーの濃度分布は、第1のピークと、前記第1のピークよりも前記半導体基板の裏面側において前記第1のピークよりも濃度の低い第2のピークとを有し、
前記アノード領域および前記カソード領域の間における少なくとも一部の領域におけるキャリアライフタイムが、前記アノード領域および前記カソード領域におけるキャリアライフタイムのいずれよりも長い半導体装置。 - 前記ドナーの濃度分布が前記第1のピークを示す深さ位置における前記キャリアライフタイムが、前記アノード領域および前記カソード領域におけるキャリアライフタイムのいずれよりも長い
請求項1に記載の半導体装置。 - 前記フィールドストップ領域における深さ方向の前記ドナーの濃度分布は複数のピークを有し、
前記第1のピークは、前記複数のピークのうち最も前記半導体基板の表面側のピークである
請求項2に記載の半導体装置。 - 前記アノード領域よりもキャリアライフタイムが長い領域が、前記ドナーの濃度分布が前記第1のピークを示す位置よりも前記半導体基板の表面側に延伸している
請求項3に記載の半導体装置。 - 前記半導体装置の逆回復時のアノードおよびカソードの電極間電圧が、逆回復時の印加電圧の半分の値になった場合に、前記アノード領域と前記半導体基板のn型領域との境界から広がる空乏層の前記半導体基板の裏面側の端部に応じた位置に、前記第1のピークを有する
請求項3または4に記載の半導体装置。 - 前記半導体基板の裏面側に、前記キャリアライフタイムを短くする局所ライフタイムキラーを有する
請求項3または4に記載の半導体装置。 - 前記局所ライフタイムキラーが存在する領域は、前記半導体装置の定格逆電圧が印加された場合に、前記アノード領域と前記半導体基板のn型領域との境界から広がる空乏層と接しない位置に形成される
請求項6に記載の半導体装置。 - 前記局所ライフタイムキラーの注入量が、前記ドナーの濃度分布において最も前記半導体基板の裏面側におけるピークの前記プロトンの注入量の1/300以上である
請求項6に記載の半導体装置。 - n型の半導体基板と、前記半導体基板の表面側に形成されたp型のアノード領域と、前記半導体基板の裏面側においてプロトンをドナーとして形成されたn型のフィールドストップ領域と、前記フィールドストップ領域よりも前記半導体基板の裏面側に形成されたn型のカソード領域とを備える半導体装置を製造する製造方法であって、
前記フィールドストップ領域における深さ方向の前記ドナーの濃度分布が、第1のピークと、前記第1のピークよりも前記半導体基板の裏面側において前記第1のピークよりも濃度の低い第2のピークとを有するように、前記半導体基板の裏面側からプロトンを注入するプロトン注入段階と、
前記半導体基板をアニールして前記プロトンを拡散させることで、前記アノード領域および前記カソード領域の間における少なくとも一部の領域におけるキャリアライフタイムを、前記アノード領域および前記カソード領域におけるキャリアライフタイムのいずれよりも長くするライフタイムアニール段階と
を備える製造方法。 - 前記半導体基板全体のキャリアライフタイムを短くするライフタイムキラーを前記半導体基板に照射するライフタイムキラー照射段階を更に備え、
前記ライフタイムアニール段階で前記プロトンを拡散させることで、前記プロトンが拡散した領域の前記キャリアライフタイムを回復させる
請求項9に記載の製造方法。 - 前記プロトン注入段階と前記ライフタイムキラー照射段階との間に、前記半導体基板をアニールするプロトンアニール段階を更に備える
請求項10に記載の製造方法。 - 前記半導体装置の耐圧クラスに応じて、前記第1のピークの位置を調整する
請求項9から11のいずれか一項に記載の製造方法。 - 前記ライフタイムキラー照射段階において、前記半導体基板に電子線を照射する
請求項10に記載の製造方法。
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US20230275129A1 (en) | 2023-08-31 |
JP2018125537A (ja) | 2018-08-09 |
JP6508372B2 (ja) | 2019-05-08 |
US10923570B2 (en) | 2021-02-16 |
US20210159317A1 (en) | 2021-05-27 |
JP6319453B2 (ja) | 2018-05-09 |
US10312331B2 (en) | 2019-06-04 |
JPWO2016051973A1 (ja) | 2017-07-20 |
US20160276446A1 (en) | 2016-09-22 |
US11646350B2 (en) | 2023-05-09 |
CN105814694B (zh) | 2019-03-08 |
DE112015000206T5 (de) | 2016-08-25 |
US20190288078A1 (en) | 2019-09-19 |
CN105814694A (zh) | 2016-07-27 |
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