WO2016006663A1 - 半導体基板および半導体基板の製造方法 - Google Patents
半導体基板および半導体基板の製造方法 Download PDFInfo
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- WO2016006663A1 WO2016006663A1 PCT/JP2015/069792 JP2015069792W WO2016006663A1 WO 2016006663 A1 WO2016006663 A1 WO 2016006663A1 JP 2015069792 W JP2015069792 W JP 2015069792W WO 2016006663 A1 WO2016006663 A1 WO 2016006663A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 164
- 239000000758 substrate Substances 0.000 title claims abstract description 140
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 239000012535 impurity Substances 0.000 claims abstract description 137
- 238000010438 heat treatment Methods 0.000 claims abstract description 65
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 125
- 239000013078 crystal Substances 0.000 claims description 103
- 238000000034 method Methods 0.000 claims description 71
- 229910052786 argon Inorganic materials 0.000 claims description 51
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 38
- 230000008569 process Effects 0.000 claims description 31
- 239000000969 carrier Substances 0.000 claims description 25
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 24
- 229910052698 phosphorus Inorganic materials 0.000 claims description 24
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- 230000001678 irradiating effect Effects 0.000 claims description 4
- 229910052754 neon Inorganic materials 0.000 claims description 4
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 claims description 4
- 229910052724 xenon Inorganic materials 0.000 claims description 4
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 40
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 33
- 125000004429 atom Chemical group 0.000 description 14
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- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/38—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
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- H01—ELECTRIC ELEMENTS
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
Definitions
- Japanese Patent Publication No. 2004-503942 discloses a method for manufacturing a substrate having an active layer of single crystal silicon carbide on polycrystalline silicon carbide.
- an amorphous material layer (amorphous silicon) is deposited on a polycrystalline silicon carbide support.
- the polycrystalline silicon carbide support and the single crystal silicon carbide substrate are overlaid and integrated by direct bonding.
- nonpatent literature 1 JOURNAL OF APPLIED PHYSICS 113, 203512 (2013) Fast atom beam-activated n-Si / n-GaAs wafer bonding with high interfacial transparency and electrical conductivity (S. Essig, O. Moutanabbir, Nahme Omeme , W. Bett, and F. Dimroth)
- a method for manufacturing a semiconductor substrate is disclosed.
- This method for manufacturing a semiconductor substrate is a method for manufacturing a semiconductor substrate comprising a first semiconductor layer and a second semiconductor layer in contact with the first semiconductor layer.
- the surface of the first semiconductor layer is irradiated with one or more types of first impurities in vacuum
- the surface of the second semiconductor layer is irradiated with one or more types of first impurities in vacuum.
- An irradiation step of irradiating with impurities is provided.
- the semiconductor device includes a bonding step of bonding the surface of the first semiconductor layer and the surface of the second semiconductor layer in a vacuum in which the irradiation step is performed to generate a semiconductor substrate having a bonding interface.
- a heat treatment step of heat treating the semiconductor substrate generated in the bonding step is provided.
- the first impurity is an inert impurity that does not generate carriers in the first semiconductor layer and the second semiconductor layer.
- the width of the concentration profile in the depth direction of the first impurity contained in the first semiconductor layer and the second semiconductor layer is smaller after the heat treatment than before the heat treatment. To be done.
- the first impurity is implanted near the surface of the first semiconductor layer and near the surface of the second semiconductor layer by the irradiation process. Then, the implanted first impurity exists in the vicinity of the junction interface between the first semiconductor layer and the second semiconductor layer, so that non-ohmic conductive characteristics may occur in the current path crossing the junction interface. is there.
- the width of the concentration profile of the first impurity contained in the first semiconductor layer and the second semiconductor layer in the depth direction can be reduced. As a result, the distance of the path where the first impurity exists on the current path crossing the junction interface can be shortened, so that it is possible to suppress the development of non-ohmic conductive characteristics.
- the second impurity that generates carriers in the first semiconductor layer and the second semiconductor layer is present in a region where the first impurity exists in the first semiconductor layer and the second semiconductor layer. It may be. In the above method, carriers can be generated in a region where the first impurity exists. This makes it possible to suppress the development of non-ohmic conductive characteristics in the current path that crosses the junction interface.
- the semiconductor device may further include a first impurity introduction step for introducing the second impurity from the surface of the first semiconductor layer and the surface of the second semiconductor layer.
- the first impurity introduction step may be performed before the bonding step.
- the condition for introducing the second impurity into the first semiconductor layer can be made different from the condition for introducing the second impurity into the second semiconductor layer. That is, the doping amount of the second impurity can be appropriately controlled in each of the first semiconductor layer and the second semiconductor layer.
- a thermal diffusion method may be used for the first impurity introduction step.
- the concentration of the second impurity can be maximized on the surfaces of the first and second semiconductor layers in principle.
- the second impurity can be present at a high concentration in a region near the bonding interface.
- the surface of the first semiconductor layer and the surface of the second semiconductor layer may be further irradiated with the second impurity. Thereby, the surface of the first semiconductor layer and the surface of the second semiconductor layer can be activated also by the step of implanting the second impurity.
- the semiconductor substrate generated by the bonding step may further include a second impurity introduction step of injecting a second impurity from a surface opposite to the bonding interface of the first semiconductor layer.
- a second impurity introduction step of injecting a second impurity from a surface opposite to the bonding interface of the first semiconductor layer.
- the second impurity introduction step at least a part of the second impurity may be injected into the second semiconductor layer beyond the junction interface.
- the second impurity can be implanted so that at least part of the second impurity passes through the bonding interface. Thereby, carriers can be generated in the vicinity of the bonding interface.
- the first semiconductor layer and the second semiconductor layer are semiconductor layers in which a second impurity that generates carriers in the first semiconductor layer and the second semiconductor layer is uniformly diffused. Also good. Thereby, carriers can be generated in the region where the first impurity exists.
- the combination of the first semiconductor layer and the second semiconductor layer is a combination of any two of 3C—SiC single crystal, 4H—SiC single crystal, 6H—SiC single crystal, and SiC polycrystal. There may be.
- the maximum temperature of the heat treatment performed in the heat treatment step may be 1500 ° C. or higher.
- the first impurity may include any of argon (Ar), neon (Ne), and xenon (Xe).
- the second impurity may contain nitrogen (N) or phosphorus (P).
- FIG. 2 is a perspective view of the bonding substrate 10 according to the present embodiment.
- the bonding substrate 10 is formed in a substantially disk shape.
- the bonding substrate 10 includes a support substrate 11 disposed on the lower side and a single crystal layer 13 bonded to the upper surface of the support substrate 11.
- the single crystal layer 13 may be formed of a single crystal of a compound semiconductor (eg, 6H—SiC, 4H—SiC, GaN, AlN), for example.
- it may be formed of a single crystal of a single element semiconductor (eg, Si, C).
- the support substrate 11 preferably has resistance to various thermal processes applied to the single crystal layer 13.
- the support substrate 11 is preferably made of a material having a small difference in coefficient of thermal expansion from the single crystal layer 13.
- SiC silicon carbide
- Polycrystalline SiC may contain SiC crystals of various polytypes and plane orientations. Since the polycrystalline SiC in which various polytypes and plane orientations are mixed can be manufactured without performing strict temperature control, the cost for manufacturing the support substrate 11 can be reduced.
- the thickness TT1 of the support substrate 11 may be determined so as to obtain a mechanical strength that can withstand post-processing. For example, when the diameter of the support substrate 11 is 100 (mm), the thickness TT1 may be about 100 ( ⁇ m).
- ⁇ Method for manufacturing bonded substrate> A method for manufacturing the bonded substrate 10 according to the present embodiment will be described with reference to FIGS.
- the support substrate 11 is polycrystalline SiC and the single crystal layer 13 is single crystal 4H—SiC will be described.
- the support substrate 11 and the single crystal layer 13 are prepared.
- the surfaces of the support substrate 11 and the single crystal layer 13 are planarized.
- the planarization may be performed by grinding or cutting, or may be performed by a CMP method.
- an impurity introduction step is performed.
- impurity introduction step impurity ions are accelerated and implanted into the surface of the support substrate 11 and the surface of the single crystal layer 13.
- Impurities are elements that generate carriers in the support substrate 11 and the single crystal layer 13. Examples of the impurities include phosphorus (P), arsenic (As), boron (B), nitrogen (N), and the like. Note that it is preferable to use an impurity that serves as an n-type carrier (eg, nitrogen (N), phosphorus (P), or arsenic (As)).
- various parameters such as acceleration energy and incident angle are set so that the impurity concentration is maximized on the surfaces of the support substrate 11 and the single crystal layer 13.
- the impurity concentration at the bonding interface is 1 ⁇ 10 19 / cm 3 or more (preferably 1 ⁇ 10 20 cm 3 or more).
- the impurity concentration may be controlled to the maximum on the surface by performing very shallow implantation using relatively low acceleration energy (several tens of keV or less).
- the impurity concentration may be controlled to be maximized on the surface by using multi-stage implantation in which acceleration energy is changed and the implantation is performed a plurality of times.
- the conditions for implanting the surface of the support substrate 11 and the conditions for implanting the surface of the single crystal layer 13 may be different.
- the implantation angle with respect to the crystal axis greatly affects the impurity concentration profile. Therefore, it may be inappropriate to use the same implantation conditions for the support substrate 11 which is a polycrystal having various crystal axes and the single crystal layer 13 having a single crystal axis.
- step S2 an irradiation process is performed.
- the irradiation step is a step of modifying the surface of the support substrate 11 to form the amorphous layer 11b and modifying the surface of the single crystal layer 13 to form the amorphous layer 13b.
- An amorphous layer refers to a layer in which atoms have no regularity such as a crystal structure.
- the single crystal layer 13 and the support substrate 11 are set in the chamber 101.
- the relative positions of the single crystal layer 13 and the support substrate 11 are aligned.
- the alignment is performed so that the two substrates can come into contact with each other in a correct positional relationship in a bonding process described later.
- the chamber 101 is evacuated.
- the degree of vacuum in the chamber 101 may be, for example, about 1 ⁇ 10 ⁇ 4 to 1 ⁇ 10 ⁇ 6 (Pa).
- the surface 11 a of the support substrate 11 and the surface 13 a of the single crystal layer 13 are irradiated with a neutral atom beam of argon using a FAB gun (Fast Atom Beam) 102.
- the neutral atom beam of argon is uniformly applied to the entire surface 11a and the entire surface 13a.
- the entire surface 11a and the surface 13a may be irradiated while scanning with a neutral atom beam of argon so as to have an overlapping portion.
- This state is called an active state.
- the irradiation process is a treatment in a vacuum
- the surfaces 11a and 13a can be kept active without being oxidized.
- the crystal structures of the surfaces 11a and 13a can be destroyed at a certain depth from the surface.
- amorphous layers 11b and 13b containing Si and C can be formed on the substrate surface.
- argon atoms are implanted into the amorphous layers 11b and 13b. Note that inactive argon in the semiconductor does not contribute to the carrier, so that the required minimum implantation amount may be used.
- step S3 a joining process is performed.
- the surface 11 a of the support substrate 11 and the surface 13 a of the single crystal layer 13 are brought into contact with each other in the chamber 101 in a vacuum. Thereby, the bonds existing on the surface in the active state are connected to each other, and the support substrate 11 and the single crystal layer 13 can be joined.
- step S4 a heat treatment process is performed.
- the support substrate 11 and the single crystal layer 13 are heat treated while the amorphous layers 11b and 13b are in contact with each other.
- the heat treatment step is performed using a furnace.
- the heat treatment process may be performed in the chamber 101 under reduced pressure, or may be performed in a furnace other than the chamber 101.
- the amorphous layers 11b and 13b can be recrystallized from a state in which the atomic arrangement is not regular to a state in which the atomic arrangement is regular by the heat treatment step.
- the amorphous layers 11b and 13b disappear, and the bonded substrate 10 in which the single crystal layer 13 and the support substrate 11 are directly bonded is formed.
- the recrystallization is considered to proceed from the vicinity of the crystal and reach the bonding interface.
- carriers nitrogen, phosphorus, etc.
- inert argon atoms are not taken into the SiC crystal. Therefore, it is considered that argon atoms are eliminated from the crystalline region as recrystallization progresses.
- the amorphous layers 11b and 13b disappear, and the bonded substrate 10 in which the support substrate 11 and the single crystal layer 13 are directly bonded is formed.
- atoms (nitrogen, phosphorus, etc.) serving as carriers are dispersed in the crystal, and argon is expected to segregate at the interface.
- the bonding of the support substrate 11 and the single crystal layer 13 becomes strong by the heat treatment process. Further, by the heat treatment step, atoms (eg, nitrogen and phosphorus) that become n-type carriers become high-concentration n-type carriers.
- atoms eg, nitrogen and phosphorus
- FIGS. 4 and 6 Changes in the argon concentration profile before and after the heat treatment step will be described in detail with reference to FIGS.
- the argon atoms are shown in a pseudo manner by white circles and the phosphorus atoms are shown by black circles.
- the crystal grain boundaries of the SiC polycrystal are described in a net-like pattern.
- 5 and 7 show only argon atoms (open circles) for easy viewing of the drawings.
- FIG. 4A is a partially enlarged view of the vicinity of the bonding interface of the bonding substrate 10 before the heat treatment step (step S4).
- FIG. 4B is a phosphorus concentration profile.
- FIG. 4C shows a concentration profile of argon.
- FIG. 5 is a cross-sectional view taken along a line VV in FIG. That is, FIG. 5 is a diagram in which the surface of the amorphous layer 11 b is observed from a direction perpendicular to the bonding substrate 10.
- FIG. 6A is a partially enlarged view of the same portion as FIG. 4A after the heat treatment step.
- FIG. 6B is a phosphorus concentration profile.
- FIG. 6C is an argon concentration profile.
- FIG. 7 is a cross-sectional view of the same portion as FIG. 5 after the heat treatment step.
- argon atoms are dispersed throughout the depth direction. Further, as shown in FIG. 5, before the heat treatment step, the in-plane concentration profile of argon atoms when the surface of the amorphous layer 11b is observed is uniform. In other words, the in-plane density of argon atoms is constant before the heat treatment step. This is because in step S2, the surface of the support substrate 11 and the surface 1 of the single crystal layer 13 are uniformly irradiated with a neutral atom beam of argon.
- step S4 the entire bonded substrate 10 is heated by the heat treatment using the furnace.
- the recrystallization of the amorphous layer 11b is performed by connecting the interface F2 between the amorphous layer 11b and the support substrate 11 (see FIG. 4A) to the inner side of the amorphous layer 11b (that is, FIG. 4A). Upward (see arrow Y2), the atomic arrangement follows the crystal structure of the support substrate 11 (polycrystalline SiC). Therefore, when the recrystallization is completed, as shown in FIG. 6A, the amorphous layers 11b and 13b disappear, and the bonded substrate 10 in which the single crystal layer 13 and the supporting substrate 11 are directly bonded is formed. Is done. Since the amorphous layers 11b and 13b are integrally recrystallized, the single crystal layer 13 and the support substrate 11 can be firmly bonded by covalent bonding.
- Argon is an atom that is not taken into the SiC crystal lattice. Therefore, the argon atoms move to a region where the recrystallization is not performed as the recrystallization of the amorphous layer 13b proceeds. That is, it moves in the direction of arrow Y1 in FIG. When the argon atoms reach the region near the bonding interface 12, the argon atoms are fixed in the region near the bonding interface 12. Similarly, since the argon atoms in the amorphous layer 11b are not taken into the crystal, as the recrystallization of the amorphous layer 11b proceeds, the argon atoms move to a region where recrystallization has not been performed.
- the argon concentration profile after the heat treatment step is a concentration profile P11 (see FIG. 6C).
- the width W2 of the concentration profile P11 after the heat treatment step is smaller than the width W1 of the concentration profile P1 before the heat treatment step (see FIG. 4C). That is, the width of the concentration profile in the depth direction of the argon contained in the support substrate 11 and the single crystal layer 13 is reduced by executing the heat treatment step (step S4) described in this specification. Can do.
- FIG. 7 shows an in-plane concentration profile of argon atoms when the surface of the support substrate 11 is observed after the heat treatment step. It can be seen that island-shaped and linear aggregated portions are formed by the argon atoms moving in the in-plane direction and partially aggregating. That is, by performing the heat treatment step (step S4) described in this specification, the concentration variation in the in-plane direction of argon in the support substrate 11 and the single crystal layer 13 is changed before the heat treatment step (see FIG. 5). It can be made larger than
- argon concentration profile in the vicinity of the bonding interface between the support substrate 11 and the single crystal layer 13 of the bonding substrate 10 produced by the bonding method described in this specification was analyzed.
- the support substrate 11 is polycrystalline SiC
- the single crystal layer 13 is single crystal 4H—SiC.
- the impurity introduction step (step S1) phosphorus atoms were irradiated for 60 (sec) with an incident energy of 10 (keV).
- irradiation step (step S2) argon atoms were irradiated for 60 (sec) with an incident energy of 1.8 (keV).
- the argon concentration analysis by energy dispersive X-ray spectroscopy (EDX) was performed on this bonded substrate.
- the elemental analyzer is VOYAGERIII M3100 made by NORAN.
- the beam diameter is about 1 nanometer, and the spatial resolution of this analysis is 2 nanometers considering the spread of the beam in the sample.
- the widths W1 and W2 were determined by measuring the width of the region where 90% of the implanted argon exists.
- the width W1 of the concentration profile P1 before the heat treatment process was about 4 nanometers. Further, the width W2 of the concentration profile P11 after the heat treatment step was about 2 nanometers which is the spatial resolution of this analysis. That is, it can be seen that the expression of non-ohmic conductive characteristics can be suppressed by narrowing the width of the argon concentration profile to about 2 nanometers or less.
- the concentration variation in the in-plane direction of argon was measured.
- a sufficient number of argon concentrations at the bonding interface 12 were measured at different locations. The measuring range is about 200 nanometers.
- the concentration ratio (maximum value / minimum value) between the maximum value and the minimum value was determined as the variation in the measured argon concentration.
- the concentration difference was measured before and after the heat treatment step. Before the heat treatment step, the concentration variation was 1.3 to 1.5. In contrast, the concentration variation increased to 9.1 after the heat treatment step.
- ⁇ Effect> Argon is implanted near the surface of the support substrate 11 and near the surface of the single crystal layer 13 by the irradiation process (step S2). Then, argon having a concentration profile P1 (see FIG. 4C) exists in the vicinity of the bonding interface 12 in the bonded substrate 10 generated by the bonding process (step S3). If argon is present in the vicinity of the bonding interface 12, non-ohmic conductive characteristics may occur in the current path that crosses the bonding interface 12. Therefore, by executing the heat treatment step (step S4) described in this specification, the width of the argon concentration profile is changed from the width W1 (see FIG. 4C) to the width W2 (see FIG. 6C). ).
- route crossing the joining interface 12 can be shortened. Further, by narrowing the existence region of the level caused by defects generated by the concentration of argon in the vicinity of the interface, an effect of easily generating a tunnel phenomenon induced by the high concentration n-type layer can be obtained. As a result, it becomes possible to suppress the expression of non-ohmic conductive characteristics.
- the existence range of the argon concentration profile P11 (see FIG. 6C) is changed to the phosphorus concentration profile P12. It can be controlled to be included in the existence range (see FIG. 6B).
- an impurity that generates a carrier such as phosphorus is present around argon, it is possible to suppress the development of non-ohmic conductive characteristics on the current path across the junction interface 12. I know it. The model of this phenomenon has not been clearly elucidated. However, the following models can be considered.
- the present invention can provide the following effects.
- step S4 the heat treatment step described in this specification, the argon atoms are moved in the in-plane direction and partially aggregated to form island-shaped or linear aggregated portions. (See FIG. 7).
- region namely, aggregation part
- region example: area
- region example: area
- the concentration of argon is low, non-ohmic conductive characteristics can be suppressed.
- the cause of the occurrence of non-ohmic electrical characteristics at the junction interface 12 is due to the difference in the band gap voltage width between the semiconductor layers. As shown in FIG. 8, it is considered that an electron barrier exists in terms of quantum mechanics.
- the support substrate 11 is an n-type 3C plane-oriented SiC polycrystal, and the forbidden charged potential width is 2.2V.
- the single crystal layer 13 is a SiC single crystal of 4H plane orientation, and the forbidden charging potential width is 3.2V.
- n-type high-concentration carrier can be generated by a very simple process flow in which phosphorus or nitrogen is irradiated before or after argon irradiation in a vacuum chamber irradiated with argon.
- the impurity that generates carriers in the support substrate 11 and the single crystal layer 13 is not limited to the form introduced by the impurity introduction step.
- the impurity introducing step may be omitted.
- the n-type support substrate 11 and the single crystal layer 13 doped with nitrogen, phosphorus, or the like at a high concentration may be used.
- the concentration of the impurity doped in advance in the substrate may be equal to or higher than the impurity concentration at the junction interface introduced in the impurity introduction step.
- the n-type support substrate 11 and the single crystal layer 13 doped with nitrogen or phosphorus at 1 ⁇ 10 19 / cm 3 or more may be used.
- the concentration of the n-type carrier is, for example, 10 20 / cm 3 or more, a tunnel effect can be sufficiently obtained even if there is an electron barrier at the junction interface 12.
- argon which is an inert impurity, forms a level of crystal defects in the support substrate 11 and the single crystal layer 13 that are n-type semiconductors. Since the defect level functions as a carrier lifetime killer, the carrier mobility is lowered. Therefore, the influence of the level of crystal defects can be mitigated by making impurities (eg, nitrogen, phosphorus) that become n-type carriers exist in the existence range of argon. In addition, the influence of the interface state due to the interface mismatch can be mitigated by the presence of an impurity that becomes an n-type carrier.
- impurities eg, nitrogen, phosphorus
- the method for activating the surface is not limited to the method for irradiating the neutral atom beam of argon. It may be an impurity that is difficult to be taken into the semiconductor lattice and has a high effect of activating the surface of the semiconductor layer by irradiation with a FAB gun. Further, it may be an impurity that does not easily become a carrier and has a high effect of activating the surface of the semiconductor layer by irradiation with a FAB gun. For example, an atomic beam of a rare gas such as neon (Ne) or xenon (Xe) may be irradiated.
- a rare gas such as neon (Ne) or xenon (Xe)
- a method of injecting atoms, molecules, ions, or the like such as He, hydrogen, Ar, Si, or C may be used.
- ions of impurity atoms that generate carriers may be irradiated.
- ions such as nitrogen and phosphorus may be further irradiated.
- the process of activating the surfaces of the support substrate 11 and the single crystal layer 13 can also function as a process of implanting nitrogen, phosphorus, or the like into the support substrate 11 and the single crystal layer 13. Therefore, since the impurity introduction step (step S1) can be omitted, the number of steps can be reduced.
- the apparatus used for activating the surface is not limited to the FAB gun, and various apparatuses such as an ion gun can be used.
- the method used in the impurity introduction step (step S1) is not limited to ion implantation.
- a thermal diffusion method can be used.
- the thermal diffusion method has a principle that impurities such as phosphorus are present at a high concentration on the surface of the support substrate 11 or the single crystal layer 13 and then heated. Therefore, the concentration of impurities such as phosphorus can be maximized on the surfaces of the support substrate 11 and the single crystal layer 13.
- the width of the impurity concentration profile can be made narrower than in the case of using the ion implantation method. As a result, it is possible to form an impurity concentration profile having a width corresponding to the width of the energy barrier (about several nanometers) that can pass through the tunnel effect.
- the semiconductor material into which the impurity is introduced is SiC
- a thermal diffusion method may be used in the impurity introduction step. Since SiC has a very small thermal diffusion coefficient of impurities, it is preferable to perform thermal diffusion at a high temperature of about 1700 to 2000 ° C. Thereby, the diffusion of about several nanometers capable of exhibiting the tunnel effect can be performed.
- an etching step (step S0) may be performed before the impurity introduction step (step S1).
- the content of the etching process may be the same as the content of the irradiation process (step S2) described above. That is, in the etching process, the support substrate 11 and the single crystal layer 13 are set in the vacuum chamber 101. Then, the surfaces of the support substrate 11 and the single crystal layer 13 are irradiated with a neutral atom beam of argon. As a result, the surfaces of the support substrate 11 and the single crystal layer 13 can be strongly etched, so that an oxide film or the like can be reliably removed.
- the impurity introduction step (step S1) and the irradiation step (step S2) may be performed in the chamber 101.
- the conditions for the etching process there may be mentioned a condition in which argon atoms are irradiated for 10 (sec) with an incident energy of 1.8 (keV).
- the material used for the support substrate 11 is not limited to polycrystalline SiC. Any material may be used as long as it is resistant to various thermal processes applied to the single crystal layer 13.
- the single crystal layer 13 is an example of a first semiconductor layer.
- the support substrate 11 is an example of a second semiconductor layer.
- Argon is an example of the first impurity. Nitrogen and phosphorus are examples of the second impurity.
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Abstract
Description
第2不純物導入工程では、第2の不純物の少なくとも一部が、接合界面を超えて第2の半導体層に注入されてもよい。上記方法では、第2の不純物の少なくとも一部が接合界面を通過するように、第2の不純物を打ち込むことができる。これにより、接合界面の近傍にキャリアを発生させることができる。
図2に、本実施例に係る接合基板10の斜視図を示す。接合基板10は略円盤状に形成されている。接合基板10は、下側に配置された支持基板11と、支持基板11の上面に貼り合わされた単結晶層13とを備えている。単結晶層13は、例えば、化合物半導体(例:6H-SiC、4H-SiC、GaN、AlN)の単結晶によって形成されていてもよい。また例えば、単元素半導体(例:Si、C)の単結晶によって形成されていてもよい。
本実施例に係る接合基板10の製造方法を、図1および図3を用いて説明する。本実施例では、例として、支持基板11が多結晶SiCであり、単結晶層13が単結晶4H-SiCである場合を説明する。
熱処理工程の前後におけるアルゴンの濃度プロファイルの変化を、図4~図7を用いて詳細に説明する。なお、図4および図6では、アルゴン原子を白抜きの丸印、リン原子を黒色の丸印で擬似的に示している。また図4および図6では、SiC多結晶の結晶粒界を、模擬的に網の目状に記載している。また、図5および図7では、図面の見易さのために、アルゴン原子(白抜きの丸印)のみを示している。図4(A)は、熱処理工程(ステップS4)前における、接合基板10の接合界面近傍の部分拡大図である。図4(B)は、リンの濃度プロファイルである。図4(C)は、アルゴンの濃度プロファイルである。図4(B)および図4(C)において、縦軸は接合界面12からの距離を示しており、横軸は不純物濃度を示している。すなわち、図4(B)は図4(A)の黒色の丸印の分布を示しており、図4(C)は図4(A)の白抜きの丸印の分布を示している。図5は、図4のV-V部分の断面図である。すなわち図5は、非晶質層11bの表面を接合基板10に垂直な方向から観察した図である。図6(A)は、熱処理工程後における、図4(A)と同一部分の部分拡大図である。図6(B)は、リンの濃度プロファイルである。図6(C)は、アルゴンの濃度プロファイルである。図7は、熱処理工程後における、図5と同一部分の断面図である。
本明細書に記載されている接合方法で作成された接合基板10の、支持基板11と単結晶層13との接合界面近傍における、アルゴン濃度プロファイルを分析した。分析に用いられた接合基板10は、支持基板11が多結晶SiCであり、単結晶層13が単結晶の4H-SiCである。不純物導入工程(ステップS1)では、10(keV)の入射エネルギーで、60(sec)の問、リン原子を照射した。照射工程(ステップS2)では、1.8(keV)の入射エネルギーで、60(sec)の間、アルゴン原子を照射した。熱処理工程(ステップS4)において、最高温度は1700℃であった。また、熱処理工程の前後で接合界面12を横切る電流経路の電気特性を測定したところ、熱処理工程後では、非オーミックな導電特性の発現が抑制できていることが分かった。
照射工程(ステップS2)によって、支持基板11の表面近傍および単結晶層13の表面近傍に、アルゴンが打ち込まれてしまう。すると、接合工程(ステップS3)によって生成された接合基板10において、接合界面12の近傍に、濃度プロファイルP1(図4(C)参照)を有するアルゴンが存在することになる。アルゴンが接合界面12の近傍に存在すると、接合界面12を横切る電流経路において、非オーミックな導電特性が発生してしまう場合がある。そこで、本明細書に記載されている熱処理工程(ステップS4)を実行することによって、アルゴンの濃度プロファイルの幅を、幅W1(図4(C)参照)から幅W2(図6(C)参照)へ狭くすることができる。これにより、接合界面12を横切る電流経路上において、アルゴンが存在する経路の距離を短縮することができる。また、アルゴンが界面近傍に集中することにより発生する欠陥起因の準位の存在領域を狭くすることにより、高濃度n型層により誘発されるトンネル現象を発生させ易くする効果も得られる。その結果、非オーミックな導電特性の発現を抑制することが可能となる。
不純物導入工程は、接合工程(ステップS3)の後に行ってもよい。この場合、不純物のイオンを、単結晶層13の接合界面12と反対側の面側(すなわち、図4(A)の矢印Y3側)から打ち込めばよい。不純物導入工程では、打ち込んだ不純物の少なくとも一部が、接合界面12を超えて支持基板11に注入されるように、加速エネルギーや入射角度などの各種のパラメータを設定すればよい。また、接合界面12近傍で不純物濃度が最大となるように、打ち込みに関する各種のパラメータを設定すればよい。例えば、加速エネルギーを変化させて複数回打ち込みを行う多段打ち込みを用いることで、不純物濃度が接合界面12近傍で最大となるように制御してもよい。
支持基板11および単結晶層13にキャリアを発生させる不純物は、不純物導入工程によって導入する形態に限られない。不純物が予め導入された支持基板11および単結晶層13を用いることで、不純物導入工程を省略してもよい。本実施形態では、窒素やリンなどが高濃度にドープされたn型の支持基板11および単結晶層13を用いればよい。また、基板に予めドープされる不純物の濃度は、不純物導入工程で導入する、接合界面における不純物濃度以上とすればよい。本実施形態では、窒素またはリンが1×1019/cm3以上ドープされた、n型の支持基板11および単結晶層13を用いればよい。
照射工程(ステップS2)において、表面を活性化する方法は、アルゴンの中性原子ビームを照射する方法に限られない。半導体の格子に取り込まれにくい不純物であって、FABガンにおける照射で半導体層の表面を活性化する効力が高い不純物であってもよい。また、キャリアになりにくい不純物であって、FABガンにおける照射で半導体層の表面を活性化する効力が高い不純物であってもよい。例えば、ネオン(Ne)、キセノン(Xe)などの希ガスの原子ビームを照射してもよい。また例えば、He、水素、Ar、Si、Cなどの、原子または分子またはイオンなどを注入する方法であってもよい。また、照射工程(ステップS2)において、キャリアを発生させる不純物原子のイオンを照射してもよい。本明細書の実施例では、照射工程において、窒素やリンなどのイオンをさらに照射してもよい。なお、照射工程では、窒素を照射することが好ましい。これにより、支持基板11および単結晶層13の表面を活性化する処理を、窒素やリンなどを支持基板11および単結晶層13に打ち込む処理としても機能させることができる。したがって、不純物導入工程(ステップS1)を省略することができるため、工程数の削減を図ることが可能となる。また、表面を活性化するために用いる装置は、FABガンに限られず、イオンガン等の各種の装置を用いることが可能である。
不純物導入工程(ステップS1)で使用される方法は、イオン打ち込みに限られない。例えば、熱拡散法を用いることができる。熱拡散法は、支持基板11や単結晶層13の表面にリンなどの不純物を高濃度に存在させた上で加熱するという原理を有する。従って、支持基板11や単結晶層13の表面において、リンなどの不純物濃度を最大にすることができる。また、イオン打ち込み法を用いる場合に比して、不純物の濃度プロファイルの幅を狭くすることができる。これにより、トンネル効果により通り抜けることができるエネルギー障壁の幅(数ナノメートル程度)に対応した幅を有する、不純物の濃度プロファイルを形成することが可能となる。なお、不純物を導入する半導体材料がSiCである場合に、不純物導入工程において熱拡散法を用いてもよい。SiCは、不純物の熱拡散係数が非常に小さいため、1700~2000℃程度の高温で熱拡散を行うことが好ましい。これにより、トンネル効果を発現させうる数ナノメートル程度の拡散を行うことができる。
図1に示すように、不純物導入工程(ステップS1)の前に、エッチング工程(ステップS0)を行ってもよい。エッチング工程の内容は、前述した照射工程(ステップS2)の内容と同様であってもよい。すなわちエッチング工程では、真空状態のチャンバー101内に、支持基板11および単結晶層13がセットされる。そして、支持基板11および単結晶層13の表面に、アルゴンの中性原子ビームを照射する。これにより、支持基板11および単結晶層13の表面を強度にエッチングすることができるため、酸化膜などを確実に除去することが可能となる。その後、不純物導入工程(ステップS1)および照射工程(ステップS2)を、チャンバー101内で行えばよい。エッチング工程の条件の一例としては、1.8(keV)の入射エネルギーで、10(sec)の間、アルゴン原子を照射する条件が挙げられる。
不純物導入工程では、n型キャリアとなる不純物を、単結晶層13の表面にのみ打ち込み、支持基板11の表面には打ち込まないとしてもよい。例えば、支持基板11が、低抵抗化処理が行われている多結晶SiCである場合には、n型キャリアとなる不純物の支持基板11の表面への打ち込みを省略することができる。低抵抗化処理が行われている多結晶SiCの一例としては、不純物が予め導入された多結晶SiCが挙げられる。
本明細書に記載の製造フローを、スマートカット(登録商標)と呼ばれる手法に適用することも可能である。図10を用いて説明する。
単結晶層13は、4H-SiCの単結晶に限られない。3C-SiCや6H-SiCなど、様々なポリタイプの単結晶SiCを単結晶層13として用いることができる。
Claims (20)
- 第1の半導体層と、前記第1の半導体層と接している第2の半導体層と、を備える半導体基板の製造方法であって、
前記第1の半導体層の表面に真空中で1種類以上の第1の不純物を照射するとともに、前記第2の半導体層の表面に真空中で前記1種類以上の第1の不純物を照射する照射工程と、
前記照射工程が行われた真空中において、前記第1の半導体層の表面と前記第2の半導体層の表面とを接合し、接合界面を有する半導体基板を生成する接合工程と、
前記接合工程で生成された前記半導体基板を熱処理する熱処理工程と、
を備え、
前記第1の不純物は、前記第1の半導体層および前記第2の半導体層にキャリアを発生させない不活性な不純物であり、
前記熱処理は、前記第1の半導体層および前記第2の半導体層に含まれている前記第1の不純物の深さ方向の濃度プロファイルの幅が、前記熱処理の実施前に比して実施後の方が狭くなるように行われることを特徴とする半導体基板の製造方法。 - 前記熱処理は、前記第1の半導体層および前記第2の半導体層内における前記第1の不純物の面内方向の濃度ばらつきが、前記熱処理の実施前に比して実施後の方が大きくなるように行われることを特徴とする請求項1に記載の半導体基板の製造方法。
- 前記第1の半導体層および第2の半導体層にキャリアを発生させる第2の不純物が、前記第1の半導体層および前記第2の半導体層内において前記第1の不純物が存在する領域に存在していることを特徴とする請求項1または2に記載の半導体基板の製造方法。
- 前記第1の半導体層の表面および前記第2の半導体層の表面の少なくとも一方に前記第2の不純物を導入する第1不純物導入工程をさらに備え、
前記第1不純物導入工程は、前記接合工程よりも前に行われることを特徴とする請求項3に記載の半導体基板の製造方法。 - 前記第1不純物導入工程に関して、熱拡散法が用いられることを特徴とする請求項4に記載の半導体基板の製造方法。
- 前記照射工程は、前記第1の半導体層の表面および前記第2の半導体層の表面の少なくとも一方に前記第2の不純物をさらに照射することを特徴とする請求項3に記載の半導体基板の製造方法。
- 前記接合工程によって生成された前記半導体基板の、前記第1の半導体層の前記接合界面と反対側の面から、前記第2の不純物を注入する第2不純物導入工程をさらに備え、
前記第2不純物導入工程では、前記第2の不純物の少なくとも一部が、前記接合界面を超えて前記第2の半導体層に注入されることを特徴とする請求項6に記載の半導体基板の製造方法。 - 前記第1の不純物の前記第1および前記第2の半導体層内における存在範囲は、前記第2の不純物の前記第1および前記第2の半導体層内における存在範囲内に包含されていることを特徴とする請求項3~7の何れか1項に記載の半導体基板の製造方法。
- 前記第1の半導体層および前記第2の半導体層は、前記第1の半導体層および第2の半導体層にキャリアを発生させる第2の不純物が一様に拡散している半導体層であることを特徴とする請求項1~8の何れか1項に記載の半導体基板の製造方法。
- 前記第1の半導体層および前記第2の半導体層の組み合わせは、3C-SiC単結晶、4H-SiC単結晶、6H-SiC単結晶、SiC多結晶、のうちの何れか2つの組み合わせであることを特徴とする請求項1~9の何れか1項に記載の半導体基板の製造方法。
- 前記熱処理工程で行われる熱処理の最高温度は、1500℃以上であることを特徴とする請求項10に記載の半導体基板の製造方法。
- 前記第1の不純物は、アルゴン(Ar)、ネオン(Ne)、キセノン(Xe)の何れかを含むことを特徴とする請求項1~11の何れか1項に記載の半導体基板の製造方法。
- 前記第2の不純物は、窒素(N)、リン(P)の何れかを含むことを特徴とする請求項3~9の何れか1項に記載の半導体基板の製造方法。
- 第1の半導体層と、前記第1の半導体層と接している第2の半導体層と、を備える半導体基板であって、
前記第1の半導体層および前記第2の半導体層には、前記第1の半導体層および前記第2の半導体層にキャリアを発生させない不活性な第1の不純物が導入されており、
前記第1の半導体層と前記第2の半導体層との界面から2ナノメートル以内の領域に、前記第1の不純物の90%以上が存在していることを特徴とする半導体基板。 - 前記第1の半導体層および前記第2の半導体層内における前記第1の不純物の面内方向の濃度の差が、2倍以上であることを特徴とする請求項14に記載の半導体基板。
- 前記第1の半導体層および第2の半導体層にキャリアを発生させる第2の不純物が、前記第1の半導体層および前記第2の半導体層内において前記第1の不純物が存在する領域に存在していることを特徴とする請求項14または15に記載の半導体基板。
- 前記第2の不純物の全量に対する一定比以上は、前記第1の半導体層および前記第2の半導体層の表面からそれぞれ深さが一定値以下の第2不純物分布領域に存在しており、
前記第1の不純物の全量に対する一定比以上は、前記第1の半導体層および前記第2の半導体層の表面からそれぞれ深さが一定値以下の第1不純物分布領域に存在しており、
前記第2不純物分布領域の深さは前記第1不純物分布領域の深さよりも大きいことを特徴とする請求項16に記載の半導体基板。 - 前記第2の不純物は、窒素(N)、リン(P)の何れかを含むことを特徴とする請求項16または17に記載の半導体基板。
- 前記第1の半導体層および前記第2の半導体層の組み合わせは、3C-SiC単結晶、4H-SiC単結晶、6H-SiC単結晶、SiC多結晶、のうちの何れか2つの組み合わせであることを特徴とする請求項14~18の何れか1項に記載の半導体基板。
- 前記第1の不純物は、アルゴン(Ar)、ネオン(Ne)、キセノン(Xe)の何れかを含むことを特徴とする請求項14~19の何れか1項に記載の半導体基板。
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