JP6728638B2 - 半導体デバイスの製造方法 - Google Patents
半導体デバイスの製造方法 Download PDFInfo
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- JP6728638B2 JP6728638B2 JP2015220664A JP2015220664A JP6728638B2 JP 6728638 B2 JP6728638 B2 JP 6728638B2 JP 2015220664 A JP2015220664 A JP 2015220664A JP 2015220664 A JP2015220664 A JP 2015220664A JP 6728638 B2 JP6728638 B2 JP 6728638B2
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
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- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
[先行技術文献]
[特許文献]
[特許文献1] 特開2007−128974号公報
[特許文献2] 特開2009−105265号公報
[特許文献3] 特開2009−266940号公報
[特許文献4] 特開平05−266940号公報
また、第2フォトレジスト52はネガ型の感光性ドライフィルムであってもよく、感光性ドライフィルム上にインクジェット法でレジストを吐出して第1厚みT1と第2厚みT2を有する第2フォトレジストパターン58を形成してもよい。
Claims (4)
- 半導体デバイスの製造方法であって、
おもて面構造が設けられる半導体基板のおもて面の直上に第1のフォトレジストを形成する段階と、
前記第1のフォトレジストの直上に光硬化の性質が前記第1のフォトレジストとは逆である第3のフォトレジストを形成する段階と、
パターニングされた前記第3のフォトレジストをマスクにして、前記半導体基板に不純物を注入する段階と、
前記不純物を注入する段階の後において、前記第3のフォトレジストを除去する段階と、
前記第3のフォトレジストを除去する段階の後において、前記第1のフォトレジストを除去する段階と
を備え、
前記第3のフォトレジストを除去する段階の後であり、かつ、前記第1のフォトレジストを除去する前の段階において、前記第1のフォトレジストは全面に残っている、
半導体デバイスの製造方法。 - 前記第3のフォトレジストは、前記半導体基板に注入される不純物の注入深さの2倍以上の厚みを有する
請求項1に記載の半導体デバイスの製造方法。 - 前記第3のフォトレジストを形成する段階において、少なくとも第1の厚みと前記第1の厚みより大きい第2の厚みとを有する前記第3のフォトレジストを形成し、
前記不純物を注入する段階において、
前記第1のフォトレジストと前記第1の厚みを有する前記第3のフォトレジストとを介して、前記半導体基板に不純物を注入し、
前記第1のフォトレジストと前記第2の厚みを有する前記第3のフォトレジストとを介して、前記半導体基板への不純物の注入を遮る
請求項1に記載の半導体デバイスの製造方法。 - 前記第3のフォトレジストを形成する段階において、前記第3のフォトレジスト上にインクジェット法でレジストを吐出して、少なくとも前記第1の厚みと前記第1の厚みよりも大きい前記第2の厚みとを有する前記第3のフォトレジストを形成する、
請求項3に記載の半導体デバイスの製造方法。
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CN105244274B (zh) * | 2015-11-19 | 2018-12-14 | 株洲中车时代电气股份有限公司 | 一种逆导型igbt器件及其制作方法 |
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