TW201401398A - 具有線接合互連之無基板可堆疊封裝 - Google Patents
具有線接合互連之無基板可堆疊封裝 Download PDFInfo
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- TW201401398A TW201401398A TW102117978A TW102117978A TW201401398A TW 201401398 A TW201401398 A TW 201401398A TW 102117978 A TW102117978 A TW 102117978A TW 102117978 A TW102117978 A TW 102117978A TW 201401398 A TW201401398 A TW 201401398A
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- 238000004377 microelectronic Methods 0.000 claims abstract description 221
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Classifications
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- H01L23/5226—Via connections in a multilevel interconnection structure
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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Abstract
一種用於製造微電子單元的方法,包括在第一表面上以包括可圖案化金屬元件的結構的傳導接合表面的形式來形成複數個線接合。線接合係形成以具有連結到第一表面的基底及遠離第一表面的末端表面。線接合具有在基底和末端表面之間延伸的邊緣表面。該方法也包括形成介電質膠封層在傳導層的第一表面的一部分上方且在線接合的部分上方,使得線接合的未膠封的部分藉由末端表面或未被膠封層所覆蓋的邊緣表面的部分而定義。金屬元件係圖案化以形成在線接合下方且藉由膠封層的部分彼此絕緣的第一傳導元件。
Description
本發明關於一種具有線接合互連之無基板可堆疊封裝。
諸如半導體晶片的微電子裝置通常需要連接到其它電子構件的許多輸入和輸出。半導體晶片或其他可比較的設備的輸入和輸出接點一般設置在類似格子狀的圖案中,其基本上覆蓋裝置的表面(通常被稱為“區域陣列”),或在平行並相鄰裝置的前表面的每個邊緣而延伸的細長的列中,或在所述前表面的中心中。通常情況下,例如晶片的裝置必須物理地安裝在例如印刷電路面板的基板上,以及該裝置的接點必須被電連接到電路面板的電性傳導特性。
半導體晶片通常設在有利於在製造期間和晶片的安裝在諸如電路面板或其它電路面板的外部基板上期間的晶片處理的封裝中。例如,許多半導體晶片設在適合於表面安裝的封裝中。已經提出了針對各種應用的這種通用類型的許多封裝。最常見的是,這種封裝包括介電質元件,通常被稱為“晶片載體”,帶有在介電質上電鍍或蝕刻金屬結構形成的端子。這些端子通常藉由諸如沿著其本身的晶片載體延伸的薄的跡線以及藉由在晶片的接點和端子或跡線之間延伸的精細引線或導線而連接到其本身
的晶片的接點。在表面安裝操作中,封裝被放置在電路基板上,使得在封裝上的每個端子與在電路面板上對應的接觸墊對準。焊接或其他接合材料設置在端子和接觸墊之間。封裝可以藉由加熱組件永久地接合在適當位置,以便熔化或“回流”焊料或以其它方式激活接合材料。
許多封裝包括以焊料球的形式的焊料群,通常直徑為約0.1毫米和約0.8毫米(5至30密耳),連接到封裝的端子。具有從其的底表面突出的焊料球陣列的封裝通常被稱為球閘陣列或“BGA”封裝。簡稱為閘格陣列或“LGA”封裝的其他的封裝係藉由來自焊料所形成的薄層或平面固定到基板。這種類型的封裝可以是相當緊湊的。通常被稱為“晶片尺度封裝”的特定封裝佔用電路面板的面積等於或僅稍大於併入封裝中的裝置的面積。這是有利的,它減少了組件的整體尺寸,並且允許在基板上的各種裝置之間的短的互連之使用,其亦限制了在裝置之間的信號傳播時間,從而有利於在高速下組件的操作。
經封裝的半導體晶片通常設置在經“堆疊”的排列中,其中例如一個封裝設在電路面板上,另一個封裝被安裝在第一封裝的頂部上。這些排列可以允許多個不同的晶片被安裝在電路面板上的單一的足跡,且可以進一步藉由封裝之間的短的互連而促進高速操作。通常,這種互連距離為僅稍大於本身晶片的厚度。針對實現互連在晶片封裝的堆疊內,有必要提供在每個封裝(除了最上面的封裝)的兩側上用於機械和電性連接的結構。例如,通過提供接觸墊或平面在晶片被安裝的基板的兩側上而完成這項工作,該墊藉由傳導通孔或類似物連接通過基板。焊料球或類似物已被用於橋接在較下層基板的頂部上的接點到下一個較上層基板的底部上的
接點之間的間隙。焊料球必須是高於晶片的高度,以連接接點。堆疊晶片排列和互連結構的範例在提供在美國專利申請公開案第2010/0232129號(“'129公開”)中,其公開內容在此通過引用而將其全部內容併入。
儘管上述所有在本領域中的進步,仍對進一步改善在微電子封裝之製造和測試是值得嚮往的。
本公開的一個態樣涉及一種用於製造一微電子單元的方法。該方法包括在第一表面上以包括可圖案化金屬元件的結構的傳導接合表面的形式來形成複數個線接合。線接合係形成以具有連結到第一表面的基底及遠離基底且遠離第一表面的末端表面。線接合進一步具有在基底和末端表面之間延伸的邊緣表面。該方法也包括形成介電質膠封層在傳導層的第一表面的至少一部分上方且在線接合的部分上方,使得線接合的未膠封的部分藉由末端表面或未被膠封層所覆蓋的邊緣表面的一部分而定義。金屬元件係選擇性圖案化以形成藉由膠封層的至少部分彼此絕緣的第一傳導元件。該線接合中的至少一些設置在該第一傳導元件的頂上。
微電子元件可以包含在該結構中且當執行除去部分的該傳導層的步驟時與該傳導層電性連接。形成該介電質膠封層的步驟可以與偕同該傳導層電性連接的該微電子元件完成,使得該膠封層至少部分地覆蓋其之至少一個表面。該第一傳導元件中的至少一些可以在該線接合的各自者和該微電子元件之間電性連接。
該方法的範例可以進一步包括以下步驟:形成一再分佈層於該膠封層的該第二表面上方。該再分佈層可以包括從該線接合的未曝光部
分的至少一個橫向方向位移之傳導接點。
該線接合中的至少一些可以形成,使得它們的末端表面在從它們的基底的一個或多個橫向方向位移。在範例中,該線接合的基底可以被佈置在具有一第一最小間距的一第一圖案中,該線接合的該未膠封的部分能佈置在具有大於該第一最小間距的一第二最小間距的一圖案中。該基底可以佈置在具有一第一最小間距的一第一圖案中,該線接合的該未膠封的部分能佈置在具有小於該第一最小間距的一第二最小間距的一圖案中。
該方法可以進一步包括形成覆蓋該第二介電質層的該第二表面的第二傳導元件。該第二傳導元件中的至少一些可以與該線接合的該未膠封部分中的至少一些的個別者連接。
選擇性除去部分的該傳導層的步驟可以包括形成至少一些第一傳導元件,作為接觸墊以電性連接至沒有與該單元中的其他元件電性連接的線接合的基底。
該方法可以進一步包括藉由研磨或拋光中的一者使該單元變薄。在一範例中,該膠封層可以形成以具有初始厚度,使得該線接合的該末端表面基本上被覆蓋,使該單元變薄的步驟包括:去除部分的該膠封層,使得該末端表面變成未藉由該膠封層所膠封。
形成該膠封層的步驟可以包括分配一膠封劑到該傳導層的該第一表面的和該線接合的至少邊緣表面。進一步,形成該膠封層的步驟可以包括模制該膠封劑以與該傳導層、該線接合的至少邊緣表面以及該微電子元件的至少表面接觸。
該方法可以進一步包括在執行選擇性去除部分的該傳導層
的步驟之前,從相對於該線接合的該傳導層的表面去除一載體。
在一實施例中,該傳導層可以具有小於20微米的厚度。
本發明的另一個態樣涉及一種用於製造一微電子封裝的方法。該方法可以包括形成複數個線接合在一處理中單元的一傳導層的一第一表面上。該處理中單元具有連結至其且電性連接其之部分的至少一個微電子元件。該線接合係形成以具有連結到該第一表面的基底和遠離該基底且遠離該第一表面的末端表面。該線接合進一步具有在該基底和該邊緣表面之間延伸的末端表面。該方法也包括形成介電質膠封層在該傳導層的該第一表面的至少一部分上方,在至少一個該微電子元件的至少一部分的上方,以及在該線接合的部分上方,使得該線接合的未膠封的部分藉由該末端表面或未藉由該膠封層所覆蓋的其之邊緣表面的部分中的至少一個所定義。選擇性除去部分的導該電層,以形成其之第一傳導元件。該第一傳導元件中的至少一些電性連接該線接合中的至少一些,以及該第一傳導元件中的至少一些包括與該微電子元件電性連接的該傳導層的部分中的至少一些。
本發明的另一個態樣涉及一種用於製造一微電子單元的方法。該方法包括形成複數個線接合在一第一表面上,其是包括一可圖案化金屬元件的一結構的一傳導接合表面。該線接合具有連結到該第一表面的基底及遠離該基底且遠離該第一表面的末端表面。該線接合進一步具有在該基底和該末端表面之間延伸的邊緣表面。當形成該線接合時,該傳導層包括在其之至少一些邊緣處的複數個彼此附接的區域。該方法也包括形成一介電質膠封層在該傳導層的該第一表面的至少一部分上方與該線接合的
部分上方,使得該線接合的未膠封部分藉由末端表面或未由膠封層所覆蓋的邊緣表面的部分的至少一個所定義,其中,當執行選擇性去除部分的該膠封層的步驟時,複數個微電子元件連結到該傳導層,以具有電性連接該傳導層的該區域中的至少一些的每一個的至少一個微電子元件之一處理中單元的形式。然後選擇性圖案化該金屬化元件以形成藉由至少部分的該膠封層彼此絕緣的的第一傳導元件。該線接合中的至少一些設置在該第一傳導元件的頂上。然後該處理中單元成分割成複數個微電子單元,各包括該傳導層的該區域的該第一傳導元件和與其電性連接的至少一個微電子元件。
本發明的另一個態樣涉及一種用於製造一微電子組件的方法。該方法包括製造一第一微電子封裝,其包括形成複數個線接合在一處理中單元的一傳導層的一第一表面上。該處理中單元具有連結於此並電性連接其之部分的至少一個微電子元件。該線接合係形成以具有連結該第一表面的基底和遠離該基底且遠離該第一表面的末端表面,該線接合進一步具有在該基極和該末端表面之間延伸的邊緣表面。該線接合進一步包括形成介電質膠封層在該傳導層的該第一表面的至少一部分上方,在該至少一個微電子元件的至少部分上方,以及該線接合的部分上方,使得該線接合的未膠封部分藉由該末端表面或未由該膠封層所覆蓋的其之邊緣表面的部分的至少一個所定義。選擇性除去部分的該傳導層,以形成其之第一傳導元件。該第一傳導元件中的至少一些電性連接該線接合中的至少一些以及該第一傳導元件中的至少一些包括與該微電子元件電性連接的該傳導層的部分中的至少一些。該方法也包括連結該第一微電子封裝與覆蓋該第一封
裝的該膠封層的該第二表面的第二微電子封裝。該第二微電子封裝包括在其之一第一表面處暴露的複數個接點。連結該第一微電子封裝與該第二微電子封裝包括電性連接該第一微電子封裝的該線接合的該未膠封部分與該第二微電子封裝的該接點。
本公開的另一個態樣涉及一種包括至少一個微電子元件的微電子封裝。該包裝進一步包括第一電性傳導元件,其包括在該封裝的一安裝表面處暴露的端子。該第一傳導元件中的至少一些透過與該第一傳導元件一體地形成的通孔電性連接到至少一個該微電子元件。該封裝進一步包括線接合,具有連結到該傳導元件的個別者且鄰近該介電質膠封層的該第一表面之基底以及遠離該基底的末端表面。各個線接合定義在其之基底和末端表面之間延伸的一邊緣表面。該封裝也包括一介電質膠封層,具有一第一表面和遠離該第一表面的一第二表面。該第一表面的至少一部分被暴露在該封裝的該安裝表面處。該介電質膠封層填充在該線接合之間的空間,使得該線接合藉由該膠封層彼此分開。該線接合的未膠封的部分藉由在其之該第二表面處未被該膠封層所覆蓋的該線接合的該邊緣表面的至少一部分所定義。
該線接合的該未封裝部分中的至少一些可以在從其之個別的基底的至少一個橫向方向中位移。
該包裝可以進一步包括一第二微電子元件。在一範例中,該第一微電子元件可以包括暴露在其正面朝向該介電質層的該第一表面設置的接點,以及該第二微電子元件可以包括暴露在其正面朝向該介電質層的該第二表面設置的接點。在這一範例中,該封裝可以進一步包括暴露在該
膠封層的該第二表面處的第二傳導元件。該第二傳導元件中的至少一些可以在該第二微電子元件的該接點的個別者與該未膠封線接合部分的個別者之間連接。該第一和第二微電子元件可以藉由與該第一微電子元件的至少一個接點和該第二微電子元件的至少一個接點電性連接的至少一個線接合所電性連接。或者,該第二微電子元件可以藉由連結在該第二微電子元件的該接點的一者和該第二微電子元件的個別一者之間的一線接合連接第二傳導元件的一者。在另一範例中,該第一和第二微電子元件可以藉由連結至該第二微電子元件的一接點與暴露在該膠封層的該第一表面處的該傳導元件的個別一者的線接合電性連接。
一種微電子組件,包括:如上述的一第一微電子封裝;以及一第二微電子封裝,其包括一微電子元件和在暴露於該第二微電子封裝的一表面處的端子。該端子電性連接該微電子元件。進一步,該第二微電子封裝可以覆蓋該第一微電子封裝,且可以電性連接到該第一微電子封裝的該線接合的該未膠封部分中的至少一些的其之端子與其接合。
一種系統可以包括如上述的微電子封裝以及一個或多個電子構件。
10‧‧‧微電子封裝
22‧‧‧微電子元件
24‧‧‧微電子接點、通孔
28‧‧‧傳導元件、傳導特徵
28’‧‧‧傳導金屬層
30‧‧‧跡線
30’‧‧‧表面
31‧‧‧跡線
32‧‧‧線接合
34‧‧‧基底
35‧‧‧末端表面
36‧‧‧末端
38‧‧‧末端表面
42‧‧‧膠封層
44‧‧‧表面
45‧‧‧表面
52‧‧‧焊料塊
90‧‧‧電路面板
92‧‧‧面板接點
110‧‧‧微電子封裝
120‧‧‧附著層
122‧‧‧微電子元件
124‧‧‧微電子接點
125‧‧‧金屬化通孔
128‧‧‧微電子元件、微電子特徵
128’‧‧‧傳導金屬層
130’‧‧‧表面
131‧‧‧跡線
132‧‧‧線接合
134‧‧‧基底
142‧‧‧膠封層
144‧‧‧表面
145‧‧‧表面
210‧‧‧微電子封裝
222A‧‧‧微電子元件
222B‧‧‧微電子元件
228‧‧‧傳導元件
231‧‧‧跡線
232‧‧‧線接合
242‧‧‧膠封層
244‧‧‧表面
245‧‧‧表面
310‧‧‧微電子封裝
322A-C‧‧‧微電子元件
324‧‧‧接點
325‧‧‧金屬化通孔
332‧‧‧線接合
342‧‧‧膠封層
344‧‧‧表面
345‧‧‧表面
422A-B‧‧‧微電子元件
431‧‧‧跡線
442‧‧‧膠封層
444‧‧‧表面
445‧‧‧表面
466‧‧‧線接合
510‧‧‧微電子組件
522‧‧‧微電子元件
532‧‧‧線接合
542‧‧‧膠封層
544‧‧‧表面
545‧‧‧表面
546‧‧‧角度
現在將參照附圖來描述本發明的各種實施例。可以理解,這些附圖僅示出本發明的一些實施例中,因此不被認為是限制其範圍。
圖1示出了藉由根據本發明的方法的步驟處理以形成微電子封裝之處理中單元的俯視示意圖;圖2示出了圖1的處理中單元的側視圖;
圖3示出了在該方法的進一步處理步驟中圖1的處理中單元的頂視圖;圖4示出了圖3的處理中單元的側視圖;圖5示出了藉由區域A表示的圖4的處理中單元的一部分的詳細視圖;圖6示出了在該方法的進一步處理步驟中圖1的處理中單元的頂視圖;圖7示出了圖6的處理中單元的側視圖;圖8示出了藉由區域B表示的圖7的處理中單元的一部分的詳細視圖;圖9示出了可以導致該方法的微電子封裝的側視圖;圖10示出了藉由區域C表示的圖9的封裝的詳細視圖;圖11示出了在該方法的進一步可選處理步驟之後的圖10的詳細視圖;圖12示出了在該方法的進一步可選處理步驟中的圖9的封裝的側視圖;圖13示出了藉由區域D表示的圖11的封裝的一部分的詳細視圖;圖14示出了藉由根據本發明的方法的變化的步驟可以處理以形成微電子封裝之替代的處理中單元的俯視示意圖;圖15示出了藉由區域E表示的圖13的封裝的一部分的詳細視圖;圖16示出了可以導致該方法變化的微電子封裝的側視圖;圖17示出了在該方法的進一步可選處理步驟變化之後的圖16的封裝的一部分的詳細視圖;圖18示出了替代的微電子封裝;圖19示出了藉由區域F表示的圖18的封裝的一部分的詳細視圖;圖20示出了進一步替代的微電子封裝;圖21示出了藉由區域G表示的圖19的封裝的一部分的詳細視圖;
圖22示出了進一步替代的微電子封裝;圖23示出了進一步替代的微電子封裝;以及圖24示出了可以包括根據此處所示的各種實施的一個或多個封裝的微電子組件的範例。
現在轉回附圖,其中類似的參考數字用於表示相似的特徵,圖9顯示了根據本發明的實施例的微電子裝置或封裝10,圖1-8示出根據本發明的另一個實施例的方法的微電子封裝的形成的各個階段。圖9的實施例是以經封裝的微電子元件的形式的微電子封裝10,例如用於計算機或其它電子應用中的半導體晶片組件。
圖9的微電子封裝10包括微電子元件22。微電子封裝10可以嵌入在膠封層42之內,或者可以在其之一個或多個表面上藉由膠封層所接觸,例如,前或後表面或者在前或後表面之間延伸的邊緣表面。膠封層42具有從第一表面43和第二表面44延伸的厚度。第一和第二表面可至少部分地暴露在封裝10的各自的第一和第二安裝表面11和12。這樣的厚度可以至少等於微電子元件22本身的厚度。可以於圖9看出,膠封層42可以從微電子元件22以橫向方向進一步向外延伸,如圖5的平面視圖所示。複數個線接合32也嵌入在膠封層之內且在分別未藉由膠封層所覆蓋且可能與表面43和44齊平(例如,共平面)的末端表面35和38之間延伸。為了本討論的目的,第一表面43可被描述為從第二表面44相對或遠離來定位。這樣的描述,以及用於此處的元件的涉及這種元件的垂直或水平位置之相對位置的其他的描述係僅供說明之用以對應於附圖內的元件的位置,
且不限制。
微電子元件22可以是半導體晶片或另一個可比較的裝置,其具有可以是以在晶片上的整合或被動的形式(“IPOC)之複數個主動或被動電路元件或者主動和被動電路元件皆有等等。在圖9所示的實施例中,微電子元件22具有藉由膠封層42接觸(例如,覆蓋)的邊緣表面和後表面的至少部分。微電子元件22可定位使得其之接點24相鄰封裝的第一安裝表面11。另外,在這樣的排列中,接點24與沿膠封層42的第一表面43延伸的傳導元件28連接以在末端表面35處電性連接線接合32,它們可以由各自的線接合32的基底34所定義。這種基底34可以是用於形成線接合32的處理的加工品,並且可以是藉由球型接合所形成的這種基底34的形狀,如所示,或者楔形接合、縫編法或類似所形成。在其他實施例中,如示於圖15,基底34可以在製造期間部分或完全地除去,如藉由研磨(grinding)、抹磨(lapping)、拋光(polishing)或其它合適的技術的變薄處裡。這樣的變薄或用其它處理也可以減少線接合32的高度,使得末端表面35被定義為在基底34之上的線接合32的盡頭。在一個實施例中,微電子接點24可以藉由傳導(例如,金屬化)通孔24而電性連接傳導元件28,其包括沉積到微電子元件的接點24的通孔,例如,藉由一種或多個金屬的電鍍、濺射或氣相沉積,如銅、鎳、鉻、鋁、金、鈦、鎢、鈷或其之一種或多種的合金,但不設限。在一個實施例中,傳導元件可以藉由沉積具有金屬和非金屬成分的液體的傳導性基體材料並在其後固化已沉積的傳導性基體材料所形成。例如,傳導性基體材料可以沉積和使用,如共同擁有的美國專利申請案第13/158,797號中描述,其公開的內容通過引用併入於此。
傳導元件28可以包括各自的“接點”或“墊”,其可以暴露在膠封層42的第二表面45處。如本描述中所使用的,當電性傳導元件被描述為“暴露”於具有介電質結構的另一元件的表面,它表明電性傳導元件是可利用於接觸在垂直介電質結構的表面且從介電結構外側朝向介電結構的表面之方向移動的理論上的點。因此,暴露在介電質結構的表面處的端子或其它傳導結構可以從這樣的表面投影;可以是與這樣的表面齊平;或者可以相對於這樣的表面凹陷且經由在介電質中的孔或凹地所暴露。在一個實施例中,傳導元件28可以是平的,薄的元件暴露在膠封層42的第一表面43處。傳導元件28可以具有任何合適的形狀,並在某些情況下可以是圓形的。傳導元件28可以藉由跡線31彼此電性互連,電性互連至微電子元件22,或兩者。傳導元件28也可以沿微電子元件22的前表面26所形成。
如圖11和12所示,額外的傳導元件28可以暴露在膠封層42的第二表面44處。這種傳導元件29可以壓在線接合32的末端表面38上且與其電性連接。在其他變化中,這樣的傳導元件可以包括墊28,其在沿著表面44的至少一個橫向方向上從對應的線接合位移至它們可以藉由跡線30連接在其之末端表面34之處。
線接合32可以連結至傳導元件28的至少一些,如其之面30上。線接合32可以在其之基座34處連結至傳導元件28且可以延伸至與各自的基底34和與第一表面43遠離(即,相對)的末端36。線接合32的末端36可被表徵為“自由的”,他們沒有電性連接或以其他方式連結至微電子元件22或者反過來連接到微電子元件22之微電子封裝10內的任何其他的傳導特徵。換句話說,自由末端36可用於電子連接,可直接或間接地通
過傳導元件28或本文所討論的其它特徵至封裝10的外部傳導特徵。末端36藉由例如膠封層42保持在預定的位置或以其他方式連結或電性連接另一傳導特徵的事實不意味著它們不是如本文所述的“自由的”,只要任何這樣的特徵是不電性連接到微電子元件22。相反地,基底34可能不是自由的,因為他們可以直接或間接地電性連接到微電子元件22,如本文所述。如圖9所示,基底34可以在形狀上變圓,而從定義在基底34和末端36之間的線接合32的邊緣表面37向外延伸。基底34的具體尺寸和形狀可以根據用於形成線接合32的材料類型、在線接合32和傳導元件28之間的連接所要求的強度、或者在特定處理中用以形成線接合32而有所不同。用於製造線接合28的示範性方法被描述在Otremba的美國專利第7,391,121號,其為美國專利申請案公開號2005/0095835(描述可被認為是一種線接合形式的楔形接合過程),並在共同轉讓的美國專利申請案第13/462,158號;第13/404,408號;第13/405,108號;第13/405,125號;以及第13/404,458號中,其公開的內容通過引用將其全部內容併入本文。
線接合32藉由在其表面處接合銅、金、鎳、焊料、鋁或金屬合金的金屬線所形成,並執行一個或多個其他的步驟,以便形成具有由此以在其間延伸的導線的長度遠離(例如,相對)之基底和未包於膠囊中的表面的線接合。此外,線接合32可以由材料的組合所製成,諸如從如銅或鋁的傳導材料的芯,例如,以塗層應用於芯上。該塗層可以是第二傳導材料,如鋁、鎳、鉑或鈀等等。另外,該塗層可以是一種絕緣材料,如絕緣套。在一個實施例中,用於形成線接合32的線可以具有約15μm至150μm之間的厚度,即,在線長度的橫向尺寸中。在一般情況下,線接合32可以形
成在金屬接合表面上,即,使用線接合工具的結構的表面的第一金屬接合表面。在包括如下面描述的用於楔形接合的其他實施例中,線接合32可以具有高達約500μm的厚度。線區段的引線末端被加熱並對線區段所接合的接收表面加壓,通常形成連結傳導元件28的表面的球或球狀基底34。線區段用以形成線接合的所需長度被從接合工具拉出,它然後可以在所需的長度下切斷或切割線接合。可以用來形成鋁的線接合之楔形接合例如是線的加熱部分被拖動整個接收表面以形成位於大致平行於表面的楔形之過程。楔形接合之線接合然後可以向上彎曲,如果有必要,並在切割前延伸到所需的長度或位置。在一個特定的實施例中,用以形成線接合的線可以是橫截面為圓柱形。否則,從工具供給以形成線接合或楔形接合之線接合的線可以具有多邊形的橫截面,例如諸如矩形或梯形。
線接合32的自由末端36可以定義各自的末端表面38。末端表面38可以形成藉由複數個線接合32的各自的末端表面38所形成的如網格或陣列的圖案的至少一部分的接點。圖5和圖6示出針對藉由末端表面38所形成的接點的這樣的陣列之示範性圖案。這樣的陣列可以形成在一區域陣列配置中,其之變化會使用於本文所描述的結構來實施。在如所示的變化中,不需要是在圖5的網格或陣列圖案的每個位置處的線接合的末端表面。這樣的陣列可用於電性和機械性連接微電子封裝10到另一個微電子結構,如至印刷電路面板(“PCB”),或其他經封裝的微電子元件,它的例子示於圖23。在這樣的堆疊的排列中,線接合32和傳導元件28可以攜帶穿過其中的多個電子信號,每個都具有不同的信號電位,以允許針對不同的信號在單一堆疊中由不同的微電子元件進行處理。為末端表面38所
設置的網格或陣列圖案在一定的位置,其可設置在與基底34所設置的網格或陣列圖案相同或不同的其之位置處。在如圖9所示的例子中,在線接合32一般是垂直排列之處,這樣的陣列可以是相同的。在其他排列中,例如如圖22所示的可以包括相對於膠封層42的表面45成一定角度的線接合532,使得末端表面38的陣列的間距比基底34的間距更大。這樣的排列的逆轉也是可能的。另外,如上所討論的,傳導元件28可以從末端表面35或38橫向移動至它們藉由跡線31電性連接之處。這樣的排列也可以提供在表面43和44上方不同的間距或接點的其他不同的排列。
如圖23所示,這樣的封裝10可以排列在具有其它類似封裝或類似的一堆疊中。雖然圖23示出了兩個這樣的微電子封裝10,但是三個、四個或甚至更多個可以被排列在這樣的堆疊中,其也可以藉連結傳導元件28至電路面板90的焊料塊52與面板接點92組裝在一起。焊料塊52也可以用以在這種堆疊中互連微電子組件,例如通過電子地和機械性附接末端表面38至傳導元件28或者連接傳導元件28至其他傳導元件28。
膠封層42用於保護在微電子封裝件10內的其他元件,特別是線接合32。這允許更強大的結構,它是透過其之測試或運輸或裝配至其他微電子結構期間不太可能被損壞。膠封層42可由帶有絕緣特性的絕緣材料所形成,如美國專利申請公開案第2010/0232129號中描述的,其通過引用而將全部內容併入於此。
如上所述,圖22示出具有帶有末端536的線接合532的微電子組件510的實施例,其並不位於其之各自的基底534正上方。即,考慮基板512的第一表面514在兩個橫向方向延伸,以便大致上定義一平面,末
端536或線接合532的至少一個係從基底534的對應的橫向位置在這些橫向方向中的至少一個中位移。如圖22所示,線接合532可沿其縱軸大致上是直的,如圖9的實施例中,具有以相對於膠封層542的第二表面545的角度546成一角度的縱向軸線。雖然圖5的橫截面視圖僅示出通過垂直於第一表面514的第一平面的角度546,線接合532也可以在垂直第一平面和第二表面545的另一平面中相對於第一表面514成一定角度。這樣的角度可以是基本上等於或不同於角度546。換言之,末端536相對於基底534的位移可以在兩個橫向方向,並且可以是在這些方向的各者中的相同或不同的距離。
在一個實施例中,不同的線接合532可以在不同的方向以不同的幅度在整個組件510位移。這樣的排列允許組件510具有與在表面545的水平上相比的表面544的水平上的不同地配置的陣列。例如,陣列可以覆蓋較小的總面積,或比在第二表面545的水平處的表面544上具有更小的間距。進一步,一些線接合532可以有末端536,其位於微電子元件522上方,以容納不同尺寸的封裝微電子元件的堆疊排列。在另一個實施例中,線接合可以藉由包括於此的彎曲部分來實現這樣的橫向位移。這樣的彎曲部分可以形成在線接合形成期間的額外的步驟中,並且可以發生於例如當線部分被拉出到所需長度時。這一步可以利用現有的線接合設備所實現,它可以包括單一機器上的使用。這樣的彎曲部可以採取各種形狀,根據需要,以達到線接合的末端的預期的位置。例如,彎曲部分可以被形成為各種形狀的S曲線。這方面的例子進一步描述於[參閱早期BVA的情況]。
圖1-8示出在其製造方法的各個步驟中的微電子封裝10。圖1和2顯示微電子封裝10在微電子元件22已被接合至包括圖案化金屬元件
28'的結構的步驟處。該結構可以包括或由在第一和第二橫向方向15、17延伸的金屬或其他的電性傳導材料層所組成,以定義封裝10的通用形狀,如在圖1的平面圖中可以看出。微電子元件22可以使用未完全固化的黏著層或聚合物材料而被組裝(例如,接合)至傳導材料層28'。在一些實施例中,該結構可包括支撐層或裝置(例如,載體),以支持在製造期間的至少一些步驟中的傳導材料層28'。這樣的支撐層可以在膠封層42形成後而移除。
圖2和3顯示微電子封裝10,其具有在傳導材料層28'的表面30'上的預定位置處連結的線接合32。如所討論的,線接合32可通過加熱區段的末端以軟化末端來應用,使得當壓至其時,它形成了接合至傳導元件28的一沉積,形成基底34。然後在被切斷以形成末端36和線接合32的末端表面38之前,將線拉出自傳導元件28,並且如果需要的話,在一指定的形狀中操作。或者,線接合32可以藉楔形接合由例如鋁線所形成。楔形接合藉由加熱鄰近其末端的線的一部分並帶有施加於其的壓力將其沿著傳導元件28拖動。這樣的製程被進一步描述在美國專利第7,391,121號,其公開內容通過引用將其全部內容併入於此,並在先前引用的美國專利公開號第13/402,158號。
在圖5-7中,膠封層42藉由塗敷在傳導材料層28'的表面30'上而已被添加到微電子封裝10,從其向上延伸,並沿著線接合32的邊緣表面37。膠封層42也可以沿著微電子元件22的至少一部分延伸,包括其之前表面、後表面或邊緣表面中至少一個上。在其他實施例中,所述膠封層42可以形成,使得它並沒有接觸微電子元件22的任何部分,例如透過自其橫向地分隔。膠封層42可藉由沉積膠封劑而形成,例如,於圖4所示在微
電子封裝10的階段上的樹脂。在一個範例中,這可以透過放置封裝10在一具有所希望的膠封層42的形狀的腔室之適當配置的模具中所實現,其中該模具可以接收封裝10。這種模具和與其形成膠封層的方法可以如圖所示,且描述在美國專利申請公開案第2010/0232129號,其公開內容藉由引用的方式將它的全部內容併入於此。另外,膠封層42可以由至少部分順應性(compliant)材料預製成所希望的形狀。在此配置中,介電材料的順應特性允許膠封層42被壓入在線接合32和微電子元件22上方的位置。在這樣一個步驟中,線接合32沿膠封層42接觸邊緣表面37之處滲入順應性材料於此形成各自的孔。進一步,微電子元件22可變形該順應性材料,以便它可以被容納在其中。該順應性介電材料可以被壓縮以暴露在外表面44上的末端表面38。另外,任何多餘的順應性介電材料可以從膠封層除去,以在線接合32的末端表面38未覆蓋之處上形成表面44。
在一個範例中,膠封層42可形成,使得最初其之表面44是在線接合32的末端表面38上方隔開。為了暴露末端表面38,在末端表面38上方的膠封層42的部分可以被去除,露出大致上與末端表面38齊平的新的表面44,如圖7所示。在另一種選擇,膠封層42可以形成,使得表面44已經大致與末端表面38齊平或者使得表面44定位於末端表面38的下方。如果需要,去除膠封層42的一部分可以通過研磨、乾式蝕刻、雷射蝕刻、濕式蝕刻、抹磨或類似方法來完成。如果需要的話,線接合32的末端36的一部分也可以以相同或額外的步驟除去,以實現與表面44大致齊平之大致上平面的末端表面38。在一個特定的例子中,封裝可以應用於微電子元件22、線接合34和可圖案化傳導元件28'上而不使用模具,並且在其之
應用後,可以去除多餘的膠封劑以暴露線接合的末端表面,例如,但拋光或上述方法中的一個或多個。
在形成介電質層42之後,傳導材料層28'可以透過化學或機械蝕刻(如雷射蝕刻等)而被圖案化,由除去傳導性材料層28'的部分並留下在所希望的位置中的其之部分和所希望的傳導元件28或跡線31的形式以製造傳導元件28和/或跡線31。這是可以做到去製造線接合32和微電子元件22的接點24之間的選擇性互連或者形成從各自的線接合32偏離的傳導元件28,它們可以藉由跡線31連接。在一些實施例中,傳導通孔25可形成以帶有微電子接點24的墊形式連接跡線31或傳導特性28。
如圖10所示,然後封裝10可以被薄化以平坦化表面44和線接合32的末端表面38。這可以包括將表面44上的微電子元件22的表面暴露,也可以包括微電子元件22本身變薄。另外地或可選地,傳導特徵28和/或跡線31可以在表面44上形成,如上面所述。這可以透過沉積或連結表面44上的傳導層,然後圖案化該層以形成這樣的傳導元件28和跡線31。
圖15和圖16示出了微電子封裝110,其在結構上類似於示於圖9,但具有“面朝上(face-up)”的排列的微電子元件110。在這種排列下,微電子接點124設置朝膠封層142的表面144。進一步,微電子元件122可以藉由暴露於表面144的傳導特徵128和跡線131而與線接合132的圖案連接。如於圖15和16所示,這樣的跡線131和傳導元件128可藉由從表面144延伸到接點124的金屬化通孔125而與微電子接點124連接。
如圖15所示,由暴露在表面144上的跡線131和傳導元件128所實現的路由可以是在封裝110中的唯一的路由,具有將被接地的表面
45,以除去傳導材料層128'(圖14),其也可以移除進一步的封裝材料、基底134和附著層120的一部分或全部。或者,如圖16所示。電性傳導路由元件也可包括在表面145上,可以是表面145上以陣列排列的可濕性接點的用途或重新分配。在其他例子中,指定的線接合可藉由在表面144上的路由與微電子元件122連接,它可以藉由連接至指定線接合的表面145上路由依次連接至其他線接合。
圖13和14示出在處理步驟中的微電子封裝110,其可導致於圖15和16所示的完成封裝110的任一者。具體而言,圖13和14示出了具有面朝上接合在傳導材料層128'上的微電子元件122之封裝110。同樣,線接合132已被加入到傳導材料層28'的表面30',並根據上述處理中的任何一個所形成。另外,膠封層142被沉積在表面130'的露出部分上,以及線接合132和微電子元件122之上,根據上述描述的各種處理中的任何一者。以傳導元件128和跡線131的形式的路由電路然後形成在膠封層142的表面144上以將微電子元件122與線接合132連接。
在這樣一個點,封裝110可以藉過如上所述的研磨、拋光、抹磨或其他技術而被進一步處理而去除材料導致示於圖15中的封裝110。另外,附加的路由可以透過圖案化傳導材料層128'形成,以形成所希望的配置中的傳導元件128和跡線131,如關於圖8和9的上述描述。
圖17至21示出了如上所述的那些相似的通常結構的封裝之各種排列,但利用複數個微電子元件。在一個實施例中,圖17和圖18示出微電子封裝210具有以面朝下排列嵌入在膠封層242內的一個微電子元件222A和以面朝上排列的其他微電子元件222B。這樣的封裝210可以利用以
在膠封層242的兩個表面244和表面245上相互連接的傳導元件228和跡線231的形式之電性傳導路由電路。此外,指定的線接合232可用於藉連接在每個末端表面35和38上指定的線接合之路由電路電連接微電子元件222A與微電子元件222B,並分別連接至互相微電子元件222A和222B的至少一個接點224。這樣的封裝210可以通過類似關於圖1-16的上述描述之方法所製造。
圖19和圖20示出類似於圖17和18所示的微電子封裝310的排列,但具有在微電子元件322B面326上面朝上排列接合的額外的微電子元件322C。為了便於將微電子元件322B連接至在表面344上的電性傳導路由電路,微電子元件322C可以是小於微電子元件322B或可以從中偏移,使得微電子元件322B的接點324未藉由微電子元件322C所覆蓋。這樣的連接可以通過連接元件接點324的金屬化通孔325或連結至微電子元件322B的接點324且未被在表面344上的膠封層342所覆蓋之額外的線接合364所實現。正如上面所討論,在任何微電子元件322A、322B、322C之間的路由可以透過指定的線接合332而實現與適當配置與其連接的路由電路。
在進一步於圖21的例子中,一種微電子封裝件410可以是類似於圖17和18所示,但是具有在微電子元件422B的一個或多個接點424之間連接的額外的線接合466(其配置朝向膠封層442的表面444)和膠封層442的表面445上的路由電路的一部分。在所示的例子中,這樣的線接合466可以用來實現微電子元件422B和微電子元件422A之間的連接,其具有配置朝向膠封層442的表面445的接點424。如圖所示,線接合466可以連結跡線431(或傳導元件,如果需要的話),其進一步連接到電連接微電子
元件422A的元件接點424之金屬化通孔425。
以上討論的結構可以用在不同的電子系統的建設。例如,根據本發明的另一個實施例的系統611包括微電子封裝610,如上所述,與其他電子構件613和615關連。在所描述的例子中,構件613是一種半導體晶片,而構件615是顯示螢幕,但可以使用任何其他構件。當然,雖然只有兩個額外的構件顯示於圖24中以為了清楚說明的目地,但是該系統可包括任意數量的這樣的構件。如上述的微電子封裝610可以是例如與圖9相關的上面討論的微電子封裝,或參照圖23所討論併入複數個微電子封裝的結構。封裝610可以進一步包括圖13-22描述的實施例的任何一個。在進一步的變型中,複數個變化可以提供,也可以使用任意數量的這種結構。
以虛線示意性地示出微電子封裝610和構件613和615被安裝在共同的殼體619中,並且根據需要電性相互連接彼此,以形成所希望的電路。在所示的示例性系統中,該系統包括諸如可撓性印刷電路面板的電路面板617,電路面板包括許多導體621,其中只有一個示於圖24,將構件彼此互連。然而,這僅僅是示例性的,可以使用任何合適的結構以用於進行電性連接。
殼體619被描繪為便攜式殼體,可以使用於例如蜂窩電話或個人數位助理,並且螢幕615暴露於所述殼體的表面。凡微電子封裝610包括例如成像晶片623的光敏元件,透鏡或其它光學裝置也可以被提供用於規劃光至結構的路線。再次,如圖24所示的簡化的系統僅僅是示例性的,包括通常被認為是固定的結構,如台式計算機、路由器等等的系統的其他系統可以使用上面所討論的結構來製造。
雖然於此的本發明參考特定實施例進行了描述,但是應當理解,這些實施例僅僅是本發明的原理和應用之說明。因此,應當理解許多修改可以執行在說明性實施例,而在不脫離由所附申請專利範圍所限定的本發明的精神和範圍的情況下可以設計出其他排列。
10‧‧‧微電子封裝
22‧‧‧微電子元件
31‧‧‧跡線
32‧‧‧線接合
44‧‧‧表面
Claims (30)
- 一種用於製造一微電子單元的方法,其包括以下步驟:形成複數個線接合在一第一表面上,其是包括一可圖案化金屬元件的一結構的一傳導接合表面,該線接合具有連結到該第一表面的基底及遠離該基底且遠離該第一表面的末端表面,該線接合進一步具有在該基底和該末端表面之間延伸的邊緣表面;形成一介電質膠封層在該傳導層的該第一表面的至少一部分上方與該線接合的部分上方,使得該線接合的未膠封部分藉由末端表面或未由膠封層所覆蓋的邊緣表面的部分的至少一個所定義;以及然後選擇性圖案化該金屬化元件以形成藉由至少部分的該膠封層彼此絕緣的的第一傳導元件,其中,該線接合中的至少一些設置在該第一傳導元件的頂上。
- 根據申請專利範圍第1項的方法,其中,一微電子元件係包含在該結構中且當執行除去部分的該傳導層的步驟時與該傳導層電性連接。
- 根據申請專利範圍第2項的方法,其中,形成該介電質膠封層的步驟係與偕同該傳導層電性連接的該微電子元件完成,使得該膠封層至少部分地覆蓋其之至少一個表面。
- 根據申請專利範圍第2項的方法,其中,該第一傳導元件中的至少一些在該線接合的各自者和該微電子元件之間電性連接。
- 根據申請專利範圍第1項的方法,進一步包括步驟,形成一再分佈層於該膠封層的該第二表面上方,該再分佈層包括從該線接合的未曝光部分的至少一個橫向方向位移之傳導接點。
- 根據申請專利範圍第1項的方法,其中,該線接合中的至少一些係形成,使得它們的末端表面在從它們的基底的一個或多個橫向方向位移。
- 根據申請專利範圍第1項的方法,其中,該基底被佈置在具有一第一最小間距的一第一圖案中,其中,該線接合的該未膠封的部分係佈置在具有大於該第一最小間距的一第二最小間距的一圖案中。
- 根據申請專利範圍第1項的方法,其中,該基底被佈置在具有一第一最小間距的一第一圖案中,其中,該線接合的該未膠封的部分係佈置在具有小於該第一最小間距的一第二最小間距的一圖案中。
- 根據申請專利範圍第1項的方法,其中,該線接合的該基底係以球形接合的形式。
- 根據申請專利範圍第1項的方法,其中,在該基底與該末端表面之間延伸的該線接合的該邊緣表面為第一邊緣表面部分,其中,該線接合的該基底是沿該第一傳導元件延伸的該邊緣表面的第二部分。
- 根據申請專利範圍第1項的方法,進一步包括形成覆蓋該第二介電質層的該第二表面的第二傳導元件,該第二傳導元件中的至少一些係與該線接合的該未膠封部分中的至少一些的個別者連接。
- 根據申請專利範圍第1項的方法,其中,選擇性除去部分的該傳導層的步驟包括形成至少一些第一傳導元件,作為接觸墊以電性連接至沒有與該單元中的其他元件電性連接的線接合的基底。
- 根據申請專利範圍第1項的方法,進一步包括藉由研磨或拋光中的一者使該單元變薄。
- 根據申請專利範圍第13項的方法,其中,該膠封層係形成以具有 初始厚度,使得該線接合的該末端表面基本上被覆蓋,其中,使該單元變薄的步驟包括:去除部分的該膠封層,使得該末端表面未藉由該膠封層所膠封。
- 根據申請專利範圍第1項的方法,其中,形成該膠封層的步驟包括分配一膠封劑到該傳導層的該第一表面的和該線接合的至少邊緣表面。
- 根據申請專利範圍第2項的方法,其中,形成該膠封層的步驟包括模制該膠封劑以與該傳導層、該線接合的至少邊緣表面以及該微電子元件的至少表面接觸。
- 根據申請專利範圍第1項的方法,進一步包括:在執行選擇性去除部分的該傳導層的步驟之前,從相對於該線接合的該傳導層的表面去除一載體。
- 根據申請專利範圍第17項的方法,其中,該傳導層具有小於20微米的厚度。
- 一種用於製造一微電子封裝的方法,其包括以下步驟:形成複數個線接合在一處理中單元的一傳導層的一第一表面上,該處理中單元具有連結至其且電性連接其之部分的至少一個微電子元件,該線接合係形成以具有連結到該第一表面的基底和遠離該基底且遠離該第一表面的末端表面,該線接合進一步具有在該基底和該邊緣表面之間延伸的末端表面;形成介電質膠封層在該傳導層的該第一表面的至少一部分上方,在至少一個該微電子元件的至少一部分的上方,以及在該線接合的部分上方,使得該線接合的未膠封的部分藉由該末端表面或未藉由該膠封層所覆蓋的 其之邊緣表面的部分中的至少一個所定義;以及選擇性除去部分的導該電層,以形成其之第一傳導元件,其中,該第一傳導元件中的至少一些電性連接該線接合中的至少一些以及該第一傳導元件中的至少一些包括與該微電子元件電性連接的該傳導層的部分中的至少一些。
- 一種用於製造一微電子單元的方法,其包括以下步驟:形成複數個線接合在一第一表面上,其是包括一可圖案化金屬元件的一結構的一傳導接合表面,該線接合具有連結到該第一表面的基底及遠離該基底且遠離該第一表面的末端表面,該線接合進一步具有在該基底和該末端表面之間延伸的邊緣表面,其中,當形成該線接合時,該傳導層包括在其之至少一些邊緣處的複數個彼此附接的區域;形成一介電質膠封層在該傳導層的該第一表面的至少一部分上方與該線接合的部分上方,使得該線接合的未膠封部分藉由末端表面或未由膠封層所覆蓋的邊緣表面的部分的至少一個所定義,其中,當執行選擇性去除部分的該膠封層的步驟時,複數個微電子元件連結到該傳導層,以具有電性連接該傳導層的該區域中的至少一些的每一個的至少一個微電子元件之一處理中單元的形式;然後選擇性圖案化該金屬化元件以形成藉由至少部分的該膠封層彼此絕緣的的第一傳導元件,其中,該線接合中的至少一些設置在該第一傳導元件的頂上;以及然後該處理中單元成分割成複數個微電子單元,各包括該傳導層的該區域的該第一傳導元件和與其電性連接的至少一個微電子元件。
- 一種用於製造一微電子組件的方法,其包括:製造一第一微電子封裝的步驟,包括:形成複數個線接合在一處理中單元的一傳導層的一第一表面上,該處理中單元具有連結於此並電性連接其之部分的至少一個微電子元件,該線接合係形成以具有連結該第一表面的基底和遠離該基底且遠離該第一表面的末端表面,該線接合進一步具有在該基極和該末端表面之間延伸的邊緣表面;形成介電質膠封層在該傳導層的該第一表面的至少一部分上方,在該至少一個微電子元件的至少部分上方,以及該線接合的部分上方,使得該線接合的未膠封部分藉由該末端表面或未由該膠封層所覆蓋的其之邊緣表面的部分的至少一個所定義;選擇性除去部分的該傳導層,以形成其之第一傳導元件,其中,該第一傳導元件中的至少一些電性連接該線接合中的至少一些以及該第一傳導元件中的至少一些包括與該微電子元件電性連接的該傳導層的部分中的至少一些;連結該第一微電子封裝與覆蓋該第一封裝的該膠封層的該第二表面的第二微電子封裝,該第二微電子封裝包括在其之一第一表面處暴露的複數個接點;其中連結該第一微電子封裝與該第二微電子封裝包括電性連接該第一微電子封裝的該線接合的該未膠封部分與該第二微電子封裝的該接點。
- 一種微電子封裝,包括:至少一個微電子元件; 第一電性傳導元件,包括在該封裝的一安裝表面處暴露的端子,該第一傳導元件中的至少一些透過與該第一傳導元件一體地形成的通孔電性連接到至少一個該微電子元件;線接合,具有連結到該傳導元件的個別者且鄰近該介電質膠封層的該第一表面之基底,以及遠離該基底的末端表面,各個線接合定義在其之基底和末端表面之間延伸的一邊緣表面;一介電質膠封層,具有一第一表面和遠離該第一表面的一第二表面,該第一表面的至少一部分被暴露在該封裝的該安裝表面處,該介電質膠封層填充在該線接合之間的空間,使得該線接合藉由該膠封層彼此分開,其中,該線接合的未膠封的部分藉由在其之該第二表面處未被該膠封層所覆蓋的該線接合的該邊緣表面的至少一部分所定義。
- 根據申請專利範圍第22項的微電子封裝,其中,該線接合的該未封裝部分中的至少一些係在從其之個別的基底的至少一個橫向方向中位移。
- 根據申請專利範圍第22項的微電子封裝,進一步包括一第二微電子元件,其中,該第一微電子元件包括暴露在其正面朝向該介電質層的該第一表面設置的接點,其中,該第二微電子元件包括暴露在其正面朝向該介電質層的該第二表面設置的接點。
- 根據申請專利範圍第22項的微電子封裝,進一步包括暴露在該膠封層的該第二表面處的第二傳導元件,其中,該第二傳導元件中的至少一些係在該第二微電子元件的該接點的個別者與該未膠封線接合部分的個別者之間連接。
- 根據申請專利範圍第25項的微電子封裝,其中,該第一和第二微電子元件係藉由與該第一微電子元件的至少一個接點和該第二微電子元件的至少一個接點電性連接的至少一個線接合所電性連接。
- 根據申請專利範圍第25項的微電子封裝,其中,該第二微電子元件藉由連結在該第二微電子元件的該接點的一者和該第二微電子元件的個別一者之間的一線接合連接第二傳導元件的一者。
- 根據申請專利範圍第22項的微電子封裝,其中,該第一和第二微電子元件藉由連結至該第二微電子元件的一接點與暴露在該膠封層的該第一表面處的該傳導元件的個別一者的線接合電性連接。
- 一種微電子組件,包括:如申請專利範圍第20項的一第一微電子封裝;以及一第二微電子封裝,其包括一微電子元件和在暴露於該第二微電子封裝的一表面處的端子,該端子電性連接該微電子元件;其中,該第二微電子封裝覆蓋該第一微電子封裝,且以電性連接到該第一微電子封裝的該線接合的該未膠封部分中的至少一些的其之端子與其接合。
- 一種系統,包括如申請專利範圍第22項的微電子封裝以及一個或多個電子構件。
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TWI685066B (zh) * | 2019-03-26 | 2020-02-11 | 力成科技股份有限公司 | 無基板半導體封裝結構及其製法 |
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US20190096803A1 (en) | 2019-03-28 |
US20130313716A1 (en) | 2013-11-28 |
TWI560788B (en) | 2016-12-01 |
CN104520987A (zh) | 2015-04-15 |
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TW201613001A (en) | 2016-04-01 |
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US9263413B2 (en) | 2016-02-16 |
JP2015517745A (ja) | 2015-06-22 |
TWI528477B (zh) | 2016-04-01 |
EP2852974A1 (en) | 2015-04-01 |
US20180233448A1 (en) | 2018-08-16 |
US8835228B2 (en) | 2014-09-16 |
US10510659B2 (en) | 2019-12-17 |
KR20150012285A (ko) | 2015-02-03 |
WO2013177134A1 (en) | 2013-11-28 |
CN104520987B (zh) | 2017-08-11 |
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