CN106981299A - 电源切换电路 - Google Patents
电源切换电路 Download PDFInfo
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- CN106981299A CN106981299A CN201710036121.5A CN201710036121A CN106981299A CN 106981299 A CN106981299 A CN 106981299A CN 201710036121 A CN201710036121 A CN 201710036121A CN 106981299 A CN106981299 A CN 106981299A
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- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
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- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
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Abstract
电源切换电路,包括:一第一晶体管、第二晶体管与一电流源。第一晶体管的一第一源漏端与一栅极端分别接收一第一供应电压与一第二供应电压,一第二源漏端与一体极端连接至一节点z,且该节点z产生一输出信号。一第二晶体管的一第一源漏端与一栅极端分别接收该第二供应电压与该第一供应电压,一第二源漏端与一体极端连接至该节点z。一电流源连接于一偏压电压与该节点z之间。该第一供应电压、该第二供应电压或者该偏压电压可被选择成为该输出信号。
Description
技术领域
本发明涉及一种电源切换电路,且特别涉及一种运用于非易失性存储器的电源切换电路。
背景技术
众所周知,非易失性存储器可在电源消失之后,仍可保存数据,因此非易失性存储器已经广泛的运用于电子产品中。再者,非易失性存储器中包括多个非易失性记忆胞(non-Volatile cell)排列而成非易失性记忆胞阵列(non-Volatile cell array),而每个非易失性记忆胞中皆包含一浮动门晶体管(floating gate transistor)。
请参照图1,其所绘示为易失性存储器示意图。非易失性存储器中包括一非易失性记忆胞阵列110与一电源切换电路(power switch circuit)120。其中,电源切换电路120连接至非易失性记忆胞阵列110。电源切换电路120接收多个供应电压(supply voltage),并可在不同运作模式下输出适当的供应电压作为输出信号Vs,并提供至非易失性记忆胞阵列110。
举例来说,电源切换电路120接收第一供应电压与第二供应电压。于非易失性记忆胞阵列的抹除模式(erase mode)时,电源切换电路120提供第一供应电压至非易失性记忆胞阵列110。再者,在编程模式(program mode)时,提供第二供应电压至非易失性记忆胞阵列110。
发明内容
本发明涉及一种电源切换电路,包括:一第一晶体管,具有一第一源漏端接收一第一供应电压,一第二源漏端连接至一节点z,一栅极端接收一第二供应电压,一体极端连接至该节点z,其中该节点z产生一输出信号;一第二晶体管,具有一第一源漏端接收该第二供应电压,一第二源漏端连接至该节点z,一栅极端接收该第一供应电压,一体极端连接至该节点z;以及一电流源,连接于一偏压电压与该节点z之间;其中,当该第一供应电压小于该第二供应电压时,该输出信号等于该第一供应电压;当该第一供应电压大于该第二供应电压时,该输出信号等于该第二供应电压;当该第一供应电压等于该第二供应电压时,该输出信号等于该偏压电压。
本发明涉及一种电源切换电路,包括:一第一晶体管,具有一第一源漏端接收一第一供应电压,一第二源漏端连接至一节点z,一栅极端接收一第二供应电压,一体极端连接至该节点z,其中该节点z产生一输出信号;一第二晶体管,具有一第一源漏端接收该第二供应电压,一第二源漏端连接至该节点z,一栅极端接收该第一供应电压,一体极端连接至该节点z;一第三晶体管,具有一第一源漏端接收一偏压电压,一第二源漏端连接至该节点z,一栅极端接收一转换信号,一体极端连接至该节点z;一自动选择电路,接收该第一供应电压与该第二供应电压,并产生一输出电压,其中当该第一供应电压小于该第二供应电压时,该输出电压等于该第一供应电压;以及当该第一供应电压大于该第二供应电压时,该输出电压等于该第二供应电压;以及一电平转换器,接收该输出电压,其中该电平转换器根据该输出电压与一控制信号,将该控制信号转换为该转换信号。
本发明涉及一种电源切换电路,包括:一第一晶体管,具有一第一源漏端接收一第一供应电压,一第二源漏端连接至一节点w,一栅极端接收一第一转换信号,其中该节点w产生一输出信号;一第二晶体管,具有一第一源漏端接收该第二供应电压,一第二源漏端连接至该节点w,一栅极端接收一第二转换信号;一第一自动选择电路,接收该第一供应电压与该第二供应电压,并产生一输出电压,其中当该第一供应电压小于该第二供应电压时,该输出电压等于该第一供应电压;以及当该第一供应电压大于该第二供应电压时,该输出电压等于该第二供应电压;一第一电平转换器,接收该输出电压,其中该第一电平转换器根据该输出电压与一第一控制信号,将该第一控制信号转换为该第一转换信号;以及一第二电平转换器,接收该输出电压,其中该第二电平转换器根据该输出电压与一第二控制信号,将该第二控制信号转换为该第二转换信号。
为了对本发明的上述及其他方面有更佳的了解,下文特举优选实施例,并配合附图,作详细说明如下:
附图说明
图1所绘示为易失性存储器示意图。
图2A所绘示为自动选择电路。
图2B所绘示为自动选择电路10的真值表。
图3A所绘示为本发明电源切换电路的第一实施例。
图3B所绘示为第一实施例电源切换电路的真值表。
图4所绘示为本发明电源切换电路的第二实施例。
图5A所绘示为本发明电源切换电路的第三实施例。
图5B所绘示为第三实施例切换电路的真值表。
图6A所绘示为本发明电源切换电路的第四实施例。
图6B所绘示为第四实施例电平转换器的真值表。
图7所绘示为本发明电源切换电路的第五实施例。
图8所绘示为本发明电源切换电路的第六实施例。
图9所绘示为本发明电源切换电路的第七实施例。
图10所绘示为本发明电源切换电路的第八实施例。
图11所绘示为本发明电源切换电路的第九实施例。
【符号说明】
110:非易失性记忆胞
120、300、400、500、600、650、700、800:电源切换电路
10、310、320、640、654、710、720:自动选择电路
330、620、630、652、810:电平转换器
410、910:控制电路
412、912:与门
414、416、510、914、916、952:电流源
900、950:电源切换电路
具体实施方式
请参照图2A,其所绘示为自动选择电路。自动选择电路10包括二个n型晶体管ma、mb。晶体管ma的第一源漏端(source/drain terminal)连接至节点x、第二源漏端连接至节点z、栅极端连接至节点y、体极端(body terminal)连接至节点z。晶体管mb的第一源漏端连接至节点y、第二源漏端连接至节点z、栅极端连接至节点x、体极端连接至节点z。再者,节点x与节点y为自动选择电路10的二输入端,分别接收供应电压Vp1与Vp2;节点z为自动选择电路10的输出端,可以选择性地将二个供应电压Vp1与Vp2其中之一作为输出信号Vs。
在本发明的实施例中,供应电压Vp1与Vp2的电压值小于等于零。而自动选择电路10可以自动地选择二个供应电压Vp1与Vp2中较小的电压做为输出信号Vs。当然,自动选择电路10的二个供应电压Vp1与Vp2的电压值也可大于零,而自动选择电路10也可以自动地选择二个供应电压Vp1与Vp2中较小的电压做为输出信号Vs。
请参照图2B,其所绘示为自动选择电路10的真值表。当供应电压Vp1为0V且供应电压Vp2为-4V时,晶体管mb开启(turn on)且晶体管ma关闭(turnoff),较低的供应电压Vp2(-4V)即成为输出信号Vs。再者,当供应电压Vp1为-6V且供应电压Vp2为-4V时,晶体管ma开启且晶体管mb关闭,较低的供应电压Vp1(-6V)即成为输出信号Vs。
由于自动选择电路10输出信号Vs为二个供应电压Vp1与Vp2中较小的电压。因此,将输出信号Vs作为晶体管ma与mb的体极端电压,可以消除晶体管ma与mb的基体效应(bodyeffect)。
另外,当二供应电压Vp1、Vp2皆相同,或者一个供应电压未提供时,输出信号Vs的电压值可能约为0V的浮接状态(floating)。在此状况下,输出信号Vs约为供应电压减去Vtn。其中,Vtn为晶体管ma与mb的临限电压(threshold Voltage)。
如图2B所示,当供应电压Vp1、Vp2皆为0V时,其输出信号Vs为0-Vtn。当供应电压Vp1为0V且节点y成为浮接状态(意即,未提供供应电压Vp2)时,其输出信号Vs为0-Vtn。
请参照图3A,其所绘示为本发明电源切换电路的第一实施例。电源切换电路300包括:自动选择电路310、320,一电平转换器(level shifter)330与一n型晶体管mc。其中,自动选择电路310、320的电路结构与图2A相同。
自动选择电路310接收二个供应电压Vp1与Vp2,并将较低的供应电压作为输出信号(output signal)Vs。另外,自动选择电路320接收二个供应电压Vp1与Vp2,并将较低的供应电压作为输出电压(output voltage)Vx,并作为电平转换器330的电压源(voltagesource)。
电平转换器330接收逻辑电平的控制信号EN_mc并根据电压源Vx与控制信号EN_mc来降转(shift down)控制信号EN_mc成为转换信号(shifted signal)Sc。举例来说,当控制信号EN_mc为3.3V的逻辑高电平时,电平转换器330产生3.3V的转换信号Sc;当控制信号EN_mc为0V的逻辑低电平时,电平转换器330产生相同于电压源Vx的转换信号Sc。
根据本发明的实施例,当供应电压Vp1与Vp2不相同时,控制信号EN_mc为逻辑低电平;当供应电压Vp1与Vp2相同时,控制信号EN_mc为逻辑高电平;以及,当供应电压Vp1与Vp2其中之一为浮接状态时,控制信号EN_mc为逻辑高电平。
再者,晶体管mc的第一源漏端接收一偏压电压Vbias、第二源漏端与体极端连接至电源切换电路300的输出端(亦即节点z),栅极端接收转换信号Sc。其中,偏压电压Vbias可为供应电压Vp1与Vp2其中之一。
请参照图3B,其所绘示为第一实施例电源切换电路300的真值表。当供应电压Vp1为0V且供应电压Vp2为-4V时,控制信号EN_mc为逻辑低电平(Lo=0V),转换信号Sc为-4V,使得晶体管mc关闭。再者,晶体管mb开启且晶体管ma关闭,较低的供应电压Vp2(-4V)即成为输出信号Vs。
再者,当供应电压Vp1为-6V且供应电压Vp2为-4V时,控制信号EN_mc为逻辑低电平(Lo=0V),转换信号Sc为-6V,使得晶体管mc关闭。再者,晶体管ma开启且晶体管mb关闭,较低的供应电压Vp1(-6V)即成为输出信号Vs。
当二供应电压Vp1、Vp2相同时,晶体管ma与晶体管mb皆关闭。再者,控制信号EN_mc为逻辑高电平(Hi=3.3V),转换信号Sc为3.3V,使得晶体管mc开启,偏压电压Vbias即成为输出信号Vs。
当供应电压Vp2为浮接状态时,晶体管ma与晶体管mb皆关闭。再者,控制信号EN_mc为逻辑高电平(Hi=3.3V),转换信号Sc为3.3V,使得晶体管mc开启,偏压电压Vbias即成为输出信号Vs。其中,上述的偏压电压Vbias可为供应电压Vp1与Vp2其中之一,例如0V。
换句话说,本发明第一实施例的电源切换电路300可以自动地选择较低的供应电压作为输出信号Vs。并且,也可以在二供应电压Vp1、Vp2相同时,防止输出信号Vs成为浮接状态。
请参照图4,其所绘示为本发明电源切换电路的第二实施例。相较于图3A第一实施例的电源切换电路300,第二实施例电源切换电路400还包括一控制电路410用以产生逻辑电平的控制信号EN_mc。
控制电路410包括晶体管md、me,电流源(current source)414、416,与门(ANDgate)412。其中,电流源414连接于电压源Vdd与节点a之间。晶体管md第一源漏端与体极端接收供应电压Vp1,第二源漏端连接至节点a,栅极端接收供应电压Vp2。电流源416连接于电压源Vdd与节点b之间。晶体管me第一源漏端与体极端接收供应电压Vp2,第二源漏端连接至节点b,栅极端接收供应电压Vp1。与门412的二输入端分别连接至节点a、b,输出端产生逻辑电平的控制信号EN_mc。其中,电压源Vdd的电压值为3.3V。再者,偏压电压Vbias可为供应电压Vp1与Vp2其中之一。
当供应电压Vp1与Vp2不相同时,晶体管md与me其中之一会开启,另一个晶体管则关闭。举例来说,当供应电压Vp1为0V且供应电压Vp2为-4V时,晶体管me开启且晶体管md关闭。因此,节点a为逻辑高电平,节点b为逻辑低电平,与门412输出逻辑低电平的控制信号EN_mc。
当供应电压Vp1与Vp2相同时,晶体管md与me皆关闭。举例来说,当供应电压Vp1为0V且供应电压Vp2为0V时,晶体管me、md关闭。因此,节点a与节点b为逻辑高电平,与门412输出逻辑高电平的控制信号EN_mc。
同理,当供应电压Vp1与Vp2其中之一为浮接状态时,晶体管md与me皆关闭,且与门412输出逻辑高电平的控制信号EN_mc。
第二实施例的电源切换电路400的真值表相同于图3B,此处不再赘述。相同地,本发明第二实施例的电源切换电路400可以自动地选择较低的供应电压作为输出信号Vs。并且,也可以在二供应电压Vp1、Vp2相同时,防止输出信号Vs成为浮接状态。
请参照图5A,其所绘示为本发明电源切换电路的第三实施例。电源切换电路500包括:弱电流源(weak current source)510以及自动选择电路310。其中,自动选择电路310的电路结构与图2A相同。弱电流源510连接于偏压电源Vbias与自动选择电路310的输出端(节点z)之间。第三实施例的电源切换电路500也可以在二供应电压Vp1、Vp2相同时,防止输出信号Vs成为浮接状态。
请参照图5B,其所绘示为第三实施例切换电路500的真值表。当供应电压Vp1为0V且供应电压Vp2为-4V时,晶体管mb开启(turn on)且晶体管ma关闭(turn off),较低的供应电压Vp2(-4V)即成为输出信号Vs。
再者,当供应电压Vp1为-6V且供应电压Vp2为-4V时,晶体管ma开启且晶体管mb关闭,较低的供应电压Vp1(-6V)即成为输出信号Vs。
另外,当二供应电压Vp1、Vp2皆相同,或者一个供应电压未提供时,晶体管ma、mb皆关闭。此时,弱电流源510所提供的弱电流可对节点z进行充电(charge),使得节点z维持在偏压电源Vbias,而不会呈现浮接状态。再者,偏压电压Vbias可以等于二个供应电压Vp1、Vp2其中之一。
换句话说,本发明第三实施例的电源切换电路500可以自动地选择较低的供应电压作为输出信号Vs。并且,也可以在二供应电压Vp1、Vp2相同时,防止输出信号Vs成为浮接状态。
请参照图6A,其所绘示为本发明电源切换电路的第四实施例。电源切换电路300包括:n型晶体管m1、m2,电平转换器620、630,与自动选择电路640。其中,电源切换电路接收二个控制信号EN_m1与EN_m2,并选择性地将供应电压Vp1或者供应电压Vp2作为输出信号Vs。其中,控制信号EN_m1与EN_m2的逻辑高电平为3.3V,逻辑低电平为0V。
再者,自动选择电路640接收二个供应电压Vp1与供应电压Vp2,并将较低的供应电压作为输出电压Vx,并作为电平转换器620、630的电压源。其中,自动选择电路640与图2A相同,详细电路不再赘述。
电平转换器620接收逻辑电平的控制信号EN_m1,并根据电压源Vx与控制信号EN_m1来降转(shift down)控制信号EN_m1。举例来说,当控制信号EN_m1为3.3V的逻辑高电平时,电平转换器620产生3.3V的转换信号S1;当控制信号EN_m1为0V的逻辑低电平时,电平转换器620产生相同于电压源Vx的转换信号S1。
再者,电平转换器630接收逻辑电平的控制信号EN_m2,并根据电压源Vx与控制信号EN_m2来降转(shift down)控制信号EN_m2。举例来说,当控制信号EN_m2为3.3V的逻辑高电平时,电平转换器630产生3.3V的转换信号S2;当控制信号EN_m2为0V的逻辑低电平时,电平转换器330产生相同于电压源Vx的转换信号S2。
电源切换电路600中,晶体管m1的第一源漏端接收供应电压Vp1、第二源漏端连接至节点w、栅极端接收转换信号S1。晶体管m2的第一源漏端接收供应电压Vp2、第二源漏端连接至节点w、栅极端接收转换信号S2。再者,节点w产生输出信号Vs。在此实施例中,晶体管m1与晶体管m2的体极端也可以接收电压源Vx。
根据本发明的第四实施例,供应电压Vp1与Vp2为小于等于零的电压。请参照图6B,其所绘示为第四实施例电平转换器600的真值表。当供应电压Vp1小于供应电压Vp2时,自动选择电路640的输出电压Vx等于供应电压Vp1。例如,供应电压Vp1为-4V且供应电压Vp2为0V时,自动选择电路640的输出电压Vx为-4V。再者,根据快闪记忆胞阵列的各种不同操作动作,例如抹除动作时,控制信号EN_m1为3.3V的逻辑高电平,且控制信号EN_m2为0V的逻辑低电平时,转换信号S1为3.3V使得晶体管m1开启,转换信号S2为-4V使得晶体管m2关闭。因此,电源切换电路600将供应电压Vp1作为输出信号Vs,意即输出信号Vs等于-4V。
再者,在快闪记忆胞阵列的另一种操作动作,例如读取动作时,控制信号EN_m1为0V的逻辑低电平,且控制信号EN_m2为3.3V的逻辑高电平,转换信号S1为-4V使得晶体管m1关闭,转换信号S2为3.3V使得晶体管m2开启。因此,电源切换电路600将供应电压Vp2作为输出信号Vs,意即输出信号Vs等于0V。
当供应电压Vp1大于供应电压Vp2时,自动选择电路640的输出电压Vx等于供应电压Vp2。在其他的应用上,供应电压Vp1与供应电压Vp2其中之一是由内部泵浦电路(pumpingcircuit)所提供,而其中另一则是由外部所提供。例如,供应电压Vp1为-4V且供应电压Vp2为-6V时,自动选择电路640的输出电压Vx为-6V。再者,当控制信号EN_m1为3.3V的逻辑高电平,且控制信号EN_m2为0V的逻辑低电平时,转换信号S1为3.3V使得晶体管m1开启,转换信号S2为-6V使得晶体管m2关闭。因此,电源切换电路600将供应电压Vp1作为输出信号Vs,意即输出信号Vs等于-4V。
再者,当控制信号EN_m1为0V的逻辑低电平,且控制信号EN_m2为3.3V的逻辑高电平时,转换信号S1为-6V使得晶体管m1关闭,转换信号S2为3.3V使得晶体管m2开启。因此,电源切换电路600将供应电压Vp2作为输出信号Vs,意即输出信号Vs等于-6V。
请参照图7,其所绘示为本发明电源切换电路的第四实施例。电源切换电路650包括:一n型晶体管m1、一电平转换器652与一自动选择电路654。电源切换电路650接收逻辑电平的控制信号EN_m1并选择性地将供应电压Vp1作为输出信号(output signal)Vs。控制信号EN_mc的逻辑高电平为3.3V,控制信号EN_mc的逻辑低电平为0V。
在此实施例中,自动选择电路654接收供应电压Vp1与输出信号Vs,并选择二者之中较低者为输出电压Vx,并作为晶体管m1的体极端电压。当然,自动选择电路654的输出电压Vx出电压也作为电平转换器652的电压源。再者,自动选择电路654的电路结构与图2A相同。
在此实施例中,自动选择电路654接收供应电压Vp1与输出信号Vs,并选择二者之中较低者为输出电压Vx作为体极端电压,并传递至晶体管m1的体极端。因此,可以消除晶体管m1的基体效应。
请参照图8,其所绘示为本发明电源切换电路的第六实施例。相较于图6A第四实施例的电源切换电路600,第六实施例的电源切换电路700更增加自动选择电路710、720。再者,自动选择电路710、720的详细电路与图2A相同。此处仅介绍第六实施例电源切换电路700内部自动选择电路710、720的运作。
根据本发明的第六实施例,自动选择电路710接收供应电压Vp1与输出信号Vs,并将较低的电压传递至晶体管m1的体极端,作为晶体管m1的体极电压Vm1b。而自动选择电路720接收供应电压Vp2与输出信号Vs,并将较低的电压传递至晶体管m2的体极端,作为晶体管m2的体极电压Vm2b。因此,可以消除晶体管m1与m2的基体效应(body effect)。
再者,第六实施例电源切换电路700的真值表相同于图6B,此处不再赘述。
请参照图9,其所绘示为本发明电源切换电路的第七实施例。相较于图8的第六实施例电源切换电路700,第七实施例的电源切换电路800更增加一n型晶体管m3与一电平转换器810。第七实施例的电源切换电路800用来防止控制信号EN_m1、EN_m2皆为逻辑低电平而造成节点w呈现浮接状态(floating)。说明如下。
根据本发明的第七实施例,电平转换器810接收控制信号EN_m3,并根据电压源Vx来降转控制信号EN_m3。举例来说,当控制信号EN_m3为3.3V的逻辑高电平时,电平转换器810产生3.3V的转换信号S3;当控制信号EN_m3为0V的逻辑低电平时,电平转换器810产生相同于电压源Vx的转换信号S3。
再者,晶体管m3的第一源漏端接收一偏压电压Vbias,第二源漏端连接至节点w,栅极端接收转换信号S3,体极端接收自动选择电路640的输出电压Vx。
当控制信号EN_m1与控制信号EN_m2为逻辑低电平时,控制信号EN_m3为逻辑高电平。因此,当控制信号EN_m1、EN_m2皆为逻辑低电平,并使得晶体管m1、m2皆关闭时,转换信号S3开启晶体管m3,使得节点w维持在偏压电源Vbias,而不会呈现浮接状态。再者,偏压电压Vbias可以等于二个供应电压Vp1、Vp2其中之一。
请参照图10,其所绘示为本发明电源切换电路的第八实施例。相较于图9第七实施例的电源切换电路800,第八实施例电源切换电路900还包括一控制电路910用以产生逻辑电平的控制信号EN_m3。
控制电路910包括晶体管m4、m5,电流源(current source)914、916,与门912。其中,电流源914连接于电压源Vdd与节点c之间。晶体管m4第一源漏端与体极端接收供应电压Vp1,第二源漏端连接至节点c,栅极端接收供应电压Vp2。电流源916连接于电压源Vdd与节点d之间。晶体管m5第一源漏端与体极端接收供应电压Vp2,第二源漏端连接至节点d,栅极端接收供应电压Vp1。与门912的二输入端分别连接至节点c、d,输出端产生逻辑电平的控制信号EN_mc。其中,电压源Vdd的电压值为3.3V。
当供应电压Vp1与Vp2相同且控制信号EN_m1、EN_m2皆为逻辑低电平,晶体管m1、m2关闭。举例来说,当供应电压Vp1为0V且供应电压Vp2为0V时,晶体管m4、m5关闭。因此,节点c与节点d为逻辑高电平,与门912输出逻辑高电平的控制信号EN_m3。
再者,当控制信号EN_m3为逻辑高电平时,转换信号S3开启晶体管m3,使得节点w维持在偏压电源Vbias,而不会呈现浮接状态。再者,偏压电压Vbias可以等于二个供应电压Vp1、Vp2其中之一。
请参照图11,其所绘示为本发明电源切换电路的第九实施例。相较于图8第六实施例的电源切换电路700,第九实施例的电源切换电路950更增加一弱电流源(weak currentsource)952。用以防止控制信号EN_m1、EN_m2皆为逻辑低电平而造成节点w呈现浮接状态(floating)。说明如下。
根据本发明的第九实施例,弱电流源952连接于偏压电源Vbias与节点w之间。当控制信号EN_m1、EN_m2皆为逻辑低电平,并使得晶体管m1、m2皆关闭时,弱电流源952所提供的弱电流可对节点w进行充电(charge),使得节点w维持在偏压电源Vbias,而不会呈现浮接状态。再者,偏压电压Vbias可以等于二个供应电压Vp1、Vp2其中之一。
由以上的说明可知,本发明提出一种电源切换电路,在第一实施例至第三实施例中,电源切换电路可以自动地在多个供应电压中选择电压值最低的供应电压作为输出信号,并且可以防止输出信号呈现浮接状态。在第四实施例至第九实施例中,电源切换电路可以根据控制信号来选择多个供应电压中之一,并作为输出信号,并且也可以防止输出信号呈现浮接状态。
再者,在此领域的技术人员,可以根据以上的实施例所公开的内容进行修改并达成本发明的目的。举例来说,在此领域的技术人员可以省略第六实施例至第九实施例的自动选择电路710、720,仍可以达成本发明的目的。
综上所述,虽然本发明已以优选实施例公开如上,然其并非用以限定本发明。本发明所属领域技术人员在不脱离本发明的精神和范围内,当可作各种的更动与润饰。因此,本发明的保护范围当视所附权利要求书界定范围为准。
Claims (17)
1.一种电源切换电路,包括:
第一晶体管,具有第一源漏端接收第一供应电压,第二源漏端连接至节点z,栅极端接收第二供应电压,体极端连接至该节点z,其中该节点z产生输出信号;
第二晶体管,具有第一源漏端接收该第二供应电压,第二源漏端连接至该节点z,栅极端接收该第一供应电压,体极端连接至该节点z;以及
电流源,连接于偏压电压与该节点z之间;
其中,当该第一供应电压小于该第二供应电压时,该输出信号等于该第一供应电压;当该第一供应电压大于该第二供应电压时,该输出信号等于该第二供应电压;当该第一供应电压等于该第二供应电压时,该输出信号等于该偏压电压。
2.如权利要求1所述的电源切换电路,其中该偏压电压等于该第一供应电压或者该偏压电压等于该第二供应电压。
3.如权利要求1所述的电源切换电路,其中该第一晶体管与该第二晶体管为n型晶体管,且该电流源为弱电流源。
4.一种电源切换电路,包括:
第一晶体管,具有第一源漏端接收第一供应电压,第二源漏端连接至节点z,栅极端接收第二供应电压,体极端连接至该节点z,其中该节点z产生输出信号;
第二晶体管,具有第一源漏端接收该第二供应电压,第二源漏端连接至该节点z,栅极端接收该第一供应电压,体极端连接至该节点z;
第三晶体管,具有第一源漏端接收偏压电压,第二源漏端连接至该节点z,栅极端接收转换信号,体极端连接至该节点z;
自动选择电路,接收该第一供应电压与该第二供应电压,并产生输出电压,其中当该第一供应电压小于该第二供应电压时,该输出电压等于该第一供应电压;以及当该第一供应电压大于该第二供应电压时,该输出电压等于该第二供应电压;以及
电平转换器,接收该输出电压,其中该电平转换器根据该输出电压与控制信号,将该控制信号转换为该转换信号。
5.如权利要求4所述的电源切换电路,其中该偏压电压等于该第一供应电压或者该偏压电压等于该第二供应电压。
6.如权利要求4所述的电源切换电路,其中该第一晶体管、该第二晶体管与该第三晶体管为n型晶体管。
7.如权利要求4所述的电源切换电路,其中该自动选择电路包括:
第四晶体管,具有第一源漏端接收该第一供应电压,第二源漏端产生该输出电压,栅极端接收该第二供应电压,体极端连接至该第二源漏端;以及
第五晶体管,具有第一源漏端接收该第二供应电压,第二源漏端与体极端连接至该第四晶体管的该第二源漏端,栅极端接收该第一供应电压。
8.如权利要求4所述的电源切换电路,还包括:
第四晶体管,具有第一源漏端与体极端接收该第一供应电压,第二源漏端连接至节点a,栅极端接收该第二供应电压;
第五晶体管,具有第一源漏端与体极端接收该第二供应电压,第二源漏端连接至节点b,栅极端接收该第一供应电压;
第一电流源,连接于电压源与该节点a之间;
第二电流源,连接于该电压源与该节点b之间;以及
与门,具有二输入端分别连接至该节点a与该节点b,并产生该控制信号。
9.一种电源切换电路,包括:
第一晶体管,具有第一源漏端接收第一供应电压,第二源漏端连接至节点w,栅极端接收第一转换信号,其中该节点w产生输出信号;
第二晶体管,具有第一源漏端接收该第二供应电压,第二源漏端连接至该节点w,栅极端接收第二转换信号;
第一自动选择电路,接收该第一供应电压与该第二供应电压,并产生输出电压,其中当该第一供应电压小于该第二供应电压时,该输出电压等于该第一供应电压;以及当该第一供应电压大于该第二供应电压时,该输出电压等于该第二供应电压;
第一电平转换器,接收该输出电压,其中该第一电平转换器根据该输出电压与第一控制信号,将该第一控制信号转换为该第一转换信号;以及
第二电平转换器,接收该输出电压,其中该第二电平转换器根据该输出电压与第二控制信号,将该第二控制信号转换为该第二转换信号。
10.如权利要求9所述的电源切换电路,其中该第一晶体管与该第二晶体管为n型晶体管。
11.如权利要求9所述的电源切换电路,其中该第一自动选择电路包括:
第三晶体管,具有第一源漏端接收该第一供应电压,第二源漏端产生该输出电压,栅极端接收该第二供应电压,体极端连接至该第二源漏端;以及
第四晶体管,具有第一源漏端接收该第二供应电压,第二源漏端与体极端连接至该三晶体管的该第二源漏端,栅极端接收该第一供应电压。
12.如权利要求9所述的电源切换电路,还包括:
第二自动选择电路,接收该第一供应电压与该输出信号,并产生第一体极电压传送至该第一晶体管的体极端,其中当该第一供应电压小于该输出信号时,该第一体极电压等于该第一供应电压;以及当该第一供应电压大于该输出信号时,该第一体极电压等于该输出信号;以及
第三自动选择电路,接收该第二供应电压与该输出信号,并产生第二体极电压传送至该第二晶体管的体极端,其中当该第二供应电压小于该输出信号时,该第二体极电压等于该第二供应电压;以及当该第二供应电压大于该输出信号时,该第二体极电压等于该输出信号。
13.如权利要求9所述的电源切换电路,还包括:
第三晶体管,具有第一源漏端接收偏压电压,第二源漏端连接至该节点w,栅极端接收第三转换信号(S3);
第三电平转换器,接收该输出电压,其中该第三电平转换器根据该输出电压与第三控制信号,将该第三控制信号转换为该第三转换信号;
其中,当该第一控制信号与该第二控制信号为第一逻辑电平时,该第三控制信号为第二逻辑电平。
14.如权利要求13所述的电源切换电路,其中该偏压电压等于该第一供应电压或者该偏压电压等于该第二供应电压。
15.如权利要求13所述的电源切换电路,还包括:
第四晶体管,具有第一源漏端与体极端接收该第一供应电压,第二源漏端连接至节点c,栅极端接收该第二供应电压;
第五晶体管,具有第一源漏端与体极端接收该第二供应电压,第二源漏端连接至节点d,栅极端接收该第一供应电压;
第一电流源,连接于电压源与该节点c之间;
第二电流源,连接于该电压源与该节点d之间;以及
与门,具有二输入端分别连接至该节点c与该节点d,并产生该第三控制信号。
16.如权利要求9所述的电源切换电路,还包括:
弱电流源,连接于偏压电压与该节点w之间。
17.如权利要求16所述的电源切换电路,其中该偏压电压等于该第一供应电压或者该偏压电压等于该第二供应电压。
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