TWI578322B - 電壓切換電路 - Google Patents

電壓切換電路 Download PDF

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Publication number
TWI578322B
TWI578322B TW105121411A TW105121411A TWI578322B TW I578322 B TWI578322 B TW I578322B TW 105121411 A TW105121411 A TW 105121411A TW 105121411 A TW105121411 A TW 105121411A TW I578322 B TWI578322 B TW I578322B
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Taiwan
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voltage
transistor
source
node
receives
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TW105121411A
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TW201727651A (zh
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柏正豪
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力旺電子股份有限公司
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
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    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G11C16/0458—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates comprising two or more independent floating gates which store independent data
    • G—PHYSICS
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    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
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    • G11C16/20—Initialising; Data preset; Chip identification
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    • G11C16/00—Erasable programmable read-only memories
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    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
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    • G11C16/26—Sensing or reading circuits; Data output circuits
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    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
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    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
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    • G11—INFORMATION STORAGE
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    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
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    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
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    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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Description

電壓切換電路
本發明是有關於一種切換電路，且特別是有關於一種運用於非揮發性記憶體的電壓切換電路。
眾所周知，非揮發性記憶體可在電源消失之後，仍可保存資料，因此非揮發性記憶體已經廣泛的運用於電子產品中。再者，非揮發性記憶體係由多個記憶胞(memory cell)排列而成記憶胞陣列(memory cell array)，而每個記憶胞中皆包含一浮動閘電晶體(floating gate transistor)。
基本上，於編程模式(program mode)時，記憶胞陣列會接收一高電壓(high voltage)，使得選定記憶胞(selected memory cell)中浮動閘電晶體的浮動閘極(floating gate)被注入(inject)熱載子(hot carrier)。
同理，於抹除模式(erase mode)時，記憶胞陣列也會接收高電壓(high voltage)，用以退出(eject)選定記憶胞內浮動閘電晶體的浮動閘極所儲存之熱載子。
由於在編程模式與抹除模式時，選定記憶胞皆需要接收高電壓用來控制熱載子的注入或者退出。因此，在非揮發性 記憶體中需要有一電壓切換電路(voltage switch circuit)，並於不同的工作模式時提供各種操作電壓至記憶胞陣列。
一般來說，上述的高電壓(例如18V)係遠高於一般邏輯電路中5V、3.3V或1.8V的邏輯準位。因此，電壓切換電路需要經過特別的設計才能夠運用於非揮發性記憶體。例如美國專利US9,224,490揭露一種運用於非揮發性記憶體的電壓切換電路。
本發明之主要目的係提出一種運用於非揮發性記憶體中的電壓切換電路，根據非揮發性記憶體的工作模式，提供對應的操作電壓至非揮發性記憶體的記憶胞陣列。
本發明係有關於一種電壓切換電路，連接至一非揮發性記憶體的一記憶胞，該電壓切換電路包括：一第一電晶體，源極連接至一第一電壓源，閘極連接至一節點a1；一第二電晶體，源極連接至該第一電壓源，閘極連接至一節點b1；一第三電晶體，源極連接至該第一電晶體的汲極，閘極接收一致能信號，汲極連接至一節點a2；一第四電晶體，源極連接至該第二電晶體的汲極，閘極接收該致能信號，汲極連接至一節點b2；一第五電晶體，源極連接至該節點a2，閘極連接至一第二電壓源，汲極連接至一第一輸出端；一第六電晶體，源極連接至該節點b2，閘極連接至一第三電壓源，汲極連接至一第二輸出端；一第七電晶體，源極連接至一第四電壓源，閘極連接至該第二輸出端，汲極 連接至該節點a2；一第一控制電路，連接至該節點a1、該節點b1與該節點a2；以及一第二控制電路，連接至該第一輸出端與該第二輸出端；其中，於該非揮發性記憶體的一編程模式以及一抹除模式時，該第一電壓源提供一高電壓、該第二電壓源提供一中間電壓或者一接地電壓、該第三電壓源提供一控制電壓、且該第四電壓源提供該中間電壓；其中，於該非揮發性記憶體的一讀取模式時，該第一電壓源、該第二電壓源、該第三電壓源提供一邏輯高準位，該第四電壓源提供該接地電壓；其中，該高電壓大於該中間電壓，且該中間電壓大於該邏輯高準位；以及該控制電壓介於該高電壓與該中間電壓之間。
為了對本發明之上述及其他方面有更佳的瞭解，下文特舉較佳實施例，並配合所附圖式，作詳細說明如下：
100、200‧‧‧電壓切換電路
110、210‧‧‧第一控制電路
120‧‧‧第二控制電路
第1A圖與第1B圖所繪示為本發明電壓切換電路的第一實施例及其相關表列信號示意圖。
第2圖所繪示為本發明電壓切換電路的第二實施例示意圖。
第一實施例
請參照第1A圖，其所繪示為本發明電壓切換電路的第一實施例。電壓切換電路100的二個輸出端CL與EL係連接至非揮發性記憶體的記憶胞。並且，根據非揮發性記憶體的操作 模式，電壓切換電路100的二個輸出端CL與EL可供應對應的操作電壓至非揮發性記憶體的記憶胞。
電壓切換電路100包括第一控制電路110、第二控制電路以及多個p型電晶體Ml1、Ml2、Ml3、Mr1、Mr2、Mr3、Mx。第一控制電路110包括多個p型電晶體Mc1、Mc2、Mc3與Mc4。第二控制電路120包括N型電晶體Ml4、Ml5、Ml6、Mr4、Mr5與Mr6。其中，電晶體Ml4、Mr4為耐高壓的輕摻雜N型電晶體(n lightly doped transistor)。
電壓切換電路100中，電晶體Ml1源極連接至第一電壓源Vpp1、閘極連接至節點a1；電晶體Ml2源極連接至電晶體Ml1汲極、閘極接收致能信號En、汲極連接至節點a2；電晶體Ml3源極連接至節點a2、閘極連接至第二電壓源Vpp2、汲極連接至第一輸出端CL。
再者，電晶體Mr1源極連接至第一電壓源Vpp1、閘極連接至節點b1；電晶體Mr2源極連接至電晶體Mr1汲極、閘極接收致能信號En、汲極連接至節點b2；電晶體Mr3源極連接至節點b2、閘極連接至第三電壓源Vpp3、汲極連接至第二輸出端EL。
電晶體Mx源極連接至第四電壓源Vpp4，汲極連接至節點a2，閘極連接至第二輸出端EL。
再者，第一控制電路110中，電晶體Mc1源極連接至偏壓電壓Vbias、閘極接收第一控制信號Vc1、汲極連接至節 點a1；電晶體Mc2源極連接至第一電壓源Vpp1、閘極接收第二控制信號Vc2、汲極連接至節點a1；電晶體Mc3源極連接至偏壓電壓Vbias、閘極接收第三控制信號Vc3、汲極連接至節點b1；電晶體Mc4源極連接至節點a2、閘極接收第四控制信號Vc4、汲極連接至節點b1。
再者，第二控制電路120中，電晶體Ml4汲極連接至第一輸出端CL、閘極接收邏輯高準位VDD、源極連接至節點a3；電晶體Ml5汲極連接至節點a3、閘極接收抹除信號Ers、源極接收反相抹除信號Ersb；電晶體Ml6汲極連接至節點a3、閘極接收讀取信號Rd、源極接收讀取電壓VPR。再者，電晶體Mr4汲極連接至第二輸出端EL、閘極接收邏輯高準位VDD、源極連接至節點b3；電晶體Mr5汲極連接至節點b3、閘極接收反相第一輸入信號In1b、源極接收第一輸入信號In1；電晶體Mr6汲極連接至節點b3、閘極接收讀取信號Rd、源極接收讀取電壓VPR。
根據本發明的第一實施例，第二控制電路120中的第一輸入信號In1、抹除信號Ers、讀取信號Rd皆是操作在邏輯高準位以及邏輯低準位之間。例如，邏輯高準位為VDD(例如3.3V)，邏輯低準位為0V。
再者，第一控制電路110中的第一控制信號Vc1、第二控制信號Vc2、第三控制信號Vc3與第四控制信號Vc4操作在第一準位Vh與第二準位Vl之間。且第一準位Vh與第二準位Vl皆非邏輯準位，且第一準位Vh大於第二準位Vl，第二準位 Vl大於邏輯高準位VDD。
請參照第1B圖，其所繪示為本發明第一實施例的相關表列信號示意圖。根據本發明的第一實施例，於非揮發性記憶體的編程模式以及抹除模式時，電壓切換電路100中的第一電壓源Vpp1供應高電壓VPP，第二電壓源Vpp2供應中間電壓VM(medium voltage)或者接地電壓(0V)，第三電壓源Vpp3供應控制電壓(control voltage)Vctrl，第四電壓源Vpp4供應中間電壓VM。另外，於非揮發性記憶體的讀取模式時，電壓切換電路100中的第一電壓源Vpp1、第二電壓源Vpp2與第三電壓源Vpp3供應邏輯高準位VDD，第四電壓源Vpp4供應接地電壓(0V)。其中，高電壓VPP大於中間電壓VM，且中間電壓大於邏輯高準位VDD。再者，控制電壓Vctrl介於高電壓VPP與中間電壓VM之間。舉例來說，高電壓VPP為20V，控制電壓Vctrl為14V，中間電壓VM為8V，邏輯高準位為3.3V。
當非揮發性記憶體處於編程模式，且電壓切換電路100連接至選定記憶胞時，致能信號En為致能電壓Ven使得電晶體Ml2與電晶體Mr2開啟(turn on)；第二電壓源Vpp2提供中間電壓VM使得電晶體Ml3開啟(turn on)；第三電壓源Vpp3提供控制電壓Vctrl使得電晶體Mr3開啟(turn on)。其中，致能電壓Ven小於高電壓VPP。
再者，第一控制電路110中，第一控制信號Vc1為第二準位Vl、第二控制信號Vc2為第一準位Vh、第三控制信號 Vc3為第二準位Vl、第四控制信號Vc4為第一準位Vh。因此，電晶體Mc1與電晶體Mc3開啟(turn on)，電晶體Mc2與電晶體Mc4不開啟(turn off)，使得節點a1與節點b1接收偏壓電壓Vbias，並使得電晶體Ml1與電晶體Mr1開啟(turn on)。其中，第二準位Vl小於第一準位Vh；且第一準位Vh小於等於高電壓VPP；且偏壓電壓Vbias小於高電壓VPP。
再者，第二控制電路120中，第一輸入信號In1為邏輯高準位VDD、抹除信號Ers為邏輯低準位0V、讀取信號Rd為邏輯低準位0V。因此，電晶體Ml5、電晶體Ml6、電晶體Mr5、電晶體Mr6皆不開啟(turn off)，使得第二控制電路120不動作(inactivate)。
由以上之說明可知，當非揮發性記憶體處於編程模式，且電壓切換電路100連接至選定記憶胞時，電晶體Ml1、Ml2、Ml3、Mr1、Mr2、Mr3開啟(turn on)，使得節點a2、節點b2、第一輸出端CL、第二輸出端EL皆為高電壓VPP。因此，選定記憶胞接收第一輸出端CL與第二輸出端EL的高電壓VPP作為操作電壓。另外，由於第二輸出端EL為高電壓VPP，電晶體Mx不開啟(turn off)。
當非揮發性記憶體處於編程模式，且電壓切換電路100連接至非選定記憶胞時，致能信號En為禁能電壓Vdis使得電晶體Ml2與電晶體Mr2不開啟(turn off)；第二電壓源Vpp2提供接地電壓0V使得電晶體Ml3開啟。其中，致能電壓Ven小於 禁能電壓Vdis；且禁能電壓Vdis小於等於高電壓VPP。
再者，第一控制電路110中，第一控制信號Vc1為第二準位Vl、第二控制信號Vc2為第一準位Vh、第三控制信號Vc3為第二準位Vl、第四控制信號Vc4為第一準位Vh。因此，電晶體Mc1與電晶體Mc3開啟(turn on)，電晶體Mc2與電晶體Mc4不開啟(turn off)，使得節點a1與節點b1接收偏壓電壓Vbias，並使得電晶體Ml1與電晶體Mr1開啟(turn on)。
再者，第二控制電路120中，第一輸入信號In1為邏輯低準位0V、抹除信號Ers為邏輯低準位0V、讀取信號Rd為邏輯低準位0V。因此，第二控制電路120中，僅有電晶體Mr5開啟(turn on)，使得節點b2與第二輸出端EL為接地電壓0V。另外，由於第三電壓源Vpp3提供控制電壓Vctrl，使得電晶體Mr3不開啟，節點b為浮接(floating，FL)。由於第二輸出端EL為接地電壓0V，電晶體Mx開啟(turn on)，且第二電壓源Vpp2為接地電壓0V，電晶體Ml3開啟。因此，節點a2與第一輸出端CL為中間電壓VM。
由以上之說明可知，當非揮發性記憶體處於編程模式，且電壓切換電路100連接至非選定記憶胞時，由於電晶體Ml2與電晶體Mr2不開啟(turn off)，且電晶體Mr5開啟(turn on)，使得第二輸出端EL為邏輯低準位0V。再者，由於電晶體Mx與電晶體Ml3開啟，使得節點a2、第一輸出端CL為中間電壓VM。因此，非選定記憶胞接收第一輸出端CL的中間電壓VM與第二 輸出端EL的邏輯低準位0V作為操作電壓。
當非揮發性記憶體處於抹除模式，且電壓切換電路100連接至選定記憶胞時，致能信號En為致能電壓Ven使得電晶體Ml2與電晶體Mr2開啟(turn on)；第二電壓源Vpp2提供中間電壓VM使得電晶體Ml3不開啟；第三電壓源Vpp3提供控制電壓Vctrl使得電晶體Mr3開啟(turn on)。
再者，第一控制電路110中，第一控制信號Vc1為第一準位Vh、第二控制信號Vc2為第二準位Vl、第三控制信號Vc3為第一準位Vh、第四控制信號Vc4為第二準位Vl。因此，電晶體Mc1與電晶體Mc3不開啟(turn off)，電晶體Mc2與電晶體Mc4開啟(turn on)。由於電晶體Mc2開啟(turn on)，使得節點a1接收高電壓VPP，並使得電晶體Ml1不開啟(turn off)。再者，由於電晶體Mc4開啟(turn on)，節點b1與節點a2相互連接。
再者，第二控制電路120中，第一輸入信號In1為邏輯高準位VDD、抹除信號Ers為邏輯高準位VDD、讀取信號Rd為邏輯低準位0V。因此，第二控制電路120中，僅有電晶體Ml5開啟(turn on)，使得第一輸出端CL為邏輯低準位0V。另外，由於第二電壓源Vpp2提供中間電壓VM至電晶體Ml3閘極，由於閘極偶合效應(coupling effect)，將使得節點b1電壓為中間電壓VM，並開啟電晶體Mr1。
由以上之說明可知，當非揮發性記憶體處於抹除模式，且電壓切換電路100連接至選定記憶胞時，電晶體Mr1、電 晶體Mr2、電晶體Mr3開啟(turn on)，使得節點b2與第二輸出端EL為高電壓VPP。再者，由於電晶體Ml5開啟(turn on)，使得第一輸出端CL為邏輯低準位0V。因此，選定記憶胞接收第一輸出端CL的邏輯低準位0V與第二輸出端EL的高電壓VPP作為操作電壓。
當非揮發性記憶體處於抹除模式，且電壓切換電路100連接至非選定記憶胞時，致能信號En為禁能電壓Vdis使得電晶體Ml2與電晶體Mr2不開啟(turn off)；第二電壓源Vpp2提供中間電壓VM使得電晶體Ml3不開啟；第三電壓源Vpp3提供控制電壓Vctrl使得電晶體Mr3不開啟。由於電晶體Mr2、Mr3皆不開啟，節點b3為浮接(FL)。
再者，第一控制電路110中，第一控制信號Vc1為第一準位Vh、第二控制信號Vc2為第二準位Vl、第三控制信號Vc3為第一準位Vh、第四控制信號Vc4為第二準位Vl。因此，電晶體Mc1與電晶體Mc3不開啟(turn off)，電晶體Mc2與電晶體Mc4開啟(turn on)。由於電晶體Mc2開啟(turn on)，使得節點a1接收高電壓VPP，並使得電晶體Ml1不開啟(turn off)。再者，由於電晶體Mc4開啟(turn on)，節點b1連接至節點a2並接收中間電壓VM，使得電晶體Mr1開啟(turn on)。
再者，第二控制電路120中，第一輸入信號In1為邏輯低準位0V、抹除信號Ers為邏輯高準位VDD、讀取信號Rd為邏輯低準位0V。因此，電晶體Ml5與電晶體Mr5開啟(turn on)， 使得第一輸出端CL與第二輸出端EL為邏輯低準位0V。
另外，由於第二輸出端EL為接地電壓0V，電晶體Mx開啟(turn on)，節點a2與節點b1為中間電壓VM，使得電晶體Mr1開啟(turn on)。
由以上之說明可知，當非揮發性記憶體處於抹除模式，且電壓切換電路100連接至非選定記憶胞時，電晶體Ml5與電晶體Mr5開啟(turn on)，使得第一輸出端CL與第二輸出端EL皆為邏輯低準位0V。因此，非選定記憶胞接收第一輸出端CL與第二輸出端EL的邏輯低準位0V作為操作電壓。
當非揮發性記憶體處於讀取模式，且電壓切換電路100連接至選定記憶胞或者非選定記憶胞時，第一電壓源Vpp1、第二電壓源Vpp2、第三電壓源Vpp3與致能信號En為邏輯高準位VDD，第四電壓源Vpp4為接地電壓0V。因此，電晶體Ml2、Mr2、Ml3、Mr3不開啟(turn off)。
再者，第一控制電路110中，第一控制信號Vc1、第二控制信號Vc2、第三控制信號Vc3與第四控制信號Vc4皆為浮接(floating，FL)。因此，電晶體Ml1與電晶體Mr1不開啟(turn off)。因此，節點a1、節點a2、節點b1、節點b2皆為浮接(floating，FL)。
再者，第二控制電路120中，第一輸入信號In1為邏輯高準位VDD、抹除信號Ers為邏輯低準位0V、讀取信號Rd為高邏輯準VDD。因此，電晶體Ml6、電晶體Mr6開啟(turn on)， 使得第一輸出端CL與第二輸出端EL為讀取電壓VPR。
由以上之說明可知，當非揮發性記憶體處於讀取模式，且電壓切換電路100連接至選定記憶胞或者非選定記憶胞時，第一輸出端CL與第二輸出端EL皆為讀取電壓VPR。因此，選定記憶胞與非選定記憶胞接收第一輸出端CL與第二輸出端EL的讀取電壓VPR作為操作電壓。
第二實施例
請參照第2圖，其所繪示為本發明電壓切換電路的第二實施例示意圖。相較於第一實施例，其差異僅在於第一控制電路210中的電晶體Mc2的連接關係，而其他電晶體的連接關係與第一實施例完全相同，不再贅述。亦即，第一控制電路210中，電晶體Mc2源極連接至節點b2、閘極接收第二控制信號Vc2、汲極連接至節點a1。
再者，第二實施例的電壓切換電路200，其信號關係也相同於第1B圖。所以第二電壓切換電路200在各種操作模式下的動作原理也不再贅述。
由以上說明可知，本發明之優點係提出一種運用於非揮發性記憶體中的電壓切換電路，根據非揮發性記憶體的工作模式，提供對應的操作電壓至記憶胞陣列。
綜上所述，雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤 飾。因此，本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100‧‧‧電壓切換電路
110‧‧‧第一控制電路
120‧‧‧第二控制電路

Claims (19)

  1. 一種電壓切換電路，連接至一非揮發性記憶體的一記憶胞，該電壓切換電路包括：一第一電晶體，源極連接至一第一電壓源，閘極連接至一節點a1；一第二電晶體，源極連接至該第一電壓源，閘極連接至一節點b1；一第三電晶體，源極連接至該第一電晶體的汲極，閘極接收一致能信號，汲極連接至一節點a2；一第四電晶體，源極連接至該第二電晶體的汲極，閘極接收該致能信號，汲極連接至一節點b2；一第五電晶體，源極連接至該節點a2，閘極連接至一第二電壓源，汲極連接至一第一輸出端；一第六電晶體，源極連接至該節點b2，閘極連接至一第三電壓源，汲極連接至一第二輸出端；一第七電晶體，源極連接至一第四電壓源，閘極連接至該第二輸出端，汲極連接至該節點a2；一第一控制電路，連接至該節點a1、該節點b1與該節點a2；以及一第二控制電路，連接至該第一輸出端與該第二輸出端；其中，於該非揮發性記憶體的一編程模式以及一抹除模式時，該第一電壓源提供一高電壓、該第二電壓源提供一中間電壓 或者一接地電壓、該第三電壓源提供一控制電壓、且該第四電壓源提供該中間電壓；其中，於該非揮發性記憶體的一讀取模式時，該第一電壓源、該第二電壓源、該第三電壓源提供一邏輯高準位，該第四電壓源提供該接地電壓；其中，該高電壓大於該中間電壓，且該中間電壓大於該邏輯高準位；以及該控制電壓介於該高電壓與該中間電壓之間。
  2. 如申請專利範圍第1項所述之電壓切換電路，其中該第一控制電路包括：一第八電晶體，源極連接至一偏壓電壓，閘極接收一第一控制信號，汲極連接至該節點a1；一第九電晶體，源極連接至該第一電壓源，閘極接收一第二控制信號，汲極連接至該節點a1；一第十電晶體，源極連接至該偏壓電壓，閘極接收一第三控制信號，汲極連接至該節點b1；以及一第十一電晶體，源極連接至該節點a2，閘極接收一第四控制信號，汲極連接至該節點b1；其中，該高電壓大於該偏壓電壓。
  3. 如申請專利範圍第2項所述之電壓切換電路，其中於該非揮發性記憶體的該編程模式且該記憶胞為一選定記憶胞時，該第 一電晶體與該第二電晶體接收該偏壓電壓並開啟；該致能信號為一致能電壓，使得該第三電晶體與該第四電晶體接收該致能電壓並開啟；該第五電晶體接收該中間電壓並開啟，該第六電晶體接收該控制電壓並開啟；以及，該第二控制電路不動作，使得該第一輸出端與該第二輸出端輸出該高電壓；其中，該致能電壓小於該高電壓。
  4. 如申請專利範圍第2項所述之電壓切換電路，其中於該非揮發性記憶體的該編程模式且該記憶胞為一非選定記憶胞時，該第一電晶體與該第二電晶體接收該偏壓電壓並開啟；該致能信號為一禁能電壓，使得該第三電晶體與該第四電晶體接收該禁能電壓而不開啟；該第五電晶體接收該接地電壓並開啟；該第六電晶體接收該控制電壓而不開啟；以及該第二控制電路提供一邏輯低準位至該第二輸出端；使得該第七電晶體開啟，並提供該中電電壓至該第一輸出端；其中，該禁能電壓小於等於該高電壓。
  5. 如申請專利範圍第2項所述之電壓切換電路，其中於該非揮發性記憶體的該抹除模式且該記憶胞為一選定記憶胞時，該第一電晶體接收該高電壓而不開啟；該第二電晶體開啟；該致能信號為一致能電壓，使得該第三電晶體與該第四電晶體接收該致能電壓並開啟；該第五電晶體接收該中間電壓而不開啟；該第六電晶體接收該控制電壓並開啟，使得該第二輸出端輸出該高電壓； 以及，該第二控制電路提供一邏輯低準位至該第一輸出端，使得該第一輸出端輸出該邏輯低準位；其中，該致能電壓小於該高電壓。
  6. 如申請專利範圍第2項所述之電壓切換電路，其中於該非揮發性記憶體的該抹除模式且該記憶胞為一非選定記憶胞時，該第一電晶體接收該高電壓而不開啟；該第二電晶體開啟；該致能信號為一禁能電壓，使得該第三電晶體與該第四電晶體接收該禁能電壓而不開啟；該第五電晶體接收該中間電壓而不開啟；該第六電晶體接收該控制電壓而不開啟；以及，該第二控制電路提供一邏輯低準位至該第一輸出端與該第二輸出端，使得該第一輸出端與該第二輸出端輸出該邏輯低準位，且該第七電晶體開啟；其中，該禁能電壓小於等於該高電壓。
  7. 如申請專利範圍第2項所述之電壓切換電路，其中於該非揮發性記憶體的該讀取模式時，該第一電晶體與該第二電晶體不開啟；該致能信號為該邏輯高準位，使得該第三電晶體與該第四電晶體不開啟；該第五電晶體與該第六電晶體接收該該邏輯高準位而不開啟；以及，該第二控制電路提供一讀取電壓至該第一輸出端與該第二輸出端，使得該第一輸出端與該第二輸出端輸出該讀取電壓。
  8. 如申請專利範圍第1項所述之電壓切換電路，其中該第二控制電路包括：一第十二電晶體，汲極連接至該第一輸出端，閘極接收該邏輯高準位，源極連接至一節點a3；一第十三電晶體，汲極連接至該第二輸出端，閘極接收該邏輯高準位，源極連接至一節點b3；一第十四電晶體，汲極連接至該節點a3，閘極接收一抹除信號，源極接收反相的該抹除信號；一第十五電晶體，汲極連接至該節點a3，閘極接收一讀取信號，源極接收一讀取電壓；一第十六電晶體，汲極連接至該節點b3，源極接收一第一輸入信號，閘極接收反相的該第一輸入信號；以及一第十七電晶體，汲極連接至該節點b3，閘極接收該讀取信號，源極接收該讀取電壓。
  9. 如申請專利範圍第8項所述之電壓切換電路，其中於該非揮發性記憶體的該編程模式且該記憶胞為一選定記憶胞時，該第一輸入信號為該邏輯高準位，該抹除信號與該讀取信號為一邏輯低準位，使得該十四電晶體、該第十五電晶體、該第十六電晶體與該第十七電晶體皆不開啟。
  10. 如申請專利範圍第8項所述之電壓切換電路，其中於該 非揮發性記憶體的該編程模式且該記憶胞為一非選定記憶胞時，該第一輸入信號、該抹除信號與該讀取信號為一邏輯低準位，使得該第十六電晶體開啟，且該第十四電晶體、該第十五電晶體與該第十七電晶體不開啟。
  11. 如申請專利範圍第8項所述之電壓切換電路，其中於該非揮發性記憶體的該抹除模式且該記憶胞為一選定記憶胞時，該第一輸入信號與該抹除信號為該邏輯高準位，該讀取信號為一邏輯低準位，使得該第十四電晶體開啟，該第十五電晶體、該第十六電晶體與該第十七電晶體皆不開啟。
  12. 如申請專利範圍第8項所述之電壓切換電路，其中該非揮發性記憶體的於該抹除模式且該記憶胞為一非選定記憶胞時，該抹除信號為該邏輯高準位，該第一輸入信號與該讀取信號為一邏輯低準位，使得該第十四電晶體與該第十六電晶體開啟，該第十五電晶體與該第十七電晶體不開啟。
  13. 如申請專利範圍第8項所述之電壓切換電路，其中於該非揮發性記憶體的該讀取模式時，該讀取信號與該第一輸入信號為該邏輯高準位，該抹除信號為一邏輯低準位，使得該第十五電晶體與該第十七電晶體開啟，該第十四電晶體與該第十六電晶體不開啟。
  14. 如申請專利範圍第1項所述之電壓切換電路，其中該第一控制電路包括：一第八電晶體，源極連接至一偏壓電壓，閘極接收一第一控制信號，汲極連接至該節點a1；一第九電晶體，源極連接至該節點b2，閘極接收一第二控制信號，汲極連接至該節點a1；一第十電晶體，源極連接至該偏壓電壓，閘極接收一第三控制信號，汲極連接至該節點b1；以及一第十一電晶體，源極連接至該節點a2，閘極接收一第四控制信號，汲極連接至該節點b1；其中，該高電壓大於該偏壓電壓。
  15. 如申請專利範圍第14項所述之電壓切換電路，其中於該非揮發性記憶體的該編程模式且該記憶胞為一選定記憶胞時，該第一電晶體與該第二電晶體接收該偏壓電壓並開啟；該致能信號為一致能電壓，使得該第三電晶體與該第四電晶體接收該致能電壓並開啟；該第五電晶體接收該中間電壓並開啟，該第六電晶體接收該控制電壓並開啟；以及，該第二控制電路不動作，使得該第一輸出端與該第二輸出端輸出該高電壓；其中，該致能電壓小於該高電壓。
  16. 如申請專利範圍第14項所述之電壓切換電路，其中於該非揮發性記憶體的該編程模式且該記憶胞為一非選定記憶胞時，該第一電晶體與該第二電晶體接收該偏壓電壓並開啟；該致能信號為一禁能電壓，使得該第三電晶體與該第四電晶體接收該禁能電壓而不開啟；該第五電晶體接收該接地電壓並開啟；該第六電晶體接收該控制電壓而不開啟；以及該第二控制電路提供一邏輯低準位至該第二輸出端；使得該第七電晶體開啟，並提供該中間電壓至該第一輸出端；其中，該禁能電壓小於等於該高電壓。
  17. 如申請專利範圍第14項所述之電壓切換電路，其中於該非揮發性記憶體的該抹除模式且該記憶胞為一選定記憶胞時，該第一電晶體接收該高電壓而不開啟；該第二電晶體開啟；該致能信號為一致能電壓，使得該第三電晶體與該第四電晶體接收該致能電壓並開啟；該第五電晶體接收該中間電壓而不開啟；該第六電晶體接收該控制電壓並開啟，使得該第二輸出端輸出該高電壓；以及，該第二控制電路提供一邏輯低準位至該第一輸出端，使得該第一輸出端輸出該邏輯低準位；其中，該致能電壓小於該高電壓。
  18. 如申請專利範圍第14項所述之電壓切換電路，其中於該非揮發性記憶體的該抹除模式且該記憶胞為一非選定記憶胞時，該第一電晶體不開啟；該第二電晶體開啟；該致能信號為一 禁能電壓，使得該第三電晶體與該第四電晶體接收該禁能電壓而不開啟；該第五電晶體接收該中間電壓而不開啟；該第六電晶體接收該控制電壓而不開啟；以及，該第二控制電路提供一邏輯低準位至該第一輸出端與該第二輸出端，使得該第一輸出端與該第二輸出端輸出該邏輯低準位，且該第七電晶體開啟；其中，該禁能電壓小於等於該高電壓。
  19. 如申請專利範圍第14項所述之電壓切換電路，其中於該非揮發性記憶體的該讀取模式時，該第一電晶體與該第二電晶體不開啟；該致能信號為該邏輯高準位，使得該第三電晶體與該第四電晶體不開啟；該第五電晶體與該第六電晶體接收該高邏輯準位而不開啟；以及，該第二控制電路提供一讀取電壓至該第一輸出端與該第二輸出端，使得該第一輸出端與該第二輸出端輸出該讀取電壓。
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