JP6743149B2 - 導電性バリアのダイレクトハイブリッドボンディング - Google Patents
導電性バリアのダイレクトハイブリッドボンディング Download PDFInfo
- Publication number
- JP6743149B2 JP6743149B2 JP2018529502A JP2018529502A JP6743149B2 JP 6743149 B2 JP6743149 B2 JP 6743149B2 JP 2018529502 A JP2018529502 A JP 2018529502A JP 2018529502 A JP2018529502 A JP 2018529502A JP 6743149 B2 JP6743149 B2 JP 6743149B2
- Authority
- JP
- Japan
- Prior art keywords
- conductive barrier
- barrier material
- layer
- conductive
- metal contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H10P10/128—
-
- H10P90/1914—
-
- H10W72/00—
-
- H10W72/071—
-
- H10W72/30—
-
- H10W90/00—
-
- H10W95/00—
-
- H10W72/013—
-
- H10W72/01351—
-
- H10W72/019—
-
- H10W72/01935—
-
- H10W72/01938—
-
- H10W72/01951—
-
- H10W72/01953—
-
- H10W72/07311—
-
- H10W72/07332—
-
- H10W72/325—
-
- H10W72/328—
-
- H10W72/337—
-
- H10W72/352—
-
- H10W72/353—
-
- H10W72/357—
-
- H10W72/90—
-
- H10W72/921—
-
- H10W72/923—
-
- H10W72/924—
-
- H10W72/926—
-
- H10W72/941—
-
- H10W72/9415—
-
- H10W72/942—
-
- H10W72/952—
-
- H10W72/953—
-
- H10W80/011—
-
- H10W80/016—
-
- H10W80/033—
-
- H10W80/035—
-
- H10W80/037—
-
- H10W80/102—
-
- H10W80/312—
-
- H10W80/327—
-
- H10W80/701—
-
- H10W80/743—
-
- H10W90/722—
-
- H10W90/792—
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/835,379 | 2015-08-25 | ||
| US14/835,379 US9953941B2 (en) | 2015-08-25 | 2015-08-25 | Conductive barrier direct hybrid bonding |
| PCT/US2016/048609 WO2017035321A1 (en) | 2015-08-25 | 2016-08-25 | Conductive barrier direct hybrid bonding |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018528622A JP2018528622A (ja) | 2018-09-27 |
| JP2018528622A5 JP2018528622A5 (enExample) | 2019-10-03 |
| JP6743149B2 true JP6743149B2 (ja) | 2020-08-19 |
Family
ID=58100993
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018529502A Active JP6743149B2 (ja) | 2015-08-25 | 2016-08-25 | 導電性バリアのダイレクトハイブリッドボンディング |
Country Status (7)
| Country | Link |
|---|---|
| US (5) | US9953941B2 (enExample) |
| EP (1) | EP3341956A4 (enExample) |
| JP (1) | JP6743149B2 (enExample) |
| KR (2) | KR102659849B1 (enExample) |
| CN (2) | CN114944376A (enExample) |
| TW (1) | TWI702659B (enExample) |
| WO (1) | WO2017035321A1 (enExample) |
Families Citing this family (222)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6984571B1 (en) | 1999-10-01 | 2006-01-10 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
| US6902987B1 (en) | 2000-02-16 | 2005-06-07 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
| US6962835B2 (en) | 2003-02-07 | 2005-11-08 | Ziptronix, Inc. | Method for room temperature metal direct bonding |
| US7109092B2 (en) | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
| US7485968B2 (en) | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
| EP2372755B1 (de) | 2010-03-31 | 2013-03-20 | EV Group E. Thallner GmbH | Verfahren zum permanenten Verbinden zweier Metalloberflächen |
| US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
| FR3011679B1 (fr) * | 2013-10-03 | 2017-01-27 | Commissariat Energie Atomique | Procede ameliore d'assemblage par collage direct entre deux elements, chaque element comprenant des portions de metal et de materiaux dielectriques |
| US20150262902A1 (en) | 2014-03-12 | 2015-09-17 | Invensas Corporation | Integrated circuits protected by substrates with cavities, and methods of manufacture |
| US9455182B2 (en) | 2014-08-22 | 2016-09-27 | International Business Machines Corporation | Interconnect structure with capping layer and barrier layer |
| US11069734B2 (en) | 2014-12-11 | 2021-07-20 | Invensas Corporation | Image sensor device |
| US9741620B2 (en) | 2015-06-24 | 2017-08-22 | Invensas Corporation | Structures and methods for reliable packages |
| US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
| US9953941B2 (en) | 2015-08-25 | 2018-04-24 | Invensas Bonding Technologies, Inc. | Conductive barrier direct hybrid bonding |
| US10811388B2 (en) | 2015-09-28 | 2020-10-20 | Invensas Corporation | Capacitive coupling in a direct-bonded interface for microelectronic devices |
| US10032751B2 (en) | 2015-09-28 | 2018-07-24 | Invensas Corporation | Ultrathin layer for forming a capacitive interface between joined integrated circuit components |
| US9852988B2 (en) | 2015-12-18 | 2017-12-26 | Invensas Bonding Technologies, Inc. | Increased contact alignment tolerance for direct bonding |
| US10446532B2 (en) | 2016-01-13 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Systems and methods for efficient transfer of semiconductor elements |
| US10636767B2 (en) | 2016-02-29 | 2020-04-28 | Invensas Corporation | Correction die for wafer/die stack |
| US10204893B2 (en) | 2016-05-19 | 2019-02-12 | Invensas Bonding Technologies, Inc. | Stacked dies and methods for forming bonded structures |
| US10446487B2 (en) | 2016-09-30 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
| US10672663B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D chip sharing power circuit |
| US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
| US11176450B2 (en) | 2017-08-03 | 2021-11-16 | Xcelsis Corporation | Three dimensional circuit implementing machine trained network |
| US10672745B2 (en) * | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D processor |
| US10580757B2 (en) * | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Face-to-face mounted IC dies with orthogonal top interconnect layers |
| TWI822659B (zh) * | 2016-10-27 | 2023-11-21 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
| US10489544B2 (en) | 2016-12-14 | 2019-11-26 | iCometrue Company Ltd. | Logic drive based on standard commodity FPGA IC chips |
| US10002844B1 (en) | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US10796936B2 (en) | 2016-12-22 | 2020-10-06 | Invensas Bonding Technologies, Inc. | Die tray with channels |
| US20180182665A1 (en) | 2016-12-28 | 2018-06-28 | Invensas Bonding Technologies, Inc. | Processed Substrate |
| WO2018125673A2 (en) | 2016-12-28 | 2018-07-05 | Invensas Bonding Technologies, Inc | Processing stacked substrates |
| WO2018126052A1 (en) | 2016-12-29 | 2018-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures with integrated passive component |
| US10276909B2 (en) | 2016-12-30 | 2019-04-30 | Invensas Bonding Technologies, Inc. | Structure comprising at least a first element bonded to a carrier having a closed metallic channel waveguide formed therein |
| US10522499B2 (en) | 2017-02-09 | 2019-12-31 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US20180233479A1 (en) | 2017-02-16 | 2018-08-16 | Nanya Technology Corporation | Semiconductor apparatus and method for preparing the same |
| WO2018169968A1 (en) | 2017-03-16 | 2018-09-20 | Invensas Corporation | Direct-bonded led arrays and applications |
| US10515913B2 (en) | 2017-03-17 | 2019-12-24 | Invensas Bonding Technologies, Inc. | Multi-metal contact structure |
| US10508030B2 (en) | 2017-03-21 | 2019-12-17 | Invensas Bonding Technologies, Inc. | Seal for microelectronic assembly |
| WO2018183739A1 (en) | 2017-03-31 | 2018-10-04 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
| US10269756B2 (en) | 2017-04-21 | 2019-04-23 | Invensas Bonding Technologies, Inc. | Die processing |
| US10529634B2 (en) | 2017-05-11 | 2020-01-07 | Invensas Bonding Technologies, Inc. | Probe methodology for ultrafine pitch interconnects |
| US10879212B2 (en) | 2017-05-11 | 2020-12-29 | Invensas Bonding Technologies, Inc. | Processed stacked dies |
| IT201700053902A1 (it) | 2017-05-18 | 2018-11-18 | Lfoundry Srl | Metodo di bonding ibrido per wafer a semiconduttore e relativo dispositivo integrato tridimensionale |
| US10446441B2 (en) * | 2017-06-05 | 2019-10-15 | Invensas Corporation | Flat metal features for microelectronics applications |
| US10217720B2 (en) | 2017-06-15 | 2019-02-26 | Invensas Corporation | Multi-chip modules formed using wafer-level processing of a reconstitute wafer |
| US10447274B2 (en) | 2017-07-11 | 2019-10-15 | iCometrue Company Ltd. | Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells |
| US10957679B2 (en) | 2017-08-08 | 2021-03-23 | iCometrue Company Ltd. | Logic drive based on standardized commodity programmable logic semiconductor IC chips |
| US10630296B2 (en) | 2017-09-12 | 2020-04-21 | iCometrue Company Ltd. | Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells |
| JP2019054153A (ja) * | 2017-09-15 | 2019-04-04 | 東芝メモリ株式会社 | 半導体装置の製造方法 |
| US10840205B2 (en) | 2017-09-24 | 2020-11-17 | Invensas Bonding Technologies, Inc. | Chemical mechanical polishing for hybrid bonding |
| US11195748B2 (en) | 2017-09-27 | 2021-12-07 | Invensas Corporation | Interconnect structures and methods for forming same |
| US11031285B2 (en) | 2017-10-06 | 2021-06-08 | Invensas Bonding Technologies, Inc. | Diffusion barrier collar for interconnects |
| US10658313B2 (en) | 2017-12-11 | 2020-05-19 | Invensas Bonding Technologies, Inc. | Selective recess |
| US11011503B2 (en) | 2017-12-15 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Direct-bonded optoelectronic interconnect for high-density integrated photonics |
| US11380597B2 (en) | 2017-12-22 | 2022-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US10923408B2 (en) | 2017-12-22 | 2021-02-16 | Invensas Bonding Technologies, Inc. | Cavity packages |
| CA3088034A1 (en) | 2018-01-23 | 2019-08-01 | Lumiense Photonics Inc. | Method of manufacturing of advanced three-dimensional semiconductor structures and structures produced therefrom |
| US10608642B2 (en) | 2018-02-01 | 2020-03-31 | iCometrue Company Ltd. | Logic drive using standard commodity programmable logic IC chips comprising non-volatile radom access memory cells |
| DE102018103431A1 (de) * | 2018-02-15 | 2019-08-22 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung einer Verbindung zwischen Bauteilen und Bauelement aus Bauteilen |
| US10727219B2 (en) | 2018-02-15 | 2020-07-28 | Invensas Bonding Technologies, Inc. | Techniques for processing devices |
| US11169326B2 (en) | 2018-02-26 | 2021-11-09 | Invensas Bonding Technologies, Inc. | Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects |
| JP6952629B2 (ja) * | 2018-03-20 | 2021-10-20 | 株式会社東芝 | 半導体装置 |
| US11256004B2 (en) | 2018-03-20 | 2022-02-22 | Invensas Bonding Technologies, Inc. | Direct-bonded lamination for improved image clarity in optical devices |
| KR102075764B1 (ko) * | 2018-03-28 | 2020-02-10 | 한국과학기술원 | 이종 광 집적회로 및 이의 제조 방법 |
| US10991804B2 (en) | 2018-03-29 | 2021-04-27 | Xcelsis Corporation | Transistor level interconnection methodologies utilizing 3D interconnects |
| WO2019195428A1 (en) | 2018-04-04 | 2019-10-10 | Qorvo Us, Inc. | Gallium-nitride-based module with enhanced electrical performance and process for making the same |
| US11056348B2 (en) | 2018-04-05 | 2021-07-06 | Invensas Bonding Technologies, Inc. | Bonding surfaces for microelectronics |
| US11244916B2 (en) | 2018-04-11 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
| US10790262B2 (en) * | 2018-04-11 | 2020-09-29 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
| US12046505B2 (en) | 2018-04-20 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation |
| US10964664B2 (en) | 2018-04-20 | 2021-03-30 | Invensas Bonding Technologies, Inc. | DBI to Si bonding for simplified handle wafer |
| US11004757B2 (en) * | 2018-05-14 | 2021-05-11 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US11276676B2 (en) | 2018-05-15 | 2022-03-15 | Invensas Bonding Technologies, Inc. | Stacked devices and methods of fabrication |
| US12476637B2 (en) | 2018-05-24 | 2025-11-18 | iCometrue Company Ltd. | Logic drive using standard commodity programmable logic IC chips |
| US10923413B2 (en) | 2018-05-30 | 2021-02-16 | Xcelsis Corporation | Hard IP blocks with physically bidirectional passageways |
| CN108520858A (zh) * | 2018-06-07 | 2018-09-11 | 长江存储科技有限责任公司 | 金属连接结构及其形成方法 |
| CN112514059B (zh) | 2018-06-12 | 2024-05-24 | 隔热半导体粘合技术公司 | 堆叠微电子部件的层间连接 |
| EP3807927A4 (en) | 2018-06-13 | 2022-02-23 | Invensas Bonding Technologies, Inc. | TSV AS PAD |
| US11393779B2 (en) * | 2018-06-13 | 2022-07-19 | Invensas Bonding Technologies, Inc. | Large metal pads over TSV |
| US10910344B2 (en) | 2018-06-22 | 2021-02-02 | Xcelsis Corporation | Systems and methods for releveled bump planes for chiplets |
| CN118213279A (zh) | 2018-07-02 | 2024-06-18 | Qorvo美国公司 | Rf半导体装置及其制造方法 |
| US11664357B2 (en) | 2018-07-03 | 2023-05-30 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for joining dissimilar materials in microelectronics |
| WO2020010136A1 (en) | 2018-07-06 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Molded direct bonded and interconnected stack |
| WO2020010265A1 (en) | 2018-07-06 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Microelectronic assemblies |
| US11211333B2 (en) * | 2018-07-16 | 2021-12-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Through silicon via optimization for three-dimensional integrated circuits |
| US12406959B2 (en) | 2018-07-26 | 2025-09-02 | Adeia Semiconductor Bonding Technologies Inc. | Post CMP processing for hybrid bonding |
| US10700094B2 (en) * | 2018-08-08 | 2020-06-30 | Xcelsis Corporation | Device disaggregation for improved performance |
| US11515291B2 (en) | 2018-08-28 | 2022-11-29 | Adeia Semiconductor Inc. | Integrated voltage regulator and passive components |
| US20200075533A1 (en) * | 2018-08-29 | 2020-03-05 | Invensas Bonding Technologies, Inc. | Bond enhancement in microelectronics by trapping contaminants and arresting cracks during direct-bonding processes |
| US11011494B2 (en) | 2018-08-31 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics |
| US11309334B2 (en) | 2018-09-11 | 2022-04-19 | iCometrue Company Ltd. | Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells |
| KR102661959B1 (ko) | 2018-09-20 | 2024-04-30 | 삼성전자주식회사 | 반도체 장치 및 이를 포함하는 반도체 패키지 |
| US10937762B2 (en) | 2018-10-04 | 2021-03-02 | iCometrue Company Ltd. | Logic drive based on multichip package using interconnection bridge |
| WO2020071103A1 (ja) * | 2018-10-05 | 2020-04-09 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置およびその製造方法、撮像素子 |
| US11158573B2 (en) * | 2018-10-22 | 2021-10-26 | Invensas Bonding Technologies, Inc. | Interconnect structures |
| KR102596758B1 (ko) | 2018-10-24 | 2023-11-03 | 삼성전자주식회사 | 반도체 패키지 |
| US11309278B2 (en) * | 2018-10-29 | 2022-04-19 | Applied Materials, Inc. | Methods for bonding substrates |
| US11616046B2 (en) | 2018-11-02 | 2023-03-28 | iCometrue Company Ltd. | Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip |
| US11211334B2 (en) | 2018-11-18 | 2021-12-28 | iCometrue Company Ltd. | Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip |
| US11646242B2 (en) | 2018-11-29 | 2023-05-09 | Qorvo Us, Inc. | Thermally enhanced semiconductor package with at least one heat extractor and process for making the same |
| KR102482697B1 (ko) * | 2018-11-30 | 2022-12-28 | 양쯔 메모리 테크놀로지스 씨오., 엘티디. | 본딩된 메모리 장치 및 그 제조 방법 |
| JP7243015B2 (ja) * | 2018-12-04 | 2023-03-22 | 日清紡マイクロデバイス株式会社 | 電子部品および電子部品の接合構造 |
| US12272713B2 (en) * | 2018-12-04 | 2025-04-08 | Sony Semiconductor Solutions Corporation | Semiconductor apparatus and electronic equipment |
| CN119208304A (zh) * | 2018-12-06 | 2024-12-27 | 伊文萨思公司 | 用于微电子器件的直接接合的界面中的电容性耦合 |
| US11244920B2 (en) | 2018-12-18 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Method and structures for low temperature device bonding |
| US11476213B2 (en) | 2019-01-14 | 2022-10-18 | Invensas Bonding Technologies, Inc. | Bonded structures without intervening adhesive |
| US12125825B2 (en) | 2019-01-23 | 2024-10-22 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
| US12046483B2 (en) | 2019-01-23 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
| US12057374B2 (en) | 2019-01-23 | 2024-08-06 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
| KR20250027591A (ko) | 2019-01-23 | 2025-02-26 | 코르보 유에스, 인크. | Rf 반도체 디바이스 및 이를 형성하는 방법 |
| US11387157B2 (en) | 2019-01-23 | 2022-07-12 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
| US12046570B2 (en) | 2019-01-23 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
| US11387202B2 (en) | 2019-03-01 | 2022-07-12 | Invensas Llc | Nanowire bonding interconnect for fine-pitch microelectronics |
| US11901281B2 (en) | 2019-03-11 | 2024-02-13 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
| WO2020188719A1 (ja) * | 2019-03-18 | 2020-09-24 | キオクシア株式会社 | 半導体装置およびその製造方法 |
| US10854578B2 (en) | 2019-03-29 | 2020-12-01 | Invensas Corporation | Diffused bitline replacement in stacked wafer memory |
| US11373963B2 (en) | 2019-04-12 | 2022-06-28 | Invensas Bonding Technologies, Inc. | Protective elements for bonded structures |
| US11610846B2 (en) | 2019-04-12 | 2023-03-21 | Adeia Semiconductor Bonding Technologies Inc. | Protective elements for bonded structures including an obstructive element |
| US11205625B2 (en) | 2019-04-12 | 2021-12-21 | Invensas Bonding Technologies, Inc. | Wafer-level bonding of obstructive elements |
| US11355404B2 (en) | 2019-04-22 | 2022-06-07 | Invensas Bonding Technologies, Inc. | Mitigating surface damage of probe pads in preparation for direct bonding of a substrate |
| US11385278B2 (en) | 2019-05-23 | 2022-07-12 | Invensas Bonding Technologies, Inc. | Security circuitry for bonded structures |
| US12374641B2 (en) | 2019-06-12 | 2025-07-29 | Adeia Semiconductor Bonding Technologies Inc. | Sealed bonded structures and methods for forming the same |
| US11315871B2 (en) * | 2019-06-13 | 2022-04-26 | Nanya Technology Corporation | Integrated circuit device with bonding structure and method of forming the same |
| US12538781B2 (en) * | 2019-06-13 | 2026-01-27 | Nanya Technology Corporation | Method of manufacturing integrated circuit device with bonding structure |
| US11296053B2 (en) | 2019-06-26 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Direct bonded stack structures for increased reliability and improved yield in microelectronics |
| US11227838B2 (en) | 2019-07-02 | 2022-01-18 | iCometrue Company Ltd. | Logic drive based on multichip package comprising standard commodity FPGA IC chip with cooperating or supporting circuits |
| TWI686518B (zh) | 2019-07-19 | 2020-03-01 | 國立交通大學 | 具有奈米雙晶銅之電連接結構及其形成方法 |
| US11393780B2 (en) | 2019-07-26 | 2022-07-19 | Sandisk Technologies Llc | Bonded assembly containing oxidation barriers, hybrid bonding, or air gap, and methods of forming the same |
| US11139272B2 (en) * | 2019-07-26 | 2021-10-05 | Sandisk Technologies Llc | Bonded assembly containing oxidation barriers and/or adhesion enhancers and methods of forming the same |
| US11515273B2 (en) | 2019-07-26 | 2022-11-29 | Sandisk Technologies Llc | Bonded assembly containing oxidation barriers, hybrid bonding, or air gap, and methods of forming the same |
| US11887930B2 (en) | 2019-08-05 | 2024-01-30 | iCometrue Company Ltd. | Vertical interconnect elevator based on through silicon vias |
| US11443981B2 (en) * | 2019-08-16 | 2022-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding method of package components and bonding apparatus |
| KR102898430B1 (ko) | 2019-08-26 | 2025-12-09 | 삼성전자 주식회사 | 반도체 소자 제조 방법 |
| KR102780353B1 (ko) | 2019-08-26 | 2025-03-12 | 삼성전자주식회사 | 반도체 장치 및 그 제조방법 |
| US12080672B2 (en) | 2019-09-26 | 2024-09-03 | Adeia Semiconductor Bonding Technologies Inc. | Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive |
| US12113054B2 (en) | 2019-10-21 | 2024-10-08 | Adeia Semiconductor Technologies Llc | Non-volatile dynamic random access memory |
| US12074086B2 (en) | 2019-11-01 | 2024-08-27 | Qorvo Us, Inc. | RF devices with nanotube particles for enhanced performance and methods of forming the same |
| CN110945650A (zh) * | 2019-11-05 | 2020-03-31 | 长江存储科技有限责任公司 | 具有通过键合而形成的毗连通孔结构的半导体设备和用于形成其的方法 |
| US11862602B2 (en) | 2019-11-07 | 2024-01-02 | Adeia Semiconductor Technologies Llc | Scalable architecture for reduced cycles across SOC |
| US11094653B2 (en) | 2019-11-13 | 2021-08-17 | Sandisk Technologies Llc | Bonded assembly containing a dielectric bonding pattern definition layer and methods of forming the same |
| GB2589329B (en) * | 2019-11-26 | 2022-02-09 | Plessey Semiconductors Ltd | Substrate bonding |
| US11646289B2 (en) | 2019-12-02 | 2023-05-09 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
| US11923238B2 (en) | 2019-12-12 | 2024-03-05 | Qorvo Us, Inc. | Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive |
| US11762200B2 (en) | 2019-12-17 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded optical devices |
| US11876076B2 (en) | 2019-12-20 | 2024-01-16 | Adeia Semiconductor Technologies Llc | Apparatus for non-volatile random access memory stacks |
| US12129168B2 (en) | 2019-12-23 | 2024-10-29 | Qorvo Us, Inc. | Microelectronics package with vertically stacked MEMS device and controller device |
| KR102910967B1 (ko) | 2019-12-23 | 2026-01-09 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 결합형 구조체를 위한 전기적 리던던시 |
| US11721653B2 (en) | 2019-12-23 | 2023-08-08 | Adeia Semiconductor Bonding Technologies Inc. | Circuitry for electrical redundancy in bonded structures |
| US11270963B2 (en) * | 2020-01-14 | 2022-03-08 | Sandisk Technologies Llc | Bonding pads including interfacial electromigration barrier layers and methods of making the same |
| CN111244123A (zh) * | 2020-02-03 | 2020-06-05 | 长江存储科技有限责任公司 | 半导体结构及其制备方法 |
| US12148687B2 (en) | 2020-02-25 | 2024-11-19 | Tokyo Electron Limited | Split substrate interposer with integrated passive device |
| WO2021188846A1 (en) | 2020-03-19 | 2021-09-23 | Invensas Bonding Technologies, Inc. | Dimension compensation control for directly bonded structures |
| JP2021150574A (ja) | 2020-03-23 | 2021-09-27 | キオクシア株式会社 | 半導体装置 |
| US11742314B2 (en) | 2020-03-31 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
| CN111463114B (zh) * | 2020-04-17 | 2021-08-06 | 武汉新芯集成电路制造有限公司 | 半导体器件及其形成方法、芯片 |
| US11735523B2 (en) | 2020-05-19 | 2023-08-22 | Adeia Semiconductor Bonding Technologies Inc. | Laterally unconfined structure |
| US11233088B2 (en) * | 2020-06-12 | 2022-01-25 | Omnivision Technologies, Inc. | Metal routing in image sensor using hybrid bonding |
| US11631647B2 (en) | 2020-06-30 | 2023-04-18 | Adeia Semiconductor Bonding Technologies Inc. | Integrated device packages with integrated device die and dummy element |
| WO2022000385A1 (zh) | 2020-07-01 | 2022-01-06 | 重庆康佳光电技术研究院有限公司 | 显示面板的制作方法、显示面板及显示装置 |
| US11430753B2 (en) | 2020-07-08 | 2022-08-30 | Raytheon Company | Iterative formation of damascene interconnects |
| KR102712153B1 (ko) | 2020-07-29 | 2024-09-30 | 삼성전자주식회사 | 본딩 신뢰성을 향상시킬 수 있는 반도체 패키지 |
| KR102803130B1 (ko) | 2020-08-14 | 2025-05-07 | 삼성전자주식회사 | 반도체 패키지 및 반도체 패키지의 제조 방법 |
| CN113380640B (zh) * | 2020-08-17 | 2024-07-02 | 长江存储科技有限责任公司 | 半导体封装结构及其制造方法 |
| US11764177B2 (en) | 2020-09-04 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
| US11728273B2 (en) | 2020-09-04 | 2023-08-15 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
| US11164822B1 (en) * | 2020-09-28 | 2021-11-02 | United Microelectronics Corp. | Structure of semiconductor device and method for bonding two substrates |
| US11837623B2 (en) | 2020-10-12 | 2023-12-05 | Raytheon Company | Integrated circuit having vertical routing to bond pads |
| US11264357B1 (en) | 2020-10-20 | 2022-03-01 | Invensas Corporation | Mixed exposure for large die |
| WO2022094587A1 (en) | 2020-10-29 | 2022-05-05 | Invensas Bonding Technologies, Inc. | Direct bonding methods and structures |
| EP3993021A1 (en) * | 2020-11-03 | 2022-05-04 | Infineon Technologies AG | Method of manufacturing a bonded substrate stack |
| KR20220060620A (ko) | 2020-11-04 | 2022-05-12 | 삼성전자주식회사 | 반도체 장치 및 이를 포함하는 전자 시스템 |
| KR20220060612A (ko) * | 2020-11-04 | 2022-05-12 | 삼성전자주식회사 | 반도체 장치 및 이를 포함하는 데이터 저장 시스템 |
| US11424215B2 (en) * | 2020-11-10 | 2022-08-23 | Sandisk Technologies Llc | Bonded assembly formed by hybrid wafer bonding using selectively deposited metal liners |
| US11710756B2 (en) | 2020-11-19 | 2023-07-25 | Raytheon Company | Integrating optical elements with electro-optical sensors via direct-bond hybridization |
| CN114628304A (zh) * | 2020-12-10 | 2022-06-14 | 武汉新芯集成电路制造有限公司 | 芯片键合方法 |
| US20240030126A1 (en) * | 2020-12-11 | 2024-01-25 | Qorvo Us, Inc. | Microelectronics package with vertically stacked wafer slices and process for making the same |
| EP4260369A2 (en) | 2020-12-11 | 2023-10-18 | Qorvo US, Inc. | Multi-level 3d stacked package and methods of forming the same |
| US11527501B1 (en) * | 2020-12-15 | 2022-12-13 | Intel Corporation | Sacrificial redistribution layer in microelectronic assemblies having direct bonding |
| JP2024501017A (ja) | 2020-12-28 | 2024-01-10 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 基板貫通ビアを有する構造体及びそれを形成する方法 |
| KR20230125309A (ko) | 2020-12-28 | 2023-08-29 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 기판-관통 비아를 가지는 구조체 및 이를 형성하기위한 방법 |
| CN116848631A (zh) | 2020-12-30 | 2023-10-03 | 美商艾德亚半导体接合科技有限公司 | 具有导电特征的结构及其形成方法 |
| US12519033B2 (en) | 2021-01-08 | 2026-01-06 | iCometrue Company Ltd. | Micro heat pipe for use in semiconductor IC chip package |
| WO2022172349A1 (ja) * | 2021-02-10 | 2022-08-18 | キヤノンアネルバ株式会社 | 化学結合法及びパッケージ型電子部品 |
| US11966090B2 (en) * | 2021-03-03 | 2024-04-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Heterogeneous packaging integration of photonic and electronic elements |
| US12062571B2 (en) | 2021-03-05 | 2024-08-13 | Qorvo Us, Inc. | Selective etching process for SiGe and doped epitaxial silicon |
| CN113035729B (zh) * | 2021-03-10 | 2023-04-07 | 联合微电子中心有限责任公司 | 混合键合方法及键合用衬底 |
| JP2024515033A (ja) | 2021-03-31 | 2024-04-04 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 担体の直接ボンディング及び剥離 |
| CN115312484A (zh) * | 2021-05-08 | 2022-11-08 | 日月光半导体制造股份有限公司 | 半导体结构及其形成方法 |
| CN113299601A (zh) * | 2021-05-21 | 2021-08-24 | 浙江集迈科微电子有限公司 | 一种多层转接板的晶圆级焊接工艺 |
| US12176278B2 (en) | 2021-05-30 | 2024-12-24 | iCometrue Company Ltd. | 3D chip package based on vertical-through-via connector |
| CN115513046A (zh) | 2021-06-23 | 2022-12-23 | 联华电子股份有限公司 | 半导体元件 |
| CN115565984B (zh) | 2021-07-01 | 2025-02-25 | 长鑫存储技术有限公司 | 一种半导体结构及其形成方法 |
| US11817420B2 (en) | 2021-07-19 | 2023-11-14 | Micron Technology, Inc. | Systems and methods for direct bonding in semiconductor die manufacturing |
| KR20240036698A (ko) | 2021-08-02 | 2024-03-20 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 결합 구조체를 위한 보호 반도체 소자 |
| WO2023034738A1 (en) | 2021-09-01 | 2023-03-09 | Adeia Semiconductor Technologies Llc | Stacked structure with interposer |
| US12268012B2 (en) | 2021-09-24 | 2025-04-01 | iCometrue Company Ltd. | Multi-output look-up table (LUT) for use in coarse-grained field-programmable-gate-array (FPGA) integrated-circuit (IC) chip |
| US20230132632A1 (en) * | 2021-10-28 | 2023-05-04 | Adeia Semiconductor Bonding Technologies Inc. | Diffusion barriers and method of forming same |
| KR20230077809A (ko) | 2021-11-25 | 2023-06-02 | 삼성전자주식회사 | 반도체 패키지 |
| WO2023162264A1 (ja) * | 2022-02-28 | 2023-08-31 | 株式会社レゾナック | 半導体装置の製造方法、及び半導体装置 |
| JP2023137581A (ja) * | 2022-03-18 | 2023-09-29 | キオクシア株式会社 | 半導体装置、半導体装置の製造方法 |
| US20250233103A1 (en) * | 2022-04-06 | 2025-07-17 | Hd Microsystems, Ltd. | Method of manufacturing semiconductor device, hybrid bonding insulation film forming material and semiconductor device |
| US12512425B2 (en) | 2022-04-25 | 2025-12-30 | Adeia Semiconductor Bonding Technologies Inc. | Expansion controlled structure for direct bonding and method of forming same |
| JP2023177917A (ja) * | 2022-06-03 | 2023-12-14 | 三井化学株式会社 | 半導体装置およびその製造方法 |
| TWI872344B (zh) * | 2022-06-21 | 2025-02-11 | 聯華電子股份有限公司 | 半導體結構的製造方法 |
| KR20240015184A (ko) * | 2022-07-26 | 2024-02-05 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
| US20240047343A1 (en) * | 2022-08-02 | 2024-02-08 | nD-HI Technologies Lab,Inc. | Semiconductor device, semiconductor substrate and manufacturing method thereof |
| US12444707B2 (en) | 2022-11-22 | 2025-10-14 | Applied Materials Inc. | Method for collective dishing of singulated dies |
| US12506114B2 (en) | 2022-12-29 | 2025-12-23 | Adeia Semiconductor Bonding Technologies Inc. | Directly bonded metal structures having aluminum features and methods of preparing same |
| US12341083B2 (en) | 2023-02-08 | 2025-06-24 | Adeia Semiconductor Bonding Technologies Inc. | Electronic device cooling structures bonded to semiconductor elements |
| KR20240139871A (ko) * | 2023-03-15 | 2024-09-24 | 삼성전자주식회사 | 접합 반도체 장치, 그리고 접합 반도체 장치용 칩 및 이의 제조 방법 |
| US20240332227A1 (en) * | 2023-03-31 | 2024-10-03 | Adeia Semiconductor Bonding Technologies Inc | Semiconductor element with bonding layer having low-k dielectric material |
| KR20250173514A (ko) | 2023-04-12 | 2025-12-10 | 가부시끼가이샤 레조낙 | 반도체 장치의 제조 방법 |
| US20240387419A1 (en) * | 2023-05-18 | 2024-11-21 | Adeia Semiconductor Bonding Technologies Inc. | Direct hybrid bond pad having tapered sidewall |
| US20240413108A1 (en) * | 2023-06-06 | 2024-12-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package device and method for manufacturing the same |
| TW202450037A (zh) * | 2023-06-08 | 2024-12-16 | 聯華電子股份有限公司 | 半導體元件及其製造方法 |
| US20250112127A1 (en) * | 2023-09-28 | 2025-04-03 | Intel Corporation | Ic assemblies with metal passivation at bond interfaces |
| US20250149499A1 (en) * | 2023-11-08 | 2025-05-08 | Globalfoundries U.S. Inc. | Hybrid bonding with selectively formed dielectric material |
| WO2025178884A1 (en) * | 2024-02-23 | 2025-08-28 | Tokyo Electron Limited | Method for die-to-die hybrid bonding using an advanced distribution model |
| US20250286002A1 (en) * | 2024-03-08 | 2025-09-11 | Applied Materials, Inc. | Aluminum Oxide Crystallization Barrier for Hybrid Bonding |
| US12532432B2 (en) * | 2024-03-29 | 2026-01-20 | Adeia Semiconductor Bonding Technologies Inc. | Hotspot mitigation in fluid cooling |
| US20260011702A1 (en) * | 2024-07-08 | 2026-01-08 | Micron Technology, Inc. | Power and signal distribution in stacked semiconductor systems |
Family Cites Families (421)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6130059A (ja) | 1984-07-20 | 1986-02-12 | Nec Corp | 半導体装置の製造方法 |
| KR900008647B1 (ko) | 1986-03-20 | 1990-11-26 | 후지쓰 가부시끼가이샤 | 3차원 집적회로와 그의 제조방법 |
| JPH07112041B2 (ja) | 1986-12-03 | 1995-11-29 | シャープ株式会社 | 半導体装置の製造方法 |
| JPS63274248A (ja) | 1987-04-30 | 1988-11-11 | Mitsubishi Electric Corp | 伝送エラ−検出部の診断方法 |
| US4904328A (en) | 1987-09-08 | 1990-02-27 | Gencorp Inc. | Bonding of FRP parts |
| US4784970A (en) | 1987-11-18 | 1988-11-15 | Grumman Aerospace Corporation | Process for making a double wafer moated signal processor |
| JPH0272642A (ja) | 1988-09-07 | 1990-03-12 | Nec Corp | 基板の接続構造および接続方法 |
| JPH0344067A (ja) | 1989-07-11 | 1991-02-25 | Nec Corp | 半導体基板の積層方法 |
| US5489804A (en) | 1989-08-28 | 1996-02-06 | Lsi Logic Corporation | Flexible preformed planar structures for interposing between a chip and a substrate |
| JP3190057B2 (ja) | 1990-07-02 | 2001-07-16 | 株式会社東芝 | 複合集積回路装置 |
| JP2729413B2 (ja) | 1991-02-14 | 1998-03-18 | 三菱電機株式会社 | 半導体装置 |
| JP2910334B2 (ja) | 1991-07-22 | 1999-06-23 | 富士電機株式会社 | 接合方法 |
| JPH05198739A (ja) | 1991-09-10 | 1993-08-06 | Mitsubishi Electric Corp | 積層型半導体装置およびその製造方法 |
| CA2083072C (en) | 1991-11-21 | 1998-02-03 | Shinichi Hasegawa | Method for manufacturing polyimide multilayer wiring substrate |
| US6008126A (en) | 1992-04-08 | 1999-12-28 | Elm Technology Corporation | Membrane dielectric isolation IC fabrication |
| US5236118A (en) | 1992-05-12 | 1993-08-17 | The Regents Of The University Of California | Aligned wafer bonding |
| JPH0682753B2 (ja) | 1992-09-28 | 1994-10-19 | 株式会社東芝 | 半導体装置の製造方法 |
| US5503704A (en) | 1993-01-06 | 1996-04-02 | The Regents Of The University Of California | Nitrogen based low temperature direct bonding |
| DE59406156D1 (de) | 1993-02-11 | 1998-07-16 | Siemens Ag | Verfahren zur Herstellung einer dreidimensionalen Schaltungsanordnung |
| US5516727A (en) | 1993-04-19 | 1996-05-14 | International Business Machines Corporation | Method for encapsulating light emitting diodes |
| JPH0766093A (ja) | 1993-08-23 | 1995-03-10 | Sumitomo Sitix Corp | 半導体ウエーハの貼り合わせ方法およびその装置 |
| DE69429848T2 (de) | 1993-11-01 | 2002-09-26 | Matsushita Electric Industrial Co., Ltd. | Elektronische Anordnung und Verfahren zur Herstellung |
| US5501003A (en) | 1993-12-15 | 1996-03-26 | Bel Fuse Inc. | Method of assembling electronic packages for surface mount applications |
| US5442235A (en) * | 1993-12-23 | 1995-08-15 | Motorola Inc. | Semiconductor device having an improved metal interconnect structure |
| US5413952A (en) | 1994-02-02 | 1995-05-09 | Motorola, Inc. | Direct wafer bonded structure method of making |
| JP3294934B2 (ja) | 1994-03-11 | 2002-06-24 | キヤノン株式会社 | 半導体基板の作製方法及び半導体基板 |
| JPH07283382A (ja) | 1994-04-12 | 1995-10-27 | Sony Corp | シリコン基板のはり合わせ方法 |
| KR960009074A (ko) | 1994-08-29 | 1996-03-22 | 모리시다 요이치 | 반도체 장치 및 그 제조방법 |
| JPH08125121A (ja) | 1994-08-29 | 1996-05-17 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| JP3171366B2 (ja) | 1994-09-05 | 2001-05-28 | 三菱マテリアル株式会社 | シリコン半導体ウェーハ及びその製造方法 |
| DE4433330C2 (de) | 1994-09-19 | 1997-01-30 | Fraunhofer Ges Forschung | Verfahren zur Herstellung von Halbleiterstrukturen mit vorteilhaften Hochfrequenzeigenschaften sowie eine Halbleiterwaferstruktur |
| DE4433845A1 (de) | 1994-09-22 | 1996-03-28 | Fraunhofer Ges Forschung | Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung |
| JPH08186235A (ja) | 1994-12-16 | 1996-07-16 | Texas Instr Inc <Ti> | 半導体装置の製造方法 |
| JP2679681B2 (ja) | 1995-04-28 | 1997-11-19 | 日本電気株式会社 | 半導体装置、半導体装置用パッケージ及びその製造方法 |
| US5610431A (en) | 1995-05-12 | 1997-03-11 | The Charles Stark Draper Laboratory, Inc. | Covers for micromechanical sensors and other semiconductor devices |
| JP3490198B2 (ja) | 1995-10-25 | 2004-01-26 | 松下電器産業株式会社 | 半導体装置とその製造方法 |
| JP3979687B2 (ja) | 1995-10-26 | 2007-09-19 | アプライド マテリアルズ インコーポレイテッド | ハロゲンをドープした酸化珪素膜の膜安定性を改良する方法 |
| KR100438256B1 (ko) | 1995-12-18 | 2004-08-25 | 마츠시타 덴끼 산교 가부시키가이샤 | 반도체장치 및 그 제조방법 |
| US5956605A (en) | 1996-09-20 | 1999-09-21 | Micron Technology, Inc. | Use of nitrides for flip-chip encapsulation |
| JP3383811B2 (ja) | 1996-10-28 | 2003-03-10 | 松下電器産業株式会社 | 半導体チップモジュール及びその製造方法 |
| US5888631A (en) | 1996-11-08 | 1999-03-30 | W. L. Gore & Associates, Inc. | Method for minimizing warp in the production of electronic assemblies |
| US6054363A (en) | 1996-11-15 | 2000-04-25 | Canon Kabushiki Kaisha | Method of manufacturing semiconductor article |
| US5821692A (en) | 1996-11-26 | 1998-10-13 | Motorola, Inc. | Organic electroluminescent device hermetic encapsulation package |
| US6809421B1 (en) | 1996-12-02 | 2004-10-26 | Kabushiki Kaisha Toshiba | Multichip semiconductor device, chip therefor and method of formation thereof |
| EP0951064A4 (en) | 1996-12-24 | 2005-02-23 | Nitto Denko Corp | PREPARATION OF A SEMICONDUCTOR DEVICE |
| US6221753B1 (en) | 1997-01-24 | 2001-04-24 | Micron Technology, Inc. | Flip chip technique for chip assembly |
| JPH10223636A (ja) | 1997-02-12 | 1998-08-21 | Nec Yamagata Ltd | 半導体集積回路装置の製造方法 |
| JP4026882B2 (ja) * | 1997-02-24 | 2007-12-26 | 三洋電機株式会社 | 半導体装置 |
| US5929512A (en) | 1997-03-18 | 1999-07-27 | Jacobs; Richard L. | Urethane encapsulated integrated circuits and compositions therefor |
| US5915167A (en) | 1997-04-04 | 1999-06-22 | Elm Technology Corporation | Three dimensional structure memory |
| US6322600B1 (en) | 1997-04-23 | 2001-11-27 | Advanced Technology Materials, Inc. | Planarization compositions and methods for removing interlayer dielectric films |
| JP4032454B2 (ja) | 1997-06-27 | 2008-01-16 | ソニー株式会社 | 三次元回路素子の製造方法 |
| US6097096A (en) | 1997-07-11 | 2000-08-01 | Advanced Micro Devices | Metal attachment method and structure for attaching substrates at low temperatures |
| JP4947834B2 (ja) | 1997-11-26 | 2012-06-06 | アプライド マテリアルズ インコーポレイテッド | ダメージフリー被覆刻設堆積法 |
| JPH11186120A (ja) | 1997-12-24 | 1999-07-09 | Canon Inc | 同種あるいは異種材料基板間の密着接合法 |
| US6137063A (en) | 1998-02-27 | 2000-10-24 | Micron Technology, Inc. | Electrical interconnections |
| EP0951068A1 (en) | 1998-04-17 | 1999-10-20 | Interuniversitair Micro-Elektronica Centrum Vzw | Method of fabrication of a microstructure having an inside cavity |
| US6147000A (en) * | 1998-08-11 | 2000-11-14 | Advanced Micro Devices, Inc. | Method for forming low dielectric passivation of copper interconnects |
| US6316786B1 (en) | 1998-08-29 | 2001-11-13 | International Business Machines Corporation | Organic opto-electronic devices |
| JP2000100679A (ja) | 1998-09-22 | 2000-04-07 | Canon Inc | 薄片化による基板間微小領域固相接合法及び素子構造 |
| JP2000150810A (ja) | 1998-11-17 | 2000-05-30 | Toshiba Microelectronics Corp | 半導体装置及びその製造方法 |
| US6515343B1 (en) | 1998-11-19 | 2003-02-04 | Quicklogic Corporation | Metal-to-metal antifuse with non-conductive diffusion barrier |
| US6232150B1 (en) | 1998-12-03 | 2001-05-15 | The Regents Of The University Of Michigan | Process for making microstructures and microstructures made thereby |
| JP3293792B2 (ja) | 1999-01-12 | 2002-06-17 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| JP3918350B2 (ja) | 1999-03-05 | 2007-05-23 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| US6348709B1 (en) * | 1999-03-15 | 2002-02-19 | Micron Technology, Inc. | Electrical contact for high dielectric constant capacitors and method for fabricating the same |
| JP3532788B2 (ja) | 1999-04-13 | 2004-05-31 | 唯知 須賀 | 半導体装置及びその製造方法 |
| US6259160B1 (en) * | 1999-04-21 | 2001-07-10 | Advanced Micro Devices, Inc. | Apparatus and method of encapsulated copper (Cu) Interconnect formation |
| JP2000311982A (ja) | 1999-04-26 | 2000-11-07 | Toshiba Corp | 半導体装置と半導体モジュールおよびそれらの製造方法 |
| US6258625B1 (en) | 1999-05-18 | 2001-07-10 | International Business Machines Corporation | Method of interconnecting electronic components using a plurality of conductive studs |
| US6218203B1 (en) | 1999-06-28 | 2001-04-17 | Advantest Corp. | Method of producing a contact structure |
| KR100333384B1 (ko) | 1999-06-28 | 2002-04-18 | 박종섭 | 칩 사이즈 스택 패키지 및 그의 제조방법 |
| JP3619395B2 (ja) | 1999-07-30 | 2005-02-09 | 京セラ株式会社 | 半導体素子内蔵配線基板およびその製造方法 |
| US6756253B1 (en) | 1999-08-27 | 2004-06-29 | Micron Technology, Inc. | Method for fabricating a semiconductor component with external contact polymer support layer |
| US6583515B1 (en) | 1999-09-03 | 2003-06-24 | Texas Instruments Incorporated | Ball grid array package for enhanced stress tolerance |
| US6593645B2 (en) | 1999-09-24 | 2003-07-15 | United Microelectronics Corp. | Three-dimensional system-on-chip structure |
| JP2001102479A (ja) | 1999-09-27 | 2001-04-13 | Toshiba Corp | 半導体集積回路装置およびその製造方法 |
| US6984571B1 (en) | 1999-10-01 | 2006-01-10 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
| JP3659101B2 (ja) | 1999-12-13 | 2005-06-15 | 富士ゼロックス株式会社 | 窒化物半導体素子及びその製造方法 |
| US6902987B1 (en) | 2000-02-16 | 2005-06-07 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
| EP1130654A1 (de) | 2000-03-01 | 2001-09-05 | Infineon Technologies AG | Integriertes Bauelement mit Metall-Isolator-Metall-Kondensator |
| US6373137B1 (en) * | 2000-03-21 | 2002-04-16 | Micron Technology, Inc. | Copper interconnect for an integrated circuit and methods for its fabrication |
| JP4123682B2 (ja) | 2000-05-16 | 2008-07-23 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
| US6326698B1 (en) | 2000-06-08 | 2001-12-04 | Micron Technology, Inc. | Semiconductor devices having protective layers thereon through which contact pads are exposed and stereolithographic methods of fabricating such semiconductor devices |
| JP4322402B2 (ja) | 2000-06-22 | 2009-09-02 | 大日本印刷株式会社 | プリント配線基板及びその製造方法 |
| JP2002009248A (ja) | 2000-06-26 | 2002-01-11 | Oki Electric Ind Co Ltd | キャパシタおよびその製造方法 |
| US6376353B1 (en) * | 2000-07-03 | 2002-04-23 | Chartered Semiconductor Manufacturing Ltd. | Aluminum and copper bimetallic bond pad scheme for copper damascene interconnects |
| JP3440057B2 (ja) | 2000-07-05 | 2003-08-25 | 唯知 須賀 | 半導体装置およびその製造方法 |
| WO2002009478A1 (fr) | 2000-07-24 | 2002-01-31 | Tdk Corporation | Dispositif luminescent |
| US6423640B1 (en) | 2000-08-09 | 2002-07-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Headless CMP process for oxide planarization |
| US6483044B1 (en) | 2000-08-23 | 2002-11-19 | Micron Technology, Inc. | Interconnecting substrates for electrical coupling of microelectronic components |
| US6583460B1 (en) * | 2000-08-29 | 2003-06-24 | Micron Technology, Inc. | Method of forming a metal to polysilicon contact in oxygen environment |
| JP2002110799A (ja) | 2000-09-27 | 2002-04-12 | Toshiba Corp | 半導体装置及びその製造方法 |
| US6600224B1 (en) | 2000-10-31 | 2003-07-29 | International Business Machines Corporation | Thin film attachment to laminate using a dendritic interconnection |
| US6552436B2 (en) | 2000-12-08 | 2003-04-22 | Motorola, Inc. | Semiconductor device having a ball grid array and method therefor |
| US7084507B2 (en) | 2001-05-02 | 2006-08-01 | Fujitsu Limited | Integrated circuit device and method of producing the same |
| JP2002353416A (ja) | 2001-05-25 | 2002-12-06 | Sony Corp | 半導体記憶装置およびその製造方法 |
| JP3705159B2 (ja) | 2001-06-11 | 2005-10-12 | 株式会社デンソー | 半導体装置の製造方法 |
| DE10131627B4 (de) | 2001-06-29 | 2006-08-10 | Infineon Technologies Ag | Verfahren zum Herstellen einer Halbleiterspeichereinrichtung |
| JP2003023071A (ja) | 2001-07-05 | 2003-01-24 | Sony Corp | 半導体装置製造方法および半導体装置 |
| US6847527B2 (en) | 2001-08-24 | 2005-01-25 | 3M Innovative Properties Company | Interconnect module with reduced power distribution impedance |
| US6555917B1 (en) | 2001-10-09 | 2003-04-29 | Amkor Technology, Inc. | Semiconductor package having stacked semiconductor chips and method of making the same |
| US6667225B2 (en) | 2001-12-17 | 2003-12-23 | Intel Corporation | Wafer-bonding using solder and method of making the same |
| US20030113947A1 (en) | 2001-12-19 | 2003-06-19 | Vandentop Gilroy J. | Electrical/optical integration scheme using direct copper bonding |
| US6660564B2 (en) | 2002-01-25 | 2003-12-09 | Sony Corporation | Wafer-level through-wafer packaging process for MEMS and MEMS package produced thereby |
| US6887769B2 (en) | 2002-02-06 | 2005-05-03 | Intel Corporation | Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same |
| US6661085B2 (en) | 2002-02-06 | 2003-12-09 | Intel Corporation | Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack |
| US6624003B1 (en) | 2002-02-06 | 2003-09-23 | Teravicta Technologies, Inc. | Integrated MEMS device and package |
| US6762076B2 (en) | 2002-02-20 | 2004-07-13 | Intel Corporation | Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
| US6720212B2 (en) | 2002-03-14 | 2004-04-13 | Infineon Technologies Ag | Method of eliminating back-end rerouting in ball grid array packaging |
| US6627814B1 (en) | 2002-03-22 | 2003-09-30 | David H. Stark | Hermetically sealed micro-device package with window |
| US6642081B1 (en) | 2002-04-11 | 2003-11-04 | Robert Patti | Interlocking conductor method for bonding wafers to produce stacked integrated circuits |
| US6713402B2 (en) | 2002-05-31 | 2004-03-30 | Texas Instruments Incorporated | Methods for polymer removal following etch-stop layer etch |
| CN1248304C (zh) | 2002-06-13 | 2006-03-29 | 松下电器产业株式会社 | 布线结构的形成方法 |
| TWI229435B (en) | 2002-06-18 | 2005-03-11 | Sanyo Electric Co | Manufacture of semiconductor device |
| US7105980B2 (en) | 2002-07-03 | 2006-09-12 | Sawtek, Inc. | Saw filter device and method employing normal temperature bonding for producing desirable filter production and performance characteristics |
| JP2004133384A (ja) | 2002-08-14 | 2004-04-30 | Sony Corp | レジスト用剥離剤組成物及び半導体装置の製造方法 |
| JP4083502B2 (ja) | 2002-08-19 | 2008-04-30 | 株式会社フジミインコーポレーテッド | 研磨方法及びそれに用いられる研磨用組成物 |
| US7023093B2 (en) | 2002-10-24 | 2006-04-04 | International Business Machines Corporation | Very low effective dielectric constant interconnect Structures and methods for fabricating the same |
| US7485962B2 (en) | 2002-12-10 | 2009-02-03 | Fujitsu Limited | Semiconductor device, wiring substrate forming method, and substrate processing apparatus |
| JP3918935B2 (ja) | 2002-12-20 | 2007-05-23 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| US7354798B2 (en) | 2002-12-20 | 2008-04-08 | International Business Machines Corporation | Three-dimensional device fabrication method |
| US20040126993A1 (en) | 2002-12-30 | 2004-07-01 | Chan Kevin K. | Low temperature fusion bonding with high surface energy using a wet chemical treatment |
| KR100598245B1 (ko) | 2002-12-30 | 2006-07-07 | 동부일렉트로닉스 주식회사 | 반도체 금속 배선 형성 방법 |
| JP4173374B2 (ja) | 2003-01-08 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| JP3981026B2 (ja) | 2003-01-30 | 2007-09-26 | 株式会社東芝 | 多層配線層を有する半導体装置およびその製造方法 |
| US6962835B2 (en) | 2003-02-07 | 2005-11-08 | Ziptronix, Inc. | Method for room temperature metal direct bonding |
| US7135780B2 (en) | 2003-02-12 | 2006-11-14 | Micron Technology, Inc. | Semiconductor substrate for build-up packages |
| JP4082236B2 (ja) | 2003-02-21 | 2008-04-30 | ソニー株式会社 | 半導体装置及びその製造方法 |
| US7617279B2 (en) | 2003-02-27 | 2009-11-10 | Fujifilm Corporation | Image-printing system using peer-to-peer network |
| JP4001115B2 (ja) | 2003-02-28 | 2007-10-31 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
| US6908027B2 (en) | 2003-03-31 | 2005-06-21 | Intel Corporation | Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process |
| DE10319538B4 (de) | 2003-04-30 | 2008-01-17 | Qimonda Ag | Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitereinrichtung |
| US7109092B2 (en) | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
| JP4130158B2 (ja) | 2003-06-09 | 2008-08-06 | 三洋電機株式会社 | 半導体装置の製造方法、半導体装置 |
| TWI275168B (en) | 2003-06-06 | 2007-03-01 | Sanyo Electric Co | Semiconductor device and method for making the same |
| US20040245636A1 (en) | 2003-06-06 | 2004-12-09 | International Business Machines Corporation | Full removal of dual damascene metal level |
| TWI229930B (en) | 2003-06-09 | 2005-03-21 | Advanced Semiconductor Eng | Chip structure |
| US20040262772A1 (en) | 2003-06-30 | 2004-12-30 | Shriram Ramanathan | Methods for bonding wafers using a metal interlayer |
| JP2005029183A (ja) | 2003-07-09 | 2005-02-03 | Sumitomo Bakelite Co Ltd | 電子部品収納用エンボスキャリアテープ |
| JP2005086089A (ja) | 2003-09-10 | 2005-03-31 | Seiko Epson Corp | ３次元デバイスの製造方法 |
| JP2005093486A (ja) | 2003-09-12 | 2005-04-07 | Seiko Epson Corp | 半導体装置の製造方法及び半導体装置 |
| US6867073B1 (en) | 2003-10-21 | 2005-03-15 | Ziptronix, Inc. | Single mask via method and device |
| JP2005135988A (ja) | 2003-10-28 | 2005-05-26 | Toshiba Corp | 半導体装置の製造方法 |
| US7193323B2 (en) * | 2003-11-18 | 2007-03-20 | International Business Machines Corporation | Electroplated CoWP composite structures as copper barrier layers |
| US20050170609A1 (en) | 2003-12-15 | 2005-08-04 | Alie Susan A. | Conductive bond for through-wafer interconnect |
| US6936918B2 (en) | 2003-12-15 | 2005-08-30 | Analog Devices, Inc. | MEMS device with conductive path through substrate |
| DE102004001853B3 (de) | 2004-01-13 | 2005-07-21 | Infineon Technologies Ag | Verfahren zum Herstellen von Kontaktierungsanschlüssen |
| US7842948B2 (en) | 2004-02-27 | 2010-11-30 | Nvidia Corporation | Flip chip semiconductor die internal signal access system and method |
| JP4897201B2 (ja) | 2004-05-31 | 2012-03-14 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP4376715B2 (ja) | 2004-07-16 | 2009-12-02 | 三洋電機株式会社 | 半導体装置の製造方法 |
| KR100618855B1 (ko) * | 2004-08-02 | 2006-09-01 | 삼성전자주식회사 | 금속 콘택 구조체 형성방법 및 이를 이용한 상변화 메모리제조방법 |
| US20060057945A1 (en) | 2004-09-16 | 2006-03-16 | Chia-Lin Hsu | Chemical mechanical polishing process |
| US20060076634A1 (en) | 2004-09-27 | 2006-04-13 | Lauren Palmateer | Method and system for packaging MEMS devices with incorporated getter |
| KR100580212B1 (ko) | 2004-12-20 | 2006-05-16 | 삼성전자주식회사 | 급지장치 및 이를 구비하는 화상형성장치 |
| GB0505680D0 (en) | 2005-03-22 | 2005-04-27 | Cambridge Display Tech Ltd | Apparatus and method for increased device lifetime in an organic electro-luminescent device |
| US7485968B2 (en) | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
| US7193423B1 (en) | 2005-12-12 | 2007-03-20 | International Business Machines Corporation | Wafer-to-wafer alignments |
| US7348648B2 (en) | 2006-03-13 | 2008-03-25 | International Business Machines Corporation | Interconnect structure with a barrier-redundancy feature |
| TWI299552B (en) | 2006-03-24 | 2008-08-01 | Advanced Semiconductor Eng | Package structure |
| US7972683B2 (en) | 2006-03-28 | 2011-07-05 | Innovative Micro Technology | Wafer bonding material with embedded conductive particles |
| JP2007283382A (ja) | 2006-04-19 | 2007-11-01 | Mitsubishi Heavy Ind Ltd | 鋳造用中子、精密鋳造用中子及び該精密鋳造用中子を用いて製造した精密鋳造品 |
| JP4453678B2 (ja) | 2006-05-01 | 2010-04-21 | ソニー株式会社 | データ処理方法およびデータ処理システム |
| US7750488B2 (en) | 2006-07-10 | 2010-07-06 | Tezzaron Semiconductor, Inc. | Method for bonding wafers to produce stacked integrated circuits |
| DE102006035864B4 (de) | 2006-08-01 | 2014-03-27 | Qimonda Ag | Verfahren zur Herstellung einer elektrischen Durchkontaktierung |
| US7964496B2 (en) | 2006-11-21 | 2011-06-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Schemes for forming barrier layers for copper in interconnect structures |
| KR100825648B1 (ko) * | 2006-11-29 | 2008-04-25 | 동부일렉트로닉스 주식회사 | 반도체 소자 및 그 제조 방법 |
| JP5204408B2 (ja) | 2007-01-30 | 2013-06-05 | 株式会社ソニー・コンピュータエンタテインメント | 文字入力装置、その制御方法、プログラム及び情報記憶媒体 |
| US7803693B2 (en) | 2007-02-15 | 2010-09-28 | John Trezza | Bowed wafer hybridization compensation |
| KR100850212B1 (ko) * | 2007-04-20 | 2008-08-04 | 삼성전자주식회사 | 균일한 무전해 도금 두께를 얻을 수 있는 반도체 소자의제조방법 |
| CN103178032B (zh) | 2007-07-31 | 2017-06-20 | 英闻萨斯有限公司 | 使用穿透硅通道的半导体封装方法 |
| KR101387701B1 (ko) | 2007-08-01 | 2014-04-23 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조방법 |
| JP2009120979A (ja) | 2007-11-13 | 2009-06-04 | Satoshi Tsuchiya | ビーズ織り機用折返し縫い補助具 |
| JP2008125121A (ja) | 2008-01-15 | 2008-05-29 | Sumitomo Bakelite Co Ltd | 化粧板用印刷基材の製造方法 |
| DE102008007001B4 (de) * | 2008-01-31 | 2016-09-22 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Vergrößern des Widerstandsverhaltens gegenüber Elektromigration in einer Verbindungsstruktur eines Halbleiterbauelements durch Bilden einer Legierung |
| US20090200668A1 (en) * | 2008-02-07 | 2009-08-13 | International Business Machines Corporation | Interconnect structure with high leakage resistance |
| US8017873B2 (en) | 2008-03-03 | 2011-09-13 | Himax Technologies Limited | Built-in method of thermal dissipation layer for driver IC substrate and structure thereof |
| US8349635B1 (en) | 2008-05-20 | 2013-01-08 | Silicon Laboratories Inc. | Encapsulated MEMS device and method to form the same |
| US9893004B2 (en) | 2011-07-27 | 2018-02-13 | Broadpak Corporation | Semiconductor interposer integration |
| US8130527B2 (en) | 2008-09-11 | 2012-03-06 | Micron Technology, Inc. | Stacked device identification assignment |
| US7872332B2 (en) | 2008-09-11 | 2011-01-18 | Micron Technology, Inc. | Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods |
| US7825024B2 (en) | 2008-11-25 | 2010-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming through-silicon vias |
| JP2010135404A (ja) | 2008-12-02 | 2010-06-17 | Mitsui Chemicals Inc | 有機トランジスタ |
| KR100945800B1 (ko) | 2008-12-09 | 2010-03-05 | 김영혜 | 이종 접합 웨이퍼 제조방법 |
| JP2010223636A (ja) | 2009-03-19 | 2010-10-07 | Olympus Corp | 光学式エンコーダ |
| US8476165B2 (en) | 2009-04-01 | 2013-07-02 | Tokyo Electron Limited | Method for thinning a bonding wafer |
| JP2010242383A (ja) | 2009-04-07 | 2010-10-28 | Bunka Shutter Co Ltd | 開閉体装置 |
| US8101517B2 (en) * | 2009-09-29 | 2012-01-24 | Infineon Technologies Ag | Semiconductor device and method for making same |
| US8482132B2 (en) * | 2009-10-08 | 2013-07-09 | International Business Machines Corporation | Pad bonding employing a self-aligned plated liner for adhesion enhancement |
| US8258619B2 (en) | 2009-11-12 | 2012-09-04 | International Business Machines Corporation | Integrated circuit die stacks with translationally compatible vias |
| FR2954585B1 (fr) | 2009-12-23 | 2012-03-02 | Soitec Silicon Insulator Technologies | Procede de realisation d'une heterostructure avec minimisation de contrainte |
| US9217192B2 (en) * | 2010-03-01 | 2015-12-22 | Osaka University | Semiconductor device and bonding material for semiconductor device |
| JP2011186120A (ja) | 2010-03-08 | 2011-09-22 | Konica Minolta Business Technologies Inc | 有機感光体、画像形成装置及びプロセスカートリッジ |
| JP5517800B2 (ja) | 2010-07-09 | 2014-06-11 | キヤノン株式会社 | 固体撮像装置用の部材および固体撮像装置の製造方法 |
| FR2963158B1 (fr) | 2010-07-21 | 2013-05-17 | Commissariat Energie Atomique | Procede d'assemblage par collage direct entre deux elements comprenant des portions de cuivre et de materiaux dielectriques |
| CN102024782B (zh) | 2010-10-12 | 2012-07-25 | 北京大学 | 三维垂直互联结构及其制作方法 |
| FR2966283B1 (fr) | 2010-10-14 | 2012-11-30 | Soi Tec Silicon On Insulator Tech Sa | Procede pour realiser une structure de collage |
| US8377798B2 (en) | 2010-11-10 | 2013-02-19 | Taiwan Semiconductor Manufacturing Co., Ltd | Method and structure for wafer to wafer bonding in semiconductor packaging |
| US8476146B2 (en) | 2010-12-03 | 2013-07-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reducing wafer distortion through a low CTE layer |
| US8778773B2 (en) * | 2010-12-16 | 2014-07-15 | Soitec | Methods for directly bonding together semiconductor structures, and bonded semiconductor structures formed using such methods |
| JP5601380B2 (ja) * | 2010-12-28 | 2014-10-08 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| US8620164B2 (en) | 2011-01-20 | 2013-12-31 | Intel Corporation | Hybrid III-V silicon laser formed by direct bonding |
| US8988299B2 (en) | 2011-02-17 | 2015-03-24 | International Business Machines Corporation | Integrated antenna for RFIC package applications |
| JP2012174988A (ja) * | 2011-02-23 | 2012-09-10 | Sony Corp | 接合電極、接合電極の製造方法、半導体装置、及び、半導体装置の製造方法 |
| US8716105B2 (en) | 2011-03-31 | 2014-05-06 | Soitec | Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures and intermediate structures formed using such methods |
| US8501537B2 (en) | 2011-03-31 | 2013-08-06 | Soitec | Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures formed using such methods |
| WO2012161044A1 (ja) | 2011-05-24 | 2012-11-29 | ソニー株式会社 | 半導体装置 |
| US8896125B2 (en) | 2011-07-05 | 2014-11-25 | Sony Corporation | Semiconductor device, fabrication method for a semiconductor device and electronic apparatus |
| JP5982748B2 (ja) | 2011-08-01 | 2016-08-31 | ソニー株式会社 | 半導体装置、半導体装置の製造方法、および電子機器 |
| US8697493B2 (en) | 2011-07-18 | 2014-04-15 | Soitec | Bonding surfaces for direct bonding of semiconductor structures |
| US8441131B2 (en) | 2011-09-12 | 2013-05-14 | Globalfoundries Inc. | Strain-compensating fill patterns for controlling semiconductor chip package interactions |
| FR2986904A1 (fr) * | 2012-02-14 | 2013-08-16 | St Microelectronics Crolles 2 | Systeme d'assemblage de puces |
| US8796853B2 (en) * | 2012-02-24 | 2014-08-05 | International Business Machines Corporation | Metallic capped interconnect structure with high electromigration resistance and low resistivity |
| CN103377911B (zh) | 2012-04-16 | 2016-09-21 | 中国科学院微电子研究所 | 提高化学机械平坦化工艺均匀性的方法 |
| TWI498975B (zh) * | 2012-04-26 | 2015-09-01 | 亞太優勢微系統股份有限公司 | 封裝結構與基材的接合方法 |
| US9214435B2 (en) | 2012-05-21 | 2015-12-15 | Globalfoundries Inc. | Via structure for three-dimensional circuit integration |
| US9142517B2 (en) | 2012-06-05 | 2015-09-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid bonding mechanisms for semiconductor wafers |
| US8809123B2 (en) | 2012-06-05 | 2014-08-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers |
| US8772946B2 (en) * | 2012-06-08 | 2014-07-08 | Invensas Corporation | Reduced stress TSV and interposer structures |
| TWI540710B (zh) | 2012-06-22 | 2016-07-01 | 新力股份有限公司 | A semiconductor device, a method for manufacturing a semiconductor device, and an electronic device |
| US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
| DE102012224310A1 (de) | 2012-12-21 | 2014-06-26 | Tesa Se | Gettermaterial enthaltendes Klebeband |
| US20140175655A1 (en) | 2012-12-22 | 2014-06-26 | Industrial Technology Research Institute | Chip bonding structure and manufacturing method thereof |
| TWI483378B (zh) | 2013-01-04 | 2015-05-01 | 黃財煜 | 三維晶片堆疊結構 |
| US8916448B2 (en) | 2013-01-09 | 2014-12-23 | International Business Machines Corporation | Metal to metal bonding for stacked (3D) integrated circuits |
| TWI518991B (zh) | 2013-02-08 | 2016-01-21 | 巽晨國際股份有限公司 | Integrated antenna and integrated circuit components of the shielding module |
| US8946784B2 (en) | 2013-02-18 | 2015-02-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for image sensor packaging |
| US9105485B2 (en) | 2013-03-08 | 2015-08-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding structures and methods of forming the same |
| US8802538B1 (en) | 2013-03-15 | 2014-08-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for hybrid wafer bonding |
| US9443796B2 (en) | 2013-03-15 | 2016-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Air trench in packages incorporating hybrid bonding |
| US9064937B2 (en) | 2013-05-30 | 2015-06-23 | International Business Machines Corporation | Substrate bonding with diffusion barrier structures |
| US10490741B2 (en) | 2013-06-05 | 2019-11-26 | SK Hynix Inc. | Electronic device and method for fabricating the same |
| US9929050B2 (en) | 2013-07-16 | 2018-03-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for forming three-dimensional integrated circuit (3DIC) stacking structure |
| US9723716B2 (en) | 2013-09-27 | 2017-08-01 | Infineon Technologies Ag | Contact pad structure, an electronic component, and a method for manufacturing a contact pad structure |
| US9257399B2 (en) | 2013-10-17 | 2016-02-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D integrated circuit and methods of forming the same |
| US9159610B2 (en) * | 2013-10-23 | 2015-10-13 | Globalfoundires, Inc. | Hybrid manganese and manganese nitride barriers for back-end-of-line metallization and methods for fabricating the same |
| JP2015115446A (ja) | 2013-12-11 | 2015-06-22 | 株式会社東芝 | 半導体装置の製造方法 |
| US9437572B2 (en) | 2013-12-18 | 2016-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Conductive pad structure for hybrid bonding and methods of forming same |
| US9865523B2 (en) * | 2014-01-17 | 2018-01-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Robust through-silicon-via structure |
| US20150262902A1 (en) | 2014-03-12 | 2015-09-17 | Invensas Corporation | Integrated circuits protected by substrates with cavities, and methods of manufacture |
| US9230941B2 (en) | 2014-03-28 | 2016-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding structure for stacked semiconductor devices |
| US9299736B2 (en) | 2014-03-28 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid bonding with uniform pattern density |
| US9543257B2 (en) | 2014-05-29 | 2017-01-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3DIC interconnect devices and methods of forming same |
| US9472458B2 (en) | 2014-06-04 | 2016-10-18 | Semiconductor Components Industries, Llc | Method of reducing residual contamination in singulated semiconductor die |
| KR102275705B1 (ko) | 2014-07-11 | 2021-07-09 | 삼성전자주식회사 | 웨이퍼 대 웨이퍼 접합 구조 |
| US9455182B2 (en) | 2014-08-22 | 2016-09-27 | International Business Machines Corporation | Interconnect structure with capping layer and barrier layer |
| US9536848B2 (en) | 2014-10-16 | 2017-01-03 | Globalfoundries Inc. | Bond pad structure for low temperature flip chip bonding |
| US9394161B2 (en) | 2014-11-14 | 2016-07-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | MEMS and CMOS integration with low-temperature bonding |
| US11069734B2 (en) | 2014-12-11 | 2021-07-20 | Invensas Corporation | Image sensor device |
| US9741620B2 (en) | 2015-06-24 | 2017-08-22 | Invensas Corporation | Structures and methods for reliable packages |
| EP3113216B1 (en) | 2015-07-01 | 2021-05-19 | IMEC vzw | A method for bonding and interconnecting integrated circuit devices |
| US9656852B2 (en) | 2015-07-06 | 2017-05-23 | Taiwan Semiconductor Manufacturing Company Ltd. | CMOS-MEMS device structure, bonding mesa structure and associated method |
| US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
| US10075657B2 (en) | 2015-07-21 | 2018-09-11 | Fermi Research Alliance, Llc | Edgeless large area camera system |
| US9728521B2 (en) | 2015-07-23 | 2017-08-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Hybrid bond using a copper alloy for yield improvement |
| KR102379165B1 (ko) | 2015-08-17 | 2022-03-25 | 삼성전자주식회사 | Tsv 구조를 구비한 집적회로 소자 및 그 제조 방법 |
| US9559081B1 (en) | 2015-08-21 | 2017-01-31 | Apple Inc. | Independent 3D stacking |
| US9953941B2 (en) | 2015-08-25 | 2018-04-24 | Invensas Bonding Technologies, Inc. | Conductive barrier direct hybrid bonding |
| US9496239B1 (en) | 2015-12-11 | 2016-11-15 | International Business Machines Corporation | Nitride-enriched oxide-to-oxide 3D wafer bonding |
| US9852988B2 (en) | 2015-12-18 | 2017-12-26 | Invensas Bonding Technologies, Inc. | Increased contact alignment tolerance for direct bonding |
| US9881882B2 (en) | 2016-01-06 | 2018-01-30 | Mediatek Inc. | Semiconductor package with three-dimensional antenna |
| US9923011B2 (en) | 2016-01-12 | 2018-03-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device structure with stacked semiconductor dies |
| US10446532B2 (en) | 2016-01-13 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Systems and methods for efficient transfer of semiconductor elements |
| US10636767B2 (en) | 2016-02-29 | 2020-04-28 | Invensas Corporation | Correction die for wafer/die stack |
| US10026716B2 (en) | 2016-04-15 | 2018-07-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3DIC formation with dies bonded to formed RDLs |
| CN107305861B (zh) | 2016-04-25 | 2019-09-03 | 晟碟信息科技（上海）有限公司 | 半导体装置及其制造方法 |
| US10204893B2 (en) | 2016-05-19 | 2019-02-12 | Invensas Bonding Technologies, Inc. | Stacked dies and methods for forming bonded structures |
| KR102505856B1 (ko) | 2016-06-09 | 2023-03-03 | 삼성전자 주식회사 | 웨이퍼 대 웨이퍼 접합 구조체 |
| US10229877B2 (en) | 2016-06-22 | 2019-03-12 | Nanya Technology Corporation | Semiconductor chip and multi-chip package using thereof |
| US9941241B2 (en) | 2016-06-30 | 2018-04-10 | International Business Machines Corporation | Method for wafer-wafer bonding |
| US9892961B1 (en) | 2016-08-09 | 2018-02-13 | International Business Machines Corporation | Air gap spacer formation for nano-scale semiconductor devices |
| EP3531445B1 (en) | 2016-09-07 | 2020-06-24 | IMEC vzw | A method for bonding and interconnecting integrated circuit devices |
| US10446487B2 (en) | 2016-09-30 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
| US10672663B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D chip sharing power circuit |
| US11176450B2 (en) | 2017-08-03 | 2021-11-16 | Xcelsis Corporation | Three dimensional circuit implementing machine trained network |
| US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
| US10163750B2 (en) | 2016-12-05 | 2018-12-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure for heat dissipation |
| US10453832B2 (en) | 2016-12-15 | 2019-10-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Seal ring structures and methods of forming same |
| US10002844B1 (en) | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US20180182665A1 (en) | 2016-12-28 | 2018-06-28 | Invensas Bonding Technologies, Inc. | Processed Substrate |
| WO2018125673A2 (en) | 2016-12-28 | 2018-07-05 | Invensas Bonding Technologies, Inc | Processing stacked substrates |
| US20180190583A1 (en) | 2016-12-29 | 2018-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures with integrated passive component |
| WO2018126052A1 (en) | 2016-12-29 | 2018-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures with integrated passive component |
| US10276909B2 (en) | 2016-12-30 | 2019-04-30 | Invensas Bonding Technologies, Inc. | Structure comprising at least a first element bonded to a carrier having a closed metallic channel waveguide formed therein |
| US10431614B2 (en) | 2017-02-01 | 2019-10-01 | Semiconductor Components Industries, Llc | Edge seals for semiconductor packages |
| US10522499B2 (en) | 2017-02-09 | 2019-12-31 | Invensas Bonding Technologies, Inc. | Bonded structures |
| WO2018169968A1 (en) | 2017-03-16 | 2018-09-20 | Invensas Corporation | Direct-bonded led arrays and applications |
| US10515913B2 (en) | 2017-03-17 | 2019-12-24 | Invensas Bonding Technologies, Inc. | Multi-metal contact structure |
| US10508030B2 (en) | 2017-03-21 | 2019-12-17 | Invensas Bonding Technologies, Inc. | Seal for microelectronic assembly |
| JP6640780B2 (ja) | 2017-03-22 | 2020-02-05 | キオクシア株式会社 | 半導体装置の製造方法および半導体装置 |
| WO2018183739A1 (en) | 2017-03-31 | 2018-10-04 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
| US10269756B2 (en) | 2017-04-21 | 2019-04-23 | Invensas Bonding Technologies, Inc. | Die processing |
| US10580823B2 (en) | 2017-05-03 | 2020-03-03 | United Microelectronics Corp. | Wafer level packaging method |
| US10879212B2 (en) | 2017-05-11 | 2020-12-29 | Invensas Bonding Technologies, Inc. | Processed stacked dies |
| US10446441B2 (en) | 2017-06-05 | 2019-10-15 | Invensas Corporation | Flat metal features for microelectronics applications |
| US10217720B2 (en) | 2017-06-15 | 2019-02-26 | Invensas Corporation | Multi-chip modules formed using wafer-level processing of a reconstitute wafer |
| US10840205B2 (en) | 2017-09-24 | 2020-11-17 | Invensas Bonding Technologies, Inc. | Chemical mechanical polishing for hybrid bonding |
| US11195748B2 (en) | 2017-09-27 | 2021-12-07 | Invensas Corporation | Interconnect structures and methods for forming same |
| US11031285B2 (en) | 2017-10-06 | 2021-06-08 | Invensas Bonding Technologies, Inc. | Diffusion barrier collar for interconnects |
| US11251157B2 (en) | 2017-11-01 | 2022-02-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Die stack structure with hybrid bonding structure and method of fabricating the same and package |
| CN107748879A (zh) | 2017-11-16 | 2018-03-02 | 百度在线网络技术（北京）有限公司 | 用于获取人脸信息的方法及装置 |
| US11011503B2 (en) | 2017-12-15 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Direct-bonded optoelectronic interconnect for high-density integrated photonics |
| US10923408B2 (en) | 2017-12-22 | 2021-02-16 | Invensas Bonding Technologies, Inc. | Cavity packages |
| US11380597B2 (en) | 2017-12-22 | 2022-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US11127738B2 (en) | 2018-02-09 | 2021-09-21 | Xcelsis Corporation | Back biasing of FD-SOI circuit blocks |
| US10727219B2 (en) | 2018-02-15 | 2020-07-28 | Invensas Bonding Technologies, Inc. | Techniques for processing devices |
| US11169326B2 (en) | 2018-02-26 | 2021-11-09 | Invensas Bonding Technologies, Inc. | Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects |
| US11256004B2 (en) | 2018-03-20 | 2022-02-22 | Invensas Bonding Technologies, Inc. | Direct-bonded lamination for improved image clarity in optical devices |
| US10991804B2 (en) | 2018-03-29 | 2021-04-27 | Xcelsis Corporation | Transistor level interconnection methodologies utilizing 3D interconnects |
| US11056348B2 (en) | 2018-04-05 | 2021-07-06 | Invensas Bonding Technologies, Inc. | Bonding surfaces for microelectronics |
| US10790262B2 (en) | 2018-04-11 | 2020-09-29 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
| US10964664B2 (en) | 2018-04-20 | 2021-03-30 | Invensas Bonding Technologies, Inc. | DBI to Si bonding for simplified handle wafer |
| US11398258B2 (en) | 2018-04-30 | 2022-07-26 | Invensas Llc | Multi-die module with low power operation |
| US10403577B1 (en) | 2018-05-03 | 2019-09-03 | Invensas Corporation | Dielets on flexible and stretchable packaging for microelectronics |
| US11004757B2 (en) | 2018-05-14 | 2021-05-11 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US11276676B2 (en) | 2018-05-15 | 2022-03-15 | Invensas Bonding Technologies, Inc. | Stacked devices and methods of fabrication |
| US10923413B2 (en) | 2018-05-30 | 2021-02-16 | Xcelsis Corporation | Hard IP blocks with physically bidirectional passageways |
| CN112514059B (zh) | 2018-06-12 | 2024-05-24 | 隔热半导体粘合技术公司 | 堆叠微电子部件的层间连接 |
| US11393779B2 (en) | 2018-06-13 | 2022-07-19 | Invensas Bonding Technologies, Inc. | Large metal pads over TSV |
| EP3807927A4 (en) | 2018-06-13 | 2022-02-23 | Invensas Bonding Technologies, Inc. | TSV AS PAD |
| US10910344B2 (en) | 2018-06-22 | 2021-02-02 | Xcelsis Corporation | Systems and methods for releveled bump planes for chiplets |
| US11664357B2 (en) | 2018-07-03 | 2023-05-30 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for joining dissimilar materials in microelectronics |
| WO2020010265A1 (en) | 2018-07-06 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Microelectronic assemblies |
| WO2020010136A1 (en) | 2018-07-06 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Molded direct bonded and interconnected stack |
| US12406959B2 (en) | 2018-07-26 | 2025-09-02 | Adeia Semiconductor Bonding Technologies Inc. | Post CMP processing for hybrid bonding |
| US11515291B2 (en) | 2018-08-28 | 2022-11-29 | Adeia Semiconductor Inc. | Integrated voltage regulator and passive components |
| US20200075533A1 (en) | 2018-08-29 | 2020-03-05 | Invensas Bonding Technologies, Inc. | Bond enhancement in microelectronics by trapping contaminants and arresting cracks during direct-bonding processes |
| US11011494B2 (en) | 2018-08-31 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics |
| US11158573B2 (en) * | 2018-10-22 | 2021-10-26 | Invensas Bonding Technologies, Inc. | Interconnect structures |
| US11244920B2 (en) | 2018-12-18 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Method and structures for low temperature device bonding |
| US11476213B2 (en) | 2019-01-14 | 2022-10-18 | Invensas Bonding Technologies, Inc. | Bonded structures without intervening adhesive |
| US11387202B2 (en) | 2019-03-01 | 2022-07-12 | Invensas Llc | Nanowire bonding interconnect for fine-pitch microelectronics |
| US11901281B2 (en) | 2019-03-11 | 2024-02-13 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
| US10854578B2 (en) | 2019-03-29 | 2020-12-01 | Invensas Corporation | Diffused bitline replacement in stacked wafer memory |
| US11205625B2 (en) | 2019-04-12 | 2021-12-21 | Invensas Bonding Technologies, Inc. | Wafer-level bonding of obstructive elements |
| US11610846B2 (en) | 2019-04-12 | 2023-03-21 | Adeia Semiconductor Bonding Technologies Inc. | Protective elements for bonded structures including an obstructive element |
| US11373963B2 (en) | 2019-04-12 | 2022-06-28 | Invensas Bonding Technologies, Inc. | Protective elements for bonded structures |
| US11355404B2 (en) | 2019-04-22 | 2022-06-07 | Invensas Bonding Technologies, Inc. | Mitigating surface damage of probe pads in preparation for direct bonding of a substrate |
| US11385278B2 (en) | 2019-05-23 | 2022-07-12 | Invensas Bonding Technologies, Inc. | Security circuitry for bonded structures |
| US12374641B2 (en) | 2019-06-12 | 2025-07-29 | Adeia Semiconductor Bonding Technologies Inc. | Sealed bonded structures and methods for forming the same |
| US11296053B2 (en) | 2019-06-26 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Direct bonded stack structures for increased reliability and improved yield in microelectronics |
| US12080672B2 (en) | 2019-09-26 | 2024-09-03 | Adeia Semiconductor Bonding Technologies Inc. | Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive |
| US12113054B2 (en) | 2019-10-21 | 2024-10-08 | Adeia Semiconductor Technologies Llc | Non-volatile dynamic random access memory |
| US11862602B2 (en) | 2019-11-07 | 2024-01-02 | Adeia Semiconductor Technologies Llc | Scalable architecture for reduced cycles across SOC |
| US11762200B2 (en) | 2019-12-17 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded optical devices |
| US11876076B2 (en) | 2019-12-20 | 2024-01-16 | Adeia Semiconductor Technologies Llc | Apparatus for non-volatile random access memory stacks |
| KR102910967B1 (ko) | 2019-12-23 | 2026-01-09 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 결합형 구조체를 위한 전기적 리던던시 |
| US11721653B2 (en) | 2019-12-23 | 2023-08-08 | Adeia Semiconductor Bonding Technologies Inc. | Circuitry for electrical redundancy in bonded structures |
| US20210242152A1 (en) | 2020-02-05 | 2021-08-05 | Invensas Bonding Technologies, Inc. | Selective alteration of interconnect pads for direct bonding |
| WO2021188846A1 (en) | 2020-03-19 | 2021-09-23 | Invensas Bonding Technologies, Inc. | Dimension compensation control for directly bonded structures |
| US11742314B2 (en) | 2020-03-31 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
| US11735523B2 (en) | 2020-05-19 | 2023-08-22 | Adeia Semiconductor Bonding Technologies Inc. | Laterally unconfined structure |
| US11631647B2 (en) | 2020-06-30 | 2023-04-18 | Adeia Semiconductor Bonding Technologies Inc. | Integrated device packages with integrated device die and dummy element |
| US11764177B2 (en) | 2020-09-04 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
| US11728273B2 (en) | 2020-09-04 | 2023-08-15 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
| US11264357B1 (en) | 2020-10-20 | 2022-03-01 | Invensas Corporation | Mixed exposure for large die |
| WO2022094587A1 (en) | 2020-10-29 | 2022-05-05 | Invensas Bonding Technologies, Inc. | Direct bonding methods and structures |
| KR20230095110A (ko) | 2020-10-29 | 2023-06-28 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 직접 접합 방법 및 구조체 |
| JP2024501017A (ja) | 2020-12-28 | 2024-01-10 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 基板貫通ビアを有する構造体及びそれを形成する方法 |
| KR20230125309A (ko) | 2020-12-28 | 2023-08-29 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 기판-관통 비아를 가지는 구조체 및 이를 형성하기위한 방법 |
| CN116848631A (zh) | 2020-12-30 | 2023-10-03 | 美商艾德亚半导体接合科技有限公司 | 具有导电特征的结构及其形成方法 |
| EP4272250A4 (en) | 2020-12-30 | 2025-07-30 | Adeia Semiconductor Bonding Technologies Inc | DIRECTLY RELATED STRUCTURES |
| JP2024513304A (ja) | 2021-03-03 | 2024-03-25 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 直接接合のためのコンタクト構造 |
| WO2022212595A1 (en) | 2021-03-31 | 2022-10-06 | Invensas Bonding Technologies, Inc. | Direct bonding and debonding of carrier |
| JP2024515033A (ja) | 2021-03-31 | 2024-04-04 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 担体の直接ボンディング及び剥離 |
| WO2023278605A1 (en) | 2021-06-30 | 2023-01-05 | Invensas Bonding Technologies, Inc. | Element with routing structure in bonding layer |
| JP2024530539A (ja) | 2021-07-16 | 2024-08-22 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 接合構造のための光学的妨害保護素子 |
| KR20240036698A (ko) | 2021-08-02 | 2024-03-20 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 결합 구조체를 위한 보호 반도체 소자 |
| WO2023034738A1 (en) | 2021-09-01 | 2023-03-09 | Adeia Semiconductor Technologies Llc | Stacked structure with interposer |
| US20230067677A1 (en) | 2021-09-01 | 2023-03-02 | Invensas Bonding Technologies, Inc. | Sequences and equipment for direct bonding |
| US20230115122A1 (en) | 2021-09-14 | 2023-04-13 | Adeia Semiconductor Bonding Technologies Inc. | Method of bonding thin substrates |
| EP4420161A4 (en) | 2021-10-18 | 2025-11-12 | Adeia Semiconductor Tech Llc | REDUCED PARASITE CAPACITY IN LINKED STRUCTURES |
| CN118251765A (zh) | 2021-10-19 | 2024-06-25 | 美商艾德亚半导体接合科技有限公司 | 多裸片堆叠中的堆叠电感器 |
| WO2023070033A1 (en) | 2021-10-22 | 2023-04-27 | Adeia Semiconductor Technologies Llc | Radio frequency device packages |
| WO2023076842A1 (en) | 2021-10-25 | 2023-05-04 | Adeia Semiconductor Bonding Technologies Inc. | Power distribution for stacked electronic devices |
| US20230125395A1 (en) | 2021-10-27 | 2023-04-27 | Adeia Semiconductor Bonding Technologies Inc. | Stacked structures with capacitive coupling connections |
| US20230140107A1 (en) | 2021-10-28 | 2023-05-04 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding methods and structures |
| US20230142680A1 (en) | 2021-10-28 | 2023-05-11 | Adeia Semiconductor Bonding Technologies Inc. | Stacked electronic devices |
| US20230132632A1 (en) | 2021-10-28 | 2023-05-04 | Adeia Semiconductor Bonding Technologies Inc. | Diffusion barriers and method of forming same |
| JP2024537478A (ja) | 2021-11-05 | 2024-10-10 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | マルチチャンネル型デバイス積層化 |
| WO2023091430A1 (en) | 2021-11-17 | 2023-05-25 | Adeia Semiconductor Bonding Technologies Inc. | Thermal bypass for stacked dies |
| US20230154828A1 (en) | 2021-11-18 | 2023-05-18 | Adeia Semiconductor Bonding Technologies Inc. | Fluid cooling for die stacks |
| CN118613904A (zh) | 2021-12-13 | 2024-09-06 | 美商艾德亚半导体接合科技有限公司 | 互连结构 |
| US20230187264A1 (en) | 2021-12-13 | 2023-06-15 | Adeia Semiconductor Technologies Llc | Methods for bonding semiconductor elements |
| CN118382923A (zh) | 2021-12-17 | 2024-07-23 | 美商艾德亚半导体接合科技有限公司 | 具有用于直接键合的导电特征的结构以及其形成方法 |
| EP4454440A4 (en) | 2021-12-20 | 2025-11-26 | Adeia Semiconductor Bonding Technologies Inc | THERMOELECTRIC COOLING IN MICROELECTRONICS |
| WO2023122513A1 (en) | 2021-12-20 | 2023-06-29 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding and debonding of elements |
| US20230197655A1 (en) | 2021-12-22 | 2023-06-22 | Adeia Semiconductor Bonding Technologies Inc. | Low stress direct hybrid bonding |
| EP4454013A4 (en) | 2021-12-23 | 2025-07-30 | Adeia Semiconductor Bonding Technologies Inc | LINKED STRUCTURES COMPRISING INTERCONNECTING ASSEMBLIES |
| JP2025500427A (ja) | 2021-12-23 | 2025-01-09 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | パッケージ基板上の直接接合法 |
| KR20240128928A (ko) | 2021-12-23 | 2024-08-27 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 다이 접합 제어를 위한 장치 및 방법 |
| US20240213191A1 (en) | 2021-12-23 | 2024-06-27 | Adeia Semiconductor Bonding Technologies Inc. | Controlled grain growth for bonding and bonded structure with controlled grain growth |
| EP4457860A4 (en) | 2021-12-27 | 2025-12-31 | Adeia Semiconductor Bonding Technologies Inc | DIRECTLY BINDING FRAME SLICES |
| CN118872048A (zh) | 2022-01-31 | 2024-10-29 | 美商艾德亚半导体接合科技有限公司 | 用于电子器件的散热系统 |
| JP2025506818A (ja) | 2022-02-24 | 2025-03-13 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 接合構造 |
| EP4494184A1 (en) | 2022-03-16 | 2025-01-22 | Adeia Semiconductor Bonding Technologies Inc. | Expansion control for bonding |
| US12512425B2 (en) | 2022-04-25 | 2025-12-30 | Adeia Semiconductor Bonding Technologies Inc. | Expansion controlled structure for direct bonding and method of forming same |
| CN119110988A (zh) | 2022-05-05 | 2024-12-10 | 美商艾德亚半导体接合科技有限公司 | 低温直接键合 |
| US20230360950A1 (en) | 2022-05-05 | 2023-11-09 | Adeia Semiconductor Bonding Technologies Inc. | Gang-flipping of dies prior to bonding |
| US20230369136A1 (en) | 2022-05-13 | 2023-11-16 | Adeia Semiconductor Bonding Technologies Inc. | Bonding surface validation on dicing tape |
| EP4529688A1 (en) | 2022-05-23 | 2025-04-02 | Adeia Semiconductor Bonding Technologies Inc. | Testing elements for bonded structures |
| US20240038702A1 (en) | 2022-07-27 | 2024-02-01 | Adeia Semiconductor Bonding Technologies Inc. | High-performance hybrid bonded interconnect systems |
| US20240055407A1 (en) | 2022-08-11 | 2024-02-15 | Adeia Semiconductor Bonding Technologies Inc. | Bonded debugging elements for integrated circuits and methods for debugging integrated circuits using same |
| US20240079376A1 (en) | 2022-09-07 | 2024-03-07 | Adeia Semiconductor Bonding Technologies Inc. | Rapid thermal processing for direct bonding |
| US20240105674A1 (en) | 2022-09-07 | 2024-03-28 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure and method of forming same |
| US20240170411A1 (en) | 2022-11-18 | 2024-05-23 | Adeia Semiconductor Bonding Technologies Inc. | Scribe lane reinforcement |
| CN120548607A (zh) | 2022-12-01 | 2025-08-26 | 美商艾德亚半导体接合科技有限公司 | 具有框架结构的直接接合结构 |
| CN120642052A (zh) | 2022-12-01 | 2025-09-12 | 艾德亚半导体接合科技有限公司 | 背面功率输送网络 |
| US20240186269A1 (en) | 2022-12-02 | 2024-06-06 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with security die |
| US20240213210A1 (en) | 2022-12-23 | 2024-06-27 | Adeia Semiconductor Bonding Technologies Inc. | System and method for using acoustic waves to counteract deformations during bonding |
| CN120604335A (zh) | 2022-12-28 | 2025-09-05 | 美商艾德亚半导体接合科技有限公司 | 具有带功能性和非功能性导电焊盘的键合层的半导体元件 |
| US20240222319A1 (en) | 2022-12-28 | 2024-07-04 | Adeia Semiconductor Bonding Technologies Inc. | Debonding repair devices |
| US12506114B2 (en) | 2022-12-29 | 2025-12-23 | Adeia Semiconductor Bonding Technologies Inc. | Directly bonded metal structures having aluminum features and methods of preparing same |
| US12341083B2 (en) | 2023-02-08 | 2025-06-24 | Adeia Semiconductor Bonding Technologies Inc. | Electronic device cooling structures bonded to semiconductor elements |
| WO2024182545A1 (en) | 2023-03-01 | 2024-09-06 | Adeia Semiconductor Bonding Technologies Inc. | Multichannel memory with serdes |
| US20240304593A1 (en) | 2023-03-06 | 2024-09-12 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding methods and structures |
| US20240312951A1 (en) | 2023-03-14 | 2024-09-19 | Adeia Semiconductor Bonding Technologies Inc. | System and method for bonding transparent conductor substrates |
| CN121127971A (zh) | 2023-03-31 | 2025-12-12 | 艾德亚半导体接合科技有限公司 | 用于背侧功率递送网络的内插层 |
| US20240332183A1 (en) | 2023-03-31 | 2024-10-03 | Adeia Semiconductor Bonding Technologies, Inc. | Direct bonding on buried power rails |
| US20240332231A1 (en) | 2023-03-31 | 2024-10-03 | Adeia Semiconductor Bonding Technologies Inc. | Direct hybrid bonding in topographic packages |
| US20240332227A1 (en) | 2023-03-31 | 2024-10-03 | Adeia Semiconductor Bonding Technologies Inc | Semiconductor element with bonding layer having low-k dielectric material |
-
2015
- 2015-08-25 US US14/835,379 patent/US9953941B2/en active Active
-
2016
- 2016-08-16 TW TW105126081A patent/TWI702659B/zh active
- 2016-08-25 WO PCT/US2016/048609 patent/WO2017035321A1/en not_active Ceased
- 2016-08-25 CN CN202210544308.7A patent/CN114944376A/zh active Pending
- 2016-08-25 JP JP2018529502A patent/JP6743149B2/ja active Active
- 2016-08-25 KR KR1020227019392A patent/KR102659849B1/ko active Active
- 2016-08-25 KR KR1020187007638A patent/KR102408487B1/ko active Active
- 2016-08-25 EP EP16840097.6A patent/EP3341956A4/en active Pending
- 2016-08-25 CN CN201680048737.8A patent/CN108140559B/zh active Active
-
2018
- 2018-04-06 US US15/947,461 patent/US10262963B2/en active Active
-
2019
- 2019-04-12 US US16/383,455 patent/US11264345B2/en active Active
-
2022
- 2022-02-22 US US17/677,161 patent/US11830838B2/en active Active
-
2023
- 2023-11-22 US US18/517,681 patent/US12381168B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN108140559A (zh) | 2018-06-08 |
| KR20180034671A (ko) | 2018-04-04 |
| US9953941B2 (en) | 2018-04-24 |
| KR102659849B1 (ko) | 2024-04-22 |
| US20190237419A1 (en) | 2019-08-01 |
| US20240243085A1 (en) | 2024-07-18 |
| US11830838B2 (en) | 2023-11-28 |
| EP3341956A1 (en) | 2018-07-04 |
| US20170062366A1 (en) | 2017-03-02 |
| KR102408487B1 (ko) | 2022-06-13 |
| US20180226371A1 (en) | 2018-08-09 |
| JP2018528622A (ja) | 2018-09-27 |
| US11264345B2 (en) | 2022-03-01 |
| CN114944376A (zh) | 2022-08-26 |
| EP3341956A4 (en) | 2019-03-06 |
| TW201715620A (zh) | 2017-05-01 |
| CN108140559B (zh) | 2022-05-24 |
| KR20220083859A (ko) | 2022-06-20 |
| TWI702659B (zh) | 2020-08-21 |
| US12381168B2 (en) | 2025-08-05 |
| WO2017035321A1 (en) | 2017-03-02 |
| US20220254746A1 (en) | 2022-08-11 |
| US10262963B2 (en) | 2019-04-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6743149B2 (ja) | 導電性バリアのダイレクトハイブリッドボンディング | |
| US12125784B2 (en) | Interconnect structures | |
| US12243851B2 (en) | Offset pads over TSV | |
| US12068287B2 (en) | Stacked semiconductor structure and method | |
| KR101690841B1 (ko) | 재배선을 갖는 적층 집적 회로 | |
| TWI524492B (zh) | 使用多層介層窗的３ｄ積體電路 | |
| CN100570870C (zh) | 层叠集成电路及半导体元件 | |
| TWI525776B (zh) | 最佳化之環型銅直通基板穿孔 | |
| KR20210144931A (ko) | 기판의 직접 접합의 준비에서 프로브 패드의 표면 손상을 경감시키는 방법 | |
| US9437578B2 (en) | Stacked IC control through the use of homogenous region | |
| JP2010219526A (ja) | 半導体デバイスおよび半導体デバイスの製造方法 | |
| CN102867795A (zh) | 半导体器件及制造该半导体器件的方法 | |
| US9418933B2 (en) | Through-substrate via formation with improved topography control | |
| TWI697969B (zh) | 具有混合金屬化之互連 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190822 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20190822 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20190822 |
|
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20190925 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190930 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20191226 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200302 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20200629 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20200729 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 6743149 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |