JP2019054153A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP2019054153A
JP2019054153A JP2017178257A JP2017178257A JP2019054153A JP 2019054153 A JP2019054153 A JP 2019054153A JP 2017178257 A JP2017178257 A JP 2017178257A JP 2017178257 A JP2017178257 A JP 2017178257A JP 2019054153 A JP2019054153 A JP 2019054153A
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Japan
Prior art keywords
film
metal
wiring
semiconductor
semiconductor substrate
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JP2017178257A
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English (en)
Inventor
一道 津村
Kazumichi Tsumura
一道 津村
東　和幸
Kazuyuki Azuma
和幸 東
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Kioxia Corp
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Toshiba Memory Corp
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Priority to JP2017178257A priority Critical patent/JP2019054153A/ja
Priority to US15/905,470 priority patent/US20190088618A1/en
Priority to TW107130946A priority patent/TWI701741B/zh
Priority to CN201811072278.4A priority patent/CN109509710A/zh
Publication of JP2019054153A publication Critical patent/JP2019054153A/ja
Pending legal-status Critical Current

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Abstract

【課題】複数の半導体ウエハを貼り合わせたときに半導体装置の電気的特性や信頼性の劣化を抑制することができ、かつ、貼り合わせの前処理を容易にすることができる半導体装置の製造方法を提供する。【解決手段】本実施形態による半導体装置の製造方法は、第１半導体基板の表面に設けられた第１絶縁膜と第１配線膜との上に第１金属膜を成膜することを具備する。第２半導体基板の表面に設けられた第２絶縁膜と第２配線膜との上に第２金属膜を成膜する。第１半導体基板の表面と第２半導体基板の表面とを対向させるように第１金属膜と第２金属膜とを接触させる。第１半導体基板と第２半導体基板とを熱処理することによって、第１配線膜と第２配線膜とを電気的に接続させ、かつ、第１絶縁膜と第２絶縁膜との間の接合界面、第１絶縁膜と第２配線膜との間の接合界面、および、第２絶縁膜と第１配線膜との間の接合界面に絶縁性の界面膜を形成する。【選択図】図１２

Description

本実施形態は、半導体装置の製造方法に関する。
複数の半導体ウエハを貼り合わせ、それぞれの半導体ウエハの表面に形成された電極同士を接合する技術（Wafer-to-Wafer(W2W) Metal Bonding）が開発されている。このような技術において、半導体ウエハの表面の電極は、絶縁膜に埋設されており、貼り合わせ前において、電極および絶縁膜の表面が露出されている。そして、複数の半導体ウエハは、それぞれの電極同士が接合するように位置合わせされる。
しかし、半導体ウエハ上において隣接する電極同士が接合界面を介してショートしたり、電極間のＴＤＤＢ（Time Dependent Dielectric Breakdown）が劣化したりする場合がある。これは、電気特性や信頼性の劣化の問題に繋がる。
また、接合直前の半導体ウエハの表面には、Ｃｕ電極と絶縁膜という異なる複数の材料が露出されている。従って、絶縁膜表面を接合に適した状態にするためにプラズマ処理、洗浄などを行う場合、電極表面が洗浄により酸化したり、電極材料がプラズマ処理によりリスパッタするという問題が生じる。
特開２０１３−３３９００号公報
複数の半導体ウエハを貼り合わせたときに半導体装置の電気的特性や信頼性の劣化を抑制することができ、かつ、貼り合わせの前処理を容易にすることができる半導体装置の製造方法を提供する。
本実施形態による半導体装置の製造方法は、第１半導体基板の表面の第１領域上方に設けられた第１絶縁膜と第１半導体基板の表面において第１領域とは異なる第２領域上方に設けられた第１配線膜との上に第１金属膜を成膜することを具備する。第２半導体基板の表面の第３領域上方に設けられた第２絶縁膜と第２半導体基板の表面において第３領域とは異なる第４領域上方に設けられた第２配線膜との上に第２金属膜を成膜する。第１半導体基板の表面と第２半導体基板の表面とを対向させるように第１金属膜と第２金属膜とを接触させる。第１半導体基板と第２半導体基板とを熱処理することによって、第１配線膜と第２配線膜とを電気的に接続させ、かつ、第１絶縁膜と第２絶縁膜との間の接合界面、第１絶縁膜と第２配線膜との間の接合界面、および、第２絶縁膜と第１配線膜との間の接合界面に絶縁性の界面膜を形成する。
第１半導体部材の製造工程を示す断面図。 図１に続く、第１半導体部材の製造工程を示す断面図。 図２に続く、第１半導体部材の製造工程を示す断面図。 図３に続く、第１半導体部材の製造工程を示す断面図。 図４に続く、第１半導体部材の製造工程を示す断面図。 図５に続く、第１半導体部材の製造工程を示す断面図。 図６に続く、第１半導体部材の製造工程を示す断面図。 図７に続く、第１半導体部材の製造工程を示す断面図。 図８に続く、第１半導体部材の製造工程を示す断面図。 第２半導体部材の構成例を示す断面図。 第１半導体部材と第２半導体部材との貼り合わせの工程を示す断面図。 図１１に続く、第１半導体部材と第２半導体部材との貼り合わせの工程を示す断面図。
以下、図面を参照して本発明による実施形態を説明する。本実施形態は、本発明を限定するものではない。以下の実施形態において、半導体基板の上下方向は、半導体素子が設けられる面を上とした場合の相対方向を示し、重力加速度に従った上下方向と異なる場合がある。図面は模式的または概念的なものであり、各部分の比率などは、必ずしも現実のものと同一とは限らない。明細書と図面において、既出の図面に関して前述したものと同様の要素には同一の符号を付して詳細な説明は適宜省略する。
本実施形態による半導体装置の製造方法は、複数の半導体基板を貼り合わせることにより、演算装置やメモリ装置などの半導体装置を製造する。貼り合わされた複数の半導体基板には、トランジスタなどの回路素子や回路素子同士を接続する配線部を含む電子回路が単層あるいは積層して設けられている。この電子回路同士は、貼り合わされた複数の半導体基板間において、電気的に接続されている。これは、半導体基板を貼り合わせる際に、一方の半導体基板の配線接続部と、他方の半導体基板の配線接続部とを、接合しているためである。この配線接続部は、金属配線であってもよく、あるいは、半導体基板を貫通して形成された貫通電極（ＴＳＶ（Through Silicon Via））であってもよい。
本実施形態による半導体装置の製造方法について、図１〜図１２を参照して説明する。図１〜図９は、第１半導体部材１の製造工程を示す断面図である。図１０は、第２半導体部材２の構成例を示す断面図である。図１１及び図１２は、第１半導体部材１と第２半導体部材２との貼り合わせの工程を示す断面図である。
まず、第１半導体部材１の形成方法について説明する。最初に、図１に示すように、第１半導体基板１０上方に、絶縁膜１１、配線部１２、第１拡散抑制膜１３及び第２拡散抑制膜１４を、ＣＶＤ（Chemical Vapor Deposition）、スパッタリング、リソグラフィ、エッチング、メッキ、及びＣＭＰ（Chemical Mechanical Polishing）などの半導体製造技術を利用して形成する。この際、絶縁膜１１と配線部１２とがほぼ面一になるように形成する。
絶縁膜１１には、ＳｉＯ２などの絶縁体を用いている。図示されていないが、絶縁膜１１中には、電子回路が形成されている。図１に示すように、第１半導体基板１０は絶縁膜１１の下方に位置している。
配線部１２は、絶縁膜１１中に形成された電子回路と電気的に接続されている。配線部１２には、主成分（全体の５０原子％以上）としてＣｕが含まれる。
第１拡散抑制膜１３は、配線部１２に含まれるＣｕが絶縁膜１１中に拡散することを抑制する。第１拡散抑制膜１３は、例えば、Ｔｉ，Ｔａ，Ｒｕ又はそれらの窒化物（ＴｉＮ，ＴａＮ，ＲｕＮ）などの導電体により形成される。
第２拡散抑制膜１４は、配線部１２に含まれるＣｕが層間絶縁膜１５中に拡散することを抑制する。第２拡散抑制膜１４は、例えば、ＳｉＣ，ＳｉＮ又はＳｉＣＮなどの絶縁体により形成される。これにより、例えば、図１の紙面方向に隣接する複数の配線部１２間のショートを抑制することができる。
次に、図１に示すように、第１半導体基板１０の表面上方、すなわち、第２拡散抑制膜１４上に層間絶縁膜１５を形成する。第１絶縁膜としての層間絶縁膜１５は、ＣＶＤ法などを用いて、ＳｉＯ２やＳｉＯＣなどを主成分とする酸化膜を成膜することにより形成される。
次に、図２に示すように、層間絶縁膜１５上にレジスト膜１８を塗布する。次に、図３に示すように、リソグラフィ技術により、第１配線膜としての配線接続部１６を形成するためのパターンをレジスト膜１８に形成する。このとき、層間絶縁膜１５の残置領域（第１領域）Ｒ１のレジスト膜１８は残置される。配線接続部１６の形成領域（第２領域）Ｒ２のレジスト膜１８は除去される。
次に、図４に示すように、レジスト膜１８をマスクとして用いてドライエッチング処理を行う。ドライエッチング処理により、層間絶縁膜１５及び第２拡散抑制膜１４を加工し、配線接続部１６の形成領域Ｒ２の層間絶縁膜１５に溝１９（開口部）を形成する。ドライエッチング処理は、配線部１２の表面が露出するまで実行される。これにより、第１半導体基板１０の表面の第２領域Ｒ２の層間絶縁膜１５は除去され、第１領域Ｒ１の層間絶縁膜１５は残置される。
次に、図５に示すように、層間絶縁膜１５上に残留するレジスト膜１８や、ドライエッチング処理で発生した残留付着物を除去する。例えば、酸素プラズマを用いたアッシング処理や、レジストを溶解する薬液による洗浄処理を行う。
次に、図６に示すように、層間絶縁膜１５の側面（溝１９の内側壁）および第２領域Ｒ２の配線部１２上に、第３拡散抑制膜１７を形成する。第１バリア膜としての第３拡散抑制膜１７は、Ｔｉ，Ｔａ，Ｒｕ又はそれらの窒化物（ＴｉＮ，ＴａＮ，ＲｕＮ）などをＡｒ／Ｎ２雰囲気中でスパッタリングすることにより形成される。第３拡散抑制膜１７は、後述する配線接続部１６に含まれるＣｕが層間絶縁膜１５中に拡散することを抑制することができる。
次に、図７に示すように、電解メッキ法により第３拡散抑制膜１７上に配線接続部１６を堆積させる。配線接続部１６は、例えば、Ｃｕを主成分として含む。また、配線接続部１６は、第３拡散抑制膜１７を介して配線部１２と電気的に接続される。
尚、配線接続部１６を形成した後、第１半導体基板１０にアニール処理などの熱処理を行ってもよい。これにより、配線接続部１６の結晶状態を良くし、配線接続部１６の化学的及び物理的安定性を向上させることができる。
次に、図８に示すように、ＣＭＰなどの手法により、層間絶縁膜１５が露出されるまで第３拡散抑制膜１７及び配線接続部１６を研磨し平坦化する。これにより、層間絶縁膜１５上にある第３拡散抑制膜１７及び配線接続部１６を除去し、配線接続部１６の表面は、層間絶縁膜１５の表面とほぼ面一になる。
このように、第１半導体基板１０の表面のうち第１領域Ｒ１には、層間絶縁膜１５が残置される。第１半導体基板１０の表面のうち第１領域Ｒ１以外の第２領域Ｒ２には、溝１９が形成され、第３拡散抑制膜１７及び配線接続部１６がその溝１９内に形成される。
尚、配線接続部１６は、貼り合わされるそれぞれの第１および第２半導体部材１，２に形成された電子回路を電気的に接続する電極として機能する。配線接続部１６の平面レイアウトは、任意に設計され得る。
次に、図９に示すように、ＣＶＤ法を用いて、層間絶縁膜１５、配線接続部１６、および、第３拡散抑制膜１７の上に、金属膜１００を成膜する。第１金属膜としての金属膜１００は、配線接続部１６よりも酸化されやすい金属材料で形成されていることが好ましい。例えば、配線接続部１６が銅である場合、金属膜１００は、例えば、Ｍｎ，Ａｌ，Ｖ，Ｚｎ，Ｎｂ，Ｚｒ，Ｃｒ，Ｙ，ＴｃおよびＲｅからなる群から選択される少なくとも１つの金属材料でよい。好ましくは、金属膜１００の金属材料は、Ｍｎである。金属膜１００は、上記の群の中から選択された複数の金属材料の合金であってもよい。また、金属膜１００の厚さは、例えば、数ｎｍである。以下、金属膜１００の材料は、Ｍｎであるものとして説明する。
金属膜１００の成膜から第１半導体部材１と第２半導体部材２との貼り合わせまでの間に、第１半導体部材１および第２半導体部材２を大気開放している場合がある。大気開放により、配線接続部１６の表面には酸化物（配線接続部１６がＣｕを含む場合、ＣｕＯ）が形成される。このとき、金属膜１００の材料が配線接続部１６のそれよりも酸化されやすい場合、配線接続部１６の表面の酸化物は、還元されやすくなる。配線接続部１６の表面の酸化物が還元されることによって、配線接続部１６、２６の電気抵抗を低減させることができる。
以上の工程により、第１半導体部材１が形成される。
次に、第２半導体部材２の形成方法について説明する。第２半導体部材２は、第１半導体部材１と同様の方法により形成することができる。
図１０は、第２半導体部材２の構成例を示す断面図である。第２半導体基板２０上に形成される絶縁膜２１、配線部２２、第１拡散抑制膜２３、第２拡散抑制膜２４、層間絶縁膜２５、配線接続部２６、第３拡散抑制膜２７、および、金属膜２００は、それぞれ第１半導体部材１の絶縁膜１１、配線部１２、第１拡散抑制膜１３、第２拡散抑制膜１４、層間絶縁膜１５、配線接続部１６、第３拡散抑制膜１７、および、金属膜１００と同様に形成される。
即ち、まず、第２半導体基板２０上に、絶縁膜２１、配線部２２、第１拡散抑制膜２３及び第２拡散抑制膜２４を形成する。次に、第２半導体基板２０の表面上方（第２拡散抑制膜２４上）に第２絶縁膜としての層間絶縁膜２５を形成する。次に、リソグラフィ技術およびドライエッチング技術を用いて層間絶縁膜２５を加工し、配線部２２の表面が露出するように溝２９（開口部）を層間絶縁膜２５に形成する。第２半導体基板２０の表面のうち第３領域Ｒ３には、層間絶縁膜１５が残置される。第２半導体基板２０の表面のうち第３領域Ｒ３以外の第４領域Ｒ４には、溝２９が形成される。次に、層間絶縁膜２５の側面（溝２９の内側）および第４領域Ｒ４の上方に、第２バリア膜としての第３拡散抑制膜２７を形成する。次に、第３拡散抑制膜２７上に配線接続部２６を堆積し、配線接続部２６を形成する。次に、層間絶縁膜２５の表面が露出するまで接合界面側の表面を平坦化する。このように、第２半導体基板２０の表面において第３領域Ｒ３とは異なる第４領域Ｒ４（溝２９）に第２配線膜としての配線接続部２６および第３拡散抑制膜２７が形成される。次に、層間絶縁膜２５、配線接続部２６、および、第３拡散抑制膜２７の上に、第２金属膜としての金属膜２００を成膜する。これにより、第２半導体部材２が形成される。
尚、金属膜２００の金属材料および厚さは、金属膜１００のそれらと同様でよい。金属膜１００，２００の厚さの合計が大きい場合、後述する熱処理後に金属膜１００，２００が反応しきらずに残り、半導体装置の電気的特性を劣化させる可能性がある。従って、金属膜１００，２００の厚さの合計は、例えば、１０ｎｍ以下であることが好ましい
金属膜２００の成膜から第１半導体部材１と第２半導体部材２との貼り合わせまでの間に、第１半導体部材１および第２半導体部材２を大気開放している場合がある。大気開放により、配線接続部２６の表面には酸化物が形成される。例えば、配線接続部２６がＣｕを含む場合、この酸化物はＣｕＯである。このとき、金属膜２００の材料が配線接続部２６のそれよりも酸化されやすいと、配線接続部２６の表面の酸化物は、還元されやすくなる。配線接続部２６の表面の酸化物が還元されることによって、配線接続部１６、２６の電気抵抗を低減させることができる。
次に、金属膜１００，２００に、接合のための前処理をする。上記のように、第１半導体部材１および第２半導体部材２を大気開放すると、金属膜１００，２００の表面に酸化皮膜が形成される。例えば、金属膜１００，２００がＭｎからなる場合、金属膜１００，２００の表面にはＭｎＯｘが形成される。
前処理において、例えば、金属膜１００，２００にＮ２プラズマ処理をする。これにより、金属膜１００，２００の表面の酸化皮膜にダングリングボンドを生じさせ、第１半導体部材１と第２半導体部材２との接合をより強くすることができる。尚、Ｎ２プラズマ処理に限られず、他のガスを用いたプラズマ処理であってもよい。また、金属膜１００，２００に水洗処理をしてもよい。これにより、金属膜１００，２００の表面の不純物等を取り除くことができる。尚、水洗処理に限られず、薬液等を用いた洗浄処理であってもよい。
次に、第１半導体基板１０の表面と第２半導体基板２０の表面とを対向させ、配線接続部１６と配線接続部２６とを接触させる。即ち、第１半導体部材１（金属膜１００）と第２半導体部材２（金属膜２００）とを、配線接続部１６と配線接続部２６とが対向するように位置合わせして接触させる（貼り合わせる）。
図１１および図１２は、第１半導体部材１と第２半導体部材２との貼り合わせの工程を示す断面図である。図１１、図１２では、第１半導体部材１と第２半導体部材２との貼り合わせの際に位置ずれが生じた状態を示している。この場合、図１１に示すように、配線接続部１６と層間絶縁膜２５とが金属膜１００，２００を介して対向する領域Ｒ２０と、配線接続部２６と層間絶縁膜１５とが金属膜１００，２００を介して対向する領域Ｒ１０と、が存在する。第１半導体部材１と第２半導体部材２とを貼り合わせる際、大気開放する場合には、フュージョン接合、ＳＡＢ（Surface Activated Bonding）を用いることができる。
次に、貼り合わされた第１半導体部材１及び第２半導体部材２に、アニール処理などの熱処理をする。第１半導体部材１及び第２半導体部材２は、例えば、４００℃に１時間加熱される。このとき、金属膜１００，２００は配線接続部１６，２６中に或る程度拡散し、配線接続部１６と配線接続部２６との間においてほとんど無くなる。さらに、配線接続部１６，２６は、膨張する。これにより、配線接続部１６，２６は、図１２に示す接合界面における接続部３３で接合し、電気的に接続される。また、第１半導体部材１に形成された電子回路と、第２半導体部材２に形成された電子回路と、が電気的に接続される。尚、金属膜１００，２００は、接続部３３において多少残っていてもよい。金属膜１００、２００の材料が配線接続部１６，２６へ拡散する場合、配線接続部１６，２６の電気抵抗はわずかに増大する。しかし、配線接続部１６，２６は、例えば、数Ω以下の低抵抗であれば問題無い。
上述の熱処理により、図１２に示すように、第１半導体部材１と第２半導体部材２との接合界面のうち、配線接続部１６と層間絶縁膜２５との間の接合界面Ｓ３１１と、第３拡散抑制膜１７と層間絶縁膜２５との間の接合界面Ｓ３１２と、層間絶縁膜１５と層間絶縁膜２５との間の接合界面Ｓ３１３と、に界面膜３１が形成される。また、配線接続部２６と層間絶縁膜１５との間の接合界面Ｓ３２１と、第３拡散抑制膜２７と層間絶縁膜１５との間の接合界面Ｓ３２２と、層間絶縁膜１５と層間絶縁膜２５との間の接合界面Ｓ３２３と、に界面膜３２が形成される。
界面膜３１は、配線接続部１６に含まれるＣｕが層間絶縁膜２５中に拡散することを抑制する機能を有する。界面膜３１は、例えば、ＭｎＳｉＯｘである。尚、界面膜３１は、αｘＯｙ，αｘＳｉｙＯｚ，αｘＣｙＯｚ及びαｘＦｙＯｚからなる群から選択された少なくとも１つの化合物であってもよい。尚、αは、金属膜１００の材料であり、本実施形態では、Ｍｎとして説明する。例えば、金属膜１００，２００の主成分がＭｎであり、層間絶縁膜１５，２５の主成分がＳｉＯ２の場合、界面膜３１は、ＭｎＳｉＯｘとなる。また、配線接続部１６、２６が複数種類の金属材料からなる場合、界面膜３１には、複数種類の化合物が含まれてもよい。
界面膜３２は、配線接続部２６に含まれるＣｕが層間絶縁膜１５中に拡散することを抑制する機能を有する。界面膜３２は、界面膜３１と同様に、αｘＯｙ，αｘＳｉｙＯｚ，αｘＣｙＯｚ及びαｘＦｙＯｚからなる群から選択された少なくとも１つの化合物を含む。例えば、金属膜１００，２００の主成分がＭｎであり、層間絶縁膜１５，２５の主成分がＳｉＯ２の場合、界面膜３２は、ＭｎＳｉＯｘとなる。また、配線接続部１６、２６が複数種類の金属材料からなる場合、界面膜３２には、複数種類の化合物が含まれてもよい。
界面膜３１および界面膜３２は、絶縁性である。これにより、Ｃｕが拡散しやすい接合界面において、界面膜３１，３２を介して配線や素子がショートすることを抑制することができる。また、界面膜３１，３２は、接合界面におけるＣｕの拡散を抑制する。従って、隣接する配線や素子間のショートや、配線や素子間のＴＤＤＢの劣化を抑制することができる。
界面膜３１は、熱処理により、配線接続部１６と層間絶縁膜２５との間の接合界面Ｓ３１１に自己整合的に形成される。熱処理の際に反応しなかった（界面膜３１を形成しなかった）金属膜１００、２００の材料は、配線接続部１６、２６中に拡散する。また、上述の熱処理により、第３拡散抑制膜１７と層間絶縁膜２５との間の接合界面Ｓ３１２と、層間絶縁膜１５と層間絶縁膜２５との間の接合界面Ｓ３１３と、においても、同様に界面膜３１は自己整合的に形成される。
界面膜３２も、界面膜３１と同様に形成される。すなわち、界面膜３２は、配線接続部２６と層間絶縁膜１５との間の接合界面Ｓ３２１に自己整合的に形成される。さらに、第３拡散抑制膜２７と層間絶縁膜１５との間の接合界面Ｓ３２２と、層間絶縁膜１５と層間絶縁膜２５との間の接合界面Ｓ３２３と、においても、同様に界面膜３２が自己整合的に形成される。
したがって、第１半導体部材１と第２半導体部材２との貼り合わせの際に位置ずれが生じた場合であっても、界面膜３１、３２が配線接続部１６，２６から層間絶縁膜１５，２５中へのＣｕの拡散を抑制することができる。また、図１１に示すように、界面膜３１，３２は、接合界面に形成される。従って、界面膜３１，３２は、第３拡散抑制膜１７，２７とは同一面にない。すなわち、半導体基板又は半導体部材の表面に対して垂直方向から見て、界面膜３１，３２と第３拡散抑制膜１７，２７とはオーバーラップしていない。したがって、図１２からも分かるように、配線接続部１６と配線接続部２６とが接続している領域には、配線接続部１６，２６よりも比較的高抵抗な第３拡散抑制膜１７，２７が設けられていない領域がある。配線接続部１６と配線接続部２６とが接続している領域をより広く確保することができているため、電気抵抗の増大をさらに抑制することができる。尚、金属膜１００，２００の材料の一方をＭｎ、他方をＭｎＯとしてもよく、あるいは、金属膜１００，２００の材料の両方をＭｎＯとしてもよい。この場合、ＭｎＯは、Ｍｎと同様に、熱処理後に界面膜３１，３２としてＭｎＳｉＯｘを形成する。
また、金属膜１００，２００の成膜から、第１半導体部材１と第２半導体部材２との接触までの間、第１および第２半導体基板１０、２０は、真空雰囲気中で処理されてもよい。この場合、金属膜１００，２００の表面はほとんど酸化されない。従って、熱処理後の接続部３３の電気抵抗の増大を抑制することができる。
本実施形態による半導体装置の製造方法では、第１および第２半導体部材１，２に、金属膜１００，２００の両方を成膜している。しかし、第１または第２半導体部材１，２に、金属膜１００，２００のいずれか一方を成膜してよい。この場合であっても、界面膜３１，３２は、形成され得る。この場合、接合の前処理工程において、金属膜１００（または２００）のない第１半導体基板１０（または第２半導体基板２０）の表面にもＮ２プラズマ処理をする。このとき、配線接続部１６（または２６）に含まれるＣｕが層間絶縁膜１５（または２５）上にリスパッタされる。従って、Ｃｕが、層間絶縁膜１５と層間絶縁膜２５との間の界面膜３１，３２に残存することがある。この場合、配線や素子間におけるショートやＴＤＤＢの劣化が生じやすくなる場合がある。よって、金属膜１００，２００のいずれか一方を成膜してもよいが、金属膜１００，２００の両方を成膜することがより好ましい。
以上のように、本実施形態による半導体装置の製造方法によれば、第１半導体部材１において層間絶縁膜１５および配線接続部１６（例えば、Ｃｕ）の上に金属膜１００（例えば、Ｍｎ）を成膜する。第２半導体部材２において層間絶縁膜２５および配線接続部２６（例えば、Ｃｕ）の上に金属膜２００（例えば、Ｍｎ）を成膜する。これにより、第１半導体部材１と第２半導体部材２とを貼り合わせたときに、金属膜１００、２００が接触し、熱処理後、界面膜３１，３２（例えば、ＭｎＳｉＯ）が形成される。その結果、配線接続部２６から層間絶縁膜１５へのＣｕの拡散を抑制し、かつ、配線接続部１６から層間絶縁膜２５へのＣｕの拡散を抑制することができる。
もし、金属膜２００を成膜しない場合、配線接続部１６，２６同士の位置がずれると、一方の半導体部材の配線接続部１６，２６の材料（例えば、Ｃｕ）が、他方の半導体部材の層間絶縁膜１５，２５の材料（例えば、ＳｉＯ２）に接触する。この場合、Ｃｕが配線接続部１６，２６から層間絶縁膜１５，２５中に拡散する場合がある。また、層間絶縁膜１５，２５同士の接合界面では、微小な欠陥の存在によりＣｕが接合界面に沿って拡散しやすい。
これに対し、本実施形態による界面膜３１，３２は、接合界面に沿って、Ｃｕが拡散することを抑制する。これにより、隣接する配線や素子間のショートやＴＤＤＢの劣化を抑制することができ、半導体装置の電気的特性や信頼性を向上させることができる。
また、界面膜３１，３２は自己整合的に形成される。従って、層間絶縁膜１５，２５の全面にＳｉＮなどのバリア膜を形成する場合と比較して、層間絶縁膜の低誘電率化が可能となる。また、Ｃｕの拡散を抑制するための新たな絶縁材料を用いて層間絶縁膜１５，２５を形成する必要がないため、コストを低減することができる。
また、金属膜１００，２００に対して貼り合わせ前の前処理をする際に、配線接続部１６，２６のＣｕが金属膜１００，２００により覆われている。これにより、既存のＮ２プラズマ処理または水洗処理を用いても、配線接続部１６，２６のＣｕのリスパッタまたは酸化を抑制することができる。よって、貼り合わせ前の前処理が容易である。また、処理対象の材料が金属膜１００，２００の１種類であるため、前処理の最適化も容易になる。
本発明のいくつかの実施形態を説明したが、これらの実施形態は、例として提示したものであり、発明の範囲を限定することは意図していない。これら実施形態は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれると同様に、特許請求の範囲に記載された発明とその均等の範囲に含まれるものである。
１ 第１半導体部材、１５ 層間絶縁膜、１６ 配線接続部、１７ 第３拡散抑制膜、１００ 金属膜、２ 第２半導体部材、２５ 層間絶縁膜、２６ 配線接続部、２７ 第３拡散抑制膜、２００ 金属膜、３１ 界面膜、３２ 界面膜、Ｒ１ 第１領域、Ｒ２ 第２領域、Ｒ３ 第３領域、Ｒ４ 第４領域

Claims (7)

  1. 第１半導体基板の表面の第１領域上方に設けられた第１絶縁膜と前記第１半導体基板の表面において前記第１領域とは異なる第２領域上方に設けられた第１配線膜との上に第１金属膜を成膜し、
    第２半導体基板の表面の第３領域上方に設けられた第２絶縁膜と前記第２半導体基板の表面において前記第３領域とは異なる第４領域上方に設けられた第２配線膜との上に第２金属膜を成膜し、
    前記第１半導体基板の表面と前記第２半導体基板の表面とを対向させるように前記第１金属膜と前記第２金属膜とを接触させ、
    前記第１半導体基板と前記第２半導体基板とを熱処理することによって、前記第１配線膜と前記第２配線膜とを電気的に接続させ、かつ、前記第１絶縁膜と前記第２絶縁膜との間の接合界面、前記第１絶縁膜と前記第２配線膜との間の接合界面、および、前記第２絶縁膜と前記第１配線膜との間の接合界面に絶縁性の界面膜を形成することを具備する半導体装置の製造方法。
  2. 前記第１金属膜および前記第２金属膜を接触させる前に、前記第１金属膜および前記第２金属膜の表面をプラズマ処理することをさらに具備する、請求項１に記載の半導体装置の製造方法。
  3. 前記第１金属膜および前記第２金属膜を接触させる前に、前記第１金属膜および前記第２金属膜の表面を洗浄処理することをさらに具備する、請求項１または請求項２に記載の半導体装置の製造方法。
  4. 前記第１金属膜は、前記第１配線膜よりも酸化されやすい金属材料で形成され、
    前記第２金属膜は、前記第２配線膜よりも酸化されやすい金属材料で形成される、請求項１から請求項３のいずれか一項に記載の半導体装置の製造方法。
  5. 前記第１金属膜は、Ｍｎ，Ａｌ，Ｖ，Ｚｎ，Ｎｂ，Ｚｒ，Ｃｒ，Ｙ，ＴｃおよびＲｅからなる群から選択された少なくとも１つの金属材料を含む、請求項１から請求項４のいずれか一項に記載の半導体装置の製造方法。
  6. 前記界面膜は、前記第１金属膜の金属材料をαで表した場合、αｘＯｙ，αｘＳｉｙＯｚ，αｘＣｙＯｚおよびαｘＦｙＯｚからなる群から選択された少なくとも１つの化合物を含む、請求項１から請求項５のいずれか一項に記載の半導体装置の製造方法。
  7. 前記第１および第２金属膜は、Ｍｎであり、
    前記界面膜は、ＭｎＳｉＯを含む、請求項１から請求項６のいずれか一項に記載の半導体装置の製造方法。
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Publication number Priority date Publication date Assignee Title
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WO2021243686A1 (en) * 2020-06-05 2021-12-09 Yangtze Memory Technologies Co., Ltd. Contact pad structure and method of forming the same
US20240071984A1 (en) * 2022-08-23 2024-02-29 Tokyo Electron Limited Next generation bonding layer for 3d heterogeneous integration

Family Cites Families (13)

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Publication number Priority date Publication date Assignee Title
JP4319078B2 (ja) * 2004-03-26 2009-08-26 シャープ株式会社 半導体装置の製造方法
CN101681843B (zh) * 2007-06-20 2012-05-09 株式会社半导体能源研究所 半导体装置的制造方法
JP2012204501A (ja) * 2011-03-24 2012-10-22 Sony Corp 半導体装置、電子デバイス、及び、半導体装置の製造方法
US8896125B2 (en) * 2011-07-05 2014-11-25 Sony Corporation Semiconductor device, fabrication method for a semiconductor device and electronic apparatus
TWI495041B (zh) * 2011-07-05 2015-08-01 Sony Corp 半導體裝置、用於半導體裝置之製造方法及電子設備
JP5994274B2 (ja) * 2012-02-14 2016-09-21 ソニー株式会社 半導体装置、半導体装置の製造方法、及び、電子機器
FR2986904A1 (fr) * 2012-02-14 2013-08-16 St Microelectronics Crolles 2 Systeme d'assemblage de puces
US9064937B2 (en) * 2013-05-30 2015-06-23 International Business Machines Corporation Substrate bonding with diffusion barrier structures
TWI566427B (zh) * 2013-07-05 2017-01-11 晶元光電股份有限公司 發光元件及其製造方法
JP2015079901A (ja) * 2013-10-18 2015-04-23 株式会社東芝 半導体装置及び半導体装置の製造方法
JP6766808B2 (ja) * 2015-05-18 2020-10-14 ソニー株式会社 半導体装置および撮像装置
JP2016219660A (ja) * 2015-05-22 2016-12-22 ソニー株式会社 半導体装置、製造方法、固体撮像素子、および電子機器
US9953941B2 (en) * 2015-08-25 2018-04-24 Invensas Bonding Technologies, Inc. Conductive barrier direct hybrid bonding

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022176687A1 (ja) * 2021-02-22 2022-08-25 東京エレクトロン株式会社 半導体デバイス、接合方法、及び接合システム

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