WO2019213604A1 - Method of depositing tungsten and other metals in 3d nand structures - Google Patents

Method of depositing tungsten and other metals in 3d nand structures Download PDF

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Publication number
WO2019213604A1
WO2019213604A1 PCT/US2019/030712 US2019030712W WO2019213604A1 WO 2019213604 A1 WO2019213604 A1 WO 2019213604A1 US 2019030712 W US2019030712 W US 2019030712W WO 2019213604 A1 WO2019213604 A1 WO 2019213604A1
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Prior art keywords
pulses
tungsten
metal precursor
pulse
inert gas
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PCT/US2019/030712
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English (en)
French (fr)
Inventor
Gorun Butail
Joshua Collins
Hanna Bamnolker
Seshasayee Varadarajan
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Lam Research Corp
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Lam Research Corp
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Priority to US17/250,014 priority Critical patent/US11549175B2/en
Priority to KR1020207034800A priority patent/KR102806630B1/ko
Priority to JP2020561743A priority patent/JP2021523292A/ja
Priority to CN201980038600.8A priority patent/CN112262457A/zh
Publication of WO2019213604A1 publication Critical patent/WO2019213604A1/en
Anticipated expiration legal-status Critical
Priority to JP2024114404A priority patent/JP2024147716A/ja
Ceased legal-status Critical Current

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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
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    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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Definitions

  • tungsten- containing materials are an integral part of many semiconductor fabrication processes. These materials may be used for horizontal interconnects, vias between adjacent metal layers, and contacts between metal layers and devices.
  • a conventional tungsten deposition process the substrate is heated to the process temperature in a vacuum chamber and a very thin portion of tungsten film that serves as a seed layer (also called a nucleation layer) is deposited. Thereafter, the remainder of the tungsten film (referred to as the bulk layer) is deposited on the nucleation layer by exposing the substrate to two reactants simultaneously in a chemical vapor deposition (CVD) process.
  • the bulk layer is generally deposited more rapidly than the nucleation layer.
  • CVD chemical vapor deposition
  • One aspect of the disclosure relates to a method for filling structures with a metal -containing material, the method including: providing a structure to be filled with a metal -containing material, exposing the structure to multiple deposition cycles, with each deposition cycle including exposure to one or more alternating reducing agent (e.g. hydrogen (H 2 )) dose / inert gas purge pulses pulse followed by exposure to one or more alternating metal precursor dose pulses and inert gas purge pulses.
  • alternating reducing agent e.g. hydrogen (H 2 )
  • the metal may be tungsten (W) or molybdenum (Mo) in some embodiments.
  • the structure is a partially fabricated three-dimension (3-D) NAND structure having sidewalls and a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions fluidically accessible through the openings.
  • the metal precursor is a chlorine-containing metal precursor, such as tungsten hexachloride, tungsten pentachloride, tungsten tetrachhloride, molybdenum pentachloride, molybdenum dichloride dioxide, and molybdenum tetrachloride oxide, and mixtures thereof.
  • a pulse of the chlorine-containing metal precursor comprises between about 0.1% and about 5.0% of chlorine-containing metal precursor by volume.
  • the exposure to multiple alternating metal precursor pulses and inert gas purge pulses includes turning the inert gas purge flow off during the metal precursor pulses.
  • the duration of an inert gas purge pulse is at least 1.5 times that of a metal precursor pulse.
  • each deposition cycle comprises at least five or at least ten alternating metal precursor pulses and inert gas purge pulses.
  • each deposition cycle includes only one H 2 pulse. In other embodiments, each deposition cycle includes multiple alternating H 2 and inert gas pulses.
  • Another aspect of the disclosure relates to a method for filling structures with a metal -containing material, the method including: providing a structure to be filled with a metal -containing material, exposing the structure to multiple deposition cycles, with each deposition cycle including exposure to a reducing agent (e.g. hydrogen (3 ⁇ 4)) dose pulse followed by exposure to an inert gas pulse and exposure to multiple alternating metal precursor dose pulses and inert gas purge pulses.
  • a reducing agent e.g. hydrogen (3 ⁇ 4)
  • the structure is a partially fabricated three-dimension (3-D) NAND structure having sidewalls and a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions fluidically accessible through the openings.
  • the metal precursor is a chlorine-containing metal precursor, such as tungsten hexachloride, tungsten pentachloride, tungsten tetrachhloride, molybdenum pentachloride, molybdenum dichloride dioxide, and molybdenum tetrachloride oxide, and mixtures thereof.
  • a pulse of the chlorine-containing metal precursor comprises between about 0.1% and about 5.0% of chlorine-containing metal precursor by volume.
  • the exposure to multiple alternating metal precursor pulses and inert gas purge pulses includes turning the inert gas purge flow off during the metal precursor pulses.
  • the duration of an inert gas purge pulse is at least 1.5 times that of a metal precursor pulse.
  • each deposition cycle comprises at least five or at least ten alternating metal precursor pulses and inert gas purge pulses.
  • Another aspect of the disclosure relates to an apparatus including one or more process chambers each configured to hold a substrate; one or more process gas inlets for coupling to a reducing agent (e.g., hydrogen (3 ⁇ 4)) gas source, a metal precursor gas source, and an inert purge gas source; and a controller for controlling operations in the apparatus, comprising machine-readable instructions for performing multiple deposition cycles, wherein each deposition cycle comprises: inletting a hydrogen (H 2 ) pulse to the one or more process chambers via the one more process gas inlets; after inletting the H 2 pulse, inletting an inert purge gas pulse to the one or more process chamber via the one or more process gas inlets; after inletting the inert purge gas pulse, inletting multiple alternating metal precursor pulses and inert gas purge pulses to the one or more process chambers via the one or more purge gas inlets.
  • a reducing agent e.g., hydrogen (3 ⁇ 4)
  • the metal precursor is a chlorine-containing metal precursor.
  • the instructions comprise instructions for turning the inert gas purge flow off during the metal precursor pulses.
  • the duration of the inert gas purge pulse is at least 1.5 times that of the metal precursor pulses.
  • each deposition cycle comprises at least five alternating metal precursor pulses and inert gas purge pulses. In some embodiments, each deposition cycle comprises at least ten alternating metal precursor pulses and inert gas purge pulses.
  • Another aspect of the disclosure relates to a method for filling structures with a metal -containing material, the method including: providing a structure to be filled with a metal -containing material, exposing the structure to multiple deposition cycles, with each deposition cycle including exposure to multiple alternating hydrogen (H 2 ) pulses and inert gas pulses followed and exposure to metal precursor pulse followed by an inert gas purge pulse.
  • the structure is a partially fabricated three-dimension (3-D) NAND structure having sidewalls and a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions fluidically accessible through the openings.
  • the metal precursor is a chlorine-containing metal precursor.
  • a pulse of the chlorine-containing metal precursor comprises between about 0.1% and about 5.0% of chlorine-containing metal precursor by volume.
  • the exposure to multiple alternating H 2 pulses and inert gas purge pulses includes turning the inert gas purge flow off during the metal precursor pulses.
  • each deposition cycle includes only one metal precursor pulse. In other embodiments, each deposition cycle includes multiple alternating metal precursor and inert gas pulses.
  • Another aspect of the disclosure relates to an apparatus including one or more process chambers each configured to hold a substrate; one or more process gas inlets for coupling to a hydrogen (H 2 ) gas source, a metal precursor gas source, and an inert purge gas source; and a controller for controlling operations in the apparatus, comprising machine- readable instructions for performing multiple deposition cycles, wherein each deposition cycle comprises: inletting multiple alternating H 2 pulses and inert gas purge pulses to the one or more process chambers via the one or more purge gas inlets, and inletting a metal precursor pulse followed by an inert gas pulse.
  • the metal precursor is a chlorine-containing metal precursor.
  • the instructions comprise instructions for turning the inert gas purge flow off during the H 2 pulses.
  • Figure 1 A is a schematic illustration of example films on a substrate.
  • Figures 1B-1J are schematic examples of various structures in which tungsten or molybdenum may be deposited in accordance with certain disclosed embodiments.
  • Figures 2A-2C is a process flow diagram depicting operations for methods in accordance with certain disclosed embodiments.
  • Figure 3 is a timing sequence diagram showing example cycles in methods for depositing films in accordance with certain disclosed embodiments.
  • Figures 4A-4J are schematic diagrams of an example of a mechanism for depositing films in accordance with certain disclosed embodiments.
  • Figure 5 shows an illustration of experimental results comparing tungsten fill of 3-D NAND structures using a H2/Ar/WClx/Ar sequence and a H2/Ar/n(WClx/Ar) sequence.
  • Figure 6 is a schematic diagram of an example process tool for performing certain disclosed embodiments.
  • Figure 7 is a schematic diagram of an example station for performing certain disclosed embodiments.
  • Figure 8 is a schematic diagram showing basic features of a manifold system that may be used in accordance with certain embodiments. DETAILED DESCRIPTION
  • Tungsten (W) fill of features is often used in semiconductor device fabrication to form electrical contacts.
  • a nucleation tungsten layer is first deposited into a via or contact.
  • a nucleation layer is a thin conformal layer that serves to facilitate the subsequent formation of a bulk material thereon.
  • the tungsten nucleation layer may be deposited to conformally coat the sidewalls and bottom of the feature. Conforming to the underlying feature bottom and sidewalls can be critical to support high quality deposition.
  • Nucleation layers are often deposited using atomic layer deposition (ALD) or pulsed nucleation layer (PNL) methods.
  • ALD atomic layer deposition
  • PNL pulsed nucleation layer
  • PNL pulses of reactant are sequentially injected and purged from the reaction chamber, typically by a pulse of a purge gas between reactants.
  • a first reactant can be adsorbed onto the substrate, available to react with the next reactant.
  • the process is repeated in a cyclical fashion until the desired thickness is achieved.
  • PNL techniques are similar to ALD techniques. PNL is generally distinguished from ALD by its higher operating pressure range (greater than 1 Torr) and its higher growth rate per cycle (greater than 1 monolayer film growth per cycle). Chamber pressure during PNL deposition may range from about 1 Torr to about 400 Torr.
  • PNL broadly embodies any cyclical process of sequentially adding reactants for reaction on a semiconductor substrate.
  • CVD chemical vapor deposition
  • PNL and ALD processes are distinct from CVD processes and vice versa.
  • bulk tungsten is typically deposited by a CVD process by reducing tungsten hexafluoride (WF 6 ) using a reducing agent such as hydrogen (H 2 ).
  • WF 6 tungsten hexafluoride
  • H 2 hydrogen
  • Bulk tungsten is different from a tungsten nucleation layer.
  • Bulk tungsten as used herein refers to tungsten used to fill most or all of a feature, such as at least about 50% of the feature.
  • bulk tungsten is used to carry current. It may be characterized by larger grain size and lower resistivity as compared to a nucleation film.
  • bulk tungsten is tungsten deposited to a thickness of at least 50 A.
  • One method of preventing fluorine diffusion includes depositing one or more barrier layers prior to depositing tungsten to prevent fluorine from diffusing from tungsten to other layers of the substrate such as an oxide layer.
  • Figure 1A shows an example stack of layers deposited on a substrate.
  • Substrate 190 includes a silicon layer 192, an oxide layer 194 (e.g., titanium oxide (TiOx), tetraethyl orthosilicate (TEOS) oxide, etc.), a barrier layer 196 (e.g., titanium nitride (TiN)), a tungsten nucleation layer 198, and a bulk tungsten layer 199.
  • oxide layer 194 e.g., titanium oxide (TiOx), tetraethyl orthosilicate (TEOS) oxide, etc.
  • a barrier layer 196 e.g., titanium nitride (TiN)
  • TiN titanium nitride
  • Barrier layer 196 is deposited to prevent fluorine diffusion from the bulk tungsten layer 199 and the tungsten nucleation layer 198 to the oxide layer. However, as devices shrink, barrier layers become thinner, and fluorine may still diffuse from the deposited tungsten layers. Although chemical vapor deposition of bulk tungsten performed at a higher temperature results in lower fluorine content, such films may have poor step coverage.
  • Fluorine-free tungsten (FFW) precursors are useful to prevent such reliability and integration issues or device performance issues.
  • Current FFW precursors include metal organic precursors, but undesirable traces of elements from the metal organic precursors may be incorporated in the tungsten film as well, such as carbon, hydrogen, nitrogen, and oxygen.
  • Some metal organic fluorine-free precursors are also not easily implemented or integrated in tungsten deposition processes.
  • Tungsten chloride includes tungsten pentachloride (WCl 5 ), tungsten hexachloride (WCl 6 ), tungsten tetrachloride (WCl 4 ), tungsten dichloride (WCl 2 ), and mixtures thereof.
  • Wl 5 tungsten pentachloride
  • Wl 6 tungsten hexachloride
  • Wl 4 tungsten tetrachloride
  • WCl 2 tungsten dichloride
  • films deposited using certain disclosed embodiments are fluorine-free. Certain disclosed embodiments are directed to depositing bulk tungsten using alternating pulses of a chlorine-containing tungsten precursor and hydrogen.
  • Deposition by WC1 5 and WC1 6 presents challenges that are not present with WF 6 , due to possible etching by the tungsten chlorides. Tungsten chlorides are less reactive, and as a result, deposition is performed at higher temperature than deposition using WF 6 . Evaporated WC1 6 has a high enough vapor pressure to enable carrying it into the tungsten deposition chamber. However, WC1 6 may be more likely to etch the substrate than WC1 5 . While WC1 5 is less likely to etch the substrate, WC1 5 also has a higher vapor pressure than WC1 6 . Although the lower vapor pressure is useful in depositing tungsten films having low resistivity, some deposition operations may have poor step coverage.
  • Molybdenum may be used to form low resistance metallization stack structures and may take the place of tungsten.
  • the disclosed embodiments have a wide variety of applications. Methods may be used to deposit tungsten or molybdenum into features with high step coverage, and may also be used to deposit tungsten into 3D NAND structures. [0031] The methods described herein are performed on a substrate that may be housed in a chamber.
  • the substrate may be a silicon or other semiconductor wafer, e.g., a 200-mm wafer, a 300-mm wafer, or a 450-mm wafer, including wafers having one or more layers of material, such as dielectric, conducting, or semi-conducting material deposited thereon.
  • the methods are not limit to semiconductor substrates, and may be performed to fill any feature with metal such as tungsten.
  • Substrates may have features such as via or contact holes, which may be characterized by one or more of narrow and/or re-entrant openings, constrictions within the feature, and high aspect ratios.
  • a feature may be formed in one or more of the above described layers.
  • the feature may be formed at least partially in a dielectric layer.
  • a feature may have an aspect ratio of at least about 2: 1, at least about 4: 1, at least about 6: 1, at least about 10: 1, at least about 25: 1, or higher.
  • One example of a feature is a hole or via in a semiconductor substrate or a layer on the substrate.
  • Figures 1B-1H are schematic examples of various structures in which a metal may be deposited in accordance with disclosed embodiments.
  • Figure 1B shows an example of a cross-sectional depiction of a vertical feature 101 to be filled with a metal, such as tungsten or molybdenum.
  • the feature can include a feature hole 105 in a substrate 103.
  • the hole 105 or other feature may have a dimension near the opening, e.g., an opening diameter or line width of between about 10 nm to 500 nm, for example between about 25 nm and about 300 nm.
  • the feature hole 105 can be referred to as an unfilled feature or simply a feature.
  • the feature 101, and any feature may be characterized in part by an axis 118 that extends through the length of the feature, with vertically-oriented features having vertical axes and horizontally-oriented features having horizontal axes.
  • features are wordline features in a 3D NAND structure.
  • a substrate may include a wordline structure having an arbitrary number of wordlines (e.g., 50 to 150) with vertical channels at least 200A deep.
  • wordlines e.g., 50 to 150
  • trench in a substrate or layer e.g., a trench in a substrate or layer.
  • the feature may have an under-layer, such as a barrier layer or adhesion layer.
  • under-layers include dielectric layers and conducting layers, e.g., silicon oxides, silicon nitrides, silicon carbides, metal oxides, metal nitrides, metal carbides, and metal layers.
  • Figure 1C shows an example of a feature 101 that has a re-entrant profile.
  • a re entrant profile is a profile that narrows from a bottom, closed end, or interior of the feature to the feature opening. According to various implementations, the profile may narrow gradually and/or include an overhang at the feature opening.
  • Figure 1C shows an example of the latter, with an under-layer 113 lining the sidewall or interior surfaces of the feature hole 105.
  • the under-layer 113 can be for example, a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination of thereof, or any other applicable material.
  • Non-limiting examples of under-layers can include dielectric layers and conducting layers, e.g., silicon oxides, silicon nitrides, silicon carbides, metal oxides, metal nitrides, metal carbides, and metal layers.
  • an under-layer can be one or more of titanium, titanium nitride, tungsten nitride, titanium aluminide, tungsten, and molybdenum.
  • the under-layer is tungsten- free.
  • the under-layer is molybdenum-free.
  • the under-layer 113 forms an overhang 115 such that the under-layer 113 is thicker near the opening of the feature 101 than inside the feature 101.
  • FIG. 1D shows examples of views of various filled features having constrictions.
  • Each of the examples (a), (b) and (c) in Figure 1D includes a constriction 109 at a midpoint within the feature.
  • the constriction 109 can be, for example, between about l5 nm-20 nm wide.
  • Constrictions can cause pinch off during deposition of tungsten or molybdenum in the feature using conventional techniques, with deposited metal blocking further deposition past the constriction before that portion of the feature is filled, resulting in voids in the feature.
  • Example (b) further includes a liner/barrier overhang 115 at the feature opening. Such an overhang could also be a potential pinch-off point.
  • Example (c) includes a constriction 112 further away from the field region than the overhang 115 in example (b).
  • FIG. 1E shows an example of a horizontal feature 150 that includes a constriction 151.
  • horizontal feature 150 may be a word line in a 3D NAND structure.
  • the constrictions can be due to the presence of pillars in a 3D NAND or other structure.
  • Figure 1F presents a cross-sectional side-view of a 3-D NAND (also referred to as vertical NAND or VNAND) structure 110 (formed on a semiconductor substrate 103) having VNAND stacks (left 125 and right 126), central vertical structure 130, and a plurality of stacked horizontal features 120 with openings 122 on opposite sidewalls 140 of central vertical structure 130.
  • a 3-D NAND also referred to as vertical NAND or VNAND
  • Figure 1F displays two“stacks” of the exhibited 3-D NAND structure 110, which together form the“trench-like” central vertical structure 130, however, in certain embodiments, there may be more than two “stacks” arranged in sequence and running spatially parallel to one another, the gap between each adjacent pair of “stacks” forming a central vertical structure 130, like that explicitly illustrated in Figure 1F.
  • the horizontal features 120 are 3-D memory wordline features that are fluidically accessible from the central vertical structure 130 through the openings 122.
  • each 3-D NAND stack 125, 126 contains a stack of wordline features that are fluidically accessible from both sides of the 3-D NAND stack through a central vertical structure 130.
  • each 3-D NAND stack contains 6 pairs of stacked wordlines, however, in other embodiments, a 3-D NAND memory layout may contain any number of vertically stacked pairs of wordlines.
  • the wordline features in a 3-D NAND stack are typically formed by depositing an alternating stack of silicon oxide and silicon nitride layers, and then selectively removing the nitride layers leaving a stack of oxides layers having gaps between them. These gaps are the wordline features.
  • Any number of wordlines may be vertically stacked in such a 3-D NAND structure so long as there is a technique for forming them available, as well as a technique available to successfully accomplish (substantially) void-free fills of the vertical features.
  • a VNAND stack may include between 2 and 256 horizontal wordline features, or between 8 and 128 horizontal wordline features, or between 16 and 64 horizontal wordline features, and so forth (the listed ranges understood to include the recited end points).
  • Figure 1G presents a cross-sectional top-down view of the same 3-D NAND structure 110 shown in side-view in Figure 1F with the cross-section taken through the horizontal section 160 as indicated by the dashed horizontal line in Figure 1F.
  • the cross-section of Figure 1G illustrates several rows of pillars 155, which are shown in Figure 1F to run vertically from the base of semiconductor substrate 103 to the top of 3-D NAND stack 110.
  • these pillars 155 are formed from a polysilicon material and are structurally and functionally significant to the 3-D NAND structure 110.
  • such polysilicon pillars may serve as gate electrodes for stacked memory cells formed within the pillars.
  • FIG. 1G The top-view of Figure 1G illustrates that the pillars 155 form constrictions in the openings 122 to wordline features 120 - i.e. fluidic accessibility of wordline features 120 from the central vertical structure 130 via openings 122 (as indicated by the arrows in Figure 1G) is inhibited by pillars 155.
  • the size of the horizontal gap between adjacent polysilicon pillars is between about 1 and 20 nm. This reduction in fluidic accessibility increases the difficulty of uniformly filling wordline features 120 with tungsten material.
  • the structure of wordline features 1 and the challenge of uniformly filling them with tungsten material or molybdenum material due to the presence of pillars 155 is further illustrated in Figures 1H, II, and 1J.
  • Figure 1H exhibits a vertical cut through a 3-D NAND structure similar to that shown in Figure 1F, but here focused on a single pair of wordline features 120 and additionally schematically illustrating a metal fill process which resulted in the formation of a void 175 in the filled wordline features 120.
  • Figure II also schematically illustrates void 175, but in this figure illustrated via a horizontal cut through pillars 155, similar to the horizontal cut exhibited in Figure 1G.
  • Figure 1J illustrates the accumulation of tungsten or molybdenum material around the constriction-forming pillars 155, the accumulation resulting in the pinch-off of openings 122, so that no additional tungsten or molybdenum material can be deposited in the region of voids 175.
  • Figure 1 J exhibits a single wordline feature 120 viewed cross-sectionally from above and illustrates how a generally conformal deposition of tungsten or molybdenum material begins to pinch- off the interior of wordline feature 120 due to the fact that the significant width of pillars 155 acts to partially block, and/or narrow, and/or constrict what would otherwise be an open path through wordline feature 120.
  • Figure 1J can be understood as a 2-D rendering of the 3-D features of the structure of the pillar constrictions shown in Figure II, thus illustrating constrictions that would be seen in a plan view rather than in a cross- sectional view.
  • Three-dimensional structures may need longer and/or more concentrated exposure to precursors to allow the innermost and bottommost areas to be filled. Three-dimensional structures can be particularly challenging when employing WCl x precursors because of their proclivity to etch, with longer and more concentrated exposure allowing for more etch as parts of the structure. These challenges may also be present with molybdenum chloride precursors.
  • Examples of feature fill for horizontally-oriented and vertically-oriented features are described below. It should be noted that in most cases, the examples are applicable to both horizontally-oriented or vertically-oriented features.
  • the term“lateral” may be used to refer to a direction generally orthogonal to the feature axis and the term“vertical” to refer to a direction generally along the feature axis.
  • the methods described below involve exposing a structure to multiple reducing agent/purge cycles and/or multiple metal -precursor/purge cycles within an cycle.
  • reducing agent/purge cycles and/or multiple metal -precursor/purge cycles within an cycle.
  • metal -precursor/purge cycles within an cycle.
  • multiple tungsten- containing precursor doses interspersed with purge gas pulsing e.g., W/Ar/W/Ar/W/Ar/W/Ar, where W represents a pulse of a tungsten-containing precursor and Ar a pulse of an argon purge gas
  • W represents a pulse of a tungsten-containing precursor
  • Ar a pulse of an argon purge gas
  • multiple molybdenum-containing precursor doses interspersed with purge gas pulsing e.g., Mo/Ar/Mo/Ar/Mo/Ar/Mo/Ar, where Mo represents a pulse of a molybdenum-containing precursor and Ar a pulse of an argon purge gas
  • purge gas pulsing e.g., Mo/Ar/Mo/Ar/Mo/Ar/Mo/Ar, where Mo represents a pulse of a molybdenum-containing precursor and Ar a pulse of an argon purge gas
  • the inert gas purge pulse after each metal -containing pulse can ensure that a monolayer of metal -containing precursor is adsorbed throughout the structure.
  • the multiple pulses, each followed by a purge gas ensure that multiple monolayers of the metal -containing precursor do not build up at the parts of the structure that are more accessible. This can prevent undesired etching of the structure.
  • having alternate pulses enables pressurization of a metal precursor reservoir before each pulse. This can aid in flux to the bottom of the feature.
  • multiple reducing agent doses interspersed with purge gas pulses pulsing e.g., H 2 /Ar/H 2 /Ar/W/Ar/W/Ar, where H 2 is the reducing agent, W represents a pulse of a tungsten- containing precursor and Ar a pulse of an argon purge gas or H 2 /Ar/H 2 /Ar/Mo/Ar/Mo/Ar where Mo represents a pulse of molybdenum-containing precursor
  • H 2 /Ar/H 2 /Ar/W/Ar/W/Ar where H 2 is the reducing agent
  • W represents a pulse of a tungsten- containing precursor
  • Ar a pulse of an argon purge gas or H 2 /Ar/H 2 /Ar/Mo/Ar/Mo/Ar where Mo represents a pulse of molybdenum-containing precursor
  • tungsten feature fill and molybdenum feature fill aspects of the disclosure may also be implemented in filling features with other materials.
  • feature fill using one or more techniques described herein may be used to fill features with other materials including other tungsten-containing materials (e.g., tungsten nitride (WN) and tungsten carbide (WC)), titanium-containing materials (e.g., titanium (Ti), titanium nitride (TiN), titanium silicide (TiSi), titanium carbide (TiC) and titanium aluminide (TiAl)), tantalum-containing materials (e.g., tantalum (Ta), and tantalum nitride (TaN)), and nickel -containing materials (e.g., nickel (Ni) and nickel silicide (NiSi).
  • the methods and apparatus disclosed herein are not limited to feature fill, but can be used to deposit tungsten on any appropriate surface including forming blanket films on planar
  • Figures 2A-2C provide process flow diagrams for methods performed in accordance with disclosed embodiments. As described below, the method is performed to fill a structure on a substrate with tungsten. Examples of structures are described above with reference to Figures 1B-1H.
  • Temperature may vary depending on the chemistry employed.
  • WCl x and WO x Cl 4 precursors certain disclosed embodiments may be performed at a substrate temperature between about 400°C and about 600°C, such as about 525°C.
  • substrate temperature refers to the temperature to which the pedestal holding the substrate is set.
  • certain disclosed embodiments may be performed at a substrate temperature between about 400°C and about 600°C, such as about 525°C.
  • substrate temperature refers to the temperature to which the pedestal holding the substrate is set.
  • Certain disclosed embodiments may be performed at a chamber pressure between about 3 Torr and about 60 Torr.
  • the chamber pressure for tungsten deposition using WCl x precursors is between 5 Torr and 20 Torr, e.g., 10 Torr.
  • a structure to be filled with tungsten or molybdenum is exposed to a reducing agent pulse.
  • the reducing agent pulse is hydrogen (H 2 ).
  • Other reducing agents including silanes, boranes, germanes, phosphines, hydrogen- containing gases, and combinations thereof, may be used.
  • bulk tungsten deposition or bulk molybdenum deposition is performed using hydrogen as a reducing agent.
  • the reducing agent is pulsed without flowing another reactant.
  • a carrier gas may be flowed.
  • a carrier gas such as nitrogen (N 2 ), argon (Ar), helium (He), or other inert gases, may be flowed during operation 200.
  • Operation 200 may be performed for any suitable duration.
  • Example durations include between about 0.25 seconds and about 30 seconds, about 0.25 seconds and about 20 seconds, about 0.25 seconds and about 5 seconds, or about 0.5 seconds and about 3 seconds.
  • the chamber is purged to remove excess hydrogen that did not adsorb to the surface of the substrate.
  • a purge may be conducted by flowing an inert gas at a fixed pressure thereby reducing the pressure of the chamber and re-pressurizing the chamber before initiating another reactant gas exposure.
  • Example inert gases include nitrogen (N 2 ), argon (Ar), helium (He), and mixtures thereof.
  • the purge may be performed for a duration between about 0.25 seconds and about 30 seconds, about 0.25 seconds and about 20 seconds, about 0.25 seconds and about 5 seconds, or about 0.5 seconds and about 3 seconds.
  • Operations 200 and 202 are then repeated until they are performed k times, where k is an integer of at least 21.
  • operation 200 may have a duration of 0.5 seconds, and operation 202 a duration of 1 seconds between reducing agent pulses.
  • Example precursors include chlorine-containing tungsten precursors such as tungsten chlorides and tungsten oxychlorides.
  • Tungsten chlorides may be WC1 , where x is an integer between and including 2 and 6, such as 2, 3, 4, 5, or 6. Examples include WCl 5 and WCl 6 .
  • the chlorine-containing tungsten precursor may include a mixture of WCl x compounds.
  • Tungsten oxychlorides include WO x Cl y where x and y are numbers greater than 0.
  • Molybdenum precursors including molybdenum chlorides and molybdenum oxychlorides are used to deposit molybdenum. These include molybdenum pentachloride (MoCl 5 ), molybdenum dichloride dioxide (Mo0 2 Cl 2 ), molybdenum tetrachloride oxide (MoOCl 4 ).
  • a carrier gas such as nitrogen (N 2 ), argon (Ar), helium (He), or other inert gases, may be flowed during operation 206.
  • Operation 204 may be performed for any suitable duration and at any suitable temperature.
  • operation 206 may be performed for a duration between about 0.25 seconds and about 30 seconds, about 0.25 seconds and about 20 seconds, about 0.25 seconds and about 5 seconds, or about 0.5 seconds and about 3 seconds. This operation may be performed in some embodiments for a duration sufficient to saturate the active sites on the surface of the substrate.
  • the precursor may be diverted to fill the gas line and line change before dosing.
  • the carrier gas may be any of those described above with respect to operation 202.
  • some WCl x may react with H 2 that remains on the surface from operation 200 and some WCl x may not fully react with H 2 that remained on the surface. Also in various embodiments, some H 2 may not react with WCl x at all and WCl x may instead be physisorbed onto the surface of the substrate where no H 2 is physisorbed or remains on the substrate surface. In some embodiments, H 2 may remain on the substrate surface but may not be physisorbed or chemisorbed to the surface. Operation 204 of Figure 2A may thereby form a sub-monolayer of tungsten in some embodiments. Similarly, operation 204 may form a sub-monolayer of molybdenum in some embodiments.
  • a purge is performed to purge excess precursor still in gas phase that did not react with hydrogen or other reducing agent on the surface of the feature.
  • a purge may be conducted by flowing an inert gas at a fixed pressure thereby reducing the pressure of the chamber and re-pressurizing the chamber before initiating another gas exposure.
  • the chamber may be purged for any suitable duration.
  • the chamber may be purged for a duration between about 0.25 seconds and about 30 seconds, about 0.25 seconds and about 20 seconds, about 0.25 seconds and about 5 seconds, or about 0.5 seconds and about 3 seconds.
  • the purge duration is between about 0.1 seconds and about 2 seconds and may prevent removing all of the WCl x or other precursor from the substrate surface due to the low adsorption rate of WCl x to a surface of tungsten.
  • purge duration is between about 0.1 seconds and about 15 seconds, such as about 7 seconds.
  • the chamber may be purged for about 2 seconds during operation 206.
  • the purge gas may be any of the gases described above with respect to operation 202.
  • Operations 204 and 206 are then repeated until they are performed n times, where n is an integer of at least 2.
  • n is an integer of at least 2.
  • operation 204 may have a duration of 0.7 seconds
  • operation 206 a duration of 2 seconds between tungsten precursor pulses.
  • n 10
  • a total purge time of 2 x 10 20 seconds.
  • operation 208 it is determined whether the tungsten or molybdenum layer has been deposited to an adequate thickness. If not, operations 200-206 are repeated until a desired thickness of a tungsten or molybdenum layer is deposited on the surface of the feature. Each repetition of operations 200-206 may be referred to as a“cycle.” In some embodiments, the order of operations 200/202 and 204/206 may be reversed, such that a tungsten or molybdenum precursor is introduced prior to the introduction of a reducing agent.
  • Figure 2B provides a process flow diagram for embodiments in which each ALD cycle includes a single reducing agent pulse and multiple tungsten or molybdenum precursor pulses, such that operations 200 and 202 are not repeated during the cycle.
  • Figure 2C provides a process flow diagram for embodiments in which each ALD cycle includes a single tungsten or molybdenum precursor pulse and multiple reducing agent pulses such that operations 204 and 206 are not repeated during the cycle.
  • the process blocks in Figures 2B and 2C are otherwise as described above with respect to Figure 2A.
  • Figure 3 provides a timing sequence diagram depicting example deposition cycles 311A and 311B in a process for depositing tungsten using H 2 and WCl x .
  • Figure 3 shows H 2 pulse in deposition cycle 311A which is an example of an embodiment of operation 200 of Figures 2A-2C.
  • the Ar and WCl x flows are turned off.
  • a purge gas may continue to flow during the reducing agent pulse.
  • turning the purge gas off during the reducing agent pulse is beneficial to increase exposure to the reducing agent.
  • an Ar pulse is shown. This is an example of an embodiment of operation 202 of Figures 2A-2C.
  • the H 2 and WCl x flows are turned off.
  • the dotted box indicates an arbitrary number of H 2 /Ar purge pulses that are then performed without an intervening tungsten precursor pulse. This is an example of an embodiment of operations 200 and 202 of Figures 2A and 2C. Five H 2 /Ar pulse sequences are shown, but the number of H 2 /Ar pulse sequences can range from one to k as described above.
  • the dotted box at 340 indicates the repeated WC1 /Ar purge pulses that are then performed without an intervening reducing agent pulse. This is an example of an embodiment of operations 204 and 206 of Figures 2A and 2B.
  • Ar flow may remain on during H 2 and/or WCl x pulses, with Ar pulses characterized by no H 2 and WCl x flows and in some embodiments, increased Ar flow.
  • Fill of 3-D NAND structures benefit from higher W concentration at the wafer; diluting it will result in poor fill.
  • turning the purge gas off and pressuring the purge manifold during the tungsten precursor pulse enables a more efficient purging of the chamber than a continuous purge flow with W pulses in between.
  • an Ar pulse concludes deposition cycle 311 A.
  • WCl x is shown in the example of Figure 3 for illustrative purposes, the timing sequence in Figure 3 may be used for other precursors including tungsten oxychloride precursors and molybdenum chloride and molybdenum oxychloride precursors.
  • other purge gases and/or other reducing agents may be used instead of Ar and H 2 .
  • Figures 4A-4J are schematic illustrations of an example mechanism of a deposition cycle in the deposition of tungsten from WCl 6 .
  • Figure 4A depicts an example mechanism where H 2 is introduced to the substrate 400, which has an underlayer 401 deposited thereon.
  • Underlayer 401 may be a barrier layer in some embodiments.
  • underlayer 401 is a titanium nitride (TiN) layer.
  • the substrate 400 does not include a tungsten nucleation layer. In other embodiments, it may include a tungsten nucleation layer.
  • Hydrogen is introduced in gas phase (41 la and 41 lb) and some H 2 (4l3a and 4l3b) is on the surface of the underlayer 401, where it may catalyti cully dissociate into chemically active adsorbed atomic hydrogen on metal surfaces (e.g. H 2 ) or physisorb on catalyti cully inactive surfaces (e.g. TiN).
  • H 2 may not necessarily chemisorb onto the underlayer 401, but in some embodiments, may physisorb onto the surface of the underlayer 401.
  • Figure 4B shows an example illustration whereby H 2 previously in gas phase (41 la and 41 lb in Figure 4A) are purged from the chamber, and H 2 previously on the surface (443a and 413b) remain on the surface of the underlayer 401.
  • Figure 4C shows an example schematic illustration whereby the substrate is exposed to WCl 6 , some of which is in gas phase (43 la and 43 lb) and some of which is at or near the surface of the substrate (423a and 423b).
  • H 2 may react with WCl 6 that remained on the surface from the prior dose.
  • WCl 6 may react with H 2 to temporarily form intermediate 443b, whereby in Figure 4E, intermediate 443b fully reacts to leave tungsten 490 on the surface of the substrate 400 on the underlayer 401, and HC1 in gas phase (45 la and 45 lb, for example).
  • tungsten 490 grows directly on the underlayer 401 without depositing a nucleation layer and without treating the underlayer 401 prior to depositing tungsten.
  • the underlayer 401 may be exposed to a soak treatment, such as by exposing to diborane.
  • the underlayer 401 may have been previously treated with a mixture of Sil3 ⁇ 4, B 2 H , and H 2 to form a solid Si-B-H interfacial surface layer that can react sacrificially during subsequent WClx -H 2 exposures.
  • the stoichiometry of the Si-B-H layers can vary greatly from low (10%) to high (95%) boron concentration.
  • H 2 may not fully react with WCl 6 (or other W chlorides) that remained on the surface from the prior dose.
  • WCl 6 may partially react with H 2 to form intermediate 443a, whereby in Figure 4E, intermediate 443a remains partially reacted on the surface of the substrate 400 on the underlayer 401.
  • the film deposited using a chlorine-containing tungsten precursor and hydrogen has a lower resistivity than a film deposited using a borane, silane, or germane, for deposition thicknesses up to about 50A.
  • the stoichiometry of WCl 6 may use at least three H 2 molecules to react with one molecule of WCl 6 . It is possible that WCl 6 partially reacts with molecules of H 2 but rather than forming tungsten, an intermediate is formed. For example, this may occur if there is not enough H 2 in its vicinity to react with WCl 6 based on stoichiometric principles (e.g., three H 2 molecules are used to react with one molecule of WCl 6 ) thereby leaving an intermediate 343a on the surface of the substrate.
  • stoichiometric principles e.g., three H 2 molecules are used to react with one molecule of WCl 6
  • Tungsten chlorides may be chemically inert to molecular H 2 and require the presence of adsorbed atomic hydrogen created by the catalytic dissociation of molecular H 2 . In this case large excesses of molecular H 2 beyond simple stoichiometric ratios may be required to fully reduce tungsten chlorides to metallic tungsten (molecular H 2 / WClx ratios of lOO’s to 1).
  • Figure 4F provides an example schematic of the substrate when the chamber is purged. This may correspond to operation 202 of Figures 2A-2C. Note that compound 443c of Figure 4F may be an intermediate formed but not completely reacted, while some tungsten 490 may be formed on the substrate. Each cycle thereby forms a sub-monolayer of tungsten on the substrate.
  • Figure 4G shows an illustration when a cycle is repeated, whereby H 2 41 lc in gas phase is introduced to the substrate with the deposited tungsten 490 and the partially reacted intermediate 443d thereon.
  • This may correspond to operation 200 of Figures 2A-2C in a repeated cycle after determining in operation 208 that tungsten has not been deposited to an adequate thickness.
  • the H 2 introduced may now fully react with the intermediate 443d on the substrate such that, as shown in Figure 4H, the reacted compound 443d leaves behind deposited tungsten 490b and 490c, and byproducts HC1 45 lc and 45 ld are formed in gas phase.
  • Some H 2 4l lc may remain in gas phase, while some H 2 4l3c may remain on the tungsten layer 490a.
  • the chamber is purged (thereby corresponding with operation 202 of Figures 2A-2C), leaving behind deposited tungsten 490a, 490b, and 490c, and some H 2 4l3c.
  • WCl 6 is again introduced in a dose such that molecules 43 lc and 423c may then adsorb and/or react with H 2 and the substrate.
  • Figure 4J may correspond to operation 204 of Figures 2A-2C.
  • the chamber may again be purged and cycles may be repeated again until the desired thickness of tungsten is deposited.
  • Tungsten films deposited using certain disclosed embodiments have no fluorine content. Molybdenum films may also have no fluorine content. Overall tensile stress of films may be less than about 0.2 GPa.
  • Fluorine-free tungsten precursors may include tungsten carbonyl (W(CO) 6 ) and tungsten chlorides (WCl x ) such as tungsten pentachloride (WCl 5 ) and tungsten hexachloride (WCl 6 ).
  • Fluorine-free molybdenum precursors include the molybdenum oxychloride and molybdenum chloride precursors described herein as well as molybdenum hexacarbonyl (Mo(CO) 6 ).
  • a feature may be filled by depositing a tungsten nucleation layer by ALD cycles of alternating pulses of a reducing agent (e.g., a borane, a silane, or a germane with hydrogen) and a tungsten precursor such as WCl 6 , followed by bulk tungsten deposition by alternating pulses of hydrogen and a chlorine-containing tungsten precursor as described above with respect to Figures 2 and 3.
  • a reducing agent e.g., a borane, a silane, or a germane with hydrogen
  • a tungsten precursor such as WCl 6
  • a feature may be filled by depositing a molybdenum layer by ALD cycles of alternating pulses of a reducing agent and a molybdenum precursor.
  • ALD processes due to the alternating pulses of reactants.
  • the methods described herein typically involve purging between reactant cycles to ensure that there is no growth component from a CVD mechanism.
  • the methods may be used with“sequential CVD” processes as described in U.S. Patent Publication No. 20170117155 and U.S. Patent No. 9,613,818, both of which are incorporated herein by reference.
  • a the precursor can be delivered deep into 3D NAND wordlines with minimizing etching at the top and lateral edges of the structures.
  • a monolayer or sub- monolayer of the precursor can be adsorbed throughout the structure.
  • having alternate precursor and purge pulses enables a precursor reservoir to be pressurized before precursor dose delivery. This can result in better transport into the structure.
  • Table 1 shows conditions and resulting TiN underlayer etch for 300 Angstrom PVD TiN blanket films exposed to a H 2 /Ar/WC1 /Ar sequence and a H 2 /Ar///(WC1 /Ar) sequence, with n equal to 10.
  • FIG. 5 shows a schematic illustration of experimental results comparing tungsten fill of 3-D NAND structures using a H 2 /Ar/WC Ar sequence and a H 2 /Ar///(WC1 /Ar) sequence.
  • a nucleation layer was deposited in each structure prior to these sequences.
  • the illustrations in Figure 5 are representative of cross-sections from the middle sections of 3-D NAND structures.
  • the total tungsten precursor exposure in Torr-s was the same for both 501 and 503.
  • Each of the n tungsten pulses is short and may be delivered at a constant pressure.
  • the total amount of tungsten precursor is sufficient for the tungsten precursor to reach the bottom of the structure and to provide enough material to coat the entire structure laterally.
  • the intervening inert gas purge may remove the tungsten precursor at the top and edges of structure, reducing or eliminating substrate etch. If there is not a sufficient inert gas purge, this beneficial effect may not be observed. Further, a pinching effect at peripheral openings may be observed for insufficient purge between multiple tungsten pulses.
  • the duration of the inert gas purge is at least as long as the tungsten or molybdenum precursor duration. In some embodiments, the inert gas purge is at least 1.5 times, or at least 2 times, or at least 3 times the duration of the tungsten or molybdenum precursor pulse.
  • the purge gas to precursor exposure may also be characterized in terms of partial pressure x duration. The purge may be performed with 100% purge gas, with a precursor diluted to 1% to 5% of flow.
  • Disclosed embodiments may be performed at any suitable pressure, such as pressures greater than about 10 Torr, or pressures less than about 10 Torr.
  • each pedestal may be set at different temperatures. In some embodiments, each pedestal is set at the same temperature.
  • Chamber pressure may also be modulated in one or more operations of certain disclosed embodiments.
  • chamber pressure during nucleation deposition is different from chamber pressure during bulk deposition.
  • chamber pressure during nucleation deposition is the same as the chamber pressure during bulk deposition.
  • Example deposition apparatuses include various systems, e.g., ALTUS ® and ALTUS ® Max, available from Lam Research Corp., of Fremont, California, or any of a variety of other commercially available processing systems.
  • sequential chemical vapor deposition (CVD) may be performed at a first station that is one of two, five, or even more deposition stations positioned within a single deposition chamber.
  • hydrogen (H 2 ) and tungsten hexachloride (WCl 6 ) may be introduced in alternating pulses to the surface of the semiconductor substrate, at the first station, using an individual gas supply system that creates a localized atmosphere at the substrate surface.
  • Another station may be used for fluorine-free tungsten deposition, or CVD.
  • Two or more stations may be used to deposit tungsten in a parallel processing.
  • a wafer may be indexed to have the sequential CVD operations performed over two or more stations sequentially.
  • FIG. 6 is a schematic of a process system suitable for conducting deposition processes in accordance with embodiments.
  • the system 600 includes a transfer module 603.
  • the transfer module 603 provides a clean, pressurized environment to minimize risk of contamination of substrates being processed as they are moved between various reactor modules.
  • Mounted on the transfer module 603 is a multi-station reactor 609 capable of performing ALD and CVD according to various embodiments.
  • Multi-station reactor 609 may include multiple stations 611, 613, 615, and 617 that may sequentially perform operations in accordance with disclosed embodiments.
  • multi-station reactor 609 may be configured such that station 611 performs a PNL tungsten nucleation layer deposition using a chlorine-containing tungsten precursor or a fluorine-containing precursor, and station 613 performs an ALD tungsten deposition operation according to various embodiments.
  • station 615 may also form an ALD tungsten deposition operation, and station 617 may perform a non- sequential CVD operation.
  • the number ( n ) of tungsten precursor pulses may be varied from station 613 to 615.
  • Stations may include a heated pedestal or substrate support, one or more gas inlets or showerhead or dispersion plate.
  • An example of a deposition station 700 is depicted in Figure 7, including substrate support 702 and showerhead 703.
  • a heater may be provided in pedestal portion 701.
  • the transfer module 503 may be one or more single or multi-station modules 607 capable of performing plasma or chemical (non-plasma) pre-cleans, other deposition operations, or etch operations.
  • the module may also be used for various treatments to, for example, prepare a substrate for a deposition process.
  • the system 600 also includes one or more wafer source modules 601, where wafers are stored before and after processing.
  • An atmospheric robot (not shown) in the atmospheric transfer chamber 619 may first remove wafers from the source modules 601 to loadlocks 621.
  • a wafer transfer device (generally a robot arm unit) in the transfer module 603 moves the wafers from loadlocks 621 to and among the modules mounted on the transfer module 603.
  • a system controller 629 is employed to control process conditions during deposition.
  • the controller 629 will typically include one or more memory devices and one or more processors.
  • a processor may include a CPU or computer, analog and/or digital input/output connections, stepper motor controller boards, etc.
  • the controller 629 may control all of the activities of the deposition apparatus.
  • the system controller 629 executes system control software, including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process.
  • RF radio frequency
  • Other computer programs stored on memory devices associated with the controller 629 may be employed in some embodiments.
  • the user interface may include a display screen, graphical software displays of the apparatus and/or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.
  • System control logic may be configured in any suitable way.
  • the logic can be designed or configured in hardware and/or software.
  • the instructions for controlling the drive circuitry may be hard coded or provided as software.
  • the instructions may be provided by“programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general purpose processor.
  • System control software may be coded in any suitable computer readable programming language.
  • the computer program code for controlling the germanium-containing reducing agent pulses, hydrogen flow, and tungsten- containing precursor pulses, and other processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.
  • the controller parameters relate to process conditions, such as, for example, process gas composition and flow rates, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface.
  • Signals for monitoring the process may be provided by analog and/or digital input connections of the system controller 629.
  • the signals for controlling the process are output on the analog and digital output connections of the deposition apparatus 600.
  • the system software may be designed or configured in many different ways. For example, various chamber component subroutines or control obj ects may be written to control operation of the chamber components necessary to carry out the deposition processes in accordance with the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.
  • a controller 629 is part of a system, which may be part of the above-described examples.
  • Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.).
  • These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate.
  • the electronics may be referred to as the“controller,” which may control various components or subparts of the system or systems.
  • the controller 629 may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
  • temperature settings e.g., heating and/or cooling
  • RF radio frequency
  • the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like.
  • the integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software).
  • Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system.
  • the operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
  • the controller 629 may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof.
  • the controller 629 may be in the“cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing.
  • the computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process.
  • a remote computer e.g.
  • a server can provide process recipes to a system over a network, which may include a local network or the Internet.
  • the remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer.
  • the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control.
  • the controller may be distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein.
  • An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
  • example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a CVD chamber or module, an ALD chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • ALD atomic layer etch
  • ALE atomic layer etch
  • the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.
  • the controller 629 may include various programs.
  • a substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other parts of the chamber such as a gas inlet and/or target.
  • a process gas control program may include code for controlling gas composition, flow rates, pulse times, and optionally for flowing gas into the chamber prior to deposition in order to stabilize the pressure in the chamber.
  • a pressure control program may include code for controlling the pressure in the chamber by regulating, e.g., a throttle valve in the exhaust system of the chamber.
  • a heater control program may include code for controlling the current to a heating unit that is used to heat the substrate.
  • the heater control program may control delivery of a heat transfer gas such as helium to the wafer chuck.
  • a heat transfer gas such as helium
  • Examples of chamber sensors that may be monitored during deposition include mass flow controllers, pressure sensors such as manometers, and thermocouples located in the pedestal or chuck. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain desired process conditions.
  • the apparatus may include a gas manifold system, which provides line charges to the various gas distribution lines as shown schematically in Figure 8.
  • Manifold 804 has an input 802 from a source of a tungsten-containing or molybdenum-containing precursor gas (not shown)
  • manifold 811 has an input 809 from a source of hydrogen or other reducing gas (not shown)
  • manifold 821 has an input 819 from a source of inert purge gas (not shown).
  • the manifolds 804, 811 and 821 provide the precursor gas, reducing gas and purge gas to the deposition chamber through valved distribution lines, 805, 813 and 825 respectively.
  • valve 806 is closed to vacuum and valve 808 is closed. After a suitable increment of time, valve 808 is opened and the precursor gas is delivered to the chamber. After a suitable time for delivery of the gas, valve 808 is closed. The chamber can then be purged to a vacuum by opening of valve 806 to vacuum.
  • Similar processes are used to deliver the reducing gas and the purge gas.
  • distribution line 813 is charged by closing valve 815 and closing valve 817 to vacuum. Opening of valve 815 allows for delivery of the reducing gas to the chamber.
  • distribution line 825 is charged by closing valve 827 and closing valve 823 to vacuum. Opening of valve 827 allows for delivery of the argon or other inert purge gas to the chamber. The amount of time allowed for line charges changes the amount and timing of the initial delivery of the gas.
  • FIG. 6 also shows vacuum pumps in which valves 806, 817 and 823, respectively, can be opened to purge the system.
  • the supply of gas through the various distribution lines is controlled by a controller, such as a mass flow controller which is controlled by a microprocessor, a digital signal processor or the like, that is programmed with the flow rates, duration of the flow, and the sequencing of the processes.
  • valve and MFC commands are delivered to embedded digital input-output controllers (IOC) in discrete packets of information containing instructions for all time-critical commands for all or a part of a PNL deposition sequence.
  • IOC embedded digital input-output controllers
  • the ALTUS systems of Lam Research provide at least one IOC sequence.
  • the IOCs can be physically located at various points in the apparatus; e.g., within the process module or on a stand-alone power rack standing some distance away from the process module. There are typically multiple IOCs in each module (e.g., 3 per module).
  • all commands for controlling valves and setting flow for MFCs may be included in a single IOC sequence. This assures that the timing of all the devices is tightly controlled from an absolute standpoint and also relative to each other.
  • IOC sequences running at any given time. This allows for, say, PNL to run at station 1-2 with all timing controlled for all the hardware components needed to deposit a PNL-W nucleation layer at those stations.
  • a second sequence might be running concurrently to deposit a tungsten bulk using the timing sequence described above at other deposition stations in the same module.
  • the relative timing of the devices controlling the delivery of reagents to stations 3-4 is important within that group of devices, but the relative timing of the PNL process at stations 1-2 can be offset from the relative timing of stations 3-4.
  • An IOC translates the information in a packetized sequence and delivers digital or analog command signals directly to MFC or pneumatic solenoid banks controlling the valves.
  • a pulse of tungsten- containing gas may be generated as follows. Initially, the system diverts WCl x to a vacuum pump for a period of time while the MFC or other flow- controlling device stabilizes. This may be done for a period of between about 0.5 to 5 seconds in one example. Next, the system pressurizes the tungsten gas delivery manifold by closing both the divert outlet 606 and the outlet 608 to the deposition chamber. This may be done for a period of between about 0.1 and 5 seconds, for example, to create an initial burst of reagent when the outlet to the deposition chamber is opened. This is accomplished by opening outlet valve 808 for between about 0.1 and 10 seconds in one example.
  • the tungsten-containing gas is purged from the deposition chamber using a suitable purge gas.
  • the pulsed flow of other reagents may be done in a similar manner.
  • a pulse of molybdenum- containing gas may be generating in a similar fashion.
  • Lithographic patterning of a film typically includes some or all of the following steps, each step provided with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.
  • a tool such as an RF or microwave plasma resist stripper.

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KR1020207034800A KR102806630B1 (ko) 2018-05-03 2019-05-03 3d nand 구조체들에 텅스텐 및 다른 금속들을 증착하는 방법
JP2020561743A JP2021523292A (ja) 2018-05-03 2019-05-03 3d nand構造内にタングステンおよび他の金属を堆積させる方法
CN201980038600.8A CN112262457A (zh) 2018-05-03 2019-05-03 在3d nand结构中沉积钨和其他金属的方法
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111826631A (zh) * 2019-04-19 2020-10-27 Asm Ip私人控股有限公司 层形成方法和装置
US20210222292A1 (en) * 2020-01-16 2021-07-22 Entegris, Inc. Method for etching or deposition
EP3892755A1 (fr) * 2020-04-07 2021-10-13 Commissariat à l'énergie atomique et aux énergies alternatives Procede de depot d'un film metallique de molybdene par ald
JPWO2022130559A1 (https=) * 2020-12-17 2022-06-23
US12448688B2 (en) 2022-03-15 2025-10-21 Kioxia Corporation Film forming method and apparatus
US12595556B2 (en) 2023-03-02 2026-04-07 L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude Molybdenum imido alkyl/allyl complexes for deposition of molybdenum-containing films

Families Citing this family (260)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10573522B2 (en) 2016-08-16 2020-02-25 Lam Research Corporation Method for preventing line bending during metal fill process
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
KR102546317B1 (ko) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기체 공급 유닛 및 이를 포함하는 기판 처리 장치
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US12040200B2 (en) 2017-06-20 2024-07-16 Asm Ip Holding B.V. Semiconductor processing apparatus and methods for calibrating a semiconductor processing apparatus
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
KR20190009245A (ko) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
TWI815813B (zh) 2017-08-04 2023-09-21 荷蘭商Asm智慧財產控股公司 用於分配反應腔內氣體的噴頭總成
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
KR20250073535A (ko) 2017-08-14 2025-05-27 램 리써치 코포레이션 3차원 수직 nand 워드라인을 위한 금속 충진 프로세스
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
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US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
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CN111316417B (zh) 2017-11-27 2023-12-22 阿斯莫Ip控股公司 与批式炉偕同使用的用于储存晶圆匣的储存装置
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US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
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US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
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US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
KR102646467B1 (ko) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조
KR102600229B1 (ko) 2018-04-09 2023-11-10 에이에스엠 아이피 홀딩 비.브이. 기판 지지 장치, 이를 포함하는 기판 처리 장치 및 기판 처리 방법
US12025484B2 (en) 2018-05-08 2024-07-02 Asm Ip Holding B.V. Thin film forming method
US12272527B2 (en) 2018-05-09 2025-04-08 Asm Ip Holding B.V. Apparatus for use with hydrogen radicals and method of using same
KR102596988B1 (ko) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 그에 의해 제조된 장치
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
KR102568797B1 (ko) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 시스템
CN120591748A (zh) 2018-06-27 2025-09-05 Asm Ip私人控股有限公司 用于形成含金属的材料的循环沉积方法及膜和结构
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
KR102707956B1 (ko) 2018-09-11 2024-09-19 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
CN110970344B (zh) 2018-10-01 2024-10-25 Asmip控股有限公司 衬底保持设备、包含所述设备的系统及其使用方法
KR102592699B1 (ko) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치
KR102546322B1 (ko) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
US12378665B2 (en) 2018-10-26 2025-08-05 Asm Ip Holding B.V. High temperature coatings for a preclean and etch apparatus and related methods
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR102748291B1 (ko) 2018-11-02 2024-12-31 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 기판 처리 장치
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
KR20250116174A (ko) 2018-11-19 2025-07-31 램 리써치 코포레이션 텅스텐을 위한 몰리브덴 템플릿들
US12040199B2 (en) 2018-11-28 2024-07-16 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (ko) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치를 세정하는 방법
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
JP7504584B2 (ja) 2018-12-14 2024-06-24 エーエスエム・アイピー・ホールディング・ベー・フェー 窒化ガリウムの選択的堆積を用いてデバイス構造体を形成する方法及びそのためのシステム
WO2020123987A1 (en) 2018-12-14 2020-06-18 Lam Research Corporation Atomic layer deposition on 3d nand structures
TWI866480B (zh) 2019-01-17 2024-12-11 荷蘭商Asm Ip 私人控股有限公司 藉由循環沈積製程於基板上形成含過渡金屬膜之方法
SG11202108217UA (en) 2019-01-28 2021-08-30 Lam Res Corp Deposition of metal films
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
JP7509548B2 (ja) 2019-02-20 2024-07-02 エーエスエム・アイピー・ホールディング・ベー・フェー 基材表面内に形成された凹部を充填するための周期的堆積方法および装置
TWI873122B (zh) 2019-02-20 2025-02-21 荷蘭商Asm Ip私人控股有限公司 填充一基板之一表面內所形成的一凹槽的方法、根據其所形成之半導體結構、及半導體處理設備
TWI842826B (zh) 2019-02-22 2024-05-21 荷蘭商Asm Ip私人控股有限公司 基材處理設備及處理基材之方法
KR102858005B1 (ko) 2019-03-08 2025-09-09 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
SG11202109796QA (en) 2019-03-11 2021-10-28 Lam Res Corp Precursors for deposition of molybdenum-containing films
KR20200116033A (ko) 2019-03-28 2020-10-08 에이에스엠 아이피 홀딩 비.브이. 도어 개방기 및 이를 구비한 기판 처리 장치
KR102809999B1 (ko) 2019-04-01 2025-05-19 에이에스엠 아이피 홀딩 비.브이. 반도체 소자를 제조하는 방법
WO2020210260A1 (en) 2019-04-11 2020-10-15 Lam Research Corporation High step coverage tungsten deposition
WO2020214732A1 (en) * 2019-04-19 2020-10-22 Lam Research Corporation Rapid flush purging during atomic layer deposition
KR20200125453A (ko) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. 기상 반응기 시스템 및 이를 사용하는 방법
KR102929471B1 (ko) 2019-05-07 2026-02-20 에이에스엠 아이피 홀딩 비.브이. 딥 튜브가 있는 화학물질 공급원 용기
KR102929472B1 (ko) 2019-05-10 2026-02-20 에이에스엠 아이피 홀딩 비.브이. 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조
JP7598201B2 (ja) 2019-05-16 2024-12-11 エーエスエム・アイピー・ホールディング・ベー・フェー ウェハボートハンドリング装置、縦型バッチ炉および方法
JP7612342B2 (ja) 2019-05-16 2025-01-14 エーエスエム・アイピー・ホールディング・ベー・フェー ウェハボートハンドリング装置、縦型バッチ炉および方法
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
US12237221B2 (en) 2019-05-22 2025-02-25 Lam Research Corporation Nucleation-free tungsten deposition
KR20200141002A (ko) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. 배기 가스 분석을 포함한 기상 반응기 시스템을 사용하는 방법
KR102918757B1 (ko) 2019-06-10 2026-01-28 에이에스엠 아이피 홀딩 비.브이. 석영 에피택셜 챔버를 세정하는 방법
KR20200143254A (ko) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조
KR102911421B1 (ko) 2019-07-03 2026-01-12 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법
JP7499079B2 (ja) 2019-07-09 2024-06-13 エーエスエム・アイピー・ホールディング・ベー・フェー 同軸導波管を用いたプラズマ装置、基板処理方法
CN112216646B (zh) 2019-07-10 2026-02-10 Asmip私人控股有限公司 基板支撑组件及包括其的基板处理装置
KR102895115B1 (ko) 2019-07-16 2025-12-03 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
TWI826704B (zh) 2019-07-17 2023-12-21 荷蘭商Asm Ip私人控股有限公司 自由基輔助引燃電漿系統和方法
KR102860110B1 (ko) 2019-07-17 2025-09-16 에이에스엠 아이피 홀딩 비.브이. 실리콘 게르마늄 구조를 형성하는 방법
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
KR102903090B1 (ko) 2019-07-19 2025-12-19 에이에스엠 아이피 홀딩 비.브이. 토폴로지-제어된 비정질 탄소 중합체 막을 형성하는 방법
CN112309843B (zh) 2019-07-29 2026-01-23 Asmip私人控股有限公司 实现高掺杂剂掺入的选择性沉积方法
CN112309900B (zh) 2019-07-30 2025-11-04 Asmip私人控股有限公司 基板处理设备
CN112309899B (zh) 2019-07-30 2025-11-14 Asmip私人控股有限公司 基板处理设备
US12169361B2 (en) 2019-07-30 2024-12-17 Asm Ip Holding B.V. Substrate processing apparatus and method
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
CN112323048B (zh) 2019-08-05 2024-02-09 Asm Ip私人控股有限公司 用于化学源容器的液位传感器
KR20210018761A (ko) 2019-08-09 2021-02-18 에이에스엠 아이피 홀딩 비.브이. 냉각 장치를 포함한 히터 어셈블리 및 이를 사용하는 방법
WO2021030836A1 (en) 2019-08-12 2021-02-18 Lam Research Corporation Tungsten deposition
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
JP7810514B2 (ja) 2019-08-21 2026-02-03 エーエスエム・アイピー・ホールディング・ベー・フェー 成膜原料混合ガス生成装置及び成膜装置
KR20210024423A (ko) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 홀을 구비한 구조체를 형성하기 위한 방법
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
KR102928101B1 (ko) 2019-08-23 2026-02-13 에이에스엠 아이피 홀딩 비.브이. 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
JP2022546404A (ja) 2019-08-28 2022-11-04 ラム リサーチ コーポレーション 金属の堆積
US12334351B2 (en) 2019-09-03 2025-06-17 Lam Research Corporation Molybdenum deposition
KR102868968B1 (ko) 2019-09-03 2025-10-10 에이에스엠 아이피 홀딩 비.브이. 칼코지나이드 막 및 상기 막을 포함한 구조체를 증착하기 위한 방법 및 장치
KR102806450B1 (ko) 2019-09-04 2025-05-12 에이에스엠 아이피 홀딩 비.브이. 희생 캡핑 층을 이용한 선택적 증착 방법
KR102733104B1 (ko) 2019-09-05 2024-11-22 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US12469693B2 (en) 2019-09-17 2025-11-11 Asm Ip Holding B.V. Method of forming a carbon-containing layer and structure including the layer
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (zh) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法
TW202128273A (zh) 2019-10-08 2021-08-01 荷蘭商Asm Ip私人控股有限公司 氣體注入系統、及將材料沉積於反應室內之基板表面上的方法
KR102948143B1 (ko) 2019-10-08 2026-04-07 에이에스엠 아이피 홀딩 비.브이. 활성 종을 이용하기 위한 가스 분배 어셈블리를 포함한 반응기 시스템 및 이를 사용하는 방법
TWI846953B (zh) 2019-10-08 2024-07-01 荷蘭商Asm Ip私人控股有限公司 基板處理裝置
TWI846966B (zh) 2019-10-10 2024-07-01 荷蘭商Asm Ip私人控股有限公司 形成光阻底層之方法及包括光阻底層之結構
US12009241B2 (en) 2019-10-14 2024-06-11 Asm Ip Holding B.V. Vertical batch furnace assembly with detector to detect cassette
WO2021076636A1 (en) 2019-10-15 2021-04-22 Lam Research Corporation Molybdenum fill
TWI834919B (zh) 2019-10-16 2024-03-11 荷蘭商Asm Ip私人控股有限公司 氧化矽之拓撲選擇性膜形成之方法
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR102845724B1 (ko) 2019-10-21 2025-08-13 에이에스엠 아이피 홀딩 비.브이. 막을 선택적으로 에칭하기 위한 장치 및 방법
KR20210050453A (ko) 2019-10-25 2021-05-07 에이에스엠 아이피 홀딩 비.브이. 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR102890638B1 (ko) 2019-11-05 2025-11-25 에이에스엠 아이피 홀딩 비.브이. 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR102861314B1 (ko) 2019-11-20 2025-09-17 에이에스엠 아이피 홀딩 비.브이. 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템
CN112951697B (zh) 2019-11-26 2025-07-29 Asmip私人控股有限公司 基板处理设备
US11450529B2 (en) 2019-11-26 2022-09-20 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112885692B (zh) 2019-11-29 2025-08-15 Asmip私人控股有限公司 基板处理设备
CN120432376A (zh) 2019-11-29 2025-08-05 Asm Ip私人控股有限公司 基板处理设备
JP7527928B2 (ja) 2019-12-02 2024-08-05 エーエスエム・アイピー・ホールディング・ベー・フェー 基板処理装置、基板処理方法
KR20210070898A (ko) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
TWI887322B (zh) 2020-01-06 2025-06-21 荷蘭商Asm Ip私人控股有限公司 反應器系統、抬升銷、及處理方法
KR20210089077A (ko) 2020-01-06 2021-07-15 에이에스엠 아이피 홀딩 비.브이. 가스 공급 어셈블리, 이의 구성 요소, 및 이를 포함하는 반응기 시스템
US11993847B2 (en) 2020-01-08 2024-05-28 Asm Ip Holding B.V. Injector
KR102882467B1 (ko) 2020-01-16 2025-11-05 에이에스엠 아이피 홀딩 비.브이. 고 종횡비 피처를 형성하는 방법
KR102675856B1 (ko) 2020-01-20 2024-06-17 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법 및 박막 표면 개질 방법
TWI889744B (zh) 2020-01-29 2025-07-11 荷蘭商Asm Ip私人控股有限公司 污染物捕集系統、及擋板堆疊
TW202513845A (zh) 2020-02-03 2025-04-01 荷蘭商Asm Ip私人控股有限公司 半導體裝置結構及其形成方法
TWI908758B (zh) 2020-02-04 2025-12-21 荷蘭商Asm Ip私人控股有限公司 驗證一物品之方法、用於驗證一物品之設備、及用於驗證一反應室之系統
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
KR102916725B1 (ko) 2020-02-13 2026-01-23 에이에스엠 아이피 홀딩 비.브이. 수광 장치를 포함하는 기판 처리 장치 및 수광 장치의 교정 방법
KR20210103953A (ko) 2020-02-13 2021-08-24 에이에스엠 아이피 홀딩 비.브이. 가스 분배 어셈블리 및 이를 사용하는 방법
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
TWI895326B (zh) 2020-02-28 2025-09-01 荷蘭商Asm Ip私人控股有限公司 專用於零件清潔的系統
KR102943116B1 (ko) 2020-03-04 2026-03-23 에이에스엠 아이피 홀딩 비.브이. 반응기 시스템용 정렬 고정구
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
KR20210116240A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 조절성 접합부를 갖는 기판 핸들링 장치
CN113394086A (zh) 2020-03-12 2021-09-14 Asm Ip私人控股有限公司 用于制造具有目标拓扑轮廓的层结构的方法
US12173404B2 (en) 2020-03-17 2024-12-24 Asm Ip Holding B.V. Method of depositing epitaxial material, structure formed using the method, and system for performing the method
KR102755229B1 (ko) 2020-04-02 2025-01-14 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법
TWI887376B (zh) 2020-04-03 2025-06-21 荷蘭商Asm Ip私人控股有限公司 半導體裝置的製造方法
TWI888525B (zh) 2020-04-08 2025-07-01 荷蘭商Asm Ip私人控股有限公司 用於選擇性蝕刻氧化矽膜之設備及方法
KR20210127620A (ko) 2020-04-13 2021-10-22 에이에스엠 아이피 홀딩 비.브이. 질소 함유 탄소 막을 형성하는 방법 및 이를 수행하기 위한 시스템
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
KR20210128343A (ko) 2020-04-15 2021-10-26 에이에스엠 아이피 홀딩 비.브이. 크롬 나이트라이드 층을 형성하는 방법 및 크롬 나이트라이드 층을 포함하는 구조
US11996289B2 (en) 2020-04-16 2024-05-28 Asm Ip Holding B.V. Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods
TW202143328A (zh) 2020-04-21 2021-11-16 荷蘭商Asm Ip私人控股有限公司 用於調整膜應力之方法
KR20210132600A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템
KR102866804B1 (ko) 2020-04-24 2025-09-30 에이에스엠 아이피 홀딩 비.브이. 냉각 가스 공급부를 포함한 수직형 배치 퍼니스 어셈블리
KR20210132612A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐 화합물들을 안정화하기 위한 방법들 및 장치
CN113555279A (zh) 2020-04-24 2021-10-26 Asm Ip私人控股有限公司 形成含氮化钒的层的方法及包含其的结构
KR102934380B1 (ko) 2020-04-24 2026-03-05 에이에스엠 아이피 홀딩 비.브이. 바나듐 보라이드 및 바나듐 포스파이드 층을 포함한 구조체를 형성하는 방법
KR102783898B1 (ko) 2020-04-29 2025-03-18 에이에스엠 아이피 홀딩 비.브이. 고체 소스 전구체 용기
KR20210134869A (ko) 2020-05-01 2021-11-11 에이에스엠 아이피 홀딩 비.브이. Foup 핸들러를 이용한 foup의 빠른 교환
JP7726664B2 (ja) 2020-05-04 2025-08-20 エーエスエム・アイピー・ホールディング・ベー・フェー 基板を処理するための基板処理システム
JP7736446B2 (ja) 2020-05-07 2025-09-09 エーエスエム・アイピー・ホールディング・ベー・フェー 同調回路を備える反応器システム
KR20210137395A (ko) 2020-05-07 2021-11-17 에이에스엠 아이피 홀딩 비.브이. 불소계 라디칼을 이용하여 반응 챔버의 인시츄 식각을 수행하기 위한 장치 및 방법
KR102788543B1 (ko) 2020-05-13 2025-03-27 에이에스엠 아이피 홀딩 비.브이. 반응기 시스템용 레이저 정렬 고정구
KR102936676B1 (ko) 2020-05-15 2026-03-10 에이에스엠 아이피 홀딩 비.브이. 다중 전구체를 사용하여 실리콘 게르마늄 균일도를 제어하기 위한 방법
JP7433132B2 (ja) * 2020-05-19 2024-02-19 東京エレクトロン株式会社 成膜方法及び成膜装置
TWI911214B (zh) 2020-05-19 2026-01-11 荷蘭商Asm Ip私人控股有限公司 基材處理設備
KR102795476B1 (ko) 2020-05-21 2025-04-11 에이에스엠 아이피 홀딩 비.브이. 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법
KR20210145079A (ko) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. 기판을 처리하기 위한 플랜지 및 장치
KR102702526B1 (ko) 2020-05-22 2024-09-03 에이에스엠 아이피 홀딩 비.브이. 과산화수소를 사용하여 박막을 증착하기 위한 장치
KR20210146802A (ko) 2020-05-26 2021-12-06 에이에스엠 아이피 홀딩 비.브이. 붕소 및 갈륨을 함유한 실리콘 게르마늄 층을 증착하는 방법
TWI876048B (zh) 2020-05-29 2025-03-11 荷蘭商Asm Ip私人控股有限公司 基板處理方法
TW202212620A (zh) 2020-06-02 2022-04-01 荷蘭商Asm Ip私人控股有限公司 處理基板之設備、形成膜之方法、及控制用於處理基板之設備之方法
KR20210156219A (ko) 2020-06-16 2021-12-24 에이에스엠 아이피 홀딩 비.브이. 붕소를 함유한 실리콘 게르마늄 층을 증착하는 방법
TWI908816B (zh) 2020-06-24 2025-12-21 荷蘭商Asm Ip私人控股有限公司 形成含矽層之方法
TWI873359B (zh) 2020-06-30 2025-02-21 荷蘭商Asm Ip私人控股有限公司 基板處理方法
TW202202649A (zh) 2020-07-08 2022-01-16 荷蘭商Asm Ip私人控股有限公司 基板處理方法
TWI864307B (zh) 2020-07-17 2024-12-01 荷蘭商Asm Ip私人控股有限公司 用於光微影之結構、方法與系統
TWI878570B (zh) 2020-07-20 2025-04-01 荷蘭商Asm Ip私人控股有限公司 用於沉積鉬層之方法及系統
KR20220011092A (ko) 2020-07-20 2022-01-27 에이에스엠 아이피 홀딩 비.브이. 전이 금속층을 포함하는 구조체를 형성하기 위한 방법 및 시스템
US12322591B2 (en) 2020-07-27 2025-06-03 Asm Ip Holding B.V. Thin film deposition process
KR20220020210A (ko) 2020-08-11 2022-02-18 에이에스엠 아이피 홀딩 비.브이. 기판 상에 티타늄 알루미늄 카바이드 막 구조체 및 관련 반도체 구조체를 증착하는 방법
KR102915124B1 (ko) 2020-08-14 2026-01-19 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
US12040177B2 (en) 2020-08-18 2024-07-16 Asm Ip Holding B.V. Methods for forming a laminate film by cyclical plasma-enhanced deposition processes
TWI911263B (zh) 2020-08-25 2026-01-11 荷蘭商Asm Ip私人控股有限公司 清潔基板的方法、選擇性沉積的方法、及反應器系統
TW202534193A (zh) 2020-08-26 2025-09-01 荷蘭商Asm Ip私人控股有限公司 形成金屬氧化矽層及金屬氮氧化矽層的方法
TWI911265B (zh) 2020-08-27 2026-01-11 荷蘭商Asm Ip私人控股有限公司 形成圖案化結構的方法、操控機械特性的方法、及裝置結構
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
KR20220036866A (ko) 2020-09-16 2022-03-23 에이에스엠 아이피 홀딩 비.브이. 실리콘 산화물 증착 방법
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
TWI889903B (zh) 2020-09-25 2025-07-11 荷蘭商Asm Ip私人控股有限公司 基板處理方法
US12009224B2 (en) 2020-09-29 2024-06-11 Asm Ip Holding B.V. Apparatus and method for etching metal nitrides
KR20220045900A (ko) 2020-10-06 2022-04-13 에이에스엠 아이피 홀딩 비.브이. 실리콘 함유 재료를 증착하기 위한 증착 방법 및 장치
TW202229612A (zh) 2020-10-06 2022-08-01 荷蘭商Asm Ip私人控股有限公司 在部件的側壁上形成氮化矽的方法及系統
CN114293174A (zh) 2020-10-07 2022-04-08 Asm Ip私人控股有限公司 气体供应单元和包括气体供应单元的衬底处理设备
KR102855834B1 (ko) 2020-10-14 2025-09-04 에이에스엠 아이피 홀딩 비.브이. 단차형 구조 상에 재료를 증착하는 방법
KR102873665B1 (ko) 2020-10-15 2025-10-17 에이에스엠 아이피 홀딩 비.브이. 반도체 소자의 제조 방법, 및 ether-cat을 사용하는 기판 처리 장치
KR20220053482A (ko) 2020-10-22 2022-04-29 에이에스엠 아이피 홀딩 비.브이. 바나듐 금속을 증착하는 방법, 구조체, 소자 및 증착 어셈블리
TW202223136A (zh) 2020-10-28 2022-06-16 荷蘭商Asm Ip私人控股有限公司 用於在基板上形成層之方法、及半導體處理系統
TW202229620A (zh) 2020-11-12 2022-08-01 特文特大學 沉積系統、用於控制反應條件之方法、沉積方法
TW202229795A (zh) 2020-11-23 2022-08-01 荷蘭商Asm Ip私人控股有限公司 具注入器之基板處理設備
TW202235649A (zh) 2020-11-24 2022-09-16 荷蘭商Asm Ip私人控股有限公司 填充間隙之方法與相關之系統及裝置
KR20220076343A (ko) 2020-11-30 2022-06-08 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치의 반응 챔버 내에 배열되도록 구성된 인젝터
KR20220077875A (ko) 2020-12-02 2022-06-09 에이에스엠 아이피 홀딩 비.브이. 샤워헤드 어셈블리용 세정 고정구
US12255053B2 (en) 2020-12-10 2025-03-18 Asm Ip Holding B.V. Methods and systems for depositing a layer
US12159788B2 (en) 2020-12-14 2024-12-03 Asm Ip Holding B.V. Method of forming structures for threshold voltage control
CN114639631A (zh) 2020-12-16 2022-06-17 Asm Ip私人控股有限公司 跳动和摆动测量固定装置
TW202232639A (zh) 2020-12-18 2022-08-16 荷蘭商Asm Ip私人控股有限公司 具有可旋轉台的晶圓處理設備
KR20220090438A (ko) 2020-12-22 2022-06-29 에이에스엠 아이피 홀딩 비.브이. 전이금속 증착 방법
TW202226899A (zh) 2020-12-22 2022-07-01 荷蘭商Asm Ip私人控股有限公司 具匹配器的電漿處理裝置
KR20220090435A (ko) 2020-12-22 2022-06-29 에이에스엠 아이피 홀딩 비.브이. 전구체 캡슐, 용기 및 방법
JP7686761B2 (ja) 2021-02-23 2025-06-02 ラム リサーチ コーポレーション 3d-nand用の酸化物表面上へのモリブデン膜の堆積
WO2022221210A1 (en) 2021-04-14 2022-10-20 Lam Research Corporation Deposition of molybdenum
JP7733133B2 (ja) 2021-05-07 2025-09-02 インテグリス・インコーポレーテッド モリブデンまたはタングステン材料の堆積方法
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
CN115702474A (zh) 2021-05-14 2023-02-14 朗姆研究公司 高选择性掺杂硬掩模膜
JP2023036399A (ja) * 2021-09-02 2023-03-14 キオクシア株式会社 半導体装置及び半導体記憶装置と半導体装置の製造方法
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
USD1099184S1 (en) 2021-11-29 2025-10-21 Asm Ip Holding B.V. Weighted lift pin
USD1060598S1 (en) 2021-12-03 2025-02-04 Asm Ip Holding B.V. Split showerhead cover
US12159804B2 (en) * 2022-03-09 2024-12-03 Applied Materials, Inc. Tungsten molybdenum structures
CN116926495A (zh) * 2022-04-02 2023-10-24 中微半导体设备(上海)股份有限公司 一种半导体设备及其基片处理方法
KR20250108659A (ko) * 2022-11-10 2025-07-15 램 리써치 코포레이션 낮은 플루오린 wn 증착을 위한 펄스 ald 시퀀스
CN121472832A (zh) * 2026-01-09 2026-02-06 宸微设备科技(苏州)有限公司 沉积方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030209193A1 (en) * 2000-07-07 2003-11-13 Van Wijck Margreet Albertine Anne-Marie Atomic layer CVD
KR20050054122A (ko) * 2003-12-04 2005-06-10 성명모 자외선 원자층 증착법을 이용한 박막 제조 방법
US7691749B2 (en) * 2003-01-21 2010-04-06 Novellus Systems, Inc. Deposition of tungsten nitride
US20100167527A1 (en) * 2008-12-31 2010-07-01 Applied Materials, Inc. Method of depositing tungsten film with reduced resistivity and improved surface morphology
US20170117155A1 (en) * 2015-05-27 2017-04-27 Lam Research Corporation Method of forming low resistivity fluorine free tungsten film without nucleation

Family Cites Families (348)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI117944B (fi) 1999-10-15 2007-04-30 Asm Int Menetelmä siirtymämetallinitridiohutkalvojen kasvattamiseksi
US6482262B1 (en) 1959-10-10 2002-11-19 Asm Microchemistry Oy Deposition of transition metal carbides
JPS5629648A (en) 1979-08-16 1981-03-25 Toshiba Tungaloy Co Ltd High hardness sintered body
JPS62216224A (ja) 1986-03-17 1987-09-22 Fujitsu Ltd タングステンの選択成長方法
JPS62260340A (ja) 1986-05-06 1987-11-12 Toshiba Corp 半導体装置の製造方法
US4746375A (en) 1987-05-08 1988-05-24 General Electric Company Activation of refractory metal surfaces for electroless plating
US4962063A (en) 1988-11-10 1990-10-09 Applied Materials, Inc. Multistep planarized chemical vapor deposition process with the use of low melting inorganic material for flowing while depositing
JPH02187031A (ja) 1989-01-14 1990-07-23 Sharp Corp 半導体装置
US5250329A (en) 1989-04-06 1993-10-05 Microelectronics And Computer Technology Corporation Method of depositing conductive lines on a dielectric
GB8907898D0 (en) 1989-04-07 1989-05-24 Inmos Ltd Semiconductor devices and fabrication thereof
US5028565A (en) 1989-08-25 1991-07-02 Applied Materials, Inc. Process for CVD deposition of tungsten layer on semiconductor wafer
EP0437110B1 (en) 1990-01-08 2001-07-11 Lsi Logic Corporation Structure for filtering process gases for use with a chemical vapour deposition chamber
KR100209856B1 (ko) 1990-08-31 1999-07-15 가나이 쓰도무 반도체장치의 제조방법
JPH04142061A (ja) 1990-10-02 1992-05-15 Sony Corp タングステンプラグの形成方法
US5250467A (en) 1991-03-29 1993-10-05 Applied Materials, Inc. Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer
US5308655A (en) 1991-08-16 1994-05-03 Materials Research Corporation Processing for forming low resistivity titanium nitride films
US5567583A (en) 1991-12-16 1996-10-22 Biotronics Corporation Methods for reducing non-specific priming in DNA detection
JPH05226280A (ja) 1992-02-14 1993-09-03 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US5370739A (en) 1992-06-15 1994-12-06 Materials Research Corporation Rotating susceptor semiconductor wafer processing cluster tool module useful for tungsten CVD
US5326723A (en) 1992-09-09 1994-07-05 Intel Corporation Method for improving stability of tungsten chemical vapor deposition
JP2536377B2 (ja) 1992-11-27 1996-09-18 日本電気株式会社 半導体装置およびその製造方法
KR950012738B1 (ko) 1992-12-10 1995-10-20 현대전자산업주식회사 반도체소자의 텅스텐 콘택 플러그 제조방법
JP3014019B2 (ja) 1993-11-26 2000-02-28 日本電気株式会社 半導体装置の製造方法
KR970009867B1 (ko) 1993-12-17 1997-06-18 현대전자산업 주식회사 반도체 소자의 텅스텐 실리사이드 형성방법
JP3291889B2 (ja) 1994-02-15 2002-06-17 ソニー株式会社 ドライエッチング方法
US5643394A (en) 1994-09-16 1997-07-01 Applied Materials, Inc. Gas injection slit nozzle for a plasma process reactor
DE69518710T2 (de) 1994-09-27 2001-05-23 Applied Materials Inc Verfahren zum Behandeln eines Substrats in einer Vakuumbehandlungskammer
JPH08115984A (ja) 1994-10-17 1996-05-07 Hitachi Ltd 半導体装置及びその製造方法
US5545581A (en) 1994-12-06 1996-08-13 International Business Machines Corporation Plug strap process utilizing selective nitride and oxide etches
US6001729A (en) 1995-01-10 1999-12-14 Kawasaki Steel Corporation Method of forming wiring structure for semiconductor device
JP2737764B2 (ja) 1995-03-03 1998-04-08 日本電気株式会社 半導体装置及びその製造方法
JPH0922896A (ja) 1995-07-07 1997-01-21 Toshiba Corp 金属膜の選択的形成方法
JPH0927596A (ja) 1995-07-11 1997-01-28 Sanyo Electric Co Ltd 半導体装置の製造方法
US5863819A (en) 1995-10-25 1999-01-26 Micron Technology, Inc. Method of fabricating a DRAM access transistor with dual gate oxide technique
TW310461B (https=) 1995-11-10 1997-07-11 Matsushita Electric Industrial Co Ltd
US6017818A (en) 1996-01-22 2000-01-25 Texas Instruments Incorporated Process for fabricating conformal Ti-Si-N and Ti-B-N based barrier films with low defect density
US5833817A (en) 1996-04-22 1998-11-10 Taiwan Semiconductor Manufacturing Company, Ltd. Method for improving conformity and contact bottom coverage of sputtered titanium nitride barrier layers
US5633200A (en) 1996-05-24 1997-05-27 Micron Technology, Inc. Process for manufacturing a large grain tungsten nitride film and process for manufacturing a lightly nitrided titanium salicide diffusion barrier with a large grain tungsten nitride cover layer
US5963833A (en) 1996-07-03 1999-10-05 Micron Technology, Inc. Method for cleaning semiconductor wafers and
US5916634A (en) 1996-10-01 1999-06-29 Sandia Corporation Chemical vapor deposition of W-Si-N and W-B-N
KR100214852B1 (ko) 1996-11-02 1999-08-02 김영환 반도체 디바이스의 금속 배선 형성 방법
US6310300B1 (en) 1996-11-08 2001-10-30 International Business Machines Corporation Fluorine-free barrier layer between conductor and insulator for degradation prevention
KR100255516B1 (ko) 1996-11-28 2000-05-01 김영환 반도체 장치의 금속배선 및 그 형성방법
US6297152B1 (en) 1996-12-12 2001-10-02 Applied Materials, Inc. CVD process for DCS-based tungsten silicide
JP3090074B2 (ja) 1997-01-20 2000-09-18 日本電気株式会社 半導体装置及びその製造方法
US5804249A (en) 1997-02-07 1998-09-08 Lsi Logic Corporation Multistep tungsten CVD process with amorphization step
US6156382A (en) 1997-05-16 2000-12-05 Applied Materials, Inc. Chemical vapor deposition process for depositing tungsten
US6037248A (en) 1997-06-13 2000-03-14 Micron Technology, Inc. Method of fabricating integrated circuit wiring with low RC time delay
US6287965B1 (en) 1997-07-28 2001-09-11 Samsung Electronics Co, Ltd. Method of forming metal layer using atomic layer deposition and semiconductor device having the metal layer as barrier metal layer or upper or lower electrode of capacitor
US5956609A (en) 1997-08-11 1999-09-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method for reducing stress and improving step-coverage of tungsten interconnects and plugs
US5913145A (en) 1997-08-28 1999-06-15 Texas Instruments Incorporated Method for fabricating thermally stable contacts with a diffusion barrier formed at high temperatures
US5795824A (en) 1997-08-28 1998-08-18 Novellus Systems, Inc. Method for nucleation of CVD tungsten films
US5926720A (en) 1997-09-08 1999-07-20 Lsi Logic Corporation Consistent alignment mark profiles on semiconductor wafers using PVD shadowing
US6861356B2 (en) 1997-11-05 2005-03-01 Tokyo Electron Limited Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film
US7829144B2 (en) 1997-11-05 2010-11-09 Tokyo Electron Limited Method of forming a metal film for electrode
US6099904A (en) 1997-12-02 2000-08-08 Applied Materials, Inc. Low resistivity W using B2 H6 nucleation step
US6114242A (en) 1997-12-05 2000-09-05 Taiwan Semiconductor Manufacturing Company MOCVD molybdenum nitride diffusion barrier for Cu metallization
US6103609A (en) 1997-12-11 2000-08-15 Lg Semicon Co., Ltd. Method for fabricating semiconductor device
KR100272523B1 (ko) 1998-01-26 2000-12-01 김영환 반도체소자의배선형성방법
US6284316B1 (en) 1998-02-25 2001-09-04 Micron Technology, Inc. Chemical vapor deposition of titanium
JPH11260759A (ja) 1998-03-12 1999-09-24 Fujitsu Ltd 半導体装置の製造方法
US6452276B1 (en) 1998-04-30 2002-09-17 International Business Machines Corporation Ultra thin, single phase, diffusion barrier for metal conductors
US6066366A (en) 1998-07-22 2000-05-23 Applied Materials, Inc. Method for depositing uniform tungsten layers by CVD
US6143082A (en) 1998-10-08 2000-11-07 Novellus Systems, Inc. Isolation of incompatible processes in a multi-station processing chamber
KR100273767B1 (ko) 1998-10-28 2001-01-15 윤종용 반도체소자의 텅스텐막 제조방법 및 그에 따라 제조되는 반도체소자
US6037263A (en) 1998-11-05 2000-03-14 Vanguard International Semiconductor Corporation Plasma enhanced CVD deposition of tungsten and tungsten compounds
US6331483B1 (en) 1998-12-18 2001-12-18 Tokyo Electron Limited Method of film-forming of tungsten
KR100296126B1 (ko) 1998-12-22 2001-08-07 박종섭 고집적 메모리 소자의 게이트전극 형성방법
US20010014533A1 (en) 1999-01-08 2001-08-16 Shih-Wei Sun Method of fabricating salicide
JP3206578B2 (ja) 1999-01-11 2001-09-10 日本電気株式会社 多層配線構造をもつ半導体装置の製造方法
JP4570704B2 (ja) 1999-02-17 2010-10-27 株式会社アルバック バリア膜製造方法
US6958174B1 (en) 1999-03-15 2005-10-25 Regents Of The University Of Colorado Solid material comprising a thin metal film on its surface and methods for producing the same
US6306211B1 (en) 1999-03-23 2001-10-23 Matsushita Electric Industrial Co., Ltd. Method for growing semiconductor film and method for fabricating semiconductor device
TW452607B (en) 1999-03-26 2001-09-01 Nat Science Council Production of a refractory metal by chemical vapor deposition of a bilayer-stacked tungsten metal
US6245654B1 (en) 1999-03-31 2001-06-12 Taiwan Semiconductor Manufacturing Company, Ltd Method for preventing tungsten contact/via plug loss after a backside pressure fault
US6294468B1 (en) 1999-05-24 2001-09-25 Agere Systems Guardian Corp. Method of chemical vapor depositing tungsten films
US6720261B1 (en) 1999-06-02 2004-04-13 Agere Systems Inc. Method and system for eliminating extrusions in semiconductor vias
US6174812B1 (en) 1999-06-08 2001-01-16 United Microelectronics Corp. Copper damascene technology for ultra large scale integration circuits
US6355558B1 (en) 1999-06-10 2002-03-12 Texas Instruments Incorporated Metallization structure, and associated method, to improve crystallographic texture and cavity fill for CVD aluminum/PVD aluminum alloy films
US6309964B1 (en) 1999-07-08 2001-10-30 Taiwan Semiconductor Manufacturing Company Method for forming a copper damascene structure over tungsten plugs with improved adhesion, oxidation resistance, and diffusion barrier properties using nitridation of the tungsten plug
KR100319494B1 (ko) 1999-07-15 2002-01-09 김용일 원자층 에피택시 공정을 위한 반도체 박막 증착장치
US6265312B1 (en) 1999-08-02 2001-07-24 Stmicroelectronics, Inc. Method for depositing an integrated circuit tungsten film stack that includes a post-nucleation pump down step
US6391785B1 (en) 1999-08-24 2002-05-21 Interuniversitair Microelektronica Centrum (Imec) Method for bottomless deposition of barrier layers in integrated circuit metallization schemes
US6309966B1 (en) 1999-09-03 2001-10-30 Motorola, Inc. Apparatus and method of a low pressure, two-step nucleation tungsten deposition
US6303480B1 (en) 1999-09-13 2001-10-16 Applied Materials, Inc. Silicon layer to improve plug filling by CVD
US6610151B1 (en) 1999-10-02 2003-08-26 Uri Cohen Seed layers for interconnects and methods and apparatus for their fabrication
US6924226B2 (en) 1999-10-02 2005-08-02 Uri Cohen Methods for making multiple seed layers for metallic interconnects
WO2001029893A1 (en) 1999-10-15 2001-04-26 Asm America, Inc. Method for depositing nanolaminate thin films on sensitive surfaces
KR100330163B1 (ko) 2000-01-06 2002-03-28 윤종용 반도체 장치의 텅스텐 콘택 플러그 형성 방법
FI20000099A0 (fi) * 2000-01-18 2000-01-18 Asm Microchemistry Ltd Menetelmä metalliohutkalvojen kasvattamiseksi
US6277744B1 (en) 2000-01-21 2001-08-21 Advanced Micro Devices, Inc. Two-level silane nucleation for blanket tungsten deposition
US6777331B2 (en) 2000-03-07 2004-08-17 Simplus Systems Corporation Multilayered copper structure for improving adhesion property
US6429126B1 (en) 2000-03-29 2002-08-06 Applied Materials, Inc. Reduced fluorine contamination for tungsten CVD
JP2001284360A (ja) 2000-03-31 2001-10-12 Hitachi Ltd 半導体装置
EP1290746B1 (en) 2000-05-18 2012-04-25 Corning Incorporated High performance solid electrolyte fuel cells
JP3651360B2 (ja) 2000-05-19 2005-05-25 株式会社村田製作所 電極膜の形成方法
US7253076B1 (en) 2000-06-08 2007-08-07 Micron Technologies, Inc. Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
JP2002016066A (ja) 2000-06-27 2002-01-18 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6620723B1 (en) 2000-06-27 2003-09-16 Applied Materials, Inc. Formation of boride barrier layers using chemisorption techniques
US7101795B1 (en) 2000-06-28 2006-09-05 Applied Materials, Inc. Method and apparatus for depositing refractory metal layers employing sequential deposition techniques to form a nucleation layer
US7732327B2 (en) 2000-06-28 2010-06-08 Applied Materials, Inc. Vapor deposition of tungsten materials
US6936538B2 (en) 2001-07-16 2005-08-30 Applied Materials, Inc. Method and apparatus for depositing tungsten after surface treatment to improve film characteristics
US6551929B1 (en) 2000-06-28 2003-04-22 Applied Materials, Inc. Bifurcated deposition process for depositing refractory metal layers employing atomic layer deposition and chemical vapor deposition techniques
US7405158B2 (en) 2000-06-28 2008-07-29 Applied Materials, Inc. Methods for depositing tungsten layers employing atomic layer deposition techniques
US7964505B2 (en) 2005-01-19 2011-06-21 Applied Materials, Inc. Atomic layer deposition of tungsten materials
US6491978B1 (en) 2000-07-10 2002-12-10 Applied Materials, Inc. Deposition of CVD layers for copper metallization using novel metal organic chemical vapor deposition (MOCVD) precursors
US6218301B1 (en) 2000-07-31 2001-04-17 Applied Materials, Inc. Deposition of tungsten films from W(CO)6
US6740591B1 (en) 2000-11-16 2004-05-25 Intel Corporation Slurry and method for chemical mechanical polishing of copper
WO2002041379A1 (en) 2000-11-17 2002-05-23 Tokyo Electron Limited Method of forming metal wiring and semiconductor manufacturing apparatus for forming metal wiring
KR100375230B1 (ko) 2000-12-20 2003-03-08 삼성전자주식회사 매끄러운 텅스텐 표면을 갖는 반도체 장치의 배선 제조방법
US6908848B2 (en) 2000-12-20 2005-06-21 Samsung Electronics, Co., Ltd. Method for forming an electrical interconnection providing improved surface morphology of tungsten
US20020117399A1 (en) 2001-02-23 2002-08-29 Applied Materials, Inc. Atomically thin highly resistive barrier layer in a copper via
US20020190379A1 (en) 2001-03-28 2002-12-19 Applied Materials, Inc. W-CVD with fluorine-free tungsten nucleation
US20030019428A1 (en) 2001-04-28 2003-01-30 Applied Materials, Inc. Chemical vapor deposition chamber
US20020168840A1 (en) 2001-05-11 2002-11-14 Applied Materials, Inc. Deposition of tungsten silicide films
US6635965B1 (en) 2001-05-22 2003-10-21 Novellus Systems, Inc. Method for producing ultra-thin tungsten layers with improved step coverage
US7262125B2 (en) 2001-05-22 2007-08-28 Novellus Systems, Inc. Method of forming low-resistivity tungsten interconnects
US7955972B2 (en) 2001-05-22 2011-06-07 Novellus Systems, Inc. Methods for growing low-resistivity tungsten for high aspect ratio and small features
US9076843B2 (en) 2001-05-22 2015-07-07 Novellus Systems, Inc. Method for producing ultra-thin tungsten layers with improved step coverage
US7589017B2 (en) 2001-05-22 2009-09-15 Novellus Systems, Inc. Methods for growing low-resistivity tungsten film
US7141494B2 (en) 2001-05-22 2006-11-28 Novellus Systems, Inc. Method for reducing tungsten film roughness and improving step coverage
US6686278B2 (en) 2001-06-19 2004-02-03 United Microelectronics Corp. Method for forming a plug metal layer
US20070009658A1 (en) * 2001-07-13 2007-01-11 Yoo Jong H Pulse nucleation enhanced nucleation technique for improved step coverage and better gap fill for WCVD process
US7211144B2 (en) 2001-07-13 2007-05-01 Applied Materials, Inc. Pulsed nucleation deposition of tungsten layers
WO2003029515A2 (en) 2001-07-16 2003-04-10 Applied Materials, Inc. Formation of composite tungsten films
WO2003030224A2 (en) 2001-07-25 2003-04-10 Applied Materials, Inc. Barrier formation using novel sputter-deposition method
US20030029715A1 (en) 2001-07-25 2003-02-13 Applied Materials, Inc. An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems
JP4032872B2 (ja) 2001-08-14 2008-01-16 東京エレクトロン株式会社 タングステン膜の形成方法
JP4595989B2 (ja) 2001-08-24 2010-12-08 東京エレクトロン株式会社 成膜方法
WO2003025243A2 (en) * 2001-09-14 2003-03-27 Asm International N.V. Metal nitride deposition by ald using gettering reactant
US6607976B2 (en) 2001-09-25 2003-08-19 Applied Materials, Inc. Copper interconnect barrier layer structure and formation method
TW589684B (en) * 2001-10-10 2004-06-01 Applied Materials Inc Method for depositing refractory metal layers employing sequential deposition techniques
JP2003142484A (ja) 2001-10-31 2003-05-16 Mitsubishi Electric Corp 半導体装置の製造方法
US6566262B1 (en) 2001-11-01 2003-05-20 Lsi Logic Corporation Method for creating self-aligned alloy capping layers for copper interconnect structures
US20030091739A1 (en) 2001-11-14 2003-05-15 Hitoshi Sakamoto Barrier metal film production apparatus, barrier metal film production method, metal film production method, and metal film production apparatus
US20030091870A1 (en) 2001-11-15 2003-05-15 Siddhartha Bhowmik Method of forming a liner for tungsten plugs
KR20030050652A (ko) 2001-12-19 2003-06-25 주식회사 하이닉스반도체 텅스텐막의 형성 방법
US20030123216A1 (en) 2001-12-27 2003-07-03 Yoon Hyungsuk A. Deposition of tungsten for the formation of conformal tungsten silicide
US6833161B2 (en) 2002-02-26 2004-12-21 Applied Materials, Inc. Cyclical deposition of tungsten nitride for metal oxide gate electrode
US6566250B1 (en) 2002-03-18 2003-05-20 Taiwant Semiconductor Manufacturing Co., Ltd Method for forming a self aligned capping layer
US20030194825A1 (en) 2002-04-10 2003-10-16 Kam Law Deposition of gate metallization for active matrix liquid crystal display (AMLCD) applications
US7279432B2 (en) 2002-04-16 2007-10-09 Applied Materials, Inc. System and method for forming an integrated barrier layer
KR100485305B1 (ko) 2002-05-10 2005-04-25 주식회사 웰스킨 스핑고신-1-포스페이트 및 그 유도체를 포함하는 미백화장료 조성물
US20030224217A1 (en) 2002-05-31 2003-12-04 Applied Materials, Inc. Metal nitride formation
US6905543B1 (en) 2002-06-19 2005-06-14 Novellus Systems, Inc Methods of forming tungsten nucleation layer
AU2003248850A1 (en) 2002-07-12 2004-02-02 President And Fellows Of Harvard College Vapor deposition of tungsten nitride
TWI287559B (en) 2002-08-22 2007-10-01 Konica Corp Organic-inorganic hybrid film, its manufacturing method, optical film, and polarizing film
US6706625B1 (en) 2002-12-06 2004-03-16 Chartered Semiconductor Manufacturing Ltd. Copper recess formation using chemical process for fabricating barrier cap for lines and vias
US6962873B1 (en) 2002-12-10 2005-11-08 Novellus Systems, Inc. Nitridation of electrolessly deposited cobalt
JP2006515535A (ja) 2002-12-23 2006-06-01 アプライド シン フィルムズ,インコーポレイティッド リン酸アルミニウムコーティング
KR101035221B1 (ko) 2002-12-27 2011-05-18 가부시키가이샤 알박 질화 텅스텐막의 형성 방법
JP2004235456A (ja) 2003-01-30 2004-08-19 Seiko Epson Corp 成膜装置、成膜方法および半導体装置の製造方法
US7713592B2 (en) 2003-02-04 2010-05-11 Tegal Corporation Nanolayer deposition process
JP3956049B2 (ja) 2003-03-07 2007-08-08 東京エレクトロン株式会社 タングステン膜の形成方法
US6844258B1 (en) 2003-05-09 2005-01-18 Novellus Systems, Inc. Selective refractory metal and nitride capping
KR20060079144A (ko) 2003-06-18 2006-07-05 어플라이드 머티어리얼스, 인코포레이티드 배리어 물질의 원자층 증착
JP2005026380A (ja) 2003-06-30 2005-01-27 Toshiba Corp 不揮発性メモリを含む半導体装置及びその製造方法
JP2005029821A (ja) 2003-07-09 2005-02-03 Tokyo Electron Ltd 成膜方法
US7754604B2 (en) 2003-08-26 2010-07-13 Novellus Systems, Inc. Reducing silicon attack and improving resistivity of tungsten nitride film
JP4606006B2 (ja) 2003-09-11 2011-01-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7078341B2 (en) 2003-09-30 2006-07-18 Tokyo Electron Limited Method of depositing metal layers from metal-carbonyl precursors
US6924223B2 (en) 2003-09-30 2005-08-02 Tokyo Electron Limited Method of forming a metal layer using an intermittent precursor gas flow process
JP2005150416A (ja) 2003-11-17 2005-06-09 Hitachi Ltd 半導体集積回路装置及びその製造方法
KR100557626B1 (ko) 2003-12-23 2006-03-10 주식회사 하이닉스반도체 반도체 소자의 비트라인 형성 방법
US20050139838A1 (en) 2003-12-26 2005-06-30 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
KR100528030B1 (ko) 2003-12-30 2005-11-15 주식회사 아이피에스 박막 증착 방법
KR101108304B1 (ko) 2004-02-26 2012-01-25 노벨러스 시스템즈, 인코포레이티드 질화 텅스텐의 증착
CN100370585C (zh) 2004-04-12 2008-02-20 株式会社爱发科 隔离膜的形成方法及电极膜的形成方法
JP5074183B2 (ja) 2004-04-21 2012-11-14 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 高圧ガス放電ランプを製造する方法、タングステン電極、高圧ガス放電ランプ、および照明ユニット
US6987063B2 (en) 2004-06-10 2006-01-17 Freescale Semiconductor, Inc. Method to reduce impurity elements during semiconductor film deposition
US20050282384A1 (en) 2004-06-17 2005-12-22 Hidemi Nawafune Method for forming protective film and electroless plating bath
US7605469B2 (en) 2004-06-30 2009-10-20 Intel Corporation Atomic layer deposited tantalum containing adhesion layer
KR100615093B1 (ko) 2004-08-24 2006-08-22 삼성전자주식회사 나노크리스탈을 갖는 비휘발성 메모리 소자의 제조방법
US7250367B2 (en) 2004-09-01 2007-07-31 Micron Technology, Inc. Deposition methods using heteroleptic precursors
US20060068098A1 (en) 2004-09-27 2006-03-30 Tokyo Electron Limited Deposition of ruthenium metal layers in a thermal chemical vapor deposition process
US7429402B2 (en) 2004-12-10 2008-09-30 Applied Materials, Inc. Ruthenium as an underlayer for tungsten film deposition
US20060145190A1 (en) 2004-12-31 2006-07-06 Salzman David B Surface passivation for III-V compound semiconductors
KR100642750B1 (ko) 2005-01-31 2006-11-10 삼성전자주식회사 반도체 소자 및 그 제조 방법
US7344983B2 (en) 2005-03-18 2008-03-18 International Business Machines Corporation Clustered surface preparation for silicide and metal contacts
TW200734482A (en) 2005-03-18 2007-09-16 Applied Materials Inc Electroless deposition process on a contact containing silicon or silicide
US7220671B2 (en) 2005-03-31 2007-05-22 Intel Corporation Organometallic precursors for the chemical phase deposition of metal films in interconnect applications
EP1728894B1 (en) 2005-06-01 2008-10-15 Interuniversitair Microelektronica Centrum ( Imec) Atomic layer deposition (ald) method for producing a high quality layer
JP4738178B2 (ja) 2005-06-17 2011-08-03 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4945937B2 (ja) 2005-07-01 2012-06-06 東京エレクトロン株式会社 タングステン膜の形成方法、成膜装置及び記憶媒体
JP4864368B2 (ja) 2005-07-21 2012-02-01 シャープ株式会社 気相堆積方法
US7517798B2 (en) 2005-09-01 2009-04-14 Micron Technology, Inc. Methods for forming through-wafer interconnects and structures resulting therefrom
US20070066060A1 (en) 2005-09-19 2007-03-22 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices and fabrication methods thereof
US7235485B2 (en) 2005-10-14 2007-06-26 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor device
US8993055B2 (en) 2005-10-27 2015-03-31 Asm International N.V. Enhanced thin film deposition
US7524765B2 (en) 2005-11-02 2009-04-28 Intel Corporation Direct tailoring of the composition and density of ALD films
US7276796B1 (en) 2006-03-15 2007-10-02 International Business Machines Corporation Formation of oxidation-resistant seed layer for interconnect applications
JP2007250907A (ja) 2006-03-16 2007-09-27 Renesas Technology Corp 半導体装置およびその製造方法
US8258057B2 (en) 2006-03-30 2012-09-04 Intel Corporation Copper-filled trench contact for transistor performance improvement
TW200746268A (en) 2006-04-11 2007-12-16 Applied Materials Inc Process for forming cobalt-containing materials
US7828504B2 (en) 2006-05-12 2010-11-09 Axcellis Technologies, Inc. Combination load lock for handling workpieces
US7557047B2 (en) 2006-06-09 2009-07-07 Micron Technology, Inc. Method of forming a layer of material using an atomic layer deposition process
KR100884339B1 (ko) 2006-06-29 2009-02-18 주식회사 하이닉스반도체 반도체 소자의 텅스텐막 형성방법 및 이를 이용한 텅스텐배선층 형성방법
US7355254B2 (en) 2006-06-30 2008-04-08 Intel Corporation Pinning layer for low resistivity N-type source drain ohmic contacts
KR100705936B1 (ko) 2006-06-30 2007-04-13 주식회사 하이닉스반도체 반도체 소자의 비트라인 형성방법
US8278216B1 (en) 2006-08-18 2012-10-02 Novellus Systems, Inc. Selective capping of copper
US8153831B2 (en) 2006-09-28 2012-04-10 Praxair Technology, Inc. Organometallic compounds, processes for the preparation thereof and methods of use thereof
KR100881391B1 (ko) 2006-09-29 2009-02-05 주식회사 하이닉스반도체 반도체 소자의 게이트 형성방법
KR100894769B1 (ko) 2006-09-29 2009-04-24 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성방법
KR20080036679A (ko) 2006-10-24 2008-04-29 삼성전자주식회사 불 휘발성 메모리 소자의 형성 방법
US7675119B2 (en) 2006-12-25 2010-03-09 Elpida Memory, Inc. Semiconductor device and manufacturing method thereof
KR100874829B1 (ko) 2006-12-26 2008-12-19 동부일렉트로닉스 주식회사 반도체 소자의 금속배선 형성방법
KR20080061978A (ko) 2006-12-28 2008-07-03 주식회사 하이닉스반도체 반도체 소자의 배선 형성방법
JP2008205219A (ja) 2007-02-20 2008-09-04 Masato Toshima シャワーヘッドおよびこれを用いたcvd装置
US7786006B2 (en) 2007-02-26 2010-08-31 Tokyo Electron Limited Interconnect structures with a metal nitride diffusion barrier containing ruthenium and method of forming
CN100577866C (zh) 2007-02-27 2010-01-06 中微半导体设备(上海)有限公司 应用于等离子体反应室中的气体喷头组件、其制造方法及其翻新再利用的方法
US8435898B2 (en) 2007-04-05 2013-05-07 Freescale Semiconductor, Inc. First inter-layer dielectric stack for non-volatile memory
US20080254619A1 (en) 2007-04-14 2008-10-16 Tsang-Jung Lin Method of fabricating a semiconductor device
US20080268642A1 (en) * 2007-04-20 2008-10-30 Kazutaka Yanagita Deposition of transition metal carbide containing films
JP2009024252A (ja) 2007-05-15 2009-02-05 Applied Materials Inc タングステン材料の原子層堆積法
JP2008288289A (ja) 2007-05-16 2008-11-27 Oki Electric Ind Co Ltd 電界効果トランジスタとその製造方法
US8017182B2 (en) * 2007-06-21 2011-09-13 Asm International N.V. Method for depositing thin films by mixed pulsed CVD and ALD
KR100890047B1 (ko) 2007-06-28 2009-03-25 주식회사 하이닉스반도체 반도체소자의 배선 형성방법
US8142847B2 (en) 2007-07-13 2012-03-27 Rohm And Haas Electronic Materials Llc Precursor compositions and methods
US7655567B1 (en) 2007-07-24 2010-02-02 Novellus Systems, Inc. Methods for improving uniformity and resistivity of thin tungsten films
KR101225642B1 (ko) 2007-11-15 2013-01-24 삼성전자주식회사 H2 원격 플라즈마 처리를 이용한 반도체 소자의 콘택플러그 형성방법
CN101952945B (zh) 2007-11-29 2013-08-14 朗姆研究公司 控制微负载的脉冲式偏置等离子体工艺
KR100939777B1 (ko) 2007-11-30 2010-01-29 주식회사 하이닉스반도체 텅스텐막 형성방법 및 이를 이용한 반도체 소자의 배선형성방법
US8080324B2 (en) 2007-12-03 2011-12-20 Kobe Steel, Ltd. Hard coating excellent in sliding property and method for forming same
US7772114B2 (en) 2007-12-05 2010-08-10 Novellus Systems, Inc. Method for improving uniformity and adhesion of low resistivity tungsten film
US8053365B2 (en) 2007-12-21 2011-11-08 Novellus Systems, Inc. Methods for forming all tungsten contacts and lines
KR100919808B1 (ko) 2008-01-02 2009-10-01 주식회사 하이닉스반도체 반도체소자의 텅스텐막 형성방법
US8062977B1 (en) 2008-01-31 2011-11-22 Novellus Systems, Inc. Ternary tungsten-containing resistive thin films
KR20090101592A (ko) 2008-03-24 2009-09-29 삼성전자주식회사 산화막 형성 방법 및 이를 이용한 게이트 형성 방법
KR101163825B1 (ko) 2008-03-28 2012-07-09 도쿄엘렉트론가부시키가이샤 정전척 및 그 제조 방법
WO2009125255A1 (en) 2008-04-11 2009-10-15 Freescale Semiconductor, Inc. Surface treatment in semiconductor manufacturing
US8058170B2 (en) 2008-06-12 2011-11-15 Novellus Systems, Inc. Method for depositing thin tungsten film with low resistivity and robust micro-adhesion characteristics
US8385644B2 (en) 2008-07-08 2013-02-26 Zeitera, Llc Digital video fingerprinting based on resultant weighted gradient orientation computation
US7968460B2 (en) 2008-06-19 2011-06-28 Micron Technology, Inc. Semiconductor with through-substrate interconnect
US8551885B2 (en) 2008-08-29 2013-10-08 Novellus Systems, Inc. Method for reducing tungsten roughness and improving reflectivity
US20100062149A1 (en) 2008-09-08 2010-03-11 Applied Materials, Inc. Method for tuning a deposition rate during an atomic layer deposition process
KR20100029952A (ko) 2008-09-09 2010-03-18 주식회사 하이닉스반도체 금속성 캡핑층을 구비한 상변화 메모리 소자 및 그 제조 방법
US20100072623A1 (en) 2008-09-19 2010-03-25 Advanced Micro Devices, Inc. Semiconductor device with improved contact plugs, and related fabrication methods
JP2010093116A (ja) 2008-10-09 2010-04-22 Panasonic Corp 半導体装置及び半導体装置の製造方法
US20100120245A1 (en) 2008-11-07 2010-05-13 Agus Sofian Tjandra Plasma and thermal anneal treatment to improve oxidation resistance of metal-containing films
US7964502B2 (en) 2008-11-25 2011-06-21 Freescale Semiconductor, Inc. Multilayered through via
US7825024B2 (en) 2008-11-25 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming through-silicon vias
US8129270B1 (en) 2008-12-10 2012-03-06 Novellus Systems, Inc. Method for depositing tungsten film having low resistivity, low roughness and high reflectivity
US20100144140A1 (en) 2008-12-10 2010-06-10 Novellus Systems, Inc. Methods for depositing tungsten films having low resistivity for gapfill applications
US8110877B2 (en) 2008-12-19 2012-02-07 Intel Corporation Metal-insulator-semiconductor tunneling contacts having an insulative layer disposed between source/drain contacts and source/drain regions
US8236691B2 (en) 2008-12-31 2012-08-07 Micron Technology, Inc. Method of high aspect ratio plug fill
KR20100096488A (ko) 2009-02-24 2010-09-02 삼성전자주식회사 리세스 채널 구조를 갖는 반도체 소자
DE102009015747B4 (de) 2009-03-31 2013-08-08 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung von Transistoren mit Metallgateelektrodenstrukturen und Gatedielektrikum mit großem ε und einer Zwischenätzstoppschicht
US9159571B2 (en) 2009-04-16 2015-10-13 Lam Research Corporation Tungsten deposition process using germanium-containing reducing agent
US20100267230A1 (en) 2009-04-16 2010-10-21 Anand Chandrashekar Method for forming tungsten contacts and interconnects with small critical dimensions
US20110020546A1 (en) * 2009-05-15 2011-01-27 Asm International N.V. Low Temperature ALD of Noble Metals
US8039394B2 (en) 2009-06-26 2011-10-18 Seagate Technology Llc Methods of forming layers of alpha-tantalum
US9034768B2 (en) 2010-07-09 2015-05-19 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features
US8119527B1 (en) 2009-08-04 2012-02-21 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features
US8207062B2 (en) 2009-09-09 2012-06-26 Novellus Systems, Inc. Method for improving adhesion of low resistivity tungsten/tungsten nitride layers
EP2501722A4 (en) 2009-11-19 2013-05-01 Univ Singapore METHOD FOR PRODUCING T-CELL-RECEPTOR-SIMILAR MONOCLONAL ANTIBODIES AND APPLICATIONS THEREOF
DE102009055392B4 (de) 2009-12-30 2014-05-22 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Halbleiterbauelement und Verfahren zur Herstellung des Halbleiterbauelements
US8642797B2 (en) 2010-02-25 2014-02-04 Air Products And Chemicals, Inc. Amidate precursors for depositing metal containing films
JP5729911B2 (ja) 2010-03-11 2015-06-03 ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated タングステン膜の製造方法およびタングステン膜を堆積させる装置
US8709948B2 (en) 2010-03-12 2014-04-29 Novellus Systems, Inc. Tungsten barrier and seed for copper filled TSV
KR101356332B1 (ko) 2010-03-19 2014-02-04 노벨러스 시스템즈, 인코포레이티드 낮은 저항 및 강한 미소-접착 특성을 가진 텅스텐 박막의 증착 방법
US9129945B2 (en) 2010-03-24 2015-09-08 Applied Materials, Inc. Formation of liner and barrier for tungsten as gate electrode and as contact plug to reduce resistance and enhance device performance
US8741394B2 (en) 2010-03-25 2014-06-03 Novellus Systems, Inc. In-situ deposition of film stacks
US20110256692A1 (en) 2010-04-14 2011-10-20 Applied Materials, Inc. Multiple precursor concentric delivery showerhead
IL213195A0 (en) 2010-05-31 2011-07-31 Rohm & Haas Elect Mat Photoresist compositions and emthods of forming photolithographic patterns
TWI509695B (zh) 2010-06-10 2015-11-21 Asm國際股份有限公司 使膜選擇性沈積於基板上的方法
TW201314739A (zh) 2010-09-27 2013-04-01 Astrowatt Inc 包含半導體層及含金屬層之電子裝置及其形成方法
US8778797B2 (en) 2010-09-27 2014-07-15 Novellus Systems, Inc. Systems and methods for selective tungsten deposition in vias
WO2012057884A1 (en) 2010-10-29 2012-05-03 Applied Materials, Inc. Nitrogen-containing ligands and their use in atomic layer deposition methods
US8969823B2 (en) 2011-01-21 2015-03-03 Uchicago Argonne, Llc Microchannel plate detector and methods for their fabrication
US20120199887A1 (en) 2011-02-03 2012-08-09 Lana Chan Methods of controlling tungsten film properties
US20120225191A1 (en) 2011-03-01 2012-09-06 Applied Materials, Inc. Apparatus and Process for Atomic Layer Deposition
US8865594B2 (en) 2011-03-10 2014-10-21 Applied Materials, Inc. Formation of liner and barrier for tungsten as gate electrode and as contact plug to reduce resistance and enhance device performance
US8546250B2 (en) 2011-08-18 2013-10-01 Wafertech Llc Method of fabricating vertical integrated semiconductor device with multiple continuous single crystal silicon layers vertically separated from one another
US8916435B2 (en) 2011-09-09 2014-12-23 International Business Machines Corporation Self-aligned bottom plate for metal high-K dielectric metal insulator metal (MIM) embedded dynamic random access memory
JP5710529B2 (ja) 2011-09-22 2015-04-30 株式会社東芝 半導体装置及びその製造方法
WO2013063260A1 (en) 2011-10-28 2013-05-02 Applied Materials, Inc. High temperature tungsten metallization process
US9112003B2 (en) 2011-12-09 2015-08-18 Asm International N.V. Selective formation of metallic films on metallic surfaces
CN113862634A (zh) 2012-03-27 2021-12-31 诺发系统公司 钨特征填充
US9034760B2 (en) 2012-06-29 2015-05-19 Novellus Systems, Inc. Methods of forming tensile tungsten films and compressive tungsten films
US9969622B2 (en) 2012-07-26 2018-05-15 Lam Research Corporation Ternary tungsten boride nitride films and methods for forming same
US8975184B2 (en) 2012-07-27 2015-03-10 Novellus Systems, Inc. Methods of improving tungsten contact resistance in small critical dimension features
KR20140028992A (ko) 2012-08-31 2014-03-10 에스케이하이닉스 주식회사 텅스텐 게이트전극을 구비한 반도체장치 및 그 제조 방법
KR101990051B1 (ko) 2012-08-31 2019-10-01 에스케이하이닉스 주식회사 무불소텅스텐 배리어층을 구비한 반도체장치 및 그 제조 방법
US8853080B2 (en) 2012-09-09 2014-10-07 Novellus Systems, Inc. Method for depositing tungsten film with low roughness and low resistivity
JP2014074190A (ja) 2012-10-02 2014-04-24 Tokyo Electron Ltd 成膜装置
US9169556B2 (en) 2012-10-11 2015-10-27 Applied Materials, Inc. Tungsten growth modulation by controlling surface composition
US9546419B2 (en) 2012-11-26 2017-01-17 Applied Materials, Inc. Method of reducing tungsten film roughness and resistivity
WO2014140672A1 (en) 2013-03-15 2014-09-18 L'air Liquide, Societe Anonyme Pour I'etude Et I'exploitation Des Procedes Georges Claude Bis(alkylimido)-bis(alkylamido)molybdenum molecules for deposition of molybdenum-containing films
US9153486B2 (en) 2013-04-12 2015-10-06 Lam Research Corporation CVD based metal/semiconductor OHMIC contact for high volume manufacturing applications
US8975142B2 (en) 2013-04-25 2015-03-10 Globalfoundries Inc. FinFET channel stress using tungsten contacts in raised epitaxial source and drain
US9082826B2 (en) 2013-05-24 2015-07-14 Lam Research Corporation Methods and apparatuses for void-free tungsten fill in three-dimensional semiconductor features
JP6494940B2 (ja) 2013-07-25 2019-04-03 ラム リサーチ コーポレーションLam Research Corporation 異なるサイズのフィーチャへのボイドフリータングステン充填
US9362163B2 (en) 2013-07-30 2016-06-07 Lam Research Corporation Methods and apparatuses for atomic layer cleaning of contacts and vias
CN105453230B (zh) 2013-08-16 2019-06-14 应用材料公司 用六氟化钨(wf6)回蚀进行钨沉积
JP5864503B2 (ja) 2013-09-30 2016-02-17 株式会社日立国際電気 半導体装置の製造方法、基板処理装置、プログラム及び記録媒体
US10777438B2 (en) 2013-10-18 2020-09-15 Brooks Automation, Inc. Processing apparatus
US9589808B2 (en) 2013-12-19 2017-03-07 Lam Research Corporation Method for depositing extremely low resistivity tungsten
JP2015177006A (ja) 2014-03-14 2015-10-05 株式会社東芝 半導体装置及びその製造方法
JP6379550B2 (ja) 2014-03-18 2018-08-29 東京エレクトロン株式会社 成膜装置
US9595470B2 (en) 2014-05-09 2017-03-14 Lam Research Corporation Methods of preparing tungsten and tungsten nitride thin films using tungsten chloride precursor
US20150348840A1 (en) 2014-05-31 2015-12-03 Lam Research Corporation Methods of filling high aspect ratio features with fluorine free tungsten
US9551074B2 (en) 2014-06-05 2017-01-24 Lam Research Corporation Electroless plating solution with at least two borane containing reducing agents
TWI656232B (zh) 2014-08-14 2019-04-11 法商液態空氣喬治斯克勞帝方法研究開發股份有限公司 鉬組成物及其用於形成氧化鉬膜之用途
KR102156409B1 (ko) 2014-09-16 2020-09-15 에스케이하이닉스 주식회사 패턴 형성 방법
JP2016098406A (ja) 2014-11-21 2016-05-30 東京エレクトロン株式会社 モリブデン膜の成膜方法
US9502263B2 (en) 2014-12-15 2016-11-22 Applied Materials, Inc. UV assisted CVD AlN film for BEOL etch stop application
US9443865B2 (en) 2014-12-18 2016-09-13 Sandisk Technologies Llc Fabricating 3D NAND memory having monolithic crystalline silicon vertical NAND channel
US9953984B2 (en) 2015-02-11 2018-04-24 Lam Research Corporation Tungsten for wordline applications
TW201700761A (zh) 2015-05-13 2017-01-01 應用材料股份有限公司 經由基材的有機金屬或矽烷預處理而改良的鎢膜
CN113652672B (zh) 2015-05-27 2023-12-22 Asm Ip 控股有限公司 用于含钼或钨薄膜的ald的前体的合成和用途
US9613818B2 (en) * 2015-05-27 2017-04-04 Lam Research Corporation Deposition of low fluorine tungsten by sequential CVD process
US9754824B2 (en) 2015-05-27 2017-09-05 Lam Research Corporation Tungsten films having low fluorine content
KR102397797B1 (ko) * 2015-05-27 2022-05-12 램 리써치 코포레이션 순차적인 cvd 프로세스에 의한 저 불소 텅스텐의 증착
JP6478813B2 (ja) * 2015-05-28 2019-03-06 東京エレクトロン株式会社 金属膜の成膜方法
JP6541438B2 (ja) 2015-05-28 2019-07-10 東京エレクトロン株式会社 金属膜のストレス低減方法および金属膜の成膜方法
US9972504B2 (en) * 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US10121671B2 (en) 2015-08-28 2018-11-06 Applied Materials, Inc. Methods of depositing metal films using metal oxyhalide precursors
US9853123B2 (en) 2015-10-28 2017-12-26 United Microelectronics Corp. Semiconductor structure and fabrication method thereof
US10535558B2 (en) 2016-02-09 2020-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming trenches
US10995405B2 (en) 2016-02-19 2021-05-04 Merck Patent Gmbh Deposition of molybdenum thin films using a molybdenum carbonyl precursor
US10865475B2 (en) * 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
TWI732846B (zh) * 2016-04-25 2021-07-11 美商應用材料股份有限公司 透過控制前驅物混合來強化金屬的空間ald
CN109661481B (zh) * 2016-07-14 2021-11-30 恩特格里斯公司 使用MoOC14的CVD Mo沉积
US20190161853A1 (en) 2016-07-26 2019-05-30 Tokyo Electron Limited Method for forming tungsten film
US10573522B2 (en) * 2016-08-16 2020-02-25 Lam Research Corporation Method for preventing line bending during metal fill process
US20180142345A1 (en) 2016-11-23 2018-05-24 Entegris, Inc. Low temperature molybdenum film deposition utilizing boron nucleation layers
US10453744B2 (en) 2016-11-23 2019-10-22 Entegris, Inc. Low temperature molybdenum film deposition utilizing boron nucleation layers
US10283404B2 (en) 2017-03-30 2019-05-07 Lam Research Corporation Selective deposition of WCN barrier/adhesion layer for interconnect
KR102572271B1 (ko) 2017-04-10 2023-08-28 램 리써치 코포레이션 몰리브덴을 함유하는 저 저항률 막들
KR20250073535A (ko) 2017-08-14 2025-05-27 램 리써치 코포레이션 3차원 수직 nand 워드라인을 위한 금속 충진 프로세스
US20190067003A1 (en) 2017-08-30 2019-02-28 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film on a dielectric surface of a substrate and related semiconductor device structures
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US10269559B2 (en) 2017-09-13 2019-04-23 Lam Research Corporation Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer
US20200402846A1 (en) 2017-11-20 2020-12-24 Lam Research Corporation Self-limiting growth
US11560625B2 (en) 2018-01-19 2023-01-24 Entegris, Inc. Vapor deposition of molybdenum using a bis(alkyl-arene) molybdenum precursor
TWI863919B (zh) 2018-07-26 2024-12-01 美商蘭姆研究公司 純金屬膜的沉積
US12014928B2 (en) 2018-07-31 2024-06-18 Lam Research Corporation Multi-layer feature fill
KR20250116174A (ko) 2018-11-19 2025-07-31 램 리써치 코포레이션 텅스텐을 위한 몰리브덴 템플릿들
WO2020123987A1 (en) 2018-12-14 2020-06-18 Lam Research Corporation Atomic layer deposition on 3d nand structures
SG11202108217UA (en) 2019-01-28 2021-08-30 Lam Res Corp Deposition of metal films
SG11202109796QA (en) 2019-03-11 2021-10-28 Lam Res Corp Precursors for deposition of molybdenum-containing films
WO2020210260A1 (en) 2019-04-11 2020-10-15 Lam Research Corporation High step coverage tungsten deposition
US12237221B2 (en) 2019-05-22 2025-02-25 Lam Research Corporation Nucleation-free tungsten deposition
WO2021030836A1 (en) 2019-08-12 2021-02-18 Lam Research Corporation Tungsten deposition
EP4018471A4 (en) 2019-08-22 2024-01-17 Lam Research Corporation Substantially carbon-free molybdenum-containing and tungsten-containing films in semiconductor device manufacturing
US12334351B2 (en) 2019-09-03 2025-06-17 Lam Research Corporation Molybdenum deposition
WO2021076636A1 (en) 2019-10-15 2021-04-22 Lam Research Corporation Molybdenum fill
KR102953798B1 (ko) 2020-06-24 2026-04-15 에이에스엠 아이피 홀딩 비.브이. 몰리브덴을 포함하는 막의 기상 증착

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030209193A1 (en) * 2000-07-07 2003-11-13 Van Wijck Margreet Albertine Anne-Marie Atomic layer CVD
US7691749B2 (en) * 2003-01-21 2010-04-06 Novellus Systems, Inc. Deposition of tungsten nitride
KR20050054122A (ko) * 2003-12-04 2005-06-10 성명모 자외선 원자층 증착법을 이용한 박막 제조 방법
US20100167527A1 (en) * 2008-12-31 2010-07-01 Applied Materials, Inc. Method of depositing tungsten film with reduced resistivity and improved surface morphology
US20170117155A1 (en) * 2015-05-27 2017-04-27 Lam Research Corporation Method of forming low resistivity fluorine free tungsten film without nucleation

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111826631A (zh) * 2019-04-19 2020-10-27 Asm Ip私人控股有限公司 层形成方法和装置
CN111826631B (zh) * 2019-04-19 2024-09-24 Asmip私人控股有限公司 层形成方法和装置
EP4091192A4 (en) * 2020-01-16 2024-07-03 Entegris, Inc. Method for etching or deposition
US20210222292A1 (en) * 2020-01-16 2021-07-22 Entegris, Inc. Method for etching or deposition
WO2021146623A1 (en) * 2020-01-16 2021-07-22 Entegris, Inc. Method for etching or deposition
US11624111B2 (en) 2020-01-16 2023-04-11 Entegris, Inc. Method for etching or deposition
EP3892755A1 (fr) * 2020-04-07 2021-10-13 Commissariat à l'énergie atomique et aux énergies alternatives Procede de depot d'un film metallique de molybdene par ald
TWI831062B (zh) * 2020-12-17 2024-02-01 日商國際電氣股份有限公司 半導體裝置的製造方法,程式,基板處理方法及基板處理裝置
CN116601742A (zh) * 2020-12-17 2023-08-15 株式会社国际电气 半导体装置的制造方法、程序以及基板处理装置
JPWO2022130559A1 (https=) * 2020-12-17 2022-06-23
JP7608478B2 (ja) 2020-12-17 2025-01-06 株式会社Kokusai Electric 基板処理方法、プログラム、基板処理装置及び半導体装置の製造方法
US12448688B2 (en) 2022-03-15 2025-10-21 Kioxia Corporation Film forming method and apparatus
US12595556B2 (en) 2023-03-02 2026-04-07 L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude Molybdenum imido alkyl/allyl complexes for deposition of molybdenum-containing films

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