JP2011009760A5 - - Google Patents

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JP2011009760A5
JP2011009760A5 JP2010174203A JP2010174203A JP2011009760A5 JP 2011009760 A5 JP2011009760 A5 JP 2011009760A5 JP 2010174203 A JP2010174203 A JP 2010174203A JP 2010174203 A JP2010174203 A JP 2010174203A JP 2011009760 A5 JP2011009760 A5 JP 2011009760A5
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strain
trench
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transistor
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JP5508982B2 (ja
JP2011009760A (ja
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JP2010174203A 2003-03-07 2010-08-03 シャロートレンチアイソレーションプロセス Expired - Lifetime JP5508982B2 (ja)

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US45279403P 2003-03-07 2003-03-07
US60/452,794 2003-03-07

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JP2011009760A JP2011009760A (ja) 2011-01-13
JP2011009760A5 true JP2011009760A5 (enExample) 2011-03-17
JP5508982B2 JP5508982B2 (ja) 2014-06-04

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US (2) US6960781B2 (enExample)
EP (1) EP1602125B1 (enExample)
JP (2) JP4585510B2 (enExample)
KR (1) KR100728173B1 (enExample)
CN (1) CN100437970C (enExample)
WO (1) WO2004081982A2 (enExample)

Families Citing this family (186)

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Publication number Priority date Publication date Assignee Title
US7307273B2 (en) * 2002-06-07 2007-12-11 Amberwave Systems Corporation Control of strain in device layers by selective relaxation
JP4750342B2 (ja) * 2002-07-03 2011-08-17 ルネサスエレクトロニクス株式会社 Ｍｏｓ−ｆｅｔおよびその製造方法、並びに半導体装置
KR100507344B1 (ko) 2003-04-17 2005-08-08 삼성에스디아이 주식회사 박막 트랜지스터 및 그의 제조 방법
US20050285140A1 (en) * 2004-06-23 2005-12-29 Chih-Hsin Ko Isolation structure for strained channel transistors
US6869860B2 (en) * 2003-06-03 2005-03-22 International Business Machines Corporation Filling high aspect ratio isolation structures with polysilazane based material
US6927414B2 (en) * 2003-06-17 2005-08-09 International Business Machines Corporation High speed lateral heterojunction MISFETs realized by 2-dimensional bandgap engineering and methods thereof
US6902965B2 (en) * 2003-10-31 2005-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Strained silicon structure
US6949795B2 (en) * 2003-11-13 2005-09-27 Micron Technology, Inc. Structure and method of fabricating a transistor having a trench gate
KR100605497B1 (ko) * 2003-11-27 2006-07-28 삼성전자주식회사 에스오아이 기판들을 제조하는 방법들, 이를 사용하여반도체 소자들을 제조하는 방법들 및 그에 의해 제조된반도체 소자들
US20050116360A1 (en) * 2003-12-01 2005-06-02 Chien-Chao Huang Complementary field-effect transistors and methods of manufacture
US7482214B2 (en) 2003-12-30 2009-01-27 Texas Instruments Incorporated Transistor design and layout for performance improvement with strain
US7138302B2 (en) * 2004-01-12 2006-11-21 Advanced Micro Devices, Inc. Method of fabricating an integrated circuit channel region
KR100526889B1 (ko) * 2004-02-10 2005-11-09 삼성전자주식회사 핀 트랜지스터 구조
US20050230350A1 (en) 2004-02-26 2005-10-20 Applied Materials, Inc. In-situ dry clean chamber for front end of line fabrication
US20070123051A1 (en) * 2004-02-26 2007-05-31 Reza Arghavani Oxide etch with nh4-nf3 chemistry
US7780793B2 (en) 2004-02-26 2010-08-24 Applied Materials, Inc. Passivation layer formation by plasma clean process to reduce native oxide growth
JP2005294360A (ja) * 2004-03-31 2005-10-20 Nec Electronics Corp 半導体装置の製造方法
US7023018B2 (en) * 2004-04-06 2006-04-04 Texas Instruments Incorporated SiGe transistor with strained layers
JP4577680B2 (ja) * 2004-04-13 2010-11-10 エルピーダメモリ株式会社 半導体装置の製造方法
US7361973B2 (en) * 2004-05-21 2008-04-22 International Business Machines Corporation Embedded stressed nitride liners for CMOS performance improvement
US7176105B2 (en) * 2004-06-01 2007-02-13 Applied Materials, Inc. Dielectric gap fill with oxide selectively deposited over silicon liner
KR100604870B1 (ko) * 2004-06-16 2006-07-31 삼성전자주식회사 접합 영역의 어브럽트니스를 개선시킬 수 있는 전계 효과트랜지스터 및 그 제조방법
US7227205B2 (en) * 2004-06-24 2007-06-05 International Business Machines Corporation Strained-silicon CMOS device and method
TWI463526B (zh) * 2004-06-24 2014-12-01 Ibm 改良具應力矽之ｃｍｏｓ元件的方法及以該方法製備而成的元件
US7288443B2 (en) * 2004-06-29 2007-10-30 International Business Machines Corporation Structures and methods for manufacturing p-type MOSFET with graded embedded silicon-germanium source-drain and/or extension
US8669145B2 (en) 2004-06-30 2014-03-11 International Business Machines Corporation Method and structure for strained FinFET devices
US7521378B2 (en) * 2004-07-01 2009-04-21 Micron Technology, Inc. Low temperature process for polysilazane oxidation/densification
FR2872626B1 (fr) * 2004-07-05 2008-05-02 Commissariat Energie Atomique Procede pour contraindre un motif mince
US7161199B2 (en) * 2004-08-24 2007-01-09 Freescale Semiconductor, Inc. Transistor structure with stress modification and capacitive reduction feature in a width direction and method thereof
JP2006066573A (ja) * 2004-08-26 2006-03-09 Seiko Epson Corp 半導体装置および半導体装置の製造方法
US7067868B2 (en) * 2004-09-29 2006-06-27 Freescale Semiconductor, Inc. Double gate device having a heterojunction source/drain and strained channel
DE102004048096A1 (de) * 2004-09-30 2006-04-27 Forschungszentrum Jülich GmbH Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur
US7883979B2 (en) * 2004-10-26 2011-02-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method for manufacturing a semiconductor device with reduced floating body effect
US20060099763A1 (en) * 2004-10-28 2006-05-11 Yi-Cheng Liu Method of manufacturing semiconductor mos transistor device
DE102004053307B4 (de) * 2004-11-04 2010-01-07 Siltronic Ag Mehrschichtenstruktur umfassend ein Substrat und eine darauf heteroepitaktisch abgeschiedene Schicht aus Silicium und Germanium und ein Verfahren zu deren Herstellung
US7393733B2 (en) * 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
US7326969B1 (en) * 2004-12-02 2008-02-05 T-Ram Semiconductor, Inc. Semiconductor device incorporating thyristor-based memory and strained silicon
KR100689211B1 (ko) * 2004-12-11 2007-03-08 경북대학교 산학협력단 안장형 엠오에스 소자
US7479431B2 (en) * 2004-12-17 2009-01-20 Intel Corporation Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
US7348283B2 (en) * 2004-12-27 2008-03-25 Intel Corporation Mechanically robust dielectric film and stack
US7335959B2 (en) * 2005-01-06 2008-02-26 Intel Corporation Device with stepped source/drain region profile
US20060151808A1 (en) * 2005-01-12 2006-07-13 Chien-Hao Chen MOSFET device with localized stressor
US7282415B2 (en) * 2005-03-29 2007-10-16 Freescale Semiconductor, Inc. Method for making a semiconductor device with strain enhancement
US20060234467A1 (en) * 2005-04-15 2006-10-19 Van Gompel Toni D Method of forming trench isolation in a semiconductor device
US7271069B2 (en) * 2005-04-21 2007-09-18 Freescale Semiconductor, Inc. Semiconductor device having a plurality of different layers and method therefor
US7205202B2 (en) * 2005-04-21 2007-04-17 Freescale Semiconductor, Inc. Semiconductor device and method for regional stress control
US7465992B2 (en) * 2005-04-27 2008-12-16 International Business Machines Corporation Field effect transistor with mixed-crystal-orientation channel and source/drain regions
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8866190B2 (en) * 2005-06-14 2014-10-21 International Rectifler Corporation Methods of combining silicon and III-nitride material on a single wafer
FR2887367B1 (fr) * 2005-06-15 2008-06-27 Soitec Silicon On Insulator Procede de maintien de la contrainte dans un ilot grave dans une couche mince contrainte et structure obtenue par la mise en oeuvre du procede
US7528028B2 (en) * 2005-06-17 2009-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Super anneal for process induced strain modulation
US20070010073A1 (en) * 2005-07-06 2007-01-11 Chien-Hao Chen Method of forming a MOS device having a strained channel region
US20070023795A1 (en) * 2005-07-15 2007-02-01 Kabushiki Kaisha Toshiba Semiconductor device and method of fabricating the same
EP1911086A2 (en) 2005-07-26 2008-04-16 Amberwave Systems Corporation Solutions integrated circuit integration of alternative active area materials
US7358101B2 (en) * 2005-09-06 2008-04-15 Institute Of Nuclear Energy Research Method for preparing an optical active layer with 1˜10 nm distributed silicon quantum dots
US7638842B2 (en) 2005-09-07 2009-12-29 Amberwave Systems Corporation Lattice-mismatched semiconductor structures on insulators
JP4930375B2 (ja) * 2005-09-28 2012-05-16 富士通株式会社 半導体装置及びその製造方法
DE102005047081B4 (de) * 2005-09-30 2019-01-31 Robert Bosch Gmbh Verfahren zum plasmalosen Ätzen von Silizium mit dem Ätzgas ClF3 oder XeF2
CN1959958B (zh) * 2005-10-31 2010-05-05 中芯国际集成电路制造(上海)有限公司 用于应变硅mos晶体管的多晶硅栅极掺杂方法和结构
US7307320B2 (en) * 2005-11-07 2007-12-11 Samsung Electronics Co., Ltd. Differential mechanical stress-producing regions for integrated circuit field effect transistors
DE102005054219B4 (de) 2005-11-14 2011-06-22 Infineon Technologies AG, 81669 Verfahren zum Herstellen eines Feldeffekttransistors und Feldeffekttransistor
US20070108529A1 (en) 2005-11-14 2007-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Strained gate electrodes in semiconductor devices
JP2007141977A (ja) 2005-11-16 2007-06-07 Matsushita Electric Ind Co Ltd 半導体装置
JP2007157788A (ja) * 2005-11-30 2007-06-21 Toshiba Corp 半導体装置
DE102005059231B4 (de) * 2005-12-12 2011-01-13 Infineon Technologies Ag Verfahren zum Herstellen eines Verbindungshalbleiter-Feldeffekttransistors mit einer Fin-Struktur und Verbindungshalbleiter-Feldeffekttransistor mit einer Fin-Struktur
KR100713924B1 (ko) * 2005-12-23 2007-05-07 주식회사 하이닉스반도체 돌기형 트랜지스터 및 그의 형성방법
US7525160B2 (en) * 2005-12-27 2009-04-28 Intel Corporation Multigate device with recessed strain regions
JP2007184418A (ja) * 2006-01-06 2007-07-19 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP4951978B2 (ja) * 2006-01-13 2012-06-13 ソニー株式会社 半導体装置及びその製造方法
WO2007083237A1 (en) * 2006-01-18 2007-07-26 Stmicroelectronics (Crolles 2) Sas Integration of self-aligned trenches in-between metal lines
US7368394B2 (en) * 2006-02-27 2008-05-06 Applied Materials, Inc. Etch methods to form anisotropic features for high aspect ratio applications
US7709345B2 (en) 2006-03-07 2010-05-04 Micron Technology, Inc. Trench isolation implantation
WO2007112066A2 (en) 2006-03-24 2007-10-04 Amberwave Systems Corporation Lattice-mismatched semiconductor structures and related methods for device fabrication
JP4984600B2 (ja) * 2006-03-30 2012-07-25 富士通株式会社 半導体装置及びその製造方法
DE102006015087B4 (de) * 2006-03-31 2011-03-10 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung von Transistoren
JP2007317796A (ja) * 2006-05-24 2007-12-06 Toshiba Corp 半導体装置および半導体装置の製造方法
US7678631B2 (en) * 2006-06-06 2010-03-16 Intel Corporation Formation of strain-inducing films
US7825400B2 (en) 2006-06-09 2010-11-02 Intel Corporation Strain-inducing semiconductor regions
US7629603B2 (en) * 2006-06-09 2009-12-08 Intel Corporation Strain-inducing semiconductor regions
US8853746B2 (en) 2006-06-29 2014-10-07 International Business Machines Corporation CMOS devices with stressed channel regions, and methods for fabricating the same
DE102006035669B4 (de) * 2006-07-31 2014-07-10 Globalfoundries Inc. Transistor mit einem verformten Kanalgebiet, das eine leistungssteigernde Materialzusammensetzung aufweist und Verfahren zur Herstellung
JP2008041734A (ja) * 2006-08-02 2008-02-21 Sony Corp 半導体装置および半導体装置の製造方法
CN100483667C (zh) * 2006-08-10 2009-04-29 中芯国际集成电路制造(上海)有限公司 形成浅沟槽隔离结构的方法和浅沟槽隔离结构
US7598517B2 (en) * 2006-08-25 2009-10-06 Freescale Semiconductor, Inc. Superjunction trench device and method
US8154051B2 (en) * 2006-08-29 2012-04-10 Taiwan Semiconductor Manufacturing Co., Ltd. MOS transistor with in-channel and laterally positioned stressors
EP2062290B1 (en) 2006-09-07 2019-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Defect reduction using aspect ratio trapping
US8642413B2 (en) * 2006-09-14 2014-02-04 Intel Corporation Formation of strain-inducing films using hydrogenated amorphous silicon
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
WO2008039495A1 (en) 2006-09-27 2008-04-03 Amberwave Systems Corporation Tri-gate field-effect transistors formed by aspect ratio trapping
US7709312B2 (en) * 2006-09-29 2010-05-04 Intel Corporation Methods for inducing strain in non-planar transistor structures
US8168548B2 (en) * 2006-09-29 2012-05-01 Tokyo Electron Limited UV-assisted dielectric formation for devices with strained germanium-containing layers
WO2008051503A2 (en) 2006-10-19 2008-05-02 Amberwave Systems Corporation Light-emitter-based devices with lattice-mismatched semiconductor structures
US7943469B2 (en) * 2006-11-28 2011-05-17 Intel Corporation Multi-component strain-inducing semiconductor regions
US20080142897A1 (en) * 2006-12-19 2008-06-19 Chartered Semiconductor Manufacturing Ltd. Integrated circuit system having strained transistor
JP5132928B2 (ja) * 2006-12-25 2013-01-30 パナソニック株式会社 半導体装置
US20080157200A1 (en) * 2006-12-27 2008-07-03 International Business Machines Corporation Stress liner surrounded facetless embedded stressor mosfet
KR101026479B1 (ko) * 2006-12-28 2011-04-01 주식회사 하이닉스반도체 반도체 소자 및 그의 제조 방법
KR100831682B1 (ko) * 2006-12-29 2008-05-22 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
DE102007004861B4 (de) * 2007-01-31 2010-02-18 Advanced Micro Devices, Inc., Sunnyvale Transistor mit eingebettetem Si/Ge-Material auf einem verspannten Halbleiter-auf-Isolator-Substrat und Verfahren zum Herstellen des Transistors
JP5239183B2 (ja) * 2007-03-20 2013-07-17 株式会社Ｓｕｍｃｏ Ｓｏｉウェーハ及びその製造方法
WO2008117430A1 (ja) * 2007-03-27 2008-10-02 Fujitsu Microelectronics Limited 半導体装置の製造方法、半導体装置
US7833883B2 (en) * 2007-03-28 2010-11-16 Intel Corporation Precursor gas mixture for depositing an epitaxial carbon-doped silicon film
US9034102B2 (en) * 2007-03-29 2015-05-19 United Microelectronics Corp. Method of fabricating hybrid orientation substrate and structure of the same
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US9508890B2 (en) 2007-04-09 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Photovoltaics on silicon
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US8450165B2 (en) 2007-05-14 2013-05-28 Intel Corporation Semiconductor device having tipless epitaxial source/drain regions
US20080290414A1 (en) * 2007-05-24 2008-11-27 Texas Instruments Incorporated Integrating strain engineering to maximize system-on-a-chip performance
US7960243B2 (en) * 2007-05-31 2011-06-14 Freescale Semiconductor, Inc. Method of forming a semiconductor device featuring a gate stressor and semiconductor device
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
US7795119B2 (en) * 2007-07-17 2010-09-14 Taiwan Semiconductor Manufacturing Company, Ltd. Flash anneal for a PAI, NiSi process
US7652336B2 (en) * 2007-08-06 2010-01-26 International Business Machines Corporation Semiconductor devices and methods of manufacture thereof
JP2010538495A (ja) 2007-09-07 2010-12-09 アンバーウェーブ・システムズ・コーポレーション 多接合太陽電池
US7932542B2 (en) * 2007-09-24 2011-04-26 Infineon Technologies Ag Method of fabricating an integrated circuit with stress enhancement
JP5069531B2 (ja) * 2007-09-28 2012-11-07 富士フイルム株式会社 窒化シリコン膜の形成方法
US7964910B2 (en) * 2007-10-17 2011-06-21 International Business Machines Corporation Planar field effect transistor structure having an angled crystallographic etch-defined source/drain recess and a method of forming the transistor structure
US7759702B2 (en) * 2008-01-04 2010-07-20 International Business Machines Corporation Hetero-junction bipolar transistor (HBT) and structure thereof
US7705386B2 (en) * 2008-01-07 2010-04-27 International Business Machines Corporation Providing isolation for wordline passing over deep trench capacitor
JP2009164364A (ja) * 2008-01-08 2009-07-23 Renesas Technology Corp 半導体装置およびその製造方法
US7678634B2 (en) * 2008-01-28 2010-03-16 International Business Machines Corporation Local stress engineering for CMOS devices
US9368410B2 (en) * 2008-02-19 2016-06-14 Globalfoundries Inc. Semiconductor devices having tensile and/or compressive stress and methods of manufacturing
US8624295B2 (en) 2008-03-20 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. SRAM devices utilizing strained-channel transistors and methods of manufacture
US8361879B2 (en) 2008-05-19 2013-01-29 Infineon Technologies Ag Stress-inducing structures, methods, and materials
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US7979836B2 (en) * 2008-08-15 2011-07-12 International Business Machines Corporation Split-gate DRAM with MuGFET, design structure, and method of manufacture
US20110306170A1 (en) * 2008-08-29 2011-12-15 Texas Instruments Incorporated Novel Method to Improve Performance by Enhancing Poly Gate Doping Concentration in an Embedded SiGe PMOS Process
DE102008044983B4 (de) * 2008-08-29 2014-08-21 Advanced Micro Devices, Inc. Verfahren zum Herstellen eines strukturierten verformten Substrats, insbesondere zur Herstellung verformter Transistoren mit geringerer Dicke der aktiven Schicht
JP4854719B2 (ja) * 2008-09-12 2012-01-18 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4859896B2 (ja) * 2008-09-12 2012-01-25 富士通セミコンダクター株式会社 半導体装置
CN102160145B (zh) 2008-09-19 2013-08-21 台湾积体电路制造股份有限公司 通过外延层过成长的元件形成
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
US7994002B2 (en) * 2008-11-24 2011-08-09 Applied Materials, Inc. Method and apparatus for trench and via profile modification
US7772083B2 (en) * 2008-12-29 2010-08-10 International Business Machines Corporation Trench forming method and structure
CN101853882B (zh) 2009-04-01 2016-03-23 台湾积体电路制造股份有限公司 具有改进的开关电流比的高迁移率多面栅晶体管
US8816391B2 (en) * 2009-04-01 2014-08-26 Taiwan Semiconductor Manufacturing Company, Ltd. Source/drain engineering of devices with high-mobility channels
CN102379046B (zh) 2009-04-02 2015-06-17 台湾积体电路制造股份有限公司 从晶体材料的非极性平面形成的器件及其制作方法
US8455860B2 (en) 2009-04-30 2013-06-04 Taiwan Semiconductor Manufacturing Company, Ltd. Reducing source/drain resistance of III-V based transistors
US9768305B2 (en) 2009-05-29 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Gradient ternary or quaternary multiple-gate transistor
US8617976B2 (en) 2009-06-01 2013-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Source/drain re-growth for manufacturing III-V based transistors
JP2011023534A (ja) 2009-07-15 2011-02-03 Sumitomo Electric Ind Ltd 窒化物系半導体発光素子
US8236709B2 (en) 2009-07-29 2012-08-07 International Business Machines Corporation Method of fabricating a device using low temperature anneal processes, a device and design structure
US20110147804A1 (en) * 2009-12-23 2011-06-23 Rishabh Mehandru Drive current enhancement in tri-gate MOSFETS by introduction of compressive metal gate stress using ion implantation
US8558279B2 (en) * 2010-09-23 2013-10-15 Intel Corporation Non-planar device having uniaxially strained semiconductor body and method of making same
CN102456735B (zh) * 2010-10-27 2013-11-13 中国科学院微电子研究所 半导体器件制造方法
US20120119302A1 (en) 2010-11-11 2012-05-17 International Business Machines Corporation Trench Silicide Contact With Low Interface Resistance
JP2012134395A (ja) * 2010-12-22 2012-07-12 Elpida Memory Inc 半導体装置および半導体装置の製造方法
US8470674B2 (en) 2011-01-03 2013-06-25 International Business Machines Corporation Structure, method and system for complementary strain fill for integrated circuit chips
DE102011011157B4 (de) * 2011-02-14 2017-11-09 Texas Instruments Deutschland Gmbh Elektronische Halbleitervorrichtung und Verfahren zu deren Herstellung
US8394712B2 (en) 2011-05-05 2013-03-12 International Business Machines Corporation Cavity-free interface between extension regions and embedded silicon-carbon alloy source/drain regions
US20120292735A1 (en) * 2011-05-20 2012-11-22 GLOBALFOUNDRIES Singapore Pte.Ltd. Corner transistor suppression
US8598660B2 (en) 2011-06-01 2013-12-03 International Business Machines Corporation Stress enhanced LDMOS transistor to minimize on-resistance and maintain high breakdown voltage
CN102881625B (zh) * 2011-07-13 2015-07-15 中国科学院微电子研究所 隔离结构以及半导体结构的形成方法
US9064808B2 (en) 2011-07-25 2015-06-23 Synopsys, Inc. Integrated circuit devices having features with reduced edge curvature and methods for manufacturing the same
US9318370B2 (en) 2011-08-04 2016-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. High-k dielectric liners in shallow trench isolations
US8609550B2 (en) * 2011-09-08 2013-12-17 Synopsys, Inc. Methods for manufacturing integrated circuit devices having features with reduced edge curvature
US8785291B2 (en) 2011-10-20 2014-07-22 International Business Machines Corporation Post-gate shallow trench isolation structure formation
US9601594B2 (en) * 2011-11-14 2017-03-21 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with enhanced strain
US8466496B2 (en) 2011-11-17 2013-06-18 International Business Machines Corporation Selective partial gate stack for improved device isolation
FR2986369B1 (fr) 2012-01-30 2016-12-02 Commissariat Energie Atomique Procede pour contraindre un motif mince et procede de fabrication de transistor integrant ledit procede
US9219129B2 (en) * 2012-05-10 2015-12-22 International Business Machines Corporation Inverted thin channel mosfet with self-aligned expanded source/drain
US8652917B2 (en) * 2012-05-23 2014-02-18 GlobalFoundries, Inc. Superior stability of characteristics of transistors having an early formed high-K metal gate
US9136343B2 (en) 2013-01-24 2015-09-15 Intel Corporation Deep gate-all-around semiconductor device having germanium or group III-V active layer
US8796098B1 (en) * 2013-02-26 2014-08-05 Cypress Semiconductor Corporation Embedded SONOS based memory cells
US9209066B2 (en) * 2013-03-01 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structure of semiconductor device
US9012336B2 (en) * 2013-04-08 2015-04-21 Applied Materials, Inc. Method for conformal treatment of dielectric films using inductively coupled plasma
EP3036770B1 (en) * 2013-08-23 2022-03-02 Intel Corporation High resistance layer for iii-v channel deposited on group iv substrates for mos transistors
US20150064929A1 (en) * 2013-09-05 2015-03-05 United Microelectronics Corp. Method of gap filling
US9553149B2 (en) * 2013-11-08 2017-01-24 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device with a strained region and method of making
US10593767B2 (en) * 2013-12-23 2020-03-17 Chun Wai NG Field plate structure for power semiconductor device and manufacturing method thereof
US9178068B1 (en) 2014-06-05 2015-11-03 International Business Machines Corporation FinFET with oxidation-induced stress
KR102155327B1 (ko) * 2014-07-07 2020-09-11 삼성전자주식회사 전계 효과 트랜지스터 및 그 제조 방법
US9401410B2 (en) * 2014-11-26 2016-07-26 Texas Instruments Incorporated Poly sandwich for deep trench fill
US9871100B2 (en) * 2015-07-29 2018-01-16 Taiwan Semiconductor Manufacturing Co., Ltd. Trench structure of semiconductor device having uneven nitrogen distribution liner
US9530669B1 (en) 2015-11-30 2016-12-27 International Business Machines Corporation Method of making a semiconductor device having a semiconductor material on a relaxed semiconductor including replacing a strained, selective etchable material, with a low density dielectric in a cavity
EP3446113A4 (en) * 2016-04-19 2020-01-08 Takulapalli, Bharath NANOPORE SENSOR, STRUCTURE AND DEVICE COMPRISING THE SENSOR, AND METHODS OF FORMING AND USING SAME
US9847245B1 (en) * 2016-06-16 2017-12-19 Samsung Electronics Co., Ltd. Filling processes
US11139402B2 (en) 2018-05-14 2021-10-05 Synopsys, Inc. Crystal orientation engineering to achieve consistent nanowire shapes
US11264458B2 (en) 2019-05-20 2022-03-01 Synopsys, Inc. Crystal orientation engineering to achieve consistent nanowire shapes
US11805645B2 (en) 2019-08-16 2023-10-31 Micron Technology, Inc. Integrated assemblies having rugged material fill, and methods of forming integrated assemblies
US11296209B2 (en) 2019-08-27 2022-04-05 Taiwan Semiconductor Manufacturing Company, Ltd. RF switch device with a sidewall spacer having a low dielectric constant
CN111239224A (zh) * 2020-03-03 2020-06-05 南方科技大学 一种气体传感器及其制备方法

Family Cites Families (381)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US669004A (en) * 1900-10-23 1901-02-26 John S Tilley Combined trestle and extension-ladder.
US4010045A (en) 1973-12-13 1977-03-01 Ruehrwein Robert A Process for production of III-V compound crystals
US4354898A (en) * 1981-06-24 1982-10-19 Bell Telephone Laboratories, Incorporated Method of preferentially etching optically flat mirror facets in InGaAsP/InP heterostructures
JPH0656887B2 (ja) 1982-02-03 1994-07-27 株式会社日立製作所 半導体装置およびその製法
FR2525033B1 (fr) * 1982-04-08 1986-01-17 Bouadma Noureddine Laser a semi-conducteur a plusieurs longueurs d'onde independantes et son procede de realisation
US4411734A (en) 1982-12-09 1983-10-25 Rca Corporation Etching of tantalum silicide/doped polysilicon structures
US4522662A (en) 1983-08-12 1985-06-11 Hewlett-Packard Company CVD lateral epitaxial growth of silicon over insulators
JPS6050124A (ja) 1983-08-26 1985-03-19 Nippon Kokan Kk <Nkk> 鋼帯のロ−ル冷却方法
CA1247947A (en) * 1984-07-31 1989-01-03 Masaru Wada Method of manufacturing semiconductor device
US4777517A (en) * 1984-11-29 1988-10-11 Fujitsu Limited Compound semiconductor integrated circuit device
US4649859A (en) 1985-02-19 1987-03-17 The United States Of America As Represented By The United States Department Of Energy Reactor design for uniform chemical vapor deposition-grown films without substrate rotation
JPS61141116U (enExample) 1985-02-22 1986-09-01
US4803539A (en) 1985-03-29 1989-02-07 International Business Machines Corporation Dopant control of metal silicide formation
US4764246A (en) 1985-08-06 1988-08-16 American Telephone And Telegraph Company, At&T Bell Laboratories Buried undercut mesa-like waveguide and method of making same
JPS6292361A (ja) 1985-10-17 1987-04-27 Toshiba Corp 相補型半導体装置
DE3542482A1 (de) 1985-11-30 1987-06-04 Licentia Gmbh Modulationsdotierter feldeffekttransistor
US4717681A (en) 1986-05-19 1988-01-05 Texas Instruments Incorporated Method of making a heterojunction bipolar transistor with SIPOS
US5298452A (en) 1986-09-12 1994-03-29 International Business Machines Corporation Method and apparatus for low temperature, low pressure chemical vapor deposition of epitaxial silicon layers
US4767246A (en) * 1986-12-05 1988-08-30 Camloh Industries, Inc. Quick-release tool holding device
US4749441A (en) 1986-12-11 1988-06-07 General Motors Corporation Semiconductor mushroom structure fabrication
US4987462A (en) 1987-01-06 1991-01-22 Texas Instruments Incorporated Power MISFET
US6391798B1 (en) 1987-02-27 2002-05-21 Agere Systems Guardian Corp. Process for planarization a semiconductor substrate
US4755478A (en) 1987-08-13 1988-07-05 International Business Machines Corporation Method of forming metal-strapped polysilicon gate electrode for FET device
US4786615A (en) 1987-08-31 1988-11-22 Motorola Inc. Method for improved surface planarity in selective epitaxial silicon
US4982263A (en) * 1987-12-21 1991-01-01 Texas Instruments Incorporated Anodizable strain layer for SOI semiconductor structures
US5130269A (en) 1988-04-27 1992-07-14 Fujitsu Limited Hetero-epitaxially grown compound semiconductor substrate and a method of growing the same
DE3816358A1 (de) 1988-05-13 1989-11-23 Eurosil Electronic Gmbh Nichtfluechtige speicherzelle und verfahren zur herstellung
JPH0794420B2 (ja) 1988-08-30 1995-10-11 宇部興産株式会社 置換フェノキシアセトアルデヒドオキシム類の製造方法
US5198689A (en) 1988-11-30 1993-03-30 Fujitsu Limited Heterojunction bipolar transistor
US5250445A (en) 1988-12-20 1993-10-05 Texas Instruments Incorporated Discretionary gettering of semiconductor circuits
US5241197A (en) 1989-01-25 1993-08-31 Hitachi, Ltd. Transistor provided with strained germanium layer
JPH02210816A (ja) 1989-02-10 1990-08-22 Fujitsu Ltd 化合物半導体積層体
US5217923A (en) 1989-02-13 1993-06-08 Kabushiki Kaisha Toshiba Method of fabricating a semiconductor device having silicided source/drain regions
US4997776A (en) 1989-03-06 1991-03-05 International Business Machines Corp. Complementary bipolar transistor structure and method for manufacture
FR2645345A1 (fr) 1989-03-31 1990-10-05 Thomson Csf Procede de modulation dirigee de la composition ou du dopage de semi-conducteurs, notamment pour la realisation de composants electroniques monolithiques de type planar, utilisation et produits correspondants
US4963506A (en) 1989-04-24 1990-10-16 Motorola Inc. Selective deposition of amorphous and polycrystalline silicon
US5108946A (en) 1989-05-19 1992-04-28 Motorola, Inc. Method of forming planar isolation regions
US5013681A (en) 1989-09-29 1991-05-07 The United States Of America As Represented By The Secretary Of The Navy Method of producing a thin silicon-on-insulator layer
US5202284A (en) 1989-12-01 1993-04-13 Hewlett-Packard Company Selective and non-selective deposition of Si1-x Gex on a Si subsrate that is partially masked with SiO2
DE69032597T2 (de) 1990-02-20 1999-03-25 Kabushiki Kaisha Toshiba, Kawasaki, Kanagawa Bipolartransistor mit Heteroübergang
US5089872A (en) * 1990-04-27 1992-02-18 North Carolina State University Selective germanium deposition on silicon and resulting structures
US5316958A (en) 1990-05-31 1994-05-31 International Business Machines Corporation Method of dopant enhancement in an epitaxial silicon layer by using germanium
JPH0444328A (ja) 1990-06-11 1992-02-14 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5158907A (en) 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
US5155571A (en) 1990-08-06 1992-10-13 The Regents Of The University Of California Complementary field effect transistors having strained superlattice structure
US5034348A (en) 1990-08-16 1991-07-23 International Business Machines Corp. Process for forming refractory metal silicide layers of different thicknesses in an integrated circuit
JPH0691249B2 (ja) 1991-01-10 1994-11-14 インターナショナル・ビジネス・マシーンズ・コーポレイション 変調ドープ形ｍｉｓｆｅｔ及びその製造方法
DE4101167A1 (de) 1991-01-17 1992-07-23 Daimler Benz Ag Anordnung und verfahren zur herstellung komplementaerer feldeffekttransistoren
US5240876A (en) 1991-02-22 1993-08-31 Harris Corporation Method of fabricating SOI wafer with SiGe as an etchback film in a BESOI process
US5243207A (en) 1991-03-15 1993-09-07 Texas Instruments Incorporated Method to integrate HBTs and FETs
US5091767A (en) 1991-03-18 1992-02-25 At&T Bell Laboratories Article comprising a lattice-mismatched semiconductor heterostructure
JPH04307974A (ja) 1991-04-05 1992-10-30 Sharp Corp 電気的消去可能不揮発性半導体記憶装置
US5442205A (en) 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
US5221413A (en) 1991-04-24 1993-06-22 At&T Bell Laboratories Method for making low defect density semiconductor heterostructure and devices made thereby
US5212112A (en) 1991-05-23 1993-05-18 At&T Bell Laboratories Selective epitaxy of silicon in silicon dioxide apertures with suppression of unwanted formation of facets
JPH07106446B2 (ja) 1991-05-31 1995-11-15 株式会社タムラ製作所 不活性ガスリフロー装置の雰囲気管理方法
CA2062134C (en) 1991-05-31 1997-03-25 Ibm Low Defect Densiry/Arbitrary Lattice Constant Heteroepitaxial Layers
JPH07187892A (ja) 1991-06-28 1995-07-25 Internatl Business Mach Corp <Ibm> シリコン及びその形成方法
US5166084A (en) 1991-09-03 1992-11-24 Motorola, Inc. Process for fabricating a silicon on insulator field effect transistor
US5291439A (en) 1991-09-12 1994-03-01 International Business Machines Corporation Semiconductor memory cell and memory array with inversion layer
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
US5208182A (en) 1991-11-12 1993-05-04 Kopin Corporation Dislocation density reduction in gallium arsenide on silicon heterostructures
US5254873A (en) * 1991-12-09 1993-10-19 Motorola, Inc. Trench structure having a germanium silicate region
JPH05166724A (ja) 1991-12-19 1993-07-02 Fujitsu Ltd シリコン基板化合物半導体装置とその製造方法
US5207864A (en) 1991-12-30 1993-05-04 Bell Communications Research Low-temperature fusion of dissimilar semiconductors
US5266813A (en) 1992-01-24 1993-11-30 International Business Machines Corporation Isolation technique for silicon germanium devices
JP3191972B2 (ja) 1992-01-31 2001-07-23 キヤノン株式会社 半導体基板の作製方法及び半導体基板
US5393375A (en) * 1992-02-03 1995-02-28 Cornell Research Foundation, Inc. Process for fabricating submicron single crystal electromechanical structures
US5467305A (en) 1992-03-12 1995-11-14 International Business Machines Corporation Three-dimensional direct-write EEPROM arrays and fabrication methods
US5426069A (en) 1992-04-09 1995-06-20 Dalsa Inc. Method for making silicon-germanium devices using germanium implantation
US5334861A (en) 1992-05-19 1994-08-02 Motorola Inc. Semiconductor memory cell
US5212110A (en) 1992-05-26 1993-05-18 Motorola, Inc. Method for forming isolation regions in a semiconductor device
JP3270945B2 (ja) 1992-06-04 2002-04-02 富士通株式会社 ヘテロエピタキシャル成長方法
US5242847A (en) 1992-07-27 1993-09-07 North Carolina State University At Raleigh Selective deposition of doped silion-germanium alloy on semiconductor substrate
US5461250A (en) 1992-08-10 1995-10-24 International Business Machines Corporation SiGe thin film or SOI MOSFET and method for making the same
JP3286921B2 (ja) 1992-10-09 2002-05-27 富士通株式会社 シリコン基板化合物半導体装置
JPH06140624A (ja) 1992-10-22 1994-05-20 Furukawa Electric Co Ltd:The ショットキー接合素子
US5386132A (en) 1992-11-02 1995-01-31 Wong; Chun C. D. Multimedia storage system with highly compact memory device
US5418743A (en) 1992-12-07 1995-05-23 Nippon Steel Corporation Method of writing into non-volatile semiconductor memory
US5523243A (en) * 1992-12-21 1996-06-04 International Business Machines Corporation Method of fabricating a triple heterojunction bipolar transistor
US5444302A (en) 1992-12-25 1995-08-22 Hitachi, Ltd. Semiconductor device including multi-layer conductive thin film of polycrystalline material
US5523592A (en) 1993-02-03 1996-06-04 Hitachi, Ltd. Semiconductor optical device, manufacturing method for the same, and opto-electronic integrated circuit using the same
JP3093904B2 (ja) 1993-02-16 2000-10-03 富士通株式会社 化合物半導体結晶の成長方法
US5346848A (en) 1993-06-01 1994-09-13 Motorola, Inc. Method of bonding silicon and III-V semiconductor materials
US5413679A (en) 1993-06-30 1995-05-09 The United States Of America As Represented By The Secretary Of The Navy Method of producing a silicon membrane using a silicon alloy etch stop layer
US5310451A (en) 1993-08-19 1994-05-10 International Business Machines Corporation Method of forming an ultra-uniform silicon-on-insulator layer
US5792679A (en) 1993-08-30 1998-08-11 Sharp Microelectronics Technology, Inc. Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant
JPH0794420A (ja) 1993-09-20 1995-04-07 Fujitsu Ltd 化合物半導体結晶基板の製造方法
US5461243A (en) 1993-10-29 1995-10-24 International Business Machines Corporation Substrate for tensilely strained semiconductor
JP2980497B2 (ja) 1993-11-15 1999-11-22 株式会社東芝 誘電体分離型バイポーラトランジスタの製造方法
CA2131668C (en) * 1993-12-23 1999-03-02 Carol Galli Isolation structure using liquid phase oxide deposition
JP3514500B2 (ja) 1994-01-28 2004-03-31 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP3902246B2 (ja) 1994-03-01 2007-04-04 昭和電工株式会社 エピタキシャルウェーハの製造方法
JP2669368B2 (ja) 1994-03-16 1997-10-27 日本電気株式会社 Ｓｉ基板上化合物半導体積層構造の製造方法
US5571373A (en) 1994-05-18 1996-11-05 Memc Electronic Materials, Inc. Method of rough polishing semiconductor wafers to reduce surface roughness
US5496771A (en) 1994-05-19 1996-03-05 International Business Machines Corporation Method of making overpass mask/insulator for local interconnects
US5534713A (en) 1994-05-20 1996-07-09 International Business Machines Corporation Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers
US5479033A (en) 1994-05-27 1995-12-26 Sandia Corporation Complementary junction heterostructure field-effect transistor
US6218677B1 (en) 1994-08-15 2001-04-17 Texas Instruments Incorporated III-V nitride resonant tunneling
CA2135508C (en) 1994-11-09 1998-11-03 Robert J. Lyn Method for forming solder balls on a semiconductor substrate
JP3361922B2 (ja) * 1994-09-13 2003-01-07 株式会社東芝 半導体装置
JP3761918B2 (ja) 1994-09-13 2006-03-29 株式会社東芝 半導体装置の製造方法
US5496750A (en) 1994-09-19 1996-03-05 Texas Instruments Incorporated Elevated source/drain junction metal oxide semiconductor field-effect transistor using blanket silicon deposition
US5561302A (en) 1994-09-26 1996-10-01 Motorola, Inc. Enhanced mobility MOSFET device and method
US5633202A (en) 1994-09-30 1997-05-27 Intel Corporation High tensile nitride layer
EP0799495A4 (en) 1994-11-10 1999-11-03 Lawrence Semiconductor Researc Silicon-germanium-carbon compositions and processes thereof
US5710450A (en) * 1994-12-23 1998-01-20 Intel Corporation Transistor with ultra shallow tip and method of fabrication
US5539214A (en) 1995-02-06 1996-07-23 Regents Of The University Of California Quantum bridges fabricated by selective etching of superlattice structures
US5777347A (en) 1995-03-07 1998-07-07 Hewlett-Packard Company Vertical CMOS digital multi-valued restoring logic device
US5624529A (en) * 1995-05-10 1997-04-29 Sandia Corporation Dry etching method for compound semiconductors
US5920088A (en) 1995-06-16 1999-07-06 Interuniversitair Micro-Electronica Centrum (Imec Vzw) Vertical MISFET devices
US5976939A (en) 1995-07-03 1999-11-02 Intel Corporation Low damage doping technique for self-aligned source and drain regions
JP3403877B2 (ja) 1995-10-25 2003-05-06 三菱電機株式会社 半導体記憶装置とその製造方法
US5714413A (en) 1995-12-11 1998-02-03 Intel Corporation Method of making a transistor having a deposited dual-layer spacer structure
EP0809865B1 (en) 1995-12-15 2000-07-12 Koninklijke Philips Electronics N.V. SEMICONDUCTOR FIELD EFFECT DEVICE COMPRISING A SiGe LAYER
FR2742924B1 (fr) 1995-12-22 1998-03-20 Jorge Luis Regolini Procede de depot selectif d'un siliciure de metal refractaire sur du silicium et plaquette de silicium metallisee par ce procede
JPH09205152A (ja) 1996-01-25 1997-08-05 Sony Corp ２層ゲート電極構造を有するｃｍｏｓ半導体装置及びその製造方法
JP3734559B2 (ja) 1996-03-15 2006-01-11 富士通株式会社 半導体装置の製造方法
US6403975B1 (en) 1996-04-09 2002-06-11 Max-Planck Gesellschaft Zur Forderung Der Wissenschafteneev Semiconductor components, in particular photodetectors, light emitting diodes, optical modulators and waveguides with multilayer structures grown on silicon substrates
US5943560A (en) 1996-04-19 1999-08-24 National Science Council Method to fabricate the thin film transistor
JP3217015B2 (ja) 1996-07-18 2001-10-09 インターナショナル・ビジネス・マシーンズ・コーポレーション 電界効果トランジスタの形成方法
JPH1041400A (ja) 1996-07-26 1998-02-13 Sony Corp 半導体装置およびその製造方法
US6191432B1 (en) * 1996-09-02 2001-02-20 Kabushiki Kaisha Toshiba Semiconductor device and memory device
TW335558B (en) 1996-09-03 1998-07-01 Ibm High temperature superconductivity in strained SiSiGe
US6399970B2 (en) * 1996-09-17 2002-06-04 Matsushita Electric Industrial Co., Ltd. FET having a Si/SiGeC heterojunction channel
US5847419A (en) * 1996-09-17 1998-12-08 Kabushiki Kaisha Toshiba Si-SiGe semiconductor device and method of fabricating the same
DE59707274D1 (de) 1996-09-27 2002-06-20 Infineon Technologies Ag Integrierte CMOS-Schaltungsanordnung und Verfahren zu deren Herstellung
JP3461274B2 (ja) 1996-10-16 2003-10-27 株式会社東芝 半導体装置
EP0845815A3 (en) 1996-11-28 1999-03-03 Matsushita Electric Industrial Co., Ltd. Semiconductor device, method of designing the same and semiconductor integrated circuit device
US5808344A (en) 1996-12-13 1998-09-15 International Business Machines Corporation Single-transistor logic and CMOS inverters
JPH10242081A (ja) 1996-12-26 1998-09-11 Sony Corp 半導体装置の製造方法
JPH10209293A (ja) 1997-01-22 1998-08-07 Sony Corp 半導体装置の製造方法
US20020019127A1 (en) 1997-02-14 2002-02-14 Micron Technology, Inc. Interconnect structure and method of making
US5714777A (en) 1997-02-19 1998-02-03 International Business Machines Corporation Si/SiGe vertical junction field effect transistor
JPH10270685A (ja) * 1997-03-27 1998-10-09 Sony Corp 電界効果トランジスタとその製造方法、半導体装置とその製造方法、その半導体装置を含む論理回路および半導体基板
EP0867701A1 (en) 1997-03-28 1998-09-30 Interuniversitair Microelektronica Centrum Vzw Method of fabrication of an infrared radiation detector and more particularly an infrared sensitive bolometer
US6030887A (en) 1998-02-26 2000-02-29 Memc Electronic Materials, Inc. Flattening process for epitaxial semiconductor wafers
US5891769A (en) 1997-04-07 1999-04-06 Motorola, Inc. Method for forming a semiconductor device having a heteroepitaxial layer
US5786614A (en) 1997-04-08 1998-07-28 Taiwan Semiconductor Manufacturing Co., Ltd. Separated floating gate for EEPROM application
US6191007B1 (en) 1997-04-28 2001-02-20 Denso Corporation Method for manufacturing a semiconductor substrate
US5906951A (en) 1997-04-30 1999-05-25 International Business Machines Corporation Strained Si/SiGe layers on insulator
US6033974A (en) 1997-05-12 2000-03-07 Silicon Genesis Corporation Method for controlled cleaving process
DE19720008A1 (de) 1997-05-13 1998-11-19 Siemens Ag Integrierte CMOS-Schaltungsanordnung und Verfahren zu deren Herstellung
US5877070A (en) 1997-05-31 1999-03-02 Max-Planck Society Method for the transfer of thin layers of monocrystalline material to a desirable substrate
US6373088B2 (en) 1997-06-16 2002-04-16 Texas Instruments Incorporated Edge stress reduction by noncoincident layers
EP1016129B2 (en) 1997-06-24 2009-06-10 Massachusetts Institute Of Technology Controlling threading dislocation densities using graded layers and planarization
FR2765395B1 (fr) 1997-06-30 1999-09-03 Sgs Thomson Microelectronics Procede de realisation de grille de transistors mos a forte teneur en germanium
US5936274A (en) 1997-07-08 1999-08-10 Micron Technology, Inc. High density flash memory
US6051511A (en) * 1997-07-31 2000-04-18 Micron Technology, Inc. Method and apparatus for reducing isolation stress in integrated circuits
US5933741A (en) 1997-08-18 1999-08-03 Vanguard International Semiconductor Corporation Method of making titanium silicide source/drains and tungsten silicide gate electrodes for field effect transistors
US5869359A (en) 1997-08-20 1999-02-09 Prabhakar; Venkatraman Process for forming silicon on insulator devices having elevated source and drain regions
US6160303A (en) 1997-08-29 2000-12-12 Texas Instruments Incorporated Monolithic inductor with guard rings
US6033995A (en) 1997-09-16 2000-03-07 Trw Inc. Inverted layer epitaxial liftoff process
US6242327B1 (en) 1997-09-19 2001-06-05 Fujitsu Limited Compound semiconductor device having a reduced source resistance
TW343364B (en) * 1997-09-26 1998-10-21 United Microelectronics Corp Process for producing twin gate oxide elements
US6316357B1 (en) 1997-10-08 2001-11-13 Industrial Technology Research Institute Method for forming metal silicide by laser irradiation
US5966622A (en) 1997-10-08 1999-10-12 Lucent Technologies Inc. Process for bonding crystalline substrates with different crystal lattices
US5963817A (en) 1997-10-16 1999-10-05 International Business Machines Corporation Bulk and strained silicon on insulator using local selective oxidation
US6232138B1 (en) 1997-12-01 2001-05-15 Massachusetts Institute Of Technology Relaxed InxGa(1-x)as buffers
US6154475A (en) 1997-12-04 2000-11-28 The United States Of America As Represented By The Secretary Of The Air Force Silicon-based strain-symmetrized GE-SI quantum lasers
JP3447939B2 (ja) 1997-12-10 2003-09-16 株式会社東芝 不揮発性半導体メモリ及びデータ読み出し方法
JP3059145B2 (ja) 1997-12-12 2000-07-04 松下電子工業株式会社 不揮発性半導体記憶装置およびその駆動方法
US6051478A (en) * 1997-12-18 2000-04-18 Advanced Micro Devices, Inc. Method of enhancing trench edge oxide quality
JP3519589B2 (ja) * 1997-12-24 2004-04-19 株式会社ルネサステクノロジ 半導体集積回路の製造方法
EP0926739A1 (en) 1997-12-24 1999-06-30 Texas Instruments Incorporated A structure of and method for forming a mis field effect transistor
FR2773177B1 (fr) 1997-12-29 2000-03-17 France Telecom Procede d'obtention d'une couche de germanium ou silicium monocristallin sur un substrat de silicium ou germanium monocristallin, respectivement, et produits multicouches obtenus
US6069091A (en) * 1997-12-29 2000-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. In-situ sequential silicon containing hard mask layer/silicon layer plasma etch method
US6121100A (en) 1997-12-31 2000-09-19 Intel Corporation Method of fabricating a MOS transistor with a raised source/drain extension
US6159852A (en) 1998-02-13 2000-12-12 Micron Technology, Inc. Method of depositing polysilicon, method of fabricating a field effect transistor, method of forming a contact to a substrate, method of forming a capacitor
US6013134A (en) 1998-02-18 2000-01-11 International Business Machines Corporation Advance integrated chemical vapor deposition (AICVD) for semiconductor devices
TW415103B (en) * 1998-03-02 2000-12-11 Ibm Si/SiGe optoelectronic integrated circuits
US6153495A (en) 1998-03-09 2000-11-28 Intersil Corporation Advanced methods for making semiconductor devices by low temperature direct bonding
US6245684B1 (en) * 1998-03-13 2001-06-12 Applied Materials, Inc. Method of obtaining a rounded top trench corner for semiconductor trench etch applications
WO1999053539A1 (en) 1998-04-10 1999-10-21 Massachusetts Institute Of Technology Silicon-germanium etch stop layer system
JP3219051B2 (ja) 1998-05-08 2001-10-15 日本電気株式会社 半導体装置の製造方法
JP4258034B2 (ja) 1998-05-27 2009-04-30 ソニー株式会社 半導体装置及び半導体装置の製造方法
US6245691B1 (en) * 1998-05-29 2001-06-12 Taiwan Semiconductor Manufacturing Company Ozone-teos method for forming with attenuated surface sensitivity a silicon oxide dielectric layer upon a thermally oxidized silicon substrate layer
US6372356B1 (en) 1998-06-04 2002-04-16 Xerox Corporation Compliant substrates for growing lattice mismatched films
US6207530B1 (en) * 1998-06-19 2001-03-27 International Business Machines Corporation Dual gate FET and process
US6291326B1 (en) 1998-06-23 2001-09-18 Silicon Genesis Corporation Pre-semiconductor process implant and post-process film separation
JP3403076B2 (ja) 1998-06-30 2003-05-06 株式会社東芝 半導体装置及びその製造方法
JP2000031491A (ja) 1998-07-14 2000-01-28 Hitachi Ltd 半導体装置，半導体装置の製造方法，半導体基板および半導体基板の製造方法
US6344375B1 (en) 1998-07-28 2002-02-05 Matsushita Electric Industrial Co., Ltd Substrate containing compound semiconductor, method for manufacturing the same and semiconductor device using the same
US6335546B1 (en) 1998-07-31 2002-01-01 Sharp Kabushiki Kaisha Nitride semiconductor structure, method for producing a nitride semiconductor structure, and light emitting device
US6368733B1 (en) 1998-08-06 2002-04-09 Showa Denko K.K. ELO semiconductor substrate
US6222218B1 (en) * 1998-09-14 2001-04-24 International Business Machines Corporation DRAM trench
US6326281B1 (en) 1998-09-23 2001-12-04 Texas Instruments Incorporated Integrated circuit isolation
JP2000124325A (ja) 1998-10-16 2000-04-28 Nec Corp 半導体装置およびその製造方法
US6239002B1 (en) * 1998-10-19 2001-05-29 Taiwan Semiconductor Manufacturing Company Thermal oxidizing method for forming with attenuated surface sensitivity ozone-teos silicon oxide dielectric layer upon a thermally oxidized silicon substrate layer
US6887762B1 (en) 1998-11-12 2005-05-03 Intel Corporation Method of fabricating a field effect transistor structure with abrupt source/drain junctions
JP2000174148A (ja) * 1998-12-09 2000-06-23 Mitsubishi Electric Corp 不揮発性半導体記憶装置およびその製造方法
US6329063B2 (en) 1998-12-11 2001-12-11 Nova Crystals, Inc. Method for producing high quality heteroepitaxial growth using stress engineering and innovative substrates
DE19859429A1 (de) 1998-12-22 2000-06-29 Daimler Chrysler Ag Verfahren zur Herstellung epitaktischer Silizium-Germaniumschichten
US6607948B1 (en) 1998-12-24 2003-08-19 Kabushiki Kaisha Toshiba Method of manufacturing a substrate using an SiGe layer
US6369438B1 (en) 1998-12-24 2002-04-09 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US6130453A (en) 1999-01-04 2000-10-10 International Business Machines Corporation Flash memory structure with floating gate in vertical trench
US6162688A (en) 1999-01-14 2000-12-19 Advanced Micro Devices, Inc. Method of fabricating a transistor with a dielectric underlayer and device incorporating same
DE60042666D1 (de) 1999-01-14 2009-09-17 Panasonic Corp Halbleiterbauelement und Verfahren zu dessen Herstellung
WO2000042231A2 (en) 1999-01-15 2000-07-20 The Regents Of The University Of California Polycrystalline silicon germanium films for forming micro-electromechanical systems
US6074919A (en) 1999-01-20 2000-06-13 Advanced Micro Devices, Inc. Method of forming an ultrathin gate dielectric
US6235568B1 (en) * 1999-01-22 2001-05-22 Intel Corporation Semiconductor device having deposited silicon regions and a method of fabrication
US6297128B1 (en) * 1999-01-29 2001-10-02 Vantis Corporation Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress
US6133124A (en) 1999-02-05 2000-10-17 Advanced Micro Devices, Inc. Device improvement by source to drain resistance lowering through undersilicidation
US20010042503A1 (en) 1999-02-10 2001-11-22 Lo Yu-Hwa Method for design of epitaxial layer and substrate structures for high-quality epitaxial growth on lattice-mismatched substrates
US6133799A (en) 1999-02-25 2000-10-17 International Business Machines Corporation Voltage controlled oscillator utilizing threshold voltage control of silicon on insulator MOSFETS
US6315384B1 (en) 1999-03-08 2001-11-13 Hewlett-Packard Company Thermal inkjet printhead and high-efficiency polycrystalline silicon resistor system for use therein
US6350993B1 (en) * 1999-03-12 2002-02-26 International Business Machines Corporation High speed composite p-channel Si/SiGe heterostructure for field effect devices
KR100441469B1 (ko) 1999-03-12 2004-07-23 인터내셔널 비지네스 머신즈 코포레이션 전계 효과 장치용 고속 게르마늄 채널 이종구조물
US6187657B1 (en) 1999-03-24 2001-02-13 Advanced Micro Devices, Inc. Dual material gate MOSFET technique
JP4521542B2 (ja) 1999-03-30 2010-08-11 ルネサスエレクトロニクス株式会社 半導体装置および半導体基板
US6103559A (en) 1999-03-30 2000-08-15 Amd, Inc. (Advanced Micro Devices) Method of making disposable channel masking for both source/drain and LDD implant and subsequent gate fabrication
IL145608A0 (en) * 1999-04-02 2002-06-30 Silicon Valley Group Thermal Improved trench isolation process to deposit a trench fill oxide prior to sidewall liner oxidation growth
US6429124B1 (en) 1999-04-14 2002-08-06 Micron Technology, Inc. Local interconnect structures for integrated circuits and methods for making the same
TW518637B (en) * 1999-04-15 2003-01-21 Semiconductor Energy Lab Electro-optical device and electronic equipment
US6251755B1 (en) 1999-04-22 2001-06-26 International Business Machines Corporation High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe
KR100396692B1 (ko) 1999-06-16 2003-09-02 주식회사 하이닉스반도체 반도체 소자의 제조방법
TW591132B (en) 1999-06-17 2004-06-11 Taiwan Semiconductor Mfg Method of growing SiGe epitaxy
DE60042045D1 (de) 1999-06-22 2009-06-04 Panasonic Corp Heteroübergangsbipolartransistoren und entsprechende Herstellungsverfahren
US6228694B1 (en) * 1999-06-28 2001-05-08 Intel Corporation Method of increasing the mobility of MOS transistors by use of localized stress regions
US6281532B1 (en) * 1999-06-28 2001-08-28 Intel Corporation Technique to obtain increased channel mobilities in NMOS transistors by gate electrode engineering
KR100332106B1 (ko) 1999-06-29 2002-04-10 박종섭 반도체 소자의 트랜지스터 제조 방법
KR100332108B1 (ko) 1999-06-29 2002-04-10 박종섭 반도체 소자의 트랜지스터 및 그 제조 방법
US6151248A (en) 1999-06-30 2000-11-21 Sandisk Corporation Dual floating gate EEPROM cell array with steering gates shared by adjacent cells
KR100301246B1 (ko) 1999-06-30 2001-11-01 박종섭 반도체 소자의 제조 방법
JP2001036054A (ja) 1999-07-19 2001-02-09 Mitsubishi Electric Corp Ｓｏｉ基板の製造方法
US6323108B1 (en) 1999-07-27 2001-11-27 The United States Of America As Represented By The Secretary Of The Navy Fabrication ultra-thin bonded semiconductor layers
US6242324B1 (en) 1999-08-10 2001-06-05 The United States Of America As Represented By The Secretary Of The Navy Method for fabricating singe crystal materials over CMOS devices
US6876053B1 (en) * 1999-08-13 2005-04-05 Intel Corporation Isolation structure configurations for modifying stresses in semiconductor devices
US6204529B1 (en) 1999-08-27 2001-03-20 Hsing Lan Lung 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate
US6235567B1 (en) 1999-08-31 2001-05-22 International Business Machines Corporation Silicon-germanium bicmos on soi
WO2001022482A1 (en) 1999-09-20 2001-03-29 Amberwave Systems Corporation Method of producing relaxed silicon germanium layers
US6339232B1 (en) 1999-09-20 2002-01-15 Kabushika Kaisha Toshiba Semiconductor device
KR100307636B1 (ko) 1999-10-07 2001-11-02 윤종용 올라간 구조의 소오스/드레인을 갖는 전계효과 트랜지스터 및 그 제조방법
US6249022B1 (en) 1999-10-22 2001-06-19 United Microelectronics Corp. Trench flash memory with nitride spacers for electron trapping
US6096647A (en) 1999-10-25 2000-08-01 Chartered Semiconductor Manufacturing Ltd. Method to form CoSi2 on shallow junction by Si implantation
US6287913B1 (en) 1999-10-26 2001-09-11 International Business Machines Corporation Double polysilicon process for providing single chip high performance logic and compact embedded memory structure
US6591321B1 (en) 1999-11-09 2003-07-08 International Business Machines Corporation Multiprocessor system bus protocol with group addresses, responses, and priorities
US6690043B1 (en) 1999-11-26 2004-02-10 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US7391087B2 (en) * 1999-12-30 2008-06-24 Intel Corporation MOS transistor structure and method of fabrication
US6214679B1 (en) 1999-12-30 2001-04-10 Intel Corporation Cobalt salicidation method on a silicon germanium film
KR100327596B1 (ko) 1999-12-31 2002-03-15 박종섭 Ｓｅｇ 공정을 이용한 반도체소자의 콘택 플러그 제조방법
US6352909B1 (en) 2000-01-06 2002-03-05 Silicon Wafer Technologies, Inc. Process for lift-off of a layer from a substrate
US6271726B1 (en) 2000-01-10 2001-08-07 Conexant Systems, Inc. Wideband, variable gain amplifier
US6294448B1 (en) 2000-01-18 2001-09-25 Taiwan Semiconductor Manufacturing Company Method to improve TiSix salicide formation
US6750130B1 (en) 2000-01-20 2004-06-15 Amberwave Systems Corporation Heterointegration of materials using deposition and bonding
US6602613B1 (en) 2000-01-20 2003-08-05 Amberwave Systems Corporation Heterointegration of materials using deposition and bonding
WO2001054202A1 (en) 2000-01-20 2001-07-26 Amberwave Systems Corporation Strained-silicon metal oxide semiconductor field effect transistors
US6261929B1 (en) 2000-02-24 2001-07-17 North Carolina State University Methods of forming a plurality of semiconductor layers using spaced trench arrays
US6498360B1 (en) 2000-02-29 2002-12-24 University Of Connecticut Coupled-well structure for transport channel in field effect transistors
JP2001244468A (ja) * 2000-03-02 2001-09-07 Sony Corp 半導体装置およびその製造方法
US6316301B1 (en) 2000-03-08 2001-11-13 Sun Microsystems, Inc. Method for sizing PMOS pull-up devices
US6483156B1 (en) * 2000-03-16 2002-11-19 International Business Machines Corporation Double planar gated SOI MOSFET structure
US6368931B1 (en) * 2000-03-27 2002-04-09 Intel Corporation Thin tensile layers in shallow trench isolation and method of making same
JP4698793B2 (ja) * 2000-04-03 2011-06-08 ルネサスエレクトロニクス株式会社 半導体装置
US6362071B1 (en) 2000-04-05 2002-03-26 Motorola, Inc. Method for forming a semiconductor device with an opening in a dielectric layer
US6306698B1 (en) 2000-04-25 2001-10-23 Advanced Micro Devices, Inc. Semiconductor device having metal silicide regions of differing thicknesses above the gate electrode and the source/drain regions, and method of making same
US6268257B1 (en) 2000-04-25 2001-07-31 Advanced Micro Devices, Inc. Method of forming a transistor having a low-resistance gate electrode
US6319799B1 (en) 2000-05-09 2001-11-20 Board Of Regents, The University Of Texas System High mobility heterojunction transistor and method
JP3603747B2 (ja) 2000-05-11 2004-12-22 三菱住友シリコン株式会社 ＳｉＧｅ膜の形成方法とヘテロ接合トランジスタの製造方法、及びヘテロ接合バイポーラトランジスタ
DE10025264A1 (de) 2000-05-22 2001-11-29 Max Planck Gesellschaft Feldeffekt-Transistor auf der Basis von eingebetteten Clusterstrukturen und Verfahren zu seiner Herstellung
JP2001338988A (ja) * 2000-05-25 2001-12-07 Hitachi Ltd 半導体装置及びその製造方法
WO2001093338A1 (en) 2000-05-26 2001-12-06 Amberwave Systems Corporation Buried channel strained silicon fet using an ion implanted doped layer
US6573160B2 (en) 2000-05-26 2003-06-03 Motorola, Inc. Method of recrystallizing an amorphous region of a semiconductor
US6313486B1 (en) 2000-06-15 2001-11-06 Board Of Regents, The University Of Texas System Floating gate transistor having buried strained silicon germanium channel layer
EP1295319A2 (en) 2000-06-22 2003-03-26 Massachusetts Institute Of Technology Etch stop layer system for sige devices
DE60118736T2 (de) 2000-06-23 2006-11-23 Submedia Llc. Anzeigevorrichtung mit animiert erscheinenden standbildern für sich bewegende betrachter
US6406986B1 (en) 2000-06-26 2002-06-18 Advanced Micro Devices, Inc. Fabrication of a wide metal silicide on a narrow polysilicon gate structure
US7503975B2 (en) 2000-06-27 2009-03-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method therefor
KR100407684B1 (ko) 2000-06-28 2003-12-01 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US6429061B1 (en) 2000-07-26 2002-08-06 International Business Machines Corporation Method to fabricate a strained Si CMOS structure using selective epitaxial deposition of Si after device isolation formation
US6583015B2 (en) 2000-08-07 2003-06-24 Amberwave Systems Corporation Gate technology for strained surface channel and strained buried channel MOSFET devices
US6573126B2 (en) 2000-08-16 2003-06-03 Massachusetts Institute Of Technology Process for producing semiconductor article using graded epitaxial growth
US6420937B1 (en) 2000-08-29 2002-07-16 Matsushita Electric Industrial Co., Ltd. Voltage controlled oscillator with power amplifier
JP2002076334A (ja) 2000-08-30 2002-03-15 Hitachi Ltd 半導体装置及びその製造方法
US6524935B1 (en) 2000-09-29 2003-02-25 International Business Machines Corporation Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique
JP3998408B2 (ja) 2000-09-29 2007-10-24 株式会社東芝 半導体装置及びその製造方法
US6503833B1 (en) 2000-11-15 2003-01-07 International Business Machines Corporation Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby
DE10056871B4 (de) 2000-11-16 2007-07-12 Advanced Micro Devices, Inc., Sunnyvale Feldeffekttransistor mit verbessertem Gatekontakt und Verfahren zur Herstellung desselben
KR100784603B1 (ko) * 2000-11-22 2007-12-11 가부시키가이샤 히타치세이사쿠쇼 반도체 장치 및 그 제조 방법
JP2002164520A (ja) 2000-11-27 2002-06-07 Shin Etsu Handotai Co Ltd 半導体ウェーハの製造方法
US7312485B2 (en) * 2000-11-29 2007-12-25 Intel Corporation CMOS fabrication process utilizing special transistor orientation
US20020100942A1 (en) 2000-12-04 2002-08-01 Fitzgerald Eugene A. CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
EP1399970A2 (en) 2000-12-04 2004-03-24 Amberwave Systems Corporation Cmos inverter circuits utilizing strained silicon surface channel mosfets
US6649480B2 (en) 2000-12-04 2003-11-18 Amberwave Systems Corporation Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
JP2003086708A (ja) 2000-12-08 2003-03-20 Hitachi Ltd 半導体装置及びその製造方法
JP3618319B2 (ja) * 2000-12-26 2005-02-09 松下電器産業株式会社 半導体装置及びその製造方法
WO2002052652A1 (en) * 2000-12-26 2002-07-04 Matsushita Electric Industrial Co., Ltd. Semiconductor device and its manufacturing method
US6563152B2 (en) * 2000-12-29 2003-05-13 Intel Corporation Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel
US6674102B2 (en) 2001-01-25 2004-01-06 International Business Machines Corporation Sti pull-down to control SiGe facet growth
US6774010B2 (en) 2001-01-25 2004-08-10 International Business Machines Corporation Transferable device-containing layer for silicon-on-insulator applications
US6653200B2 (en) * 2001-01-26 2003-11-25 Applied Materials, Inc. Trench fill process for reducing stress in shallow trench isolation
US6444578B1 (en) 2001-02-21 2002-09-03 International Business Machines Corporation Self-aligned silicide process for reduction of Si consumption in shallow junction and thin SOI electronic devices
US6410371B1 (en) 2001-02-26 2002-06-25 Advanced Micro Devices, Inc. Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer
US20020123180A1 (en) 2001-03-01 2002-09-05 Peter Rabkin Transistor and memory cell with ultra-short gate feature and method of fabricating the same
US6593641B1 (en) 2001-03-02 2003-07-15 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6723661B2 (en) 2001-03-02 2004-04-20 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6703688B1 (en) 2001-03-02 2004-03-09 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
JP2004531054A (ja) 2001-03-02 2004-10-07 アンバーウェーブ システムズ コーポレイション 高速ｃｍｏｓ電子機器及び高速アナログ回路のための緩和シリコンゲルマニウムプラットフォーム
WO2002071488A1 (en) 2001-03-02 2002-09-12 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits
US6900103B2 (en) 2001-03-02 2005-05-31 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6830976B2 (en) 2001-03-02 2004-12-14 Amberwave Systems Corproation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6724008B2 (en) 2001-03-02 2004-04-20 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6646322B2 (en) * 2001-03-02 2003-11-11 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
WO2002071491A1 (en) 2001-03-02 2002-09-12 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits
US6677192B1 (en) 2001-03-02 2004-01-13 Amberwave Systems Corporation Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits
DE10114243B4 (de) 2001-03-22 2004-07-29 Heraeus Kulzer Gmbh & Co. Kg Verfahren zur Herstellung einer Prothese sowie Prothesenwerkstoff und dessen Verwendung
JP2002289533A (ja) 2001-03-26 2002-10-04 Kentaro Sawano 半導体表面の研磨方法、半導体デバイスの製造方法および半導体デバイス
US6603156B2 (en) 2001-03-31 2003-08-05 International Business Machines Corporation Strained silicon on insulator structures
US6940089B2 (en) 2001-04-04 2005-09-06 Massachusetts Institute Of Technology Semiconductor device structure
JP4211236B2 (ja) 2001-04-25 2009-01-21 株式会社Ｓｕｍｃｏ 鉄シリサイドの成膜方法並びに半導体ウェーハ及び光半導体装置
US6555880B2 (en) 2001-06-07 2003-04-29 International Business Machines Corporation Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby
US20030049893A1 (en) * 2001-06-08 2003-03-13 Matthew Currie Method for isolating semiconductor devices
US6593625B2 (en) 2001-06-12 2003-07-15 International Business Machines Corporation Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
US6855649B2 (en) 2001-06-12 2005-02-15 International Business Machines Corporation Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
WO2002103760A2 (en) 2001-06-14 2002-12-27 Amberware Systems Corporation Method of selective removal of sige alloys
US6709929B2 (en) 2001-06-25 2004-03-23 North Carolina State University Methods of forming nano-scale electronic and optoelectronic devices using non-photolithographically defined nano-channel templates
US6717213B2 (en) 2001-06-29 2004-04-06 Intel Corporation Creation of high mobility channels in thin-body SOI devices
JP2004538634A (ja) 2001-08-06 2004-12-24 マサチューセッツ　インスティテュート　オブ　テクノロジー ひずみ層を有する半導体基板及びその形成方法
US6974735B2 (en) 2001-08-09 2005-12-13 Amberwave Systems Corporation Dual layer Semiconductor Devices
EP1428262A2 (en) * 2001-09-21 2004-06-16 Amberwave Systems Corporation Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
WO2003028106A2 (en) 2001-09-24 2003-04-03 Amberwave Systems Corporation Rf circuits including transistors having strained material layers
KR100455725B1 (ko) 2001-10-08 2004-11-12 주식회사 하이닉스반도체 반도체소자의 플러그 형성방법
JP3952735B2 (ja) 2001-10-25 2007-08-01 ソニー株式会社 半導体装置の製造方法
US6621131B2 (en) * 2001-11-01 2003-09-16 Intel Corporation Semiconductor transistor having a stressed channel
US6703271B2 (en) 2001-11-30 2004-03-09 Taiwan Semiconductor Manufacturing Company Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer
US6657276B1 (en) * 2001-12-10 2003-12-02 Advanced Micro Devices, Inc. Shallow trench isolation (STI) region with high-K liner and method of formation
US6624478B2 (en) 2002-01-30 2003-09-23 International Business Machines Corporation High mobility transistors in SOI and method for forming
US6583000B1 (en) * 2002-02-07 2003-06-24 Sharp Laboratories Of America, Inc. Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation
US6492216B1 (en) * 2002-02-07 2002-12-10 Taiwan Semiconductor Manufacturing Company Method of forming a transistor with a strained channel
US6649492B2 (en) 2002-02-11 2003-11-18 International Business Machines Corporation Strained Si based layer made by UHV-CVD, and devices therein
US6562703B1 (en) 2002-03-13 2003-05-13 Sharp Laboratories Of America, Inc. Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content
WO2003079415A2 (en) 2002-03-14 2003-09-25 Amberwave Systems Corporation Methods for fabricating strained layers on semiconductor substrates
JP2003273206A (ja) * 2002-03-18 2003-09-26 Fujitsu Ltd 半導体装置とその製造方法
US6605498B1 (en) * 2002-03-29 2003-08-12 Intel Corporation Semiconductor transistor having a backfilled channel material
US7494901B2 (en) 2002-04-05 2009-02-24 Microng Technology, Inc. Methods of forming semiconductor-on-insulator constructions
US6743651B2 (en) 2002-04-23 2004-06-01 International Business Machines Corporation Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen
JP2003347399A (ja) * 2002-05-23 2003-12-05 Sharp Corp 半導体基板の製造方法
US6995430B2 (en) 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US7615829B2 (en) 2002-06-07 2009-11-10 Amberwave Systems Corporation Elevated source and drain elements for strained-channel heterojuntion field-effect transistors
US20030227057A1 (en) 2002-06-07 2003-12-11 Lochtefeld Anthony J. Strained-semiconductor-on-insulator device structures
US7074623B2 (en) 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US6946371B2 (en) 2002-06-10 2005-09-20 Amberwave Systems Corporation Methods of fabricating semiconductor structures having epitaxially grown source and drain elements
US6764908B1 (en) * 2002-06-19 2004-07-20 Advanced Micro Devices, Inc. Narrow width CMOS devices fabricated on strained lattice semiconductor substrates with maximized NMOS and PMOS drive currents
US6887773B2 (en) 2002-06-19 2005-05-03 Luxtera, Inc. Methods of incorporating germanium within CMOS process
US6982474B2 (en) 2002-06-25 2006-01-03 Amberwave Systems Corporation Reacted conductive gate electrodes
FR2842349B1 (fr) 2002-07-09 2005-02-18 Transfert d'une couche mince a partir d'une plaquette comprenant une couche tampon
US7473947B2 (en) * 2002-07-12 2009-01-06 Intel Corporation Process for ultra-thin body SOI devices that incorporate EPI silicon tips and article made thereby
US6812086B2 (en) * 2002-07-16 2004-11-02 Intel Corporation Method of making a semiconductor transistor
US6828632B2 (en) 2002-07-18 2004-12-07 Micron Technology, Inc. Stable PD-SOI devices and methods
JP4368095B2 (ja) * 2002-08-21 2009-11-18 富士通マイクロエレクトロニクス株式会社 半導体装置及びその製造方法
US6699765B1 (en) 2002-08-29 2004-03-02 Micrel, Inc. Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
US6787864B2 (en) 2002-09-30 2004-09-07 Advanced Micro Devices, Inc. Mosfets incorporating nickel germanosilicided gate and methods for their formation
US6743684B2 (en) * 2002-10-11 2004-06-01 Texas Instruments Incorporated Method to produce localized halo for MOS transistor
US6657223B1 (en) * 2002-10-29 2003-12-02 Advanced Micro Devices, Inc. Strained silicon MOSFET having silicon source/drain regions and method for its fabrication
US6703648B1 (en) * 2002-10-29 2004-03-09 Advanced Micro Devices, Inc. Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication
US6855990B2 (en) 2002-11-26 2005-02-15 Taiwan Semiconductor Manufacturing Co., Ltd Strained-channel multiple-gate transistor
US6696348B1 (en) * 2002-12-09 2004-02-24 Advanced Micro Devices, Inc. Wide neck shallow trench isolation region to prevent strain relaxation at shallow trench isolation region edges
US6818938B1 (en) 2002-12-10 2004-11-16 National Semiconductor Corporation MOS transistor and method of forming the transistor with a channel region in a layer of composite material
US7012314B2 (en) 2002-12-18 2006-03-14 Agere Systems Inc. Semiconductor devices with reduced active region defects and unique contacting schemes
US20040119101A1 (en) * 2002-12-23 2004-06-24 Gerhard Schrom Contact layout for MOSFETs under tensile strain
US7122395B2 (en) 2002-12-23 2006-10-17 Motorola, Inc. Method of forming semiconductor devices through epitaxy
US6730576B1 (en) * 2002-12-31 2004-05-04 Advanced Micro Devices, Inc. Method of forming a thick strained silicon layer and semiconductor structures incorporating a thick strained silicon layer
US6825086B2 (en) * 2003-01-17 2004-11-30 Sharp Laboratories Of America, Inc. Strained-silicon channel CMOS with sacrificial shallow trench isolation oxide liner
US7001837B2 (en) * 2003-01-17 2006-02-21 Advanced Micro Devices, Inc. Semiconductor with tensile strained substrate and method of making the same
US6924181B2 (en) 2003-02-13 2005-08-02 Taiwan Semiconductor Manufacturing Co., Ltd Strained silicon layer semiconductor product employing strained insulator layer
US6921913B2 (en) * 2003-03-04 2005-07-26 Taiwan Semiconductor Manufacturing Co., Ltd. Strained-channel transistor structure with lattice-mismatched zone
US20040175893A1 (en) 2003-03-07 2004-09-09 Applied Materials, Inc. Apparatuses and methods for forming a substantially facet-free epitaxial film
US6955952B2 (en) 2003-03-07 2005-10-18 Taiwan Semiconductor Manufacturing Company, Ltd. Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement
US6909186B2 (en) 2003-05-01 2005-06-21 International Business Machines Corporation High performance FET devices and methods therefor
US6982433B2 (en) 2003-06-12 2006-01-03 Intel Corporation Gate-induced strain for MOS performance improvement
US6974733B2 (en) 2003-06-16 2005-12-13 Intel Corporation Double-gate transistor with enhanced carrier mobility
JP2005011915A (ja) 2003-06-18 2005-01-13 Hitachi Ltd 半導体装置、半導体回路モジュールおよびその製造方法
US20040262683A1 (en) 2003-06-27 2004-12-30 Bohr Mark T. PMOS transistor strain optimization with raised junction regions
US20050112048A1 (en) 2003-11-25 2005-05-26 Loucas Tsakalakos Elongated nano-structures and related devices
US6949482B2 (en) 2003-12-08 2005-09-27 Intel Corporation Method for improving transistor performance through reducing the salicide interface resistance
US6929992B1 (en) * 2003-12-17 2005-08-16 Advanced Micro Devices, Inc. Strained silicon MOSFETs having NMOS gates with work functions for compensating NMOS threshold voltage shift
WO2005116304A2 (en) 2004-04-23 2005-12-08 Asm America, Inc. In situ doped epitaxial films
US7172933B2 (en) 2004-06-10 2007-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Recessed polysilicon gate structure for a strained silicon MOSFET device
US7396743B2 (en) 2004-06-10 2008-07-08 Singh Kaushal K Low temperature epitaxial growth of silicon-containing films using UV radiation
US7495266B2 (en) 2004-06-16 2009-02-24 Massachusetts Institute Of Technology Strained silicon-on-silicon by wafer bonding and layer transfer
KR100642747B1 (ko) 2004-06-22 2006-11-10 삼성전자주식회사 Ｃｍｏｓ 트랜지스터의 제조방법 및 그에 의해 제조된ｃｍｏｓ 트랜지스터

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