CN102160145B - 通过外延层过成长的元件形成 - Google Patents

通过外延层过成长的元件形成 Download PDF

Info

Publication number
CN102160145B
CN102160145B CN2009801365471A CN200980136547A CN102160145B CN 102160145 B CN102160145 B CN 102160145B CN 2009801365471 A CN2009801365471 A CN 2009801365471A CN 200980136547 A CN200980136547 A CN 200980136547A CN 102160145 B CN102160145 B CN 102160145B
Authority
CN
China
Prior art keywords
rete
semi
conducting material
membrane layer
tertiary membrane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2009801365471A
Other languages
English (en)
Other versions
CN102160145A (zh
Inventor
詹姆斯·费兰札
安东尼·罗特费尔德
白杰
朴志洙
珍妮佛·海翠克
李继忠
陈志源
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Original Assignee
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Publication of CN102160145A publication Critical patent/CN102160145A/zh
Application granted granted Critical
Publication of CN102160145B publication Critical patent/CN102160145B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02461—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02543—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687—Multiple junction or tandem solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0687—Multiple junction or tandem solar cells
    • H01L31/06875—Multiple junction or tandem solar cells inverted grown metamorphic [IMM] multiple junction solar cells, e.g. III-V compounds inverted metamorphic multi-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H01L31/1808—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table including only Ge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1852—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising a growth substrate not being an AIIIBV compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/544—Solar cells from Group III-V materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Sustainable Energy (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Sustainable Development (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Photovoltaic Devices (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

本发明提供了用于通过使用深宽比捕捉(ART)与外延侧向成长(ELO)技术在包括如晶格失配材料的基板上形成如太阳能电池的装置的方法与结构。一般地，在一第一方面中，本发明的实施例可包括一种形成结构的方法。该方法包括在设置于包括一第一半导体材料的一基板上方的一掩模层内形成一第一开口。在该第一开口内形成包括晶格失配于该第一半导体材料的一第二半导体材料的一第一膜层。该第一膜层具有足够延伸至高于该掩模层的一顶面的一厚度。在该第一膜层上以及该掩模层的至少一部分上方形成包括该第二半导体材料的一第二膜层。该第一膜层的垂直成长速率高于该第一膜层的一侧向成长速率，而该第二膜层的一侧向成长速率高于该第二膜层的一垂直成长速率。

Description

通过外延层过成长的元件形成
相关申请案的交叉引用
本申请案主张2008年9月19日申请的编号US 61/098,597的标题为“Formation of Devices by Epitaxial layer Overgrowth”的美国临时申请案、2008年9月22日申请的编号US 61/099,074的标题为“Light Emitting DevicesFormed with Aspect Ration Trapping and Epitaxial Lateral Overgrowth”的美国专利申请案、以及2008年10月14日申请的编号US 61/104,466的标题为“Hybrid Applications Using Aspect-Ration Trapping，Epitaxial-layerOvergrowth，and Wafer Bonding”的美国申请案的优先权，且其全部内容援引参考于此，并主张其优先权日。
技术领域
本发明涉及包括半导体结晶材料的制作或结构。举例来说，可在包括一半导体结晶材料的一平坦化表面上形成经改善的外延成长情形或结构。
背景技术
本部分提供了背景信息并介绍了在下文中及/或在权利要求中所描述的关于本案多个方面的相关信息。这些背景的陈述并非承认其为现有技术。
进行基板图案化的相关技术利用了贯穿差排(threading dislocation)受到几何学限制的事实，即结晶物内的差排行为(dislocation)并不会停止。当通过图案化基板以形成更小的成长区域时将使得一自由边(free edge)更接近另一自由边，因而能够降低贯穿差排的密度。在过去技术中，基板的图案化以及外延侧向成长(epitaxial lateral overgrowth，ELO)技术的结合已证明了可极大地降低氮化镓装置(gallium nitride device)内的缺陷密度(defect densities)，从而制作出寿命更长的激光二极管(laser diodes)。上述处理工艺大体消除了在外延侧向成长ELO区域内的缺陷但留下了高度劣化的晶种窗(seed window)，因而需要重复(repetition)微影(lithography)与外延的步骤以消除所有缺陷。在一相似方法中，悬空外延(pendeo-epitaxy)技术大体消除了在邻近基板的外延区域内的所有缺陷，但其仍需要一次的微影步骤与两次的外延成长步骤。再者，上述两项技术需要提高氮化镓侧向成长速度，其在目前所有的异质外延系统(heteroepitaxial systems)中尚未得到验证。
称为“外延颈缩”的另一已知技术则为Langdo等人揭示于“High QualityGe on Si by Epitaxial Necking”，Applied Physics Letters，Vol.76，No.25，April2000.的文献所相关的位于硅上的锗的异质结构(Ge-on-Si heterostructure)的制作中。上述方法提供了通过利用选择性外延成长(selective epitaxial growth)与缺陷结晶学(defect crystallography)的结合的一简化处理，以使得缺陷仅抵达位于图案化掩模内的开口的侧壁，而上述方法不会依靠侧向成长速率的增加。更明确地，在(111)<110>钻石立方滑移系统(diamond cubic slip system)中，错配差排(misfit dislocations)沿着(100)成长平面的<110>方向而延伸，而贯穿片段(threading segments)以<110>方向产生在(111)平面上。位于(111)平面上沿着<110>方向的贯穿片段以相对于下方的硅(100)基板表面的45度角进行延伸。因此，当位于图案化掩模层内的孔洞的深宽比(aspect ratio)大于1时，贯穿片段会被掩模侧壁所阻挡，造成直接形成在硅之上的低缺陷的上方锗突出物(Ge nodules)。外延颈缩的重要限制之一为其所施行的区域的尺寸。一般来说，如下文中的更详细讨论中所述，在尺寸内的侧向尺寸需要相对较小，以使得上述差排可终止在侧壁处。
如此，该领域中便需要一种用于制作半导体异质结构(semiconductorheterostructure)的多功能且有效的方法，其可抑制位于不同晶格失配材料系统(lattic-mismatched materials systems)中的差排缺陷。且该领域中也需要一种利用具有较低差排缺陷程度的整合型晶格失配材料以改善功能性与性能的半导体装置。
发明内容
为了解决上述问题，本发明提供了用于通过使用深宽比捕捉(aspectration trapping，ART)与外延侧向成长(ELO)技术在包括如晶格失配材料的基板上形成如太阳能电池的装置的方法与结构。
一般地，在一第一方面中，本发明的实施例可包括一种形成结构的方法。该方法包括在设置于包括一第一半导体材料的一基板上的一掩模层内形成一第一开口。在该第一开口内形成包括晶格失配于该第一半导体材料的一第二半导体材料的一第一膜层。该第一膜层具有足够延伸至高于该掩模层的一顶面的一厚度。在该第一膜层之上以及该掩模层的至少一部分之上形成包括该第二半导体材料的一第二膜层。该第一膜层的垂直成长速率高于该第一膜层的一侧向成长速率，而该第二膜层的一侧向成长速率高于该第二膜层的一垂直成长速率。
上述方法可包括一个或多个下述特征。在形成该第一膜层之前，可在该掩模层中形成一第二开口，以及在形成该第二膜层之前，可在该第二开口内形成该第一膜层。在该第二膜层之上可形成包括该第二半导体材料的一第三膜层。该第三膜层可接合在该第一开口与该第二开口之间。
在该第一膜层内的差排缺陷可在该第一开口内而被捕捉到。可通过在形成该第一膜层时掺杂该第一膜层提高该第一膜层的该垂直成长速率。可通过在形成该第一膜层时掺杂该第一膜层减缓该第一膜层的该侧向成长速率。可在形成该第一膜层时通过调整用于该第一膜层的一顶面上形成晶面的成长参数降低该第一膜层的该侧向成长速率。降低该第二膜层的该垂直成长速率可包括在形成该第二膜层时掺杂该第二膜层。
降低该第二膜层的该垂直成长速率可包括在形成该第二膜层时掺杂该第二膜层以在该第二膜层内形成第一类型的晶面并抑制在该第二膜层内一第二类型的晶面的形成。增加该第二膜层的侧向成长速率可包括在形成该第二膜层时掺杂该第二膜层。在形成该第三膜层时掺杂该第三膜层可促进该第三膜层的接合。在形成该第三膜层时掺杂该第三膜层可促进该第一开口与该第二开口之间的该第三膜层的接合。
掺杂该第三膜层可减缓该第三膜层内的晶面成长并降低了在第三膜层内的堆叠错误的形成。该第二半导体材料可包括锗。该第二半导体材料可包括p型掺质。形成至少该第一、第二或第三膜层其中之一可包括外延成长。形成该第一膜层可包括使用四氯化锗作为一前趋物。上述方法还可包括在形成该第三膜层后移除该第三膜层的一顶部(top portion)以移除缺陷。上述方法还可包括在该顶部移除之后形成一光学装置在该第三膜层之上。该第一膜层的一顶部可定义了与该基板的一顶面不平行的一晶面。该第三膜层可自我平坦化。该第三膜层可通过主要地(primarily)在一(100)方向上成长该第三膜层而自我平坦化。
上述方法还可包括在该第三膜层的顶部形成一第四膜层，该第四膜层包括一第三半导体材料。在该第四膜层的顶部形成一第五膜层，该第五膜层包括一第四半导体材料。可将一握持晶片接合至该第五膜层且可移除该基板。该第三半导体材料与该第四半导体材料分别可包括III-V族材料。该基板可包括硅。该握持晶片可包括金属。该第三半导体材料的能隙可高于该第四半导体材料的能隙。该半导体结构可包括一多结(multi-junction)光电电池。
一般地，在另一方面中，本发明的实施例可提供一种结构的形成方法。此方法包括在设置于一基板上的一掩模层之内形成具有一宽度w1的一开口，该基板包括一第一半导体材料。在该开口内形成包括晶格失配于该第一半导体材料的一第二半导体材料的一第一膜层，该第一膜层垂直延伸至高于该掩模层的一顶面且侧向延伸至大于宽度w1的一宽度w2。移除该第一膜层的一部分，而该第一膜层的一剩余部分具有高于邻近于该开口的该基板的一第一区的一厚度t1。在该第一膜层上形成包括该第二半导体材料的一第二膜层，该第二膜层侧向延伸至大于宽度w2的一宽度w3。移除该第二膜层的一部分，该第二膜层的一剩余部分具有高于邻近于该开口的该基板的一第二区的一厚度t2。
上述方法还可包括一或多个下述特征。在多个实施例中，t1等于t2。移除该第一膜层的该部分可包括至少蚀刻或化学机械研磨其中之一。形成该第一膜层与移除该第一膜层的该部分的步骤可在不同机台中实施。形成该第一膜层与移除该第一膜层的该部分的步骤可在同一机台中实施。在该第二半导体材料内的差排缺陷在该开口内被捕捉到。高于该基板的表面的该第一膜层的一部分可基本上不具有差排缺陷。该第二半导体材料的一垂直成长速率可大于该第二半导体材料的一侧向成长速率。
该开口的一侧壁可包括一介电材料。外延成长可用作形成至少该第一材料与该第二材料其中之一。上述方法还可包括使用四氯化锗作为一前趋物形成该第一膜层，在形成该第二膜层之后移除该第二膜层的顶部，及/或在该第二膜层上形成一光电装置。该第一膜层的一顶部可定义了与该基板的一顶面不平行的一晶面。该第二膜层可自我平坦化。该第二膜层可通过主要地依照(100)方向成长该第二膜层而自我平坦化。
上述方法还可包括在该第二膜层的顶部形成一第三膜层，该第三膜层包括一第三半导体材料。可在该第三膜层的顶部形成一第四膜层，该第四膜层包括一第四半导体材料。可将一握持晶片接合至该第四膜层并移除该基板。该第三半导体材料与该第四半导体材料可包括III-V族材料，该基板可包括硅，以及该握持晶片可包括金属。该第三半导体材料的能隙可高于该第四半导体材料的能隙。上述半导体结构可包括一多结光电电池。
一般地，在又一方面中，本发明的实施例可包括一种形成膜层的方法。该方法包括在设置于一基板上的一掩模层内形成一第一开口。在该第一开口内形成包括立方半导体材料的第一膜层。在该第一膜层之上形成也包括该立方第一半导体材料的一第二膜层。该第一膜层的一垂直成长速率高于该第一膜层的一侧向成长速率，且该第二膜层的侧向成长速率高于该第二膜层的一垂直成长速率。
上述方法的实施例还可包括在形成该第一膜层之前，在该掩模层内形成一第二开口。在形成该第二膜层之前，可在该第二开口内形成一第一膜层。该第二膜层可接合在该第一开口与该第二开口之间。该掩模层可包括一介电材料。在该基板内的该第一开口可包括(110)晶面，且该基板可包括硅。上述方法还可包括在该第一开口内捕捉该第一膜层中的差排缺陷。该第二膜层的垂直成长速率的降低以及该第二膜层的该侧向成长速率的增加可包括改变成长条件。成长条件可包括0.1大气压和750℃。
上述立方半导体材料可包括锗、砷化镓、磷化铟或其他III-V族材料。该立方半导体材料可经过掺杂。在该第一膜层内的缺陷可在该开口内被捕捉。可在该第二膜层内形成一装置。该装置可为一光电装置。该第二膜层的一顶部可经过蚀刻。该第一膜层的一顶部可定义不平行于该基板的一顶面的一晶面。该第二膜层可自我平坦化。该第二膜层可通过主要地依照(100)方向成长该第二膜层而自我平坦化。
上述方法还包括形成一第三膜层在该第二膜层的顶部，该第三膜层包括一第三半导体材料。可形成一第四膜层在该第三膜层的顶部，该第四膜层包括一第四半导体材料。可将一握持晶片接合至该第四膜层并可移除该基板。该第三半导体材料与该第四半导体材料可包括III-V族材料，该基板可包括硅，而该握持晶片可包括金属。该第三半导体材料的能隙可高于该第四半导体材料的能隙。上述结构可包括一多结光电电池。
附图说明
本发明一般概念的这些及/或其他方面及效用可通过实施例的下述描述并结合附图而变得明显或更容易地被理解，其中：
图1为显示了利用在沟槽内使用深宽比捕捉技术(ART)并通过掺质的使用进行控制的外延侧向成长(ELO)的一剖面情形的图示；
图2为显示了利用具有在沟槽内使用深宽比捕捉技术(ART)重复移除与再成长膜层的外延侧向成长(ELO)的一剖面情形的图示；
图3为显示了利用在沟槽内使用深宽比捕捉技术(ART)的立方半导体材料的外延侧向成长(ELO)的剖面情形的图示；
图4为显示了使用深宽比捕捉(ART)与外延侧向成长(ELO)技术所形成的太阳能电池的剖面情形的图示；
图5a与图5b为显示了成长在锗的深宽比捕捉(ART)与外延侧向成长(ELO)基板上的反向型太阳能电池的剖面情形的图示。
具体实施方式
在2008年6月26日申请的编号第12/147,027号以及标题为“Multi-Junction Solar Cell”的美国专利申请案中详细描述了包括剥离(lift-off)技术的基本的深宽比捕捉(aspect ratio trapping，ART)处理。在2008年7月25日申请的编号第12/180,254号以及标题为“Lattice-mismatchedsemiconductor structures with reduced dislocation defect densities and relatedmethods for device fabrication”的美国专利申请案中则描述了使用ART技术以形成太阳能电池(solar cells)。
如图1所示，本发明的实施例应用了外延侧向成长(epitaxial lateralovergrowth，ELO)技术，其中该ELO可通过掺质的使用得到控制。其可通过使用晶面控制(control of faceting)以在晶片上施行外延侧向成长。晶面(faceting)则可通过如改变材料内的掺质程度、改变成长温度、改变成长压力、改变前趋物气体流率及/或改变前趋物的化学物组成而得到控制。晶面的较佳控制可具有至少两个目的：(i)为了于一既定垂直成长中增加外延侧向成长内的侧向成长，以及(ii)为了降低在接合(coalescence)时的堆叠错误(stackingfaults)或差排(dislocations)情形。在一实施例中，位于具(100)晶面的硅晶片上且形成在具(110)晶面的沟槽内的锗的晶面可通过公知晶面表现而得到控制。以上相同技术也可应用至其他材料或晶格方向的应用。以上所示出的实施例显示了在深宽比捕捉(ART)与外延侧向成长(ELO)技术的结合中的晶面控制应用，但上述技术亦可仅应用外延侧向成长中。
如图2所示，本发明的其他实施例的应用了具有膜层的重复移除与再成长的外延侧向成长。外延侧向成长为用于成长失配外延(mismatched epitaxy)的技术。最大侧向成长宽度可为薄膜的最大允许厚度所限制。侧向成长宽度可通过重复地薄化与再成长此薄膜而增加。上述的薄化与再成长步骤可在不同机台内施行，或可在相同机台内施行。此技术可使用深宽比捕捉(ART)或传统外延侧向成长(ELO)技术。
如图3所示，本发明的其他实施例提供用于立方半导体材料(cubicsemiconductor materials)的有效外延侧向成长的方法。GaN与其他III-N族半导体皆具有六方结晶(hexagonal crystal)结构。对于如锗(Ge)的立方半导体材料或如砷化镓(GaAs)或磷化铟(InP)的III-V族材料而言目前尚未发现有利于水平成长速率(GR水平)与垂直成长速率(GR垂直)间的高比率(GR水平/GR垂直)的条件。上述事实使得外延侧向成长的使用变得较为困难。可能的解决方案之一为选择性地控制垂直与水平成长速率。在一实施例处理中，可采用具(110)晶面的基板，例如为(110)晶面的硅。可在上述基板之上沉积一绝缘物并图案化之。例如，在传导给垂直成长和水平成长的成长条件下成长锗(Ge)或III-V族立方材料。接着，将参数切换为允许在<110>方向上几乎无成长但是在垂直于<110>方向的方向(如<111>方向)上有显著成长的成长条件。请参照Noborisaka等人于Applied Physics Letters 86 213102(2005)以及Noborisaka等人于Applied Physics Letters 87093109(2005)等文献的揭示情形。在此的关键是使用了具(110)晶面的基板。如此便实际上允许了由高GR垂直/GR水平改变至高GR水平/GR垂直，如此较有利于外延侧向成长的实施。
如图4所示，本发明的实施例包括了使用深宽比捕捉与外延侧向成长技术形成太阳能电池。图4显示了应用锗材料的深宽比捕捉与外延侧向成长(GeART+ELO)以替代传统多结结构中所使用的锗基板。在传统结构中，可在一锗晶片上成长GaAs p/n结以及InGaP p/n结。InGaP膜层的p/n结具有高能隙(1.8eV)且可收集最高能量的光线，而GaAs的p/n结(1.4eV)则具有一中阶能隙且可收集中能量的光线。在传统结构中，最低能量的光线则由形成在锗晶片的顶部上的锗的p/n结所收集。
当使用锗的深宽比捕捉与外延侧向成长技术(Ge ART+ELO)取代锗晶片时，传统结构的表现并不好。可能的两个原因如下。第一个原因是，传统结构所应用的锗电池可能太厚。锗的热膨胀系数(coefficient of thermalexpansion，CTE)远不同于硅的热膨胀系数CTE。锗的成长通常在成长温度中并未承受到应力，但是在其冷却后会承受到应力。故当锗成长至一过厚程度时，为了释放应力便可能在锗中形成破裂(cracks)。可导致破裂的上述厚度约介于5-10微米，其确切厚度则依据成长温度而定。在传统的多结结构中所应用的锗电池优选为至少20微米厚。优选上述厚度是由于锗的能隙(band-gap)为间接(indirect)的，故对于光而言锗并非为一极佳的吸收物。当所制作的锗电池太薄时，大多数的光线会穿透锗电池而没有为其所吸收，如此将降低电池效率。上述厚度的需求亦基于电流匹配(current matching)特性，即当锗电池太薄时，在电池底部所产生的电流可能低于其顶部处所产生的电流，进而降低了串连装置内的电流与其效率。
传统结构可能无法施行锗的深宽比捕捉与外延侧向成长技术的第二理由是由于这种结构中位于锗与硅基板之间的高电阻值。电流可能仅能通过连结于锗与硅之间的窄的沟槽而在锗与硅之间流通。而形成沟槽的氧化物阻挡了在其他路径中的电流传导情形。如此高电阻值将降低太阳能电池的效率。
图5a与图5b则描述了用于解决上述问题的可能方法。如图5a中所示，可在使用锗的深宽比捕捉与外延侧向成长技术的一锗基板上成长一反向型太阳能电池(inverse solar cell)。首先成长高能隙的InGaP，接着成长GaAs，且接着成长InGaAs。在GaAs与InGaAs之间可使用一GaInP缓冲层以调和GaAs与InGaAs间的晶格常数的差异。InGaAs材质的太阳能电池可具有极薄厚度，通常为2微米，由于InGaAs为直接能隙半导体，因此该太阳能电池可有效地吸收光线。在电池成长完毕之后，可反置此晶片且将之接合至导电的一握持晶片(handle wafer)。接着可通过选择性蚀刻移除使用锗的深宽比捕捉与外延侧向成长技术的锗基板。由于欲移除的硅基板远厚于不欲移除的化合物半导体太阳能电池部分，故优选非常精确地完成上述选择性蚀刻。此选择性蚀刻可通过使用如氢氧化钾(KOH)的选择性极佳的湿蚀刻(其可快速地蚀刻硅但却非常缓慢地蚀刻锗)而完成。而薄氧化物与由深宽比捕捉与外延侧向成长技术所形成的锗膜层则可接着在另一步骤中移除，且在此步骤中由于这些膜层相对于化合物半导体太阳能电池来说并不厚，故其挑战性并不高。
参照图5b的显示情形，在反向型太阳能电池方法中可极佳地解决前述两个问题。可吸收低能量光线的InGaAs太阳能电池够薄，故可成长于使用锗的深宽比捕捉与外延侧向成长技术的锗基板上而不会造成破裂情形。而握持晶片则提供了用于太阳能电池电流的一低电阻值路径。

Claims (44)

1.一种形成结构的方法，包括：
在设置于一基板上的一掩模层中形成一第一开口，其中该基板包括一第一半导体材料；
在该第一开口内形成包括晶格失配于该第一半导体材料的一第二半导体材料的一第一膜层，该第一膜层具有足够延伸至高于该掩模层的一顶面的一厚度；以及
在该第一膜层之上以及该掩模层的至少一部分上形成包括该第二半导体材料的一第二膜层，
其中该第一膜层的垂直成长速率高于该第一膜层的一侧向成长速率，而该第二膜层的一侧向成长速率高于该第二膜层的一垂直成长速率。
2.如权利要求1所述的方法，还包括：
在形成该第一膜层之前，在该掩模层中形成一第二开口；
在形成该第二膜层之前，在该第二开口内形成该第一膜层；以及
在该第二膜层之上形成包括该第二半导体材料的一第三膜层，
其中该第三膜层接合在该第一开口与该第二开口之间。
3.如权利要求2所述的方法，其中在该第一开口内捕捉该第一膜层中的差排缺陷。
4.如权利要求2所述的方法，其中通过在形成该第一膜层时掺杂该第一膜层而增加该第一膜层的该垂直成长速率。
5.如权利要求2所述的方法，其中通过在形成该第一膜层时掺杂该第一膜层而降低该第一膜层的侧向成长速率。
6.如权利要求2所述的方法，其中通过在形成该第一膜层时调整用于该第一膜层的一顶面上形成晶面的成长参数而降低该第一膜层的该侧向成长速率。
7.如权利要求2所述的方法，其中降低该第二膜层的该垂直成长速率包括在形成该第二膜层时掺杂该第二膜层。
8.如权利要求7所述的方法，其中降低该第二膜层的该垂直成长速率包括在形成该第二膜层时掺杂该第二膜层以在该第二膜层内形成第一类型的晶面并抑制在该第二膜层内一第二类型的晶面的形成。
9.如权利要求2所述的方法，其中增加该第二膜层的侧向成长速率包括在形成该第二膜层时掺杂该第二膜层。
10.如权利要求2所述的方法，其中通过在形成该第三膜层时掺杂该第三膜层促进该第三膜层的接合。
11.如权利要求2所述的方法，其中通过在形成该第三膜层时掺杂该第三膜层促进该第一开口与该第二开口之间的该第三膜层的接合。
12.如权利要求11所述的方法，其中掺杂该第三膜层减缓了该第三膜层内的晶面成长且降低了在第三膜层内的堆叠错误的形成。
13.如权利要求2所述的方法，其中该第二半导体材料包括锗。
14.如权利要求13所述的方法，其中该第二半导体材料包括p型掺质。
15.如权利要求2所述的方法，其中形成至少该第一、第二或第三膜层其中之一包括外延成长。
16.如权利要求2所述的方法，其中形成该第一膜层包括使用四氯化锗作为一前趋物。
17.如权利要求2所述的方法，还包括在形成该第三膜层后移除该第三膜层的一顶部以移除缺陷。
18.如权利要求17所述的方法，还包括在该顶部移除之后形成一光电装置在该第三膜层之上。
19.如权利要求2所述的方法，其中该第一膜层的一顶部定义了与该基板的一顶面不平行的一晶面。
20.如权利要求2所述的方法，其中该第三膜层为自我平坦化。
21.如权利要求20所述的方法，其中通过主要地在一(100)方向上成长该第三膜层而自我平坦化该第三膜层。
22.如权利要求2所述的方法，还包括：
在该第三膜层的顶部形成一第四膜层，该第四膜层包括一第三半导体材料；
在该第四膜层的顶部形成一第五膜层，该第五膜层包括一第四半导体材料；
接合该第五膜层与一握持晶片；以及
移除该基板。
23.如权利要求22所述的方法，其中该第三半导体材料与该第四半导体材料分别包括III-V族材料。
24.如权利要求22所述的方法，其中该基板包括硅。
25.如权利要求22所述的方法，其中该握持晶片包括金属。
26.如权利要求22所述的方法，其中该第三半导体材料的能隙高于该第四半导体材料的能隙。
27.如权利要求22所述的方法，其中该结构包括一多结光电电池。
28.一种形成结构的方法，包括：
在设置于一基板上的一掩模层中形成具有一宽度w1的一开口，该基板包括一第一半导体材料；
在该开口内形成包括晶格失配于该第一半导体材料的一第二半导体材料的一第一膜层，该第一膜层垂直延伸至高于该掩模层的一顶面且侧向延伸至大于该宽度w1的一宽度w2；
移除该第一膜层的一部分，而该第一膜层的一剩余部分具有高于邻近于该开口的该基板的一第一区的一厚度t1；
在该第一膜层上形成包括该第二半导体材料的一第二膜层，该第二膜层侧向延伸至大于该宽度w2的一宽度w3；以及
移除该第二膜层的一部分，该第二膜层的一剩余部分具有高于邻近于该开口的该基板的一第二区的一厚度t2。
29.如权利要求28所述的方法，其中t1等于t2。
30.如权利要求28所述的方法，其中移除该第一膜层包括至少蚀刻或化学机械研磨其中之一。
31.如权利要求28所述的方法，其中形成该第一膜层与移除该第一膜层的步骤在不同机台中所实施。
32.如权利要求28所述的方法，其中形成该第一膜层与移除该第一膜层的步骤在同一机台中所实施。
33.如权利要求28所述的方法，其中在该开口内捕捉该第二半导体材料中的差排缺陷。
34.如权利要求28所述的方法，其中高于该基板的该表面的该第一膜层的一部分大体不具有差排缺陷。
35.如权利要求28所述的方法，其中该第二半导体材料的一垂直成长速率大于该第二半导体材料的一侧向成长速率。
36.如权利要求28所述的方法，其中该开口的一侧壁包括一介电材料。
37.如权利要求28所述的方法，其中形成至少该第一膜层与该第二膜层其中之一为使用外延成长。
38.如权利要求28所述的方法，还包括使用四氯化锗作为一前趋物以形成该第一膜层。
39.如权利要求28所述的方法，还包括在形成该第二膜层之后移除该第二膜层的顶部。
40.如权利要求28所述的方法，还包括在该第二膜层上形成一光电装置。
41.如权利要求28所述的方法，其中该第一膜层的一顶部定义了与该基板的一顶面不平行的一晶面。
42.如权利要求28所述的方法，其中该第二膜层为自我平坦化。
43.如权利要求28所述的方法，其中通过主要地依照（100）方向成长该第二膜层而自我平坦化该第二膜层。
44.如权利要求28所述的方法，还包括：
在该第二膜层的顶部形成一第三膜层，该第三膜层包括一第三半导体材料；
在该第三膜层的顶部形成一第四膜层，该第四膜层包括一第四半导体材料；
接合该第四膜层与一握持晶片；以及
移除该基板。
CN2009801365471A 2008-09-19 2009-09-18 通过外延层过成长的元件形成 Active CN102160145B (zh)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US9859708P 2008-09-19 2008-09-19
US61/098,597 2008-09-19
US9907408P 2008-09-22 2008-09-22
US61/099,074 2008-09-22
US10446608P 2008-10-10 2008-10-10
US61/104,466 2008-10-10
PCT/US2009/057493 WO2010033813A2 (en) 2008-09-19 2009-09-18 Formation of devices by epitaxial layer overgrowth

Publications (2)

Publication Number Publication Date
CN102160145A CN102160145A (zh) 2011-08-17
CN102160145B true CN102160145B (zh) 2013-08-21

Family

ID=42040161

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009801365471A Active CN102160145B (zh) 2008-09-19 2009-09-18 通过外延层过成长的元件形成

Country Status (6)

Country Link
US (3) US8034697B2 (zh)
EP (2) EP2335273A4 (zh)
JP (1) JP5416212B2 (zh)
KR (1) KR101216541B1 (zh)
CN (1) CN102160145B (zh)
WO (1) WO2010033813A2 (zh)

Families Citing this family (66)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US7777250B2 (en) 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
EP2062290B1 (en) 2006-09-07 2019-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Defect reduction using aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
US8502263B2 (en) 2006-10-19 2013-08-06 Taiwan Semiconductor Manufacturing Company, Ltd. Light-emitter-based devices with lattice-mismatched semiconductor structures
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
WO2008124154A2 (en) 2007-04-09 2008-10-16 Amberwave Systems Corporation Photovoltaics on silicon
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
DE112008002387B4 (de) 2007-09-07 2022-04-07 Taiwan Semiconductor Manufacturing Co., Ltd. Struktur einer Mehrfachübergangs-Solarzelle, Verfahren zur Bildung einer photonischenVorrichtung, Photovoltaische Mehrfachübergangs-Zelle und Photovoltaische Mehrfachübergangs-Zellenvorrichtung,
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
JP5416212B2 (ja) 2008-09-19 2014-02-12 台湾積體電路製造股▲ふん▼有限公司 エピタキシャル層の成長によるデバイス形成
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
CN102379046B (zh) 2009-04-02 2015-06-17 台湾积体电路制造股份有限公司 从晶体材料的非极性平面形成的器件及其制作方法
US9484197B2 (en) * 2009-10-23 2016-11-01 The Royal Institution For The Advancement Of Learning/Mcgill University Lateral growth semiconductor method and devices
TWI562195B (en) 2010-04-27 2016-12-11 Pilegrowth Tech S R L Dislocation and stress management by mask-less processes using substrate patterning and methods for device fabrication
KR101278117B1 (ko) * 2010-05-20 2013-06-24 아주대학교산학협력단 다중접합 태양전지 및 그 제작방법
US8604330B1 (en) 2010-12-06 2013-12-10 4Power, Llc High-efficiency solar-cell arrays with integrated devices and methods for forming them
CN102790006B (zh) * 2011-05-17 2014-09-17 中国科学院微电子研究所 半导体结构及其制作方法
US8383485B2 (en) 2011-07-13 2013-02-26 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial process for forming semiconductor devices
US8481341B2 (en) * 2011-11-05 2013-07-09 Tokyo Electron Limited Epitaxial film growth in retrograde wells for semiconductor devices
CN102534768B (zh) * 2012-02-14 2015-03-11 中国科学院半导体研究所 制备硅基砷化镓材料的方法
US9476143B2 (en) 2012-02-15 2016-10-25 Imec Methods using mask structures for substantially defect-free epitaxial growth
US9142400B1 (en) 2012-07-17 2015-09-22 Stc.Unm Method of making a heteroepitaxial layer on a seed area
US8878251B2 (en) * 2012-10-17 2014-11-04 Seoul National University R&Db Foundation Silicon-compatible compound junctionless field effect transistor
KR102083495B1 (ko) 2013-01-07 2020-03-02 삼성전자 주식회사 Ｃｍｏｓ 소자와 이를 포함하는 광학장치와 그 제조방법
WO2014140082A1 (en) 2013-03-13 2014-09-18 Pilegrowth Tech S.R.L. High efficiency solar cells on silicon substrates
US8916445B1 (en) 2013-08-16 2014-12-23 International Business Machines Corporation Semiconductor devices and methods of manufacture
EP2849219A1 (en) 2013-09-11 2015-03-18 IMEC vzw Method for manufacturing transistors and associated substrate
US9064699B2 (en) 2013-09-30 2015-06-23 Samsung Electronics Co., Ltd. Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methods
KR101464086B1 (ko) * 2013-10-18 2014-11-25 희성전자 주식회사 다중접합 화합물 태양전지 구조
WO2015100245A1 (en) 2013-12-23 2015-07-02 University Of Houston System Flexible single-crystalline semiconductor device and fabrication methods thereof
US9177967B2 (en) 2013-12-24 2015-11-03 Intel Corporation Heterogeneous semiconductor material integration techniques
KR102168969B1 (ko) 2014-02-28 2020-10-22 삼성전자주식회사 반도체 장치 및 그 제조 방법
US9287115B2 (en) 2014-03-12 2016-03-15 International Business Machines Corporation Planar III-V field effect transistor (FET) on dielectric layer
KR102176646B1 (ko) 2014-03-28 2020-11-09 인텔 코포레이션 트랜지스터들에서의 변형 보상
FR3023058B1 (fr) * 2014-06-30 2017-09-29 Commissariat Energie Atomique Procede de realisation d'un dispositif microelectronique
GB201415119D0 (en) 2014-08-27 2014-10-08 Ibm Method for fabricating a semiconductor structure
US9711683B2 (en) * 2014-09-26 2017-07-18 Epistar Corporation Semiconductor device and the method of manufacturing the same
US9349808B2 (en) 2014-09-29 2016-05-24 International Business Machines Corporation Double aspect ratio trapping
KR102284657B1 (ko) * 2015-01-05 2021-08-02 삼성전자 주식회사 포토 다이오드 및 이를 포함하는 광통신 시스템
US9564373B2 (en) 2015-02-27 2017-02-07 International Business Machines Corporation Forming a CMOS with dual strained channels
US9401583B1 (en) 2015-03-30 2016-07-26 International Business Machines Corporation Laser structure on silicon using aspect ratio trapping growth
US9583599B2 (en) 2015-04-22 2017-02-28 International Business Machines Corporation Forming a fin using double trench epitaxy
US9633908B2 (en) 2015-06-16 2017-04-25 International Business Machines Corporation Method for forming a semiconductor structure containing high mobility semiconductor channel materials
US9917414B2 (en) 2015-07-15 2018-03-13 International Business Machines Corporation Monolithic nanophotonic device on a semiconductor substrate
CN106784127B (zh) * 2015-11-20 2019-02-01 北京创昱科技有限公司 一种双结薄膜太阳能电池组件及其制作方法
US9704958B1 (en) * 2015-12-18 2017-07-11 International Business Machines Corporation III-V field effect transistor on a dielectric layer
KR102430501B1 (ko) 2015-12-29 2022-08-09 삼성전자주식회사 반도체 단결정구조, 반도체 디바이스 및 그 제조방법
US9997475B2 (en) 2016-01-13 2018-06-12 International Business Machines Corporation Monolithic integration of III-V cells for powering memory erasure devices
FR3047354B1 (fr) * 2016-01-29 2018-05-18 Commissariat A L'energie Atomique Et Aux Energies Alternatives Cellule photovoltaique et procede de fabrication d'une cellule photovoltaique
US9564452B1 (en) 2016-02-01 2017-02-07 International Business Machines Corporation Fabrication of hybrid semiconductor circuits
US9704757B1 (en) 2016-02-25 2017-07-11 International Business Machines Corporation Fabrication of semiconductor structures
US9735010B1 (en) 2016-05-27 2017-08-15 International Business Machines Corporation Fabrication of semiconductor fin structures
US10249492B2 (en) 2016-05-27 2019-04-02 International Business Machines Corporation Fabrication of compound semiconductor structures
EP3506000B1 (en) * 2017-12-29 2020-10-07 IMEC vzw Iii-v semiconductor waveguide nanoridge structure
US10978632B2 (en) 2019-01-18 2021-04-13 Microsoft Technology Licensing, Llc Fabrication of a device
US10777728B2 (en) 2019-01-18 2020-09-15 Microsoft Technology Licensing, Llc Fabrication of a quantum device
US11742203B2 (en) 2020-02-26 2023-08-29 The Hong Kong University Of Science And Technology Method for growing III-V compound semiconductor thin films on silicon-on-insulators
TW202341251A (zh) * 2022-01-27 2023-10-16 日商京瓷股份有限公司 半導體基板之製造方法及製造裝置、以及控制裝置
WO2024158874A2 (en) * 2023-01-24 2024-08-02 The Regents Of The University Of Michigan Ferroelectric iii-nitride layer thickness scaling

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1607641A (zh) * 1997-10-20 2005-04-20 卢米洛格股份有限公司 氮化镓外延层的制造方法
WO2006125040A2 (en) * 2005-05-17 2006-11-23 Amberwave Systems Corporation Lattice-mismatched semiconductor structures with reduced dislocation defect densities related methods for device fabrication
CN101086969A (zh) * 2006-06-09 2007-12-12 三星电子株式会社 制造底栅型薄膜晶体管的方法
WO2008030574A1 (en) * 2006-09-07 2008-03-13 Amberwave Systems Corporation Defect reduction using aspect ratio trapping

Family Cites Families (399)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US660928A (en) * 1900-03-30 1900-10-30 Star And Crescent Mills Company Heddle mechanism for looms.
US4307510A (en) 1980-03-12 1981-12-29 The United States Of America As Represented By The Administrator Of The National Aeronautics & Space Administration Computer circuit card puller
DE3176676D1 (en) 1980-04-10 1988-04-07 Massachusetts Inst Technology Methods of producing sheets of crystalline material and devices amde therefrom
US4322253A (en) 1980-04-30 1982-03-30 Rca Corporation Method of making selective crystalline silicon regions containing entrapped hydrogen by laser treatment
US4370510A (en) 1980-09-26 1983-01-25 California Institute Of Technology Gallium arsenide single crystal solar cell structure and method of making
US4651179A (en) 1983-01-21 1987-03-17 Rca Corporation Low resistance gallium arsenide field effect transistor
US4545109A (en) 1983-01-21 1985-10-08 Rca Corporation Method of making a gallium arsenide field effect transistor
US5091333A (en) 1983-09-12 1992-02-25 Massachusetts Institute Of Technology Reducing dislocations in semiconductors utilizing repeated thermal cycling during multistage epitaxial growth
US4860081A (en) 1984-06-28 1989-08-22 Gte Laboratories Incorporated Semiconductor integrated circuit structure with insulative partitions
US4551394A (en) 1984-11-26 1985-11-05 Honeywell Inc. Integrated three-dimensional localized epitaxial growth of Si with localized overgrowth of GaAs
EP0214610B1 (en) 1985-09-03 1990-12-05 Daido Tokushuko Kabushiki Kaisha Epitaxial gallium arsenide semiconductor wafer and method of producing the same
US4774205A (en) 1986-06-13 1988-09-27 Massachusetts Institute Of Technology Monolithic integration of silicon and gallium arsenide devices
JPS6381855A (ja) 1986-09-25 1988-04-12 Mitsubishi Electric Corp ヘテロ接合バイポ−ラトランジスタの製造方法
US5236546A (en) 1987-01-26 1993-08-17 Canon Kabushiki Kaisha Process for producing crystal article
US5269876A (en) 1987-01-26 1993-12-14 Canon Kabushiki Kaisha Process for producing crystal article
US5281283A (en) 1987-03-26 1994-01-25 Canon Kabushiki Kaisha Group III-V compound crystal article using selective epitaxial growth
US5166767A (en) 1987-04-14 1992-11-24 National Semiconductor Corporation Sidewall contact bipolar transistor with controlled lateral spread of selectively grown epitaxial layer
US4876210A (en) 1987-04-30 1989-10-24 The University Of Delaware Solution growth of lattice mismatched and solubility mismatched heterostructures
US4826784A (en) 1987-11-13 1989-05-02 Kopin Corporation Selective OMCVD growth of compound semiconductor materials on silicon substrates
US5079616A (en) 1988-02-11 1992-01-07 Gte Laboratories Incorporated Semiconductor structure
US5272105A (en) 1988-02-11 1993-12-21 Gte Laboratories Incorporated Method of manufacturing an heteroepitaxial semiconductor structure
GB2215514A (en) 1988-03-04 1989-09-20 Plessey Co Plc Terminating dislocations in semiconductor epitaxial layers
US5156995A (en) 1988-04-01 1992-10-20 Cornell Research Foundation, Inc. Method for reducing or eliminating interface defects in mismatched semiconductor epilayers
US5032893A (en) 1988-04-01 1991-07-16 Cornell Research Foundation, Inc. Method for reducing or eliminating interface defects in mismatched semiconductor eiplayers
US5238869A (en) 1988-07-25 1993-08-24 Texas Instruments Incorporated Method of forming an epitaxial layer on a heterointerface
EP0352472A3 (en) 1988-07-25 1991-02-06 Texas Instruments Incorporated Heteroepitaxy of lattice-mismatched semiconductor materials
JPH0262090A (ja) 1988-08-29 1990-03-01 Matsushita Electric Ind Co Ltd 光半導体装置の製造方法
US5061644A (en) 1988-12-22 1991-10-29 Honeywell Inc. Method for fabricating self-aligned semiconductor devices
EP0380815B1 (en) 1989-01-31 1994-05-25 Agfa-Gevaert N.V. Integration of GaAs on Si substrate
US5034337A (en) 1989-02-10 1991-07-23 Texas Instruments Incorporated Method of making an integrated circuit that combines multi-epitaxial power transistors with logic/analog devices
US4948456A (en) 1989-06-09 1990-08-14 Delco Electronics Corporation Confined lateral selective epitaxial growth
US5098850A (en) 1989-06-16 1992-03-24 Canon Kabushiki Kaisha Process for producing substrate for selective crystal growth, selective crystal growth process and process for producing solar battery by use of them
US5256594A (en) 1989-06-16 1993-10-26 Intel Corporation Masking technique for depositing gallium arsenide on silicon
US5093699A (en) 1990-03-12 1992-03-03 Texas A & M University System Gate adjusted resonant tunnel diode device and method of manufacture
US5164359A (en) 1990-04-20 1992-11-17 Eaton Corporation Monolithic integrated circuit having compound semiconductor layer epitaxially grown on ceramic substrate
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
US5105247A (en) 1990-08-03 1992-04-14 Cavanaugh Marion E Quantum field effect device with source extension region formed under a gate and between the source and drain regions
JP3202223B2 (ja) 1990-11-27 2001-08-27 日本電気株式会社 トランジスタの製造方法
US5403751A (en) 1990-11-29 1995-04-04 Canon Kabushiki Kaisha Process for producing a thin silicon solar cell
US5223043A (en) 1991-02-11 1993-06-29 The United States Of America As Represented By The United States Department Of Energy Current-matched high-efficiency, multijunction monolithic solar cells
US5091767A (en) 1991-03-18 1992-02-25 At&T Bell Laboratories Article comprising a lattice-mismatched semiconductor heterostructure
JPH04299569A (ja) 1991-03-27 1992-10-22 Nec Corp Ｓｏｉｓの製造方法及びトランジスタとその製造方法
US5269852A (en) 1991-05-27 1993-12-14 Canon Kabushiki Kaisha Crystalline solar cell and method for producing the same
JP3058954B2 (ja) 1991-09-24 2000-07-04 ローム株式会社 絶縁層の上に成長層を有する半導体装置の製造方法
JP2773487B2 (ja) 1991-10-15 1998-07-09 日本電気株式会社 トンネルトランジスタ
JPH05121317A (ja) 1991-10-24 1993-05-18 Rohm Co Ltd Ｓｏｉ構造形成方法
JP3286920B2 (ja) 1992-07-10 2002-05-27 富士通株式会社 半導体装置の製造方法
EP0600276B1 (de) 1992-12-04 1998-08-05 Siemens Aktiengesellschaft Verfahren zur Herstellung eines seitlich begrenzten, einkristallinen Gebietes mittels selektiver Epitaxie und dessen Anwendung zur Herstellung eines Bipolartransistors sowie eines MOS-transistors
JP3319472B2 (ja) 1992-12-07 2002-09-03 富士通株式会社 半導体装置とその製造方法
US5295150A (en) 1992-12-11 1994-03-15 Eastman Kodak Company Distributed feedback-channeled substrate planar semiconductor laser
US5407491A (en) 1993-04-08 1995-04-18 University Of Houston Tandem solar cell with improved tunnel junction
DE69406049T2 (de) 1993-06-04 1998-04-16 Sharp Kk Lichtmittierende Halbleitervorrichtung mit einer dritten Begrenzungsschicht
JP3748905B2 (ja) 1993-08-27 2006-02-22 三洋電機株式会社 量子効果デバイス
US5792679A (en) 1993-08-30 1998-08-11 Sharp Microelectronics Technology, Inc. Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant
US5461243A (en) 1993-10-29 1995-10-24 International Business Machines Corporation Substrate for tensilely strained semiconductor
US5405453A (en) 1993-11-08 1995-04-11 Applied Solar Energy Corporation High efficiency multi-junction solar cell
US5489539A (en) 1994-01-10 1996-02-06 Hughes Aircraft Company Method of making quantum well structure with self-aligned gate
JPH07230952A (ja) 1994-02-16 1995-08-29 Ricoh Co Ltd 再結晶化方法
JPH0851109A (ja) 1994-04-11 1996-02-20 Texas Instr Inc <Ti> 酸化物でパターン化されたウェーハの窓内にエピタキシャルシリコンを成長させる方法
US6011271A (en) 1994-04-28 2000-01-04 Fujitsu Limited Semiconductor device and method of fabricating the same
US5710436A (en) 1994-09-27 1998-01-20 Kabushiki Kaisha Toshiba Quantum effect device
US5825240A (en) 1994-11-30 1998-10-20 Massachusetts Institute Of Technology Resonant-tunneling transmission line technology
JP3835225B2 (ja) 1995-02-23 2006-10-18 日亜化学工業株式会社 窒化物半導体発光素子
JPH08306700A (ja) 1995-04-27 1996-11-22 Nec Corp 半導体装置及びその製造方法
US5528209A (en) 1995-04-27 1996-06-18 Hughes Aircraft Company Monolithic microwave integrated circuit and method
TW304310B (zh) 1995-05-31 1997-05-01 Siemens Ag
US5621227A (en) 1995-07-18 1997-04-15 Discovery Semiconductors, Inc. Method and apparatus for monolithic optoelectronic integrated circuit using selective epitaxy
JPH11500873A (ja) 1995-12-15 1999-01-19 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ ＳｉＧｅ層を具えた半導体電界効果デバイス
TW314621B (zh) 1995-12-20 1997-09-01 Toshiba Co Ltd
US5987590A (en) 1996-04-02 1999-11-16 Texas Instruments Incorporated PC circuits, systems and methods
US6121542A (en) 1996-05-17 2000-09-19 Canon Kabushiki Kaisha Photovoltaic device
JP3719618B2 (ja) 1996-06-17 2005-11-24 松下電器産業株式会社 半導体装置及びその製造方法
US6229153B1 (en) 1996-06-21 2001-05-08 Wisconsin Alumni Research Corporation High peak current density resonant tunneling diode
JP3260660B2 (ja) 1996-08-22 2002-02-25 株式会社東芝 半導体装置およびその製造方法
JP3449516B2 (ja) 1996-08-30 2003-09-22 株式会社リコー 半導体多層膜反射鏡および半導体多層膜反射防止膜および面発光型半導体レーザおよび受光素子
US6191432B1 (en) 1996-09-02 2001-02-20 Kabushiki Kaisha Toshiba Semiconductor device and memory device
US5825049A (en) 1996-10-09 1998-10-20 Sandia Corporation Resonant tunneling device with two-dimensional quantum well emitter and base layers
JPH10126010A (ja) 1996-10-23 1998-05-15 Ricoh Co Ltd 半導体レーザ装置の製造方法
SG65697A1 (en) 1996-11-15 1999-06-22 Canon Kk Process for producing semiconductor article
US5853497A (en) 1996-12-12 1998-12-29 Hughes Electronics Corporation High efficiency multi-junction solar cells
US6348096B1 (en) 1997-03-13 2002-02-19 Nec Corporation Method for manufacturing group III-V compound semiconductors
JP3853905B2 (ja) 1997-03-18 2006-12-06 株式会社東芝 量子効果装置とｂｌトンネル素子を用いた装置
EP0874405A3 (en) 1997-03-25 2004-09-15 Mitsubishi Cable Industries, Ltd. GaN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof
JP3184115B2 (ja) 1997-04-11 2001-07-09 松下電器産業株式会社 オーミック電極形成方法
JP3047852B2 (ja) 1997-04-04 2000-06-05 松下電器産業株式会社 半導体装置
CN1131548C (zh) 1997-04-04 2003-12-17 松下电器产业株式会社 半导体装置
ATE550461T1 (de) 1997-04-11 2012-04-15 Nichia Corp Wachstumsmethode für einen nitrid-halbleiter
US5998781A (en) 1997-04-30 1999-12-07 Sandia Corporation Apparatus for millimeter-wave signal generation
US5903170A (en) 1997-06-03 1999-05-11 The Regents Of The University Of Michigan Digital logic design using negative differential resistance diodes and field-effect transistors
US5883549A (en) 1997-06-20 1999-03-16 Hughes Electronics Corporation Bipolar junction transistor (BJT)--resonant tunneling diode (RTD) oscillator circuit and method
KR100400808B1 (ko) 1997-06-24 2003-10-08 매사츄세츠 인스티튜트 오브 테크놀러지 그레이드된 ＧｅＳｉ층 및 평탄화를 사용한 Ｓｉ상의 Ｇｅ의 쓰레딩 전위 밀도 제어
US5869845A (en) 1997-06-26 1999-02-09 Texas Instruments Incorporated Resonant tunneling memory
JP3930161B2 (ja) 1997-08-29 2007-06-13 株式会社東芝 窒化物系半導体素子、発光素子及びその製造方法
US6015979A (en) 1997-08-29 2000-01-18 Kabushiki Kaisha Toshiba Nitride-based semiconductor element and method for manufacturing the same
EP1036412A1 (en) 1997-09-16 2000-09-20 Massachusetts Institute Of Technology CO-PLANAR Si AND Ge COMPOSITE SUBSTRATE AND METHOD OF PRODUCING SAME
JP5065625B2 (ja) * 1997-10-30 2012-11-07 住友電気工業株式会社 ＧａＮ単結晶基板の製造方法
EP1041610B1 (en) 1997-10-30 2010-12-15 Sumitomo Electric Industries, Ltd. GaN SINGLE CRYSTALLINE SUBSTRATE AND METHOD OF PRODUCING THE SAME
JP3180743B2 (ja) 1997-11-17 2001-06-25 日本電気株式会社 窒化化合物半導体発光素子およびその製法
JP3468082B2 (ja) 1998-02-26 2003-11-17 日亜化学工業株式会社 窒化物半導体素子
US6150242A (en) 1998-03-25 2000-11-21 Texas Instruments Incorporated Method of growing crystalline silicon overlayers on thin amorphous silicon oxide layers and forming by method a resonant tunneling diode
JPH11274467A (ja) 1998-03-26 1999-10-08 Murata Mfg Co Ltd 光電子集積回路素子
US6500257B1 (en) 1998-04-17 2002-12-31 Agilent Technologies, Inc. Epitaxial material grown laterally within a trench and method for producing same
JP3338778B2 (ja) 1998-04-24 2002-10-28 日本電気株式会社 窒化物系化合物半導体レーザ素子
US6265289B1 (en) 1998-06-10 2001-07-24 North Carolina State University Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby
TW417315B (en) * 1998-06-18 2001-01-01 Sumitomo Electric Industries GaN single crystal substrate and its manufacture method of the same
JP4005701B2 (ja) 1998-06-24 2007-11-14 シャープ株式会社 窒素化合物半導体膜の形成方法および窒素化合物半導体素子
KR100580307B1 (ko) 1998-07-14 2006-05-16 후지쯔 가부시끼가이샤 반도체 레이저 및 반도체 장치
KR100648759B1 (ko) 1998-09-10 2006-11-23 로무 가부시키가이샤 반도체발광소자 및 그 제조방법
US6252261B1 (en) 1998-09-30 2001-06-26 Nec Corporation GaN crystal film, a group III element nitride semiconductor wafer and a manufacturing process therefor
US6255198B1 (en) * 1998-11-24 2001-07-03 North Carolina State University Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby
JP3868136B2 (ja) 1999-01-20 2007-01-17 日亜化学工業株式会社 窒化ガリウム系化合物半導体発光素子
JP3372226B2 (ja) 1999-02-10 2003-01-27 日亜化学工業株式会社 窒化物半導体レーザ素子
US7145167B1 (en) 2000-03-11 2006-12-05 International Business Machines Corporation High speed Ge channel heterostructures for field effect devices
JP3760663B2 (ja) 1999-03-31 2006-03-29 豊田合成株式会社 Ｉｉｉ族窒化物系化合物半導体素子の製造方法
JP3702700B2 (ja) 1999-03-31 2005-10-05 豊田合成株式会社 Ｉｉｉ族窒化物系化合物半導体素子及びその製造方法
DE10017137A1 (de) 1999-04-14 2000-10-26 Siemens Ag Silizium-Aufbau und Verfahren zu dessen Herstellung
US6803598B1 (en) 1999-05-07 2004-10-12 University Of Delaware Si-based resonant interband tunneling diodes and method of making interband tunneling diodes
JP3587081B2 (ja) 1999-05-10 2004-11-10 豊田合成株式会社 Ｉｉｉ族窒化物半導体の製造方法及びｉｉｉ族窒化物半導体発光素子
JP4246400B2 (ja) 1999-05-13 2009-04-02 株式会社日立製作所 半導体記憶装置
US6252287B1 (en) 1999-05-19 2001-06-26 Sandia Corporation InGaAsN/GaAs heterojunction for multi-junction solar cells
JP3555500B2 (ja) 1999-05-21 2004-08-18 豊田合成株式会社 Ｉｉｉ族窒化物半導体及びその製造方法
GB9912178D0 (en) 1999-05-25 1999-07-28 Univ Court Of The University O Improved optical modulator
US6214653B1 (en) 1999-06-04 2001-04-10 International Business Machines Corporation Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate
JP2001007447A (ja) 1999-06-18 2001-01-12 Nichia Chem Ind Ltd 窒化物半導体レーザ素子
EP1192646B1 (en) 1999-06-25 2008-08-13 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
US6228691B1 (en) 1999-06-30 2001-05-08 Intel Corp. Silicon-on-insulator devices and method for producing the same
GB9919479D0 (en) 1999-08-17 1999-10-20 Imperial College Island arrays
US6339232B1 (en) 1999-09-20 2002-01-15 Kabushika Kaisha Toshiba Semiconductor device
JP2001102678A (ja) 1999-09-29 2001-04-13 Toshiba Corp 窒化ガリウム系化合物半導体素子
US6984571B1 (en) 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6812053B1 (en) * 1999-10-14 2004-11-02 Cree, Inc. Single step pendeo- and lateral epitaxial overgrowth of Group III-nitride epitaxial layers with Group III-nitride buffer layer and resulting structures
JP2001189483A (ja) 1999-10-18 2001-07-10 Sharp Corp バイパス機能付太陽電池セルおよびバイパス機能付き多接合積層型太陽電池セルおよびそれらの製造方法
EP1102327B1 (en) 1999-11-15 2007-10-03 Matsushita Electric Industrial Co., Ltd. Field effect semiconductor device
US6521514B1 (en) 1999-11-17 2003-02-18 North Carolina State University Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates
JP2001176805A (ja) 1999-12-16 2001-06-29 Sony Corp 窒化物系ｉｉｉ−ｖ族化合物の結晶製造方法、窒化物系ｉｉｉ−ｖ族化合物結晶基板、窒化物系ｉｉｉ−ｖ族化合物結晶膜およびデバイスの製造方法
US6403451B1 (en) 2000-02-09 2002-06-11 Noerh Carolina State University Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts
CA2398801C (en) 2000-02-11 2007-12-04 Novo Rps Ulc Stent delivery system and method of use
US6902987B1 (en) 2000-02-16 2005-06-07 Ziptronix, Inc. Method for low temperature bonding and bonded structure
JP3512701B2 (ja) 2000-03-10 2004-03-31 株式会社東芝 半導体装置及びその製造方法
TW504754B (en) 2000-03-24 2002-10-01 Sumitomo Chemical Co Group III-V compound semiconductor and method of producing the same
US20050184302A1 (en) 2000-04-04 2005-08-25 Toshimasa Kobayashi Nitride semiconductor device and method of manufacturing the same
US6362071B1 (en) 2000-04-05 2002-03-26 Motorola, Inc. Method for forming a semiconductor device with an opening in a dielectric layer
JP2001338988A (ja) 2000-05-25 2001-12-07 Hitachi Ltd 半導体装置及びその製造方法
US6627974B2 (en) * 2000-06-19 2003-09-30 Nichia Corporation Nitride semiconductor substrate and method for manufacturing the same, and nitride semiconductor device using nitride semiconductor substrate
US6841808B2 (en) 2000-06-23 2005-01-11 Toyoda Gosei Co., Ltd. Group III nitride compound semiconductor device and method for producing the same
US20020008234A1 (en) 2000-06-28 2002-01-24 Motorola, Inc. Mixed-signal semiconductor structure, device including the structure, and methods of forming the device and the structure
US20020030246A1 (en) 2000-06-28 2002-03-14 Motorola, Inc. Structure and method for fabricating semiconductor structures and devices not lattice matched to the substrate
US7906229B2 (en) * 2007-03-08 2011-03-15 Amit Goyal Semiconductor-based, large-area, flexible, electronic devices
AU2001277001A1 (en) 2000-07-24 2002-02-05 Motorola, Inc. Heterojunction tunneling diodes and process for fabricating same
US20020011612A1 (en) 2000-07-31 2002-01-31 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
JP2002118255A (ja) 2000-07-31 2002-04-19 Toshiba Corp 半導体装置およびその製造方法
JP4269541B2 (ja) 2000-08-01 2009-05-27 株式会社Ｓｕｍｃｏ 半導体基板と電界効果型トランジスタ並びにＳｉＧｅ層の形成方法及びこれを用いた歪みＳｉ層の形成方法と電界効果型トランジスタの製造方法
US6579463B1 (en) 2000-08-18 2003-06-17 The Regents Of The University Of Colorado Tunable nanomasks for pattern transfer and nanocluster array formation
US20060175601A1 (en) 2000-08-22 2006-08-10 President And Fellows Of Harvard College Nanoscale wires and related devices
US7301199B2 (en) 2000-08-22 2007-11-27 President And Fellows Of Harvard College Nanoscale wires and related devices
US6407425B1 (en) 2000-09-21 2002-06-18 Texas Instruments Incorporated Programmable neuron MOSFET on SOI
US6456214B1 (en) 2000-09-27 2002-09-24 Raytheon Company High-speed comparator utilizing resonant tunneling diodes and associated method
JP4044276B2 (ja) 2000-09-28 2008-02-06 株式会社東芝 半導体装置及びその製造方法
US7163864B1 (en) 2000-10-18 2007-01-16 International Business Machines Corporation Method of fabricating semiconductor side wall fin
US6720090B2 (en) 2001-01-02 2004-04-13 Eastman Kodak Company Organic light emitting diode devices with improved luminance efficiency
US6594293B1 (en) * 2001-02-08 2003-07-15 Amberwave Systems Corporation Relaxed InxGa1-xAs layers integrated with Si
DE60233386D1 (de) 2001-02-14 2009-10-01 Toyoda Gosei Kk Verfahren zur herstellung von halbleiterkristallen und halbleiter-leuchtelementen
JP4084541B2 (ja) 2001-02-14 2008-04-30 豊田合成株式会社 半導体結晶及び半導体発光素子の製造方法
JP4084544B2 (ja) 2001-03-30 2008-04-30 豊田合成株式会社 半導体基板及び半導体素子の製造方法
US6380590B1 (en) 2001-02-22 2002-04-30 Advanced Micro Devices, Inc. SOI chip having multiple threshold voltage MOSFETs by using multiple channel materials and method of fabricating same
US6475869B1 (en) 2001-02-26 2002-11-05 Advanced Micro Devices, Inc. Method of forming a double gate transistor having an epitaxial silicon/germanium channel region
JP3679720B2 (ja) 2001-02-27 2005-08-03 三洋電機株式会社 窒化物系半導体素子および窒化物系半導体の形成方法
JP2002270516A (ja) * 2001-03-07 2002-09-20 Nec Corp Ｉｉｉ族窒化物半導体の成長方法、ｉｉｉ族窒化物半導体膜およびそれを用いた半導体素子
US7205604B2 (en) 2001-03-13 2007-04-17 International Business Machines Corporation Ultra scalable high speed heterojunction vertical n-channel MISFETs and methods thereof
JP3705142B2 (ja) 2001-03-27 2005-10-12 ソニー株式会社 窒化物半導体素子及びその作製方法
KR20040000418A (ko) 2001-03-30 2004-01-03 더 리전트 오브 더 유니버시티 오브 캘리포니아 나노구조체 및 나노와이어의 제조 방법 및 그로부터제조되는 디바이스
JP3956637B2 (ja) 2001-04-12 2007-08-08 ソニー株式会社 窒化物半導体の結晶成長方法及び半導体素子の形成方法
GB0110112D0 (en) 2001-04-25 2001-06-20 Univ Glasgow Improved optoelectronic device
GB0111207D0 (en) 2001-05-08 2001-06-27 Btg Int Ltd A method to produce germanium layers
US6784074B2 (en) 2001-05-09 2004-08-31 Nsc-Nanosemiconductor Gmbh Defect-free semiconductor templates for epitaxial growth and method of making same
JP3819730B2 (ja) 2001-05-11 2006-09-13 三洋電機株式会社 窒化物系半導体素子および窒化物半導体の形成方法
US20020168802A1 (en) 2001-05-14 2002-11-14 Hsu Sheng Teng SiGe/SOI CMOS and method of making the same
US7358578B2 (en) 2001-05-22 2008-04-15 Renesas Technology Corporation Field effect transistor on a substrate with (111) orientation having zirconium oxide gate insulation and cobalt or nickel silicide wiring
CN1259734C (zh) 2001-06-13 2006-06-14 松下电器产业株式会社 氮化物半导体、其制造方法以及氮化物半导体元件
JP3515974B2 (ja) 2001-06-13 2004-04-05 松下電器産業株式会社 窒化物半導体、その製造方法及び窒化物半導体素子
US6566284B2 (en) 2001-08-07 2003-05-20 Hrl Laboratories, Llc Method of manufacture for 80 nanometer diameter resonant tunneling diode with improved peak-to-valley ratio and resonant tunneling diode therefrom
JP3785970B2 (ja) 2001-09-03 2006-06-14 日本電気株式会社 Ｉｉｉ族窒化物半導体素子の製造方法
JP2003077847A (ja) 2001-09-06 2003-03-14 Sumitomo Chem Co Ltd ３−５族化合物半導体の製造方法
JP2003163370A (ja) 2001-09-11 2003-06-06 Toyoda Gosei Co Ltd 半導体結晶の製造方法
TW544930B (en) 2001-09-11 2003-08-01 Toyoda Gosei Kk Method for producing semiconductor crystal
US7105865B2 (en) 2001-09-19 2006-09-12 Sumitomo Electric Industries, Ltd. AlxInyGa1−x−yN mixture crystal substrate
US6689650B2 (en) 2001-09-27 2004-02-10 International Business Machines Corporation Fin field effect transistor with self-aligned gate
US20030064535A1 (en) 2001-09-28 2003-04-03 Kub Francis J. Method of manufacturing a semiconductor device having a thin GaN material directly bonded to an optimized substrate
US6710368B2 (en) 2001-10-01 2004-03-23 Ken Scott Fisher Quantum tunneling transistor
US20030070707A1 (en) 2001-10-12 2003-04-17 King Richard Roland Wide-bandgap, lattice-mismatched window layer for a solar energy conversion device
JP2003142728A (ja) 2001-11-02 2003-05-16 Sharp Corp 半導体発光素子の製造方法
JP2003152220A (ja) 2001-11-15 2003-05-23 Sharp Corp 半導体発光素子の製造方法および半導体発光素子
US6835246B2 (en) 2001-11-16 2004-12-28 Saleem H. Zaidi Nanostructures for hetero-expitaxial growth on silicon substrates
US6576532B1 (en) * 2001-11-30 2003-06-10 Motorola Inc. Semiconductor device and method therefor
JP4284188B2 (ja) 2001-12-20 2009-06-24 パナソニック株式会社 窒化物系半導体基板の製造方法および窒化物系半導体装置の製造方法
EP2105977B1 (en) 2002-01-28 2014-06-25 Nichia Corporation Nitride semiconductor element with supporting substrate and method for producing nitride semiconductor element
KR100458288B1 (ko) 2002-01-30 2004-11-26 한국과학기술원 이중-게이트 ＦｉｎＦＥＴ 소자 및 그 제조방법
US7411233B2 (en) 2002-08-27 2008-08-12 E-Phocus, Inc Photoconductor-on-active-pixel (POAP) sensor utilizing a multi-layered radiation absorbing structure
US6492216B1 (en) 2002-02-07 2002-12-10 Taiwan Semiconductor Manufacturing Company Method of forming a transistor with a strained channel
JP3782021B2 (ja) 2002-02-22 2006-06-07 株式会社東芝 半導体装置、半導体装置の製造方法、半導体基板の製造方法
US20070137698A1 (en) 2002-02-27 2007-06-21 Wanlass Mark W Monolithic photovoltaic energy conversion device
JP4092927B2 (ja) 2002-02-28 2008-05-28 豊田合成株式会社 Ｉｉｉ族窒化物系化合物半導体、ｉｉｉ族窒化物系化合物半導体素子及びｉｉｉ族窒化物系化合物半導体基板の製造方法
US6635909B2 (en) 2002-03-19 2003-10-21 International Business Machines Corporation Strained fin FETs structure and method
WO2003089696A1 (en) 2002-04-15 2003-10-30 The Regents Of The University Of California Dislocation reduction in non-polar gallium nitride thin films
US7208393B2 (en) 2002-04-15 2007-04-24 The Regents Of The University Of California Growth of planar reduced dislocation density m-plane gallium nitride by hydride vapor phase epitaxy
US8067687B2 (en) 2002-05-21 2011-11-29 Alliance For Sustainable Energy, Llc High-efficiency, monolithic, multi-bandgap, tandem photovoltaic energy converters
US20060162768A1 (en) 2002-05-21 2006-07-27 Wanlass Mark W Low bandgap, monolithic, multi-bandgap, optoelectronic devices
US7217882B2 (en) 2002-05-24 2007-05-15 Cornell Research Foundation, Inc. Broad spectrum solar cell
CN2550906Y (zh) 2002-05-27 2003-05-14 李映华 立体光双面结光电池
FR2840452B1 (fr) 2002-05-28 2005-10-14 Lumilog Procede de realisation par epitaxie d'un film de nitrure de gallium separe de son substrat
TWI271877B (en) 2002-06-04 2007-01-21 Nitride Semiconductors Co Ltd Gallium nitride compound semiconductor device and manufacturing method
JP2004014856A (ja) 2002-06-07 2004-01-15 Sharp Corp 半導体基板の製造方法及び半導体装置の製造方法
US6995430B2 (en) 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US7074623B2 (en) 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US6887773B2 (en) 2002-06-19 2005-05-03 Luxtera, Inc. Methods of incorporating germanium within CMOS process
AU2002368035A1 (en) 2002-06-19 2004-01-06 Massachusetts Institute Of Technology Ge photodetectors
US7012298B1 (en) 2002-06-21 2006-03-14 Advanced Micro Devices, Inc. Non-volatile memory device
US6617643B1 (en) 2002-06-28 2003-09-09 Mcnc Low power tunneling metal-oxide-semiconductor (MOS) device
US7335908B2 (en) 2002-07-08 2008-02-26 Qunano Ab Nanostructures and methods for manufacturing the same
US6982204B2 (en) 2002-07-16 2006-01-03 Cree, Inc. Nitride-based transistors and methods of fabrication thereof using non-etched contact recesses
US20040012037A1 (en) 2002-07-18 2004-01-22 Motorola, Inc. Hetero-integration of semiconductor materials on silicon
EP2267762A3 (en) * 2002-08-23 2012-08-22 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor heterostructures having reduced dislocation pile-ups and related methods
US20040043584A1 (en) 2002-08-27 2004-03-04 Thomas Shawn G. Semiconductor device and method of making same
US7015497B1 (en) 2002-08-27 2006-03-21 The Ohio State University Self-aligned and self-limited quantum dot nanoswitches and methods for making same
GB0220438D0 (en) 2002-09-03 2002-10-09 Univ Warwick Formation of lattice-turning semiconductor substrates
US7122733B2 (en) 2002-09-06 2006-10-17 The Boeing Company Multi-junction photovoltaic cell having buffer layers for the growth of single crystal boron compounds
US6830953B1 (en) 2002-09-17 2004-12-14 Taiwan Semiconductor Manufacturing Company, Ltd. Suppression of MOSFET gate leakage current
US6815241B2 (en) 2002-09-25 2004-11-09 Cao Group, Inc. GaN structures having low dislocation density and methods of manufacture
US6800910B2 (en) 2002-09-30 2004-10-05 Advanced Micro Devices, Inc. FinFET device incorporating strained silicon in the channel region
US6787864B2 (en) 2002-09-30 2004-09-07 Advanced Micro Devices, Inc. Mosfets incorporating nickel germanosilicided gate and methods for their formation
JP4546021B2 (ja) 2002-10-02 2010-09-15 ルネサスエレクトロニクス株式会社 絶縁ゲート型電界効果型トランジスタ及び半導体装置
US6902991B2 (en) 2002-10-24 2005-06-07 Advanced Micro Devices, Inc. Semiconductor device having a thick strained silicon layer and method of its formation
US6855990B2 (en) 2002-11-26 2005-02-15 Taiwan Semiconductor Manufacturing Co., Ltd Strained-channel multiple-gate transistor
US6709982B1 (en) 2002-11-26 2004-03-23 Advanced Micro Devices, Inc. Double spacer FinFET formation
US6920159B2 (en) 2002-11-29 2005-07-19 Optitune Plc Tunable optical source
AU2003297649A1 (en) * 2002-12-05 2004-06-30 Blue Photonics, Inc. High efficiency, monolithic multijunction solar cells containing lattice-mismatched materials and methods of forming same
US6645797B1 (en) 2002-12-06 2003-11-11 Advanced Micro Devices, Inc. Method for forming fins in a FinFET device using sacrificial carbon layer
AU2003259125A1 (en) 2002-12-16 2004-07-29 The Regents Of The University Of California Growth of reduced dislocation density non-polar gallium nitride by hydride vapor phase epitaxy
US7589380B2 (en) 2002-12-18 2009-09-15 Noble Peak Vision Corp. Method for forming integrated circuit utilizing dual semiconductors
JP2004200375A (ja) 2002-12-18 2004-07-15 Matsushita Electric Ind Co Ltd 半導体レーザ装置およびその製造方法
US7012314B2 (en) * 2002-12-18 2006-03-14 Agere Systems Inc. Semiconductor devices with reduced active region defects and unique contacting schemes
US7453129B2 (en) * 2002-12-18 2008-11-18 Noble Peak Vision Corp. Image sensor comprising isolated germanium photodetectors integrated with a silicon substrate and silicon circuitry
US6794718B2 (en) 2002-12-19 2004-09-21 International Business Machines Corporation High mobility crystalline planes in double-gate CMOS technology
US6686245B1 (en) 2002-12-20 2004-02-03 Motorola, Inc. Vertical MOSFET with asymmetric gate structure
US7098487B2 (en) 2002-12-27 2006-08-29 General Electric Company Gallium nitride crystal and method of making same
KR100513316B1 (ko) 2003-01-21 2005-09-09 삼성전기주식회사 고효율 반도체 소자 제조방법
US6762483B1 (en) 2003-01-23 2004-07-13 Advanced Micro Devices, Inc. Narrow fin FinFET
JP2004235190A (ja) 2003-01-28 2004-08-19 Sony Corp 光半導体装置
US7304336B2 (en) 2003-02-13 2007-12-04 Massachusetts Institute Of Technology FinFET structure and method to make the same
DE10320160A1 (de) 2003-02-14 2004-08-26 Osram Opto Semiconductors Gmbh Verfahren zum Herstellen einer Mehrzahl von Halbleiterkörper und elektronischer Halbleiterkörper
US6815738B2 (en) 2003-02-28 2004-11-09 International Business Machines Corporation Multiple gate MOSFET structure with strained Si Fin body
JP4695824B2 (ja) 2003-03-07 2011-06-08 富士電機ホールディングス株式会社 半導体ウエハの製造方法
KR100728173B1 (ko) 2003-03-07 2007-06-13 앰버웨이브 시스템즈 코포레이션 쉘로우 트렌치 분리법
US6936851B2 (en) 2003-03-21 2005-08-30 Tien Yang Wang Semiconductor light-emitting device and method for manufacturing the same
US20070029643A1 (en) 2003-03-21 2007-02-08 Johnson Mark A L Methods for nanoscale structures from optical lithography and subsequent lateral growth
US7061065B2 (en) 2003-03-31 2006-06-13 National Chung-Hsing University Light emitting diode and method for producing the same
US6900502B2 (en) 2003-04-03 2005-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Strained channel on insulator device
TWI231994B (en) 2003-04-04 2005-05-01 Univ Nat Taiwan Strained Si FinFET
US20050212051A1 (en) 2003-04-16 2005-09-29 Sarnoff Corporation Low voltage silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection of silicon-on-insulator technologies
JP2004336040A (ja) 2003-04-30 2004-11-25 Osram Opto Semiconductors Gmbh 複数の半導体チップの製造方法および電子半導体基体
US6867433B2 (en) 2003-04-30 2005-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
US6909186B2 (en) 2003-05-01 2005-06-21 International Business Machines Corporation High performance FET devices and methods therefor
US6838322B2 (en) 2003-05-01 2005-01-04 Freescale Semiconductor, Inc. Method for forming a double-gated semiconductor device
US7088143B2 (en) 2003-05-22 2006-08-08 The Regents Of The University Of Michigan Dynamic circuits having improved noise tolerance and method for designing same
US6849487B2 (en) 2003-05-27 2005-02-01 Motorola, Inc. Method for forming an electronic structure using etch
JP4199599B2 (ja) * 2003-06-03 2008-12-17 住友化学株式会社 ３−５族化合物半導体の製造方法
TWI242232B (en) 2003-06-09 2005-10-21 Canon Kk Semiconductor substrate, semiconductor device, and method of manufacturing the same
US7262117B1 (en) 2003-06-10 2007-08-28 Luxtera, Inc. Germanium integrated CMOS wafer and method for manufacturing the same
JP4105044B2 (ja) 2003-06-13 2008-06-18 株式会社東芝 電界効果トランジスタ
US6974733B2 (en) 2003-06-16 2005-12-13 Intel Corporation Double-gate transistor with enhanced carrier mobility
US6943407B2 (en) 2003-06-17 2005-09-13 International Business Machines Corporation Low leakage heterojunction vertical transistors and high performance devices thereof
JP2005011915A (ja) 2003-06-18 2005-01-13 Hitachi Ltd 半導体装置、半導体回路モジュールおよびその製造方法
US7045401B2 (en) 2003-06-23 2006-05-16 Sharp Laboratories Of America, Inc. Strained silicon finFET device
KR100631832B1 (ko) 2003-06-24 2006-10-09 삼성전기주식회사 백색 발광소자 및 그 제조방법
US7122392B2 (en) 2003-06-30 2006-10-17 Intel Corporation Methods of forming a high germanium concentration silicon germanium alloy by epitaxial lateral overgrowth and structures formed thereby
US20050017351A1 (en) 2003-06-30 2005-01-27 Ravi Kramadhati V. Silicon on diamond wafers and devices
US6921982B2 (en) 2003-07-21 2005-07-26 International Business Machines Corporation FET channel having a strained lattice structure along multiple surfaces
EP1519420A2 (en) 2003-09-25 2005-03-30 Interuniversitaire Microelectronica Centrum vzw ( IMEC) Multiple gate semiconductor device and method for forming same
JP2005051022A (ja) 2003-07-28 2005-02-24 Seiko Epson Corp 半導体装置およびその製造方法
US6855583B1 (en) 2003-08-05 2005-02-15 Advanced Micro Devices, Inc. Method for forming tri-gate FinFET with mesa isolation
US6835618B1 (en) 2003-08-05 2004-12-28 Advanced Micro Devices, Inc. Epitaxially grown fin for FinFET
WO2005013375A1 (ja) 2003-08-05 2005-02-10 Fujitsu Limited 半導体装置及びその製造方法
US7101742B2 (en) 2003-08-12 2006-09-05 Taiwan Semiconductor Manufacturing Company, Ltd. Strained channel complementary field-effect transistors and methods of manufacture
US20050035410A1 (en) 2003-08-15 2005-02-17 Yee-Chia Yeo Semiconductor diode with reduced leakage
US7355253B2 (en) 2003-08-22 2008-04-08 International Business Machines Corporation Strained-channel Fin field effect transistor (FET) with a uniform channel thickness and separate gates
US6815278B1 (en) 2003-08-25 2004-11-09 International Business Machines Corporation Ultra-thin silicon-on-insulator and strained-silicon-direct-on-insulator with hybrid crystal orientations
US6955969B2 (en) 2003-09-03 2005-10-18 Advanced Micro Devices, Inc. Method of growing as a channel region to reduce source/drain junction capacitance
US7078299B2 (en) 2003-09-03 2006-07-18 Advanced Micro Devices, Inc. Formation of finFET using a sidewall epitaxial layer
JP4439358B2 (ja) 2003-09-05 2010-03-24 株式会社東芝 電界効果トランジスタ及びその製造方法
US7579263B2 (en) 2003-09-09 2009-08-25 Stc.Unm Threading-dislocation-free nanoheteroepitaxy of Ge on Si using self-directed touch-down of Ge through a thin SiO2 layer
US20050054164A1 (en) 2003-09-09 2005-03-10 Advanced Micro Devices, Inc. Strained silicon MOSFETs having reduced diffusion of n-type dopants
US7138292B2 (en) 2003-09-10 2006-11-21 Lsi Logic Corporation Apparatus and method of manufacture for integrated circuit and CMOS device including epitaxially grown dielectric on silicon carbide
US20050056827A1 (en) 2003-09-15 2005-03-17 Agency For Science, Technology And Research CMOS compatible low band offset double barrier resonant tunneling diode
US7211864B2 (en) 2003-09-15 2007-05-01 Seliskar John J Fully-depleted castellated gate MOSFET device and method of manufacture thereof
US20050104152A1 (en) 2003-09-19 2005-05-19 Snyder John P. Schottky barrier integrated circuit
US6831350B1 (en) * 2003-10-02 2004-12-14 Freescale Semiconductor, Inc. Semiconductor structure with different lattice constant materials and method for forming the same
US6919258B2 (en) * 2003-10-02 2005-07-19 Freescale Semiconductor, Inc. Semiconductor device incorporating a defect controlled strained channel structure and method of making the same
EP1676305A1 (en) 2003-10-03 2006-07-05 Spinnaker Semiconductor, Inc. Schottky-barrier mosfet manufacturing method using isotropic etch process
US6900491B2 (en) 2003-10-06 2005-05-31 Hewlett-Packard Development Company, L.P. Magnetic memory
EP1683193A1 (en) 2003-10-22 2006-07-26 Spinnaker Semiconductor, Inc. Dynamic schottky barrier mosfet device and method of manufacture
US7009215B2 (en) 2003-10-24 2006-03-07 General Electric Company Group III-nitride based resonant cavity light emitting devices fabricated on single crystal gallium nitride substrates
US6977194B2 (en) 2003-10-30 2005-12-20 International Business Machines Corporation Structure and method to improve channel mobility by gate electrode stress modification
US6902965B2 (en) 2003-10-31 2005-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Strained silicon structure
US7057216B2 (en) 2003-10-31 2006-06-06 International Business Machines Corporation High mobility heterojunction complementary field effect transistors and methods thereof
GB0326321D0 (en) * 2003-11-12 2003-12-17 Univ Warwick Formation of lattice-tuning semiconductor substrates
US20050104156A1 (en) 2003-11-13 2005-05-19 Texas Instruments Incorporated Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes
US7247534B2 (en) 2003-11-19 2007-07-24 International Business Machines Corporation Silicon device on Si:C-OI and SGOI and method of manufacture
US7176522B2 (en) 2003-11-25 2007-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having high drive current and method of manufacturing thereof
JP2005191530A (ja) 2003-12-03 2005-07-14 Sumitomo Electric Ind Ltd 発光装置
JP4473710B2 (ja) 2003-12-05 2010-06-02 株式会社東芝 半導体装置
US7198995B2 (en) 2003-12-12 2007-04-03 International Business Machines Corporation Strained finFETs and method of manufacture
US6958286B2 (en) 2004-01-02 2005-10-25 International Business Machines Corporation Method of preventing surface roughening during hydrogen prebake of SiGe substrates
US7247912B2 (en) 2004-01-05 2007-07-24 International Business Machines Corporation Structures and methods for making strained MOSFETs
US7705345B2 (en) 2004-01-07 2010-04-27 International Business Machines Corporation High performance strained silicon FinFETs device and method for forming same
US7138302B2 (en) 2004-01-12 2006-11-21 Advanced Micro Devices, Inc. Method of fabricating an integrated circuit channel region
US7268058B2 (en) 2004-01-16 2007-09-11 Intel Corporation Tri-gate transistors and methods to fabricate same
US7385247B2 (en) 2004-01-17 2008-06-10 Samsung Electronics Co., Ltd. At least penta-sided-channel type of FinFET transistor
US7198970B2 (en) 2004-01-23 2007-04-03 The United States Of America As Represented By The Secretary Of The Navy Technique for perfecting the active regions of wide bandgap semiconductor nitride devices
US7118987B2 (en) 2004-01-29 2006-10-10 Taiwan Semiconductor Manufacturing Co., Ltd. Method of achieving improved STI gap fill with reduced stress
DE102004005506B4 (de) 2004-01-30 2009-11-19 Atmel Automotive Gmbh Verfahren zur Erzeugung von aktiven Halbleiterschichten verschiedener Dicke in einem SOI-Wafer
US7180134B2 (en) 2004-01-30 2007-02-20 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and structures for planar and multiple-gate transistors formed on SOI
US6855982B1 (en) 2004-02-02 2005-02-15 Advanced Micro Devices, Inc. Self aligned double gate transistor having a strained channel region and process therefor
US7205210B2 (en) 2004-02-17 2007-04-17 Freescale Semiconductor, Inc. Semiconductor structure having strained semiconductor and method therefor
US7492022B2 (en) 2004-02-27 2009-02-17 University Of Iowa Research Foundation Non-magnetic semiconductor spin transistor
US6995456B2 (en) 2004-03-12 2006-02-07 International Business Machines Corporation High-performance CMOS SOI devices on hybrid crystal-oriented substrates
US7160753B2 (en) 2004-03-16 2007-01-09 Voxtel, Inc. Silicon-on-insulator active pixel sensors
US6888181B1 (en) 2004-03-18 2005-05-03 United Microelectronics Corp. Triple gate device having strained-silicon channel
US20050211291A1 (en) 2004-03-23 2005-09-29 The Boeing Company Solar cell assembly
US6998684B2 (en) 2004-03-31 2006-02-14 International Business Machines Corporation High mobility plane CMOS SOI
US7154118B2 (en) 2004-03-31 2006-12-26 Intel Corporation Bulk non-planar transistor having strained enhanced mobility and methods of fabrication
US7087965B2 (en) 2004-04-22 2006-08-08 International Business Machines Corporation Strained silicon CMOS on hybrid crystal orientations
WO2005106977A1 (ja) * 2004-04-27 2005-11-10 Matsushita Electric Industrial Co., Ltd. 窒化物半導体素子およびその製造方法
US7445673B2 (en) 2004-05-18 2008-11-04 Lumilog Manufacturing gallium nitride substrates by lateral overgrowth through masks and devices fabricated thereof
US7084441B2 (en) 2004-05-20 2006-08-01 Cree, Inc. Semiconductor devices having a hybrid channel layer, current aperture transistors and methods of fabricating same
US7994527B2 (en) 2005-11-04 2011-08-09 The Regents Of The University Of California High light extraction efficiency light emitting diode (LED)
KR101332391B1 (ko) 2004-06-03 2013-11-22 재팬 사이언스 앤드 테크놀로지 에이젼시 수소화물 기상 에피택시법에 의한 평면의, 전위 밀도가감소된 ｍ-면 질화갈륨의 성장
US7125785B2 (en) 2004-06-14 2006-10-24 International Business Machines Corporation Mixed orientation and mixed material semiconductor-on-insulator wafer
US7807921B2 (en) 2004-06-15 2010-10-05 The Boeing Company Multijunction solar cell having a lattice mismatched GrIII-GrV-X layer and a composition-graded buffer layer
US7244958B2 (en) 2004-06-24 2007-07-17 International Business Machines Corporation Integration of strained Ge into advanced CMOS technology
US6991998B2 (en) 2004-07-02 2006-01-31 International Business Machines Corporation Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer
US7384829B2 (en) 2004-07-23 2008-06-10 International Business Machines Corporation Patterned strained semiconductor substrate and device
WO2006015185A2 (en) * 2004-07-30 2006-02-09 Aonex Technologies, Inc. GaInP/GaAs/Si TRIPLE JUNCTION SOLAR CELL ENABLED BY WAFER BONDING AND LAYER TRANSFER
US20060211210A1 (en) 2004-08-27 2006-09-21 Rensselaer Polytechnic Institute Material for selective deposition and etching
TWI500072B (zh) 2004-08-31 2015-09-11 Sophia School Corp 發光元件之製造方法
US20060073681A1 (en) * 2004-09-08 2006-04-06 Han Sang M Nanoheteroepitaxy of Ge on Si as a foundation for group III-V and II-VI integration
US7002175B1 (en) 2004-10-08 2006-02-21 Agency For Science, Technology And Research Method of making resonant tunneling diodes and CMOS backend-process-compatible three dimensional (3-D) integration
US7846759B2 (en) 2004-10-21 2010-12-07 Aonex Technologies, Inc. Multi-junction solar cells and methods of making same using layer transfer and bonding techniques
US20060105533A1 (en) 2004-11-16 2006-05-18 Chong Yung F Method for engineering hybrid orientation/material semiconductor substrate
US20060113603A1 (en) 2004-12-01 2006-06-01 Amberwave Systems Corporation Hybrid semiconductor-on-insulator structures and related methods
US20060131606A1 (en) 2004-12-18 2006-06-22 Amberwave Systems Corporation Lattice-mismatched semiconductor structures employing seed layers and related fabrication methods
US7405436B2 (en) 2005-01-05 2008-07-29 International Business Machines Corporation Stressed field effect transistors on hybrid orientation substrate
JP2006196631A (ja) 2005-01-13 2006-07-27 Hitachi Ltd 半導体装置及びその製造方法
US7138309B2 (en) 2005-01-19 2006-11-21 Sharp Laboratories Of America, Inc. Integration of biaxial tensile strained NMOS and uniaxial compressive strained PMOS on the same wafer
US7344942B2 (en) 2005-01-26 2008-03-18 Micron Technology, Inc. Isolation regions for semiconductor devices and their formation
US7224033B2 (en) 2005-02-15 2007-05-29 International Business Machines Corporation Structure and method for manufacturing strained FINFET
JP2006253181A (ja) 2005-03-08 2006-09-21 Seiko Epson Corp 半導体装置および半導体装置の製造方法
KR100712753B1 (ko) 2005-03-09 2007-04-30 주식회사 실트론 화합물 반도체 장치 및 그 제조방법
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US20070267722A1 (en) * 2006-05-17 2007-11-22 Amberwave Systems Corporation Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
JP2006332295A (ja) 2005-05-26 2006-12-07 Matsushita Electric Ind Co Ltd ヘテロ接合バイポーラトランジスタ及びヘテロ接合バイポーラトランジスタの製造方法
TW200703463A (en) * 2005-05-31 2007-01-16 Univ California Defect reduction of non-polar and semi-polar III-nitrides with sidewall lateral epitaxial overgrowth (SLEO)
JP5481067B2 (ja) 2005-07-26 2014-04-23 台湾積體電路製造股▲ふん▼有限公司 代替活性エリア材料の集積回路への組み込みのための解決策
US7801406B2 (en) 2005-08-01 2010-09-21 Massachusetts Institute Of Technology Method of fabricating Ge or SiGe/Si waveguide or photonic crystal structures by selective growth
US20070054467A1 (en) 2005-09-07 2007-03-08 Amberwave Systems Corporation Methods for integrating lattice-mismatched semiconductor structure on insulators
US7638842B2 (en) 2005-09-07 2009-12-29 Amberwave Systems Corporation Lattice-mismatched semiconductor structures on insulators
US7358107B2 (en) * 2005-10-27 2008-04-15 Sharp Laboratories Of America, Inc. Method of fabricating a germanium photo detector on a high quality germanium epitaxial overgrowth layer
US7535089B2 (en) 2005-11-01 2009-05-19 Massachusetts Institute Of Technology Monolithically integrated light emitting devices
US7629661B2 (en) 2006-02-10 2009-12-08 Noble Peak Vision Corp. Semiconductor devices with photoresponsive components and metal silicide light blocking structures
KR100790869B1 (ko) 2006-02-16 2008-01-03 삼성전자주식회사 단결정 기판 및 그 제조방법
US7691698B2 (en) 2006-02-21 2010-04-06 International Business Machines Corporation Pseudomorphic Si/SiGe/Si body device with embedded SiGe source/drain
US7777250B2 (en) 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
JP2007314360A (ja) * 2006-05-23 2007-12-06 Mitsubishi Cable Ind Ltd テンプレート基板
JP4003802B2 (ja) * 2006-08-08 2007-11-07 住友電気工業株式会社 窒化ガリウム結晶の成長方法
WO2008036256A1 (en) 2006-09-18 2008-03-27 Amberwave Systems Corporation Aspect ratio trapping for mixed signal applications
US7799592B2 (en) 2006-09-27 2010-09-21 Taiwan Semiconductor Manufacturing Company, Ltd. Tri-gate field-effect transistors formed by aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
US8502263B2 (en) 2006-10-19 2013-08-06 Taiwan Semiconductor Manufacturing Company, Ltd. Light-emitter-based devices with lattice-mismatched semiconductor structures
US20080154197A1 (en) 2006-12-20 2008-06-26 Joel Brian Derrico System and method for regulating the temperature of a fluid injected into a patient
JP2008198656A (ja) 2007-02-08 2008-08-28 Shin Etsu Chem Co Ltd 半導体基板の製造方法
WO2008124154A2 (en) 2007-04-09 2008-10-16 Amberwave Systems Corporation Photovoltaics on silicon
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
KR20080102065A (ko) 2007-05-18 2008-11-24 삼성전자주식회사 에피택시얼 실리콘 구조물 형성 방법 및 이를 이용한 반도체 소자의 형성 방법
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
KR20090010284A (ko) 2007-07-23 2009-01-30 엘지이노텍 주식회사 반도체 발광소자 및 그 제조방법
DE112008002387B4 (de) 2007-09-07 2022-04-07 Taiwan Semiconductor Manufacturing Co., Ltd. Struktur einer Mehrfachübergangs-Solarzelle, Verfahren zur Bildung einer photonischenVorrichtung, Photovoltaische Mehrfachübergangs-Zelle und Photovoltaische Mehrfachübergangs-Zellenvorrichtung,
US7883990B2 (en) 2007-10-31 2011-02-08 International Business Machines Corporation High resistivity SOI base wafer using thermally annealed substrate
US20090155952A1 (en) * 2007-12-13 2009-06-18 Emcore Corporation Exponentially Doped Layers In Inverted Metamorphic Multijunction Solar Cells
CN103367115A (zh) 2007-12-28 2013-10-23 住友化学株式会社 半导体基板、半导体基板的制造方法及电子器件
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
JP5416212B2 (ja) * 2008-09-19 2014-02-12 台湾積體電路製造股▲ふん▼有限公司 エピタキシャル層の成長によるデバイス形成
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
CN102379046B (zh) 2009-04-02 2015-06-17 台湾积体电路制造股份有限公司 从晶体材料的非极性平面形成的器件及其制作方法
US8415718B2 (en) * 2009-10-30 2013-04-09 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming epi film in substrate trench

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1607641A (zh) * 1997-10-20 2005-04-20 卢米洛格股份有限公司 氮化镓外延层的制造方法
WO2006125040A2 (en) * 2005-05-17 2006-11-23 Amberwave Systems Corporation Lattice-mismatched semiconductor structures with reduced dislocation defect densities related methods for device fabrication
CN101086969A (zh) * 2006-06-09 2007-12-12 三星电子株式会社 制造底栅型薄膜晶体管的方法
WO2008030574A1 (en) * 2006-09-07 2008-03-13 Amberwave Systems Corporation Defect reduction using aspect ratio trapping

Also Published As

Publication number Publication date
EP2528087B1 (en) 2016-06-29
EP2528087A2 (en) 2012-11-28
US20120068226A1 (en) 2012-03-22
JP2012503340A (ja) 2012-02-02
KR101216541B1 (ko) 2012-12-31
US8034697B2 (en) 2011-10-11
US8384196B2 (en) 2013-02-26
EP2335273A4 (en) 2012-01-25
KR20110056277A (ko) 2011-05-26
US9934967B2 (en) 2018-04-03
US20100216277A1 (en) 2010-08-26
EP2335273A2 (en) 2011-06-22
WO2010033813A3 (en) 2010-06-03
WO2010033813A2 (en) 2010-03-25
EP2528087A3 (en) 2013-03-20
CN102160145A (zh) 2011-08-17
JP5416212B2 (ja) 2014-02-12
US20130134480A1 (en) 2013-05-30

Similar Documents

Publication Publication Date Title
CN102160145B (zh) 通过外延层过成长的元件形成
US8835988B2 (en) Hybrid monolithic integration
US9640395B2 (en) Reduction of edge effects from aspect ratio trapping
US4876210A (en) Solution growth of lattice mismatched and solubility mismatched heterostructures
US10002981B2 (en) Multi-junction solar cells
CN101378017B (zh) 一种硅基图形衬底上生长外延层的方法
EP2343742A2 (en) Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US20100072515A1 (en) Fabrication and structures of crystalline material
CN102851734B (zh) 半导体外延结构及其生长方法
CN1985368A (zh) 混合外延支撑件及其制作方法
US20080296626A1 (en) Nitride substrates, thin films, heterostructures and devices for enhanced performance, and methods of making the same
EP0352472A2 (en) Heteroepitaxy of lattice-mismatched semiconductor materials
CN105489714A (zh) 一种多孔氮化铝复合衬底及其在外延生长高质量氮化镓薄膜中的应用
CN102839417B (zh) 一种在蓝宝石衬底上生长自剥离氮化镓薄膜的方法
CN102107852B (zh) 半导体纳米结构和制造方法及其应用
US8048786B2 (en) Method for fabricating single-crystalline substrate containing gallium nitride
TWI431666B (zh) 半導體結構之形成方法
WO2024211817A1 (en) High quality group-iii metal nitride crystals and methods of making
CN118867079A (zh) 一种半导体结构及其制作方法
Gérard et al. Conformal growth of III-Vs on Si: from low defect density materials to advanced devices.

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant