TW544930B - Method for producing semiconductor crystal - Google Patents

Method for producing semiconductor crystal Download PDF

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TW544930B
TW544930B TW91102218A TW91102218A TW544930B TW 544930 B TW544930 B TW 544930B TW 91102218 A TW91102218 A TW 91102218A TW 91102218 A TW91102218 A TW 91102218A TW 544930 B TW544930 B TW 544930B
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Taiwan
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crystal
layer
base substrate
semiconductor
semiconductor crystal
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TW91102218A
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Chinese (zh)
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Seiji Nagai
Shiro Yamazaki
Yuta Tezen
Toshio Hiramatsu
Kazuyoshi Tomita
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Toyoda Gosei Kk
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Abstract

The invented method obtains a quality semiconductor crystal independent of the base substrate. The method comprises: forming a seed crystal layer formed of a GaN layer 103 (second layer of the seed crystal layer) and an AlN buffer layer 102 (second layer of the seed crystal layer) on a sapphire substrate 101; etching the surface of the seed crystal layer to form grooves having a width (width of the seed crystal S) of about 5 mum, a side wing width W of about 15 mum, a depth of about 0.5 mum, in order to form a rectangular platform with an approximately cross-sectioned shape; aligning the eroded remain portion of the flattened part having the seed crystal layer according to a period L of about 20 mum so that the side wing valley part exposes a portion of the sapphire substrate 101, in which the ratio of the width of the seed crystal to the side wing, S/W, is preferably 1/3; growing the semiconductor crystal A to be more than 50 mum; and separating the crystal from the base substrate to obtain a quality single crystal independent of the base substrate.

Description

544930 五、發明說明(1) 【發明所屬 本發明係 合物半導體 出之優質半 此夕卜,本 件結晶成長 【習知1技術 在基底基 成的半導體 晶之習知技 7-202 265 : 濕式钱刻方 出厚膜GaN( 等而去除藍 【發明欲解 惟,在該 第ΙΠ族氮化 常數差等因 力施加於標 產生多數的 當採用如 等所形成的 半導體,然 常數差等因 技術領 關於在 所構成 導體結 發明可 基板之 ] 板上成 結晶’ 術,一 第m族 法’或 標的半 寶石基 決之課 等習知 物系化 素,結 的單結 錯位與 上述習 基底基 後若冷 素所產 域】 基底基板上,成長由第m族氮化物系化 的半導體結晶5而獲得從基底基板獨立 晶的方法。 適用於如LED等所代表的各種半導體元 製造等方面。 長由第ΙΠ族氮化物系化合物半導體所構 而獲得從此基底基板獨立出的半導體結 般已知有如日本專利公報「特開平 氮化物半導體之製造方法」中所記載的 如在藍寶石基板上,利用HVPE法等成長 導體結晶)後,在利用雷射照射或研磨 板的方法等。 題】 技術中,隨基底基板(如:藍寶石等)與 合物半導體之間的熱膨脹係數差與晶格 晶成長步驟完成後的降溫等情況時,應 晶(如:GaN等),當然將造成標的單結晶 龜裂的問題。 知技術的情況時,在由藍寶石或矽(S i) 板上’結晶成長氮化鎵(G a N)等氮化物 卻至常溫的話,因熱膨脹係數差或晶格 生的應力,將使氮化物半導體層產生多544930 V. Description of the invention (1) [The high-quality semi-conductor compound semiconductor of the present invention belongs to this, and the crystal grows [Knowledge 1 technology of semiconductor crystal formed on the substrate 7-202 265: Wet type Qian Kefang produced a thick film of GaN (and so on to remove the blue [invention of the solution, but in the group IIIi nitride constant difference and other factors are applied to the target due to factors such as the formation of semiconductors, etc., but the constant difference and other factors The technical field is about the formation of crystalline substrates on the conductors of the conductive substrates, such as crystallization, a m family method, or the subject of semi-precious stones, and other conventional chemical elements. The domain produced by the substrate after the base substrate] A method of obtaining an independent crystal from the base substrate by growing a semiconductor crystal 5 of a group m nitride system on the base substrate. Suitable for manufacturing various semiconductor elements such as LEDs, etc. In regard to the semiconductor junction formed from a group III nitride compound semiconductor and obtained from this base substrate, a semiconductor junction such as the one disclosed in Japanese Patent Gazette "Heihide" is known. The method described in “Methods” includes sapphire substrates, where the conductor crystals are grown by the HVPE method, etc.), and then the plates are irradiated with laser light or polished. Question] In the technology, when the thermal expansion coefficient difference between the base substrate (such as sapphire, etc.) and the compound semiconductor, and the temperature drop after the completion of the lattice growth step, the crystal should be crystallized (such as: GaN), of course, will cause The subject of single crystal cracking. Knowing the state of the technology, if nitrides such as gallium nitride (G a N) are grown from sapphire or silicon (S i) plates to room temperature, the thermal expansion coefficient or the stress generated by the lattice will cause nitrogen to grow. Polyimide semiconductor layer

第5頁 544930 五、發明說明(2) 數錯位與龜裂。 如此若成長層(氮化物半導體層)中,產 裂的話,當在其上製作裝置的情況時,結= 生多數的晶格缺陷、錯位、變形、龜穿批 置特性劣化的原因。 X寺’ 多數錯位或龜 將使裝置中產 而形成引發裝 再者,當去除基 (結晶)獨立出的情 法獲得大面積。此 使標的結晶產生龜 題° 底基板,僅殘餘成長 況,因上述錯位或龜 外,當厚膜成長的情 裂,而極容易產生部 層而獲得從基板 裂等的作用,便無 況時,更於成長中 分小片剝離等問 本發明乃為解決上述課題,i 獨立出的優質参導體結晶,、目的在於獲得從基底基相 【解決課題之手段、及作用與發明效果】 在為解決上述課題,以下手段乃屬有效。 化:物板上,成長由第皿族氮化物系 板的優質^得獨立於此基底基 基底美板卜二、、Ό日n k步驟,其特徵在於包括有:在 半導i戶斤檨成豎層t早層或複數層第m族氮化物系化合物 形成籽曰居的籽晶層之籽晶層疊層步驟;將基底基板上而使籽:曰:;二;!;:f ’施行化學或物理侵钮處理, 成步驟心:Γ:ί 基底基板上的侵餘殘散部形 晶Λ開始妗曰V曰層的曰知蝕殘骸部裸露面,設定為半導體結 利用社'νγ3長的最初結晶成長面,並使此結晶成長面 W用m曰曰成長而結晶成長半導體Α,直到相互連結且至少Page 5 544930 V. Description of the invention (2) Number misalignment and cracking. In this way, if cracks occur in the growth layer (nitride semiconductor layer), when a device is fabricated thereon, many lattice defects, dislocations, deformations, and deterioration of the characteristics of the through-hole assembly are caused. Most of X Temple ’s dislocations or tortoises will cause the device to be produced and form a trigger device. Furthermore, when the substrate (crystal) is removed, a large area is obtained. This causes the target crystal to have a turtle problem. The bottom substrate has only a residual growth condition. Because of the above-mentioned dislocation or the turtle, when the thick film grows and cracks, it is very easy to generate layers and obtain the effect of cracking from the substrate. In order to solve the above problems, the present invention is to solve the above-mentioned problems. The independent high-quality reference conductor crystals are separated from each other, and the purpose is to obtain the basic phase from the substrate. [Solutions, functions, and effects of the invention] The above measures are effective. Transformation: On the physical board, the high-quality growth of the Group III nitride system board is independent of this substrate-based substrate board. The second and next day nk steps are characterized by the following steps: Vertical layer t early layer or multiple layers of group m nitride-based compounds to form a seed layer layer of seed layer; the base substrate is used to make the seed: said; two;!;: F 'exercise chemistry Or physical invasion treatment, the steps are as follows: Γ: ί The remaining residual shape of the crystal on the base substrate Λ begins, the exposed surface of the etched remains on the V layer is set to the semiconductor junction utilization company 'νγ3 long Initially, the crystal growth surface is grown, and the crystal growth surface W is grown by m to crystallize the semiconductor A until they are connected to each other and at least

544930 五、發明說明(3) 成長至一連串略平面為止的結晶成長步驟;以及利用將侵 蝕殘骸部予以斷裂,而將半導體結晶A與基底基板予以分 離的分離步驟。 其中]所谓的「第羾族氮化物系化合物半導體」,一般 係指包含由二元、三元、或四元之「A1卜"GayIr^N ; 〇 ,1,0 -、y = 1,〇 ^ 1 —x-y ^ i」所構成一般式所示的任意混 晶比的半導體,此外,經添加p型或η型雜質的半導體亦涵 蓋於本說明書中的「第m族氮化物系化合物半導體」範疇 内。 再者’上述第m族元素(A1,Ga,In)内至少其中一部分, 利用硼(B)、鉈(T1)等取代,或氮(N)中至少其中一部分, 利用磷(P)、砷(As)、銻(Sb)、鉍(Bi)等取代的半導體 等,亦仍涵蓋於本說明書中的「第m族氮化物系化合物半 導體」範疇内。 再者’上述P型雜質係可添加如鎂、或鈣(Ca)等。 再者’上述η型雜質係可添加如矽(s i)、硫(s)、硒 (Se)、碲(Te)、或鍺(Ge)等。 再者,讜等雜質可同時添加二元素以上,亦可同時添加 二型(P型與η型)。 广再者,上述基底基板材料,可採用如藍寶石、尖晶石、 氧化錳、氧化鎵鋰(LiGa02)、硫化鉬(M〇s)、矽(Si)、碳 化矽(SiC)、AIN、GaAs、InP、GaP、Mg〇、Zn〇、或MgAl2〇4 等:即,讜等基底基材的材料,可使用有助於第羾族氮化 物系化合物半導體結晶成長的習知或任意結晶成長基板。544930 V. Description of the invention (3) Crystal growth step until reaching a series of slightly flat planes; and a separation step of separating the semiconductor crystal A from the base substrate by breaking the etched remains. Among them] The so-called "Group VIII nitride compound semiconductor" generally refers to the "A1 Bu " GayIr ^ N; 0, 1, 0-, y = 1, 〇 ^ 1 —xy ^ i ”constitutes a semiconductor with an arbitrary mixed crystal ratio represented by the general formula. In addition, a semiconductor added with a p-type or η-type impurity is also included in the“ group m nitride compound semiconductor ”in this specification. Within the category. Furthermore, at least a part of the group m element (A1, Ga, In) is substituted with boron (B), thorium (T1), or the like, or at least a part of nitrogen (N) is substituted with phosphorus (P), arsenic Substituted semiconductors such as (As), antimony (Sb), and bismuth (Bi) are also included in the category of "m-nitride-based compound semiconductors" in this specification. Furthermore, the aforementioned P-type impurities may be added with, for example, magnesium, calcium (Ca), or the like. Furthermore, the above-mentioned n-type impurity system may be added with, for example, silicon (s i), sulfur (s), selenium (Se), tellurium (Te), or germanium (Ge). In addition, impurities such as europium may be added to more than two elements at the same time, and type 2 (P-type and η-type) may also be added at the same time. In addition, the above-mentioned base substrate material can be sapphire, spinel, manganese oxide, lithium gallium oxide (LiGa02), molybdenum sulfide (Mos), silicon (Si), silicon carbide (SiC), AIN, GaAs , InP, GaP, Mg0, Zn〇, or MgAl2O4, etc .: That is, the material of the base substrate such as hafnium can be a conventional or arbitrary crystal growth substrate that can contribute to the crystal growth of a Group VIII nitride-based compound semiconductor. .

91102218.ptd 第7頁 544930 五、發明說明(4) 差再J3 ί :材料’從與GaN的反應、熱膨脹係數 合了I t定性觀點,最好選擇藍寶石。 产 二、夕^又餘殘骸部的基底基板上,成手由第πι族 合物所構成之標的半導體結成二由弟基 ίίϊϊΑ·?Λ結晶A’僅侵敍殘骨亥部連接著ί二半 力便將輕易集中作用vwa的話,内部應力或外部應 力,便作用為斜殘骸部。結果特別係該等應 時,侵蝕殘骸部便將斷裂。 田此應力义大 即,依照上述本發明的手&,若利用此 =二將基底基板與半導體結晶A予以分離:離; 此手段,便可獲得從基」離)藉由 晶A)。 &悉攸獨立出的早結晶(半導體結 再者,藉由形成如上述的侵蝕殘骸部,因 半V體結晶A間的接觸部位被限 ,,、、土底基板人 …者晶格常數差而衍生的應變,並乍心X便較難產 與半導體結晶A間的晶格常數差而衍生的應思基底基板 在結晶成長所需半導體結晶A之際,便抑^」。因此當 之半導體結晶A的不需要應力,而於成長中 密度。 位或龜裂的產生 再者上述所謂「多數侵|虫殘骸部」係於 圖1的垂直剖面觀之,4「多數」白勺話便可曰少限於如從 可連接成一個。所以,即便形成如一維連〃平面狀亦 狀、急遽正弦波形狀、或螺旋狀等 -、矩形波形 v蚁蝕殘骸部)的平91102218.ptd Page 7 544930 V. Description of the invention (4) Differential J3 ί: Material ’From the reaction with GaN and the coefficient of thermal expansion combined with the qualitative viewpoint of I t, it is best to choose sapphire. On the base substrate of the wreckage and the wreckage, the target semiconductor composed of the πm compound is formed into two, and the base is connected to the remnant, and the two are connected to the wreckage. Half force will easily focus on vwa, and internal or external stress will act as the oblique debris. As a result, in particular, the erosion wreckage will break. This stress means that according to the above-mentioned hand & of the present invention, if this = 2 is used to separate the base substrate from the semiconductor crystal A: ionization; this means, we can obtain the radical "ionization" by the crystal A). & Xi You independent early crystallization (semiconductor junction, by forming the erosion debris as described above, because the contact position between the semi-V body crystal A is limited, the earth substrate substrate ... The poorly derived strain, and at first glance, X is more difficult to produce the difference in the lattice constant between the semiconductor crystal A and the base substrate derived from the consideration of the semiconductor crystal A required for crystal growth. Therefore, when the semiconductor The crystal A does not require stress, but grows in density. The occurrence of cracks or cracks, and the so-called "major invasion | insect wreckage" is shown in the vertical section of Figure 1, and 4 "majority" can be said. It can be connected into one. Therefore, even if it is formed like a one-dimensional flail plane shape, a sharp sine wave shape, or a spiral shape, etc., the rectangular wave shape (ant eclipse debris))

91102218.ptd 第8頁 544930 五、發明說明(5) 面形狀,亦可獲得本發明的作用、功效。 再2,未限於條狀,即便上述侵蝕殘 成略圓形、略橢圓形、略多角形、或略正夕勺平面形狀形 型形狀等,當然亦可獲得本發二角形等任意島 =二當基底基板與半導體結丄乍分離::。 可在基底基板上殘留半導體結晶A的其中碘)之際,亦 導體結晶A上殘留半導體結晶a的复中、一。卩分,或在半 材枓連一部份均未殘留的將各材料完全分離主非以該等 條件)。 續為前提(必要 再者,第二手段係在上述第一手段的社曰 半導體結晶Α的厚度設定在5〇心以上。=步驟中, 的半導體結晶A厚度,最好在約5〇 了曰曰成長為目的 話,便可堅固半導體結晶A,更可 此厚…度越厚的 集中於上述侵蝕殘骸部上。 工、:上述剪切應力 再者,藉由該等作用,隨晶柊堂 高溫狀態下,亦可獲得產生制^ p便結晶成長的 埶胗胳#勃#袖M r t 象,因此在剝離後,隨 脹係數差所引發的應力’幾乎未作用於 A。因此,便不致產生錯位或龜裂, 〇 f 體結晶A(如GaN單結晶)。 Μ又传回口口吳的丰導 第二手段中,將半導體 而隨半導體結晶A與基 ’並利用此應力而使侵 再者’第三手段係在上述第一戍 結晶Α與基底基板利用冷卻或加敎 底基板間的熱膨脹係數差產生應力 蝕殘骸部斷裂。 544930 五、發明說明(6) 即’上述斷裂(剝離)係依半導體結晶A與基底基板間之 熱膨服係數差所衍生的應力(剪切應力)而進行的。 再者,依照此手段的話,特別在將半導體結晶A厚度形 成5 0 // m以上的情況時,便可提高並維持半導體結晶a的結 晶性’並可確實的將半導體結晶A與基底基板予以斷裂。 再者’第四手段係上述第一至第三中的任一手段中,轩 晶層或籽晶層的最上層係由氮化鎵(GaN)所形成。半導體 結晶A的具體組成,最適於半導體結晶成長基板等的極有 用氮化鎵(GaN),可斷定為現今產業上屬利用價值最高 者。所以’此情況下’藉由將軒晶層、或軒晶層的最上 層,由氮化鎵(GaN)所形成,便可依最佳狀況實施標的半 導體結晶A (G a N单結晶)的結晶成長。 但是,相關AlGaN、或AlGalnN等,當然因為在產業上仍 有頗大的利用價值’因此半導體結晶A的較具體組成亦可 選擇自其中。即便該等情況,籽晶層或籽晶層的最上層, 最好形成較接近標的單結晶(半導體結晶層A)組成的半導 體(第HI族氮化物糸化合物半導體)、或略同組成的半導 體。 再者,第五手段係上述第一至第四中的任一手段中,軒 晶層或籽晶層的最上層係由氮化鋁(A 1 N )所形成。 藉此因為可甴氮化鋁(A 1 N )形成所謂的緩衝層,因此便 可獲得根據此缓衝層(A1 N )疊層的習知作用。即,藉由隨 晶格常數差而可緩和作用於標的半導體結晶層A上的應力 等週知的作用原理,便可輕易提昇標的半導體結晶A的結91102218.ptd Page 8 544930 V. Description of the invention (5) The shape and shape of the surface can also obtain the functions and effects of the present invention. Second, it is not limited to strips. Even if the above erosion remains in a slightly circular, slightly elliptical, slightly polygonal, or slightly flat shape, etc., of course, any island such as the polygon of the hair can be obtained When the base substrate is separated from the semiconductor junction ::. When the semiconductor crystal A may contain iodine on the base substrate, the semiconductor crystal a may be left on the conductor crystal A. Divided, or no part of the material is left, the complete separation of the materials mainly depends on these conditions). Continued as a prerequisite (necessarily, the second means is that the thickness of the semiconductor crystal A in the company described above in the first means is set to more than 50 centimeters. = In the step, the thickness of the semiconductor crystal A is preferably about 50 centimeters. If the growth is for the purpose, the semiconductor crystal A can be strengthened, and the thickness of the semiconductor layer A can be concentrated on the above-mentioned erosion debris. The shear stress is further increased by the effects of these effects. Under high temperature conditions, it is also possible to obtain a squeegee # Bo # sleeve Mrt image that produces crystal growth. Therefore, after peeling, the stress caused by the difference in expansion coefficient hardly affects A. Therefore, it does not cause Dislocations or cracks occur, and 0f bulk crystal A (such as GaN single crystal) is returned to Mouth Wu's second method. The semiconductor will follow the semiconductor crystal A and the substrate and use this stress to invade. Furthermore, the third means is that the stress corrosion debris remains fractured between the first crystal A and the base substrate by using the difference in thermal expansion coefficient between cooling or adding the base substrate. 544930 5. Description of the invention (6) That is, the above-mentioned fracture (peeling ) Is based on semiconductor crystal A The stress (shearing stress) derived from the difference in thermal expansion coefficient between the base substrates is used. In addition, according to this method, it can be used especially when the thickness of the semiconductor crystal A is 5 0 // m or more. Improve and maintain the crystallinity of the semiconductor crystal a 'and reliably break the semiconductor crystal A from the base substrate. Furthermore, the fourth means is any one of the above-mentioned first to third means, a crystal layer or a seed crystal. The uppermost layer of the layer is made of gallium nitride (GaN). The specific composition of semiconductor crystal A is most useful for semiconductor crystal growth substrates and other extremely useful gallium nitride (GaN). Therefore, in this case, by forming the Xuanjing layer, or the uppermost layer of the Xuanjing layer, from gallium nitride (GaN), the target semiconductor crystal A (G a N single crystal) can be implemented according to the best conditions. However, related AlGaN, AlGalnN, etc., of course, because there is still considerable industrial use value, so the more specific composition of semiconductor crystal A can also be selected from it. Even in this case, the seed layer or seed crystal The uppermost layer of the layer is preferably a semiconductor (Group HI nitride / compound semiconductor) composed of a single crystal (semiconductor crystal layer A) closer to the target, or a semiconductor of approximately the same composition. Furthermore, the fifth means is the first above. In any of the methods from the fourth to the fourth, the uppermost layer of the Xuanjing layer or the seed layer is formed of aluminum nitride (A 1 N). Thereby, a so-called buffer can be formed because of aluminum nitride (A 1 N). Layer, so that the conventional action of stacking according to this buffer layer (A1 N) can be obtained. That is, the well-known action principle such as the relaxation of the stress acting on the target semiconductor crystal layer A can be reduced with the lattice constant difference. Can easily improve the junction of the target semiconductor crystal A

544930 再者’依照此手段的話’因為可將A 1 N緩衝層與基底基 板間的應力變為更大,因此便可更輕易的進行分離基底基 再者’在為可充分的獲得上述作用功效上,譬如可將籽 晶層由二層形成,並於其下層形成A1 N緩衝層(軒晶声第一 層)’並於其上層形成GaN層(籽晶層第二層)的複軒晶 層之層構造等,便可有效的達成。藉由此種搭配的节 ',便 可同時有效的獲得上述第四、第五手段的作用、功效。 再者,第六手段係在上述第一至第五中的任一 , 於侵蝕殘骸部形成步驟中,將侵蝕殘骸部的 =执丄 在1 "πι以上且50 "出以下。雖依存於結晶成長的與0 。你又疋 件,但最好將侵蝕殘骸部的配置間隔設定 q κ ώ u 右。其中,所謂此配置間隔,係指相互接 二^左 部中心點間的距離。 的各钕蝕殘骸 藉由此手段,便可利用半導體結晶 部上方。 復盈杈蝕殘骸部谷 再者/此數值若過大的話,便無法 … 晶A覆盍侵蝕殘骸部間的谷, 只、利用半導體結 質且優越的結晶(半導體結晶A)。,而無法獲得結晶性均 ^或者,若此數值更大的話,.結 著,而不為人所期望。 Βθ位的錯位將變為顯 再者,若將侵蝕殘骸部 徑設定為S,將上述配置橫方向的粗度,寬度 η %(配置週期)許~ ☆ τ 又Α直 _________ σ又疋為L白勺話,最 91102218.ptd 頁 苐11 544930 五、發明說明(8) 好S/L值為1/4左右。藉由此種設定,因為可充分促進所需 +導體結晶A的橫方向成長(EL0),目此可獲得高品質的單 曰曰 以下,將互相相對向的侵蝕殘骸部側壁間距離設定為 WC=L — :並將此侧壁間的區域(即,遭侵蝕的凹部與其上 ^ ^域)私之為側翼。再者,以下,將上述寬度s稱之為籽 晶寬度。所以,籽晶寬度相對於側翼的比s/w,最好為1 /3 左右。 , 再者,最好將侵蝕殘骸部依略等間隔或略一定週期的配 置之方式,實施上述侵飯處理。 藉it匕,橫方向成長的成長條件整體均等,便較難產生結 晶性差劣與成長膳厚度不均的現象。再者,侵飯殘骸部谷 部上方’在利用半導體結晶A完全覆蓋為止前的時間,因 為較難產生局部不均的現象,因此譬如當將結晶成長法, 於中途便從結晶成長速度較緩慢的結晶成長法,變更為結 晶成長速度較快的結晶成長法的情況時,便可輕易的正 確、提早、或專心的決定此時期。 再者,依照此種方法,因為可將上述剪切應力略均勻的 分配於各侵蝕殘骸部中,因此全部侵蝕殘骸部的斷裂不致 產生不均,而可確實的實施基底基板與半導體結晶A的分 離。 所以,亦可譬如將侵蝕殘骸部形成條狀的台地型,並其 配置呈等方向、等間隔。此類侵餘殘骸部的形成,相對於 現行一般餘刻加工技術水準現況下,具有可輕易且確實的544930 Furthermore, 'in accordance with this method', because the stress between the A 1 N buffer layer and the base substrate can be made larger, the base substrate can be separated more easily, and 'the above-mentioned effect can be fully obtained For example, the seed layer can be formed of two layers, and an A1 N buffer layer (Xuanjingsheng first layer) can be formed on the lower layer, and a Fuxuan crystal having a GaN layer (seed layer second layer) can be formed on the upper layer. The layer structure can be effectively achieved. With this combination of knots, the functions and effects of the fourth and fifth means can be effectively obtained at the same time. In addition, the sixth means is any one of the first to the fifth, and in the formation step of the erosion debris part, the value of the erosion debris part is equal to or more than 1 and 50 or less. Although it depends on the crystalline growth and 0. You have another file, but it is best to set the interval of the erosion debris to the right. Among them, this arrangement interval refers to the distance between the center points of the left and right sides of each other. Each neodymium etched debris can be used above the semiconductor crystal portion by this means. The compound surplus erodes the valley of the wreckage. Furthermore, if this value is too large, the grain A will not erode the valleys between the wreckages, and only the semiconductor crystal with superior crystals (semiconductor crystal A) will be used. However, the crystallinity cannot be obtained ^ Or, if the value is larger, the result is not expected. The dislocation of the Βθ position will become obvious. If the diameter of the erosion debris is set to S, the thickness of the above configuration in the horizontal direction and the width η% (configuration period) may be ~ ☆ τ Α 直 _________ σ and 疋In words, the most 91102218.ptd page 苐 11 544930 V. Description of the invention (8) Good S / L value is about 1/4. With this setting, the lateral growth (EL0) of the required + conductor crystal A can be fully promoted, so that high-quality monolayers can be obtained, and the distance between the side walls of the erosion debris section facing each other is set to WC. = L —: Make the area between this side wall (ie, the etched recess and the area above it) private. In the following, the width s is referred to as a seed width. Therefore, the ratio s / w of the seed width to the flanks is preferably about 1/3. Furthermore, it is better to carry out the above-mentioned invading rice treatment by arranging the eroded wreckage at a regular interval or a fixed period. By using it, the growth conditions in the horizontal direction are uniform as a whole, which makes it difficult to produce poor crystallinity and uneven growth thickness. In addition, the time before the invasion of the wreckage portion above the valley portion is completely covered with the semiconductor crystal A is difficult to cause local unevenness. Therefore, for example, when the crystal growth method is used, the crystal growth rate is slower in the middle. When the crystal growth method is changed to a crystal growth method with a faster crystal growth rate, this period can be determined accurately, early, or intently. Furthermore, according to this method, the above-mentioned shear stress can be distributed evenly among the erosion debris portions, so that the fracture of all erosion debris portions does not cause unevenness, and the base substrate and the semiconductor crystal A can be reliably implemented. Separation. Therefore, for example, it is also possible to form the stripe-shaped platform of the eroded wreckage and arrange it in equal directions and at regular intervals. The formation of this type of surplus wreckage is relatively easy and reliable compared to the current level of general remaining processing technology.

91102218.ptd 第12頁 54493091102218.ptd Page 12 544930

五、發明說明(9) 實施之優點。此時,台地(侵蝕殘骸部)方向,可 結晶的 < 1 -1 〇 〇 > 或 < n — 2 〇 >。 _ 再^ 在以邊為上的略正三角形為基礎之二 次元三角格子之袼子點上,形成侵蝕殘骸部的方法,亦I 有效。依照此方法的話,因為可將與基底基板間的接觸面 積予以縮小,因此根據上述作用,便可確實的減少錯位 數’同時可輕易的進行基底基板的分離。 /再者,將侵蝕殘骸部的水平截面形狀,形成略正三角 形三略正六角形、略圓形、或四角形的方法,亦屬有效。 藉由此方法,因為可輕易的在各部位整合利用第冚族 化物^化合物半導體所形成結晶之結晶軸方向,或者因^ 可將知:蝕殘骸部的水平方向長度(粗度)限制為在任意水平 方向亡均略一樣,因此便可抑制錯位數。特別係正六角形 或正三角形,因為容易合致於半導體結晶的結晶構造,因 此,為恰當。此外,圓形或四角形就製造技術觀點而言, 較容易形成,此相對於現行一般蝕刻加工技術水; 下,便屬於優點。 九 再者,本發明的第七手段,係將上述基底基板施 理。此外,利用上述侵肅(钱刻加工 、 X名至部分基底基板的話,在爾後的結晶成長牛 “蜂便可更輕易的將標的半導體結晶α表面(結晶成ιΓ ,)命艾、付更平坦,而且可輕易的在侵蝕殘骸部側邊形成 二洞」。此「空洞」形成越大的話,便越容易將_ Λ (剪切應力)集中於侵钱殘骸部中。 约將應力5. Description of the invention (9) Advantages of implementation. At this time, the crystallizable direction of the platform (the erosion debris) is < 1 -1 〇 〇 > or < n — 2 〇 >. _ Again ^ The method of forming an eroded wreck at the point of the two-dimensional triangular lattice based on a slightly regular triangle with an edge as its base is also effective. According to this method, since the contact area with the base substrate can be reduced, the above-mentioned effect can reliably reduce the number of dislocations', and the base substrate can be easily separated. / Furthermore, the method of eroding the horizontal cross-sectional shape of the wreckage to form a slightly regular triangle, a triangle, a regular circle, or a quadrangle is also effective. By this method, the direction of the crystal axis of the crystal formed by the Group VIII compound semiconductor can be easily integrated at various locations, or the length (roughness) in the horizontal direction of the etched remains can be limited to ^ It is almost the same in any horizontal direction, so the misalignment can be suppressed. In particular, a regular hexagon or a regular triangle is suitable because it is likely to be caused by the crystal structure of a semiconductor crystal. In addition, the circular or quadrangular shape is easier to form from the viewpoint of manufacturing technology, which is an advantage over the current general etching processing technology. Ninth, the seventh means of the present invention is to process the above-mentioned base substrate. In addition, by using the above-mentioned invasion (money-cut processing, X-name to part of the base substrate, the subsequent crystal growth will be easier for the bee to more easily make the target semiconductor crystal α surface (crystallize to ιΓ), and make it flatter. And, it is easy to form two holes on the side of the eroded wreckage. "The larger this" hole "is formed, the easier it is to concentrate _ Λ (shear stress) in the wreckage wreckage. About the stress

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向,j實的且輕易的實現上述最恰當值或適當範圍。 再者,第九手段係在上述第一 驟中’乃在中途便將結晶成長法,從結 2 ::結晶成長法,變更為結晶成長速度較快的ΐ曰 成長法。 』、、”晶 社ί ϊ t在令途便將結晶成長法,從橫方向成長較快的 ;;ai =,=為縱方向成長較快的結晶成長法,便: 在更旦τ間内後侍結晶性優質的半導體結晶A。 再者,第十手段係在上述第一至第九的任一手段 少U分離步驟更後面,設置有將殘留於半導體結晶卜至 面的^蝕殘骸部斷裂殘骸,利用蝕刻等化學或物理加月 理而予以去除的殘骸去除步驟。 處 依照此手段的話,當在半導體結晶A背面(剝離基底 胃上形成半導體發光元件等電極時,便可抑制在電 人半V體結晶A間的界面附近,產生電流不均或電阻,菸 此便可達驅動電壓的降低、或提昇發光強度等。 曰 再者,藉由去除侵蝕殘骸部的斷裂殘骸,當將電極利用 為半導體發光元件等的反射鏡時,因為將減少在鏡面附近 的光吸收與散亂而提昇反射率,因此可提昇發光強度。 再者’譬如當利用研磨等物理加工處理,而實施此殘骸 去除步驟的情況時,因為亦可去除至半導體結晶A背面的 、、爰衝層’或提汁半導體結晶A背面的平坦度,因此便可抑 制電流不均或電阻,或者減少鏡面附近的光吸收與散亂 等’而更補強上述作用功效。To achieve the above-mentioned optimum value or appropriate range, it is practical and easy. In addition, the ninth means is to change the crystal growth method from the above 2 :: crystal growth method to the fast-growing crystal growth method in the first step. "," "Jingshe" 在 t will crystal growth method in order to grow faster in the horizontal direction; ai =, = is a crystal growth method that grows faster in the vertical direction, then: within more time τ The semiconductor crystal A having a high crystallinity is excellent. In addition, the tenth means is further behind the separation step of any one of the first to ninth means, and a etched wreck portion that remains on the semiconductor crystal is provided. Fractured debris is a debris removal step that is removed by chemical or physical processing such as etching. According to this method, when electrodes such as semiconductor light-emitting elements are formed on the backside of semiconductor crystal A (the semiconductor light-emitting element is formed on the substrate and the substrate is peeled off), the electricity can be suppressed. Near the interface between crystals A of human half V body, current unevenness or resistance is generated, so that the driving voltage can be reduced, or the luminous intensity can be increased. In other words, by removing the fractured debris that eroded the debris, when the When the electrode is a reflector such as a semiconductor light-emitting element, the light absorption and scattering in the vicinity of the mirror surface are reduced, and the reflectance is increased, so that the light emission intensity can be increased. Furthermore, for example, when physical properties such as grinding are used In the case of carrying out this debris removal step, the flatness of the back surface of the semiconductor crystal A or the semiconductor layer A can also be removed, so that the current unevenness or resistance can be suppressed. Or reduce the light absorption and scattering near the mirror surface and so on to strengthen the above-mentioned effect.

91102218.ptd 第15頁 544930 五、發明說明(12) 再者,上述加工處理亦可為熱處理。當欲去除部分的昇 華温度,低於標的半導體結晶A的昇華溫度之情況時,即 便利用昇溫處理或雷射照射等,亦可去除不要的部分。 再者,第十一手段係在第m族氮化物系化合物半導體發 光元件中,具備有:將採用上述第一至第十中任一項手段 的半導體結晶之製造方法,而所製得的半導體結晶當作結 晶成長基板。 依照此手段的話,藉由結晶性優質,且内部應力較少的 半導體,便可輕易的製造第πι族氮化物系化合物半導體發 光元件。 再者,第十二手段係藉由將採用上述第一至第十中任一 項手段的半導體結晶之製造方法,而所製得的半導體結晶 當作結晶成長基板的結晶成長,而製造第ΠΙ族氮化物系化 合物半導體發光元件。 依照此手段的話,藉由結晶性優質且内部應力較少的半 導體,便可輕易的製造第Π族氮化物系化合物半導體發光 元件。 再者,當籽晶層屬於複數層的情況時,最初疊層的半導 體層最好為由「AlxGahNCO < 1)」所構成緩衝層成膜。 但是,除此緩衝層之外,亦可更將與上述緩衝層略同組 成(如:A1N、或AlGaN)的中間層週期性的疊層,或與其他 層交叉疊層,或者形成多層構造的方式疊層。 藉由此種緩衝層(或中間層)的疊層,便可緩和隨晶格常 數差所衍生作用於半導體結晶A上的應力等,如同習知的91102218.ptd Page 15 544930 V. Description of the Invention (12) Furthermore, the above processing may be heat treatment. When the sublimation temperature of the part to be removed is lower than the sublimation temperature of the target semiconductor crystal A, it is convenient to use a heating treatment or laser irradiation, etc., and the unnecessary part can also be removed. In addition, the eleventh means is a group m nitride-based compound semiconductor light-emitting device, and includes a method of manufacturing a semiconductor crystal using any one of the first to tenth means, The crystal serves as a crystal growth substrate. According to this method, a group π nitride-based compound semiconductor light emitting device can be easily manufactured by using a semiconductor having high crystallinity and less internal stress. In addition, the twelfth means is a method for manufacturing a semiconductor crystal using any one of the above-mentioned first to tenth methods, and the obtained semiconductor crystal is used as a crystal growth of a crystal growth substrate to manufacture the first III. Group nitride-based compound semiconductor light-emitting device. According to this method, a group Π nitride-based compound semiconductor light-emitting device can be easily manufactured by a semiconductor having high crystallinity and less internal stress. When the seed layer is a plurality of layers, it is preferable to form a buffer layer composed of "AlxGahNCO < 1)" as the first semiconductor layer to be laminated. However, in addition to this buffer layer, the intermediate layer having a composition that is slightly the same as the above buffer layer (such as: A1N, or AlGaN) may also be periodically stacked, or stacked with other layers, or formed into a multilayer structure. Way stack. By stacking such a buffer layer (or an intermediate layer), the stress and the like acting on the semiconductor crystal A, which are derived from the difference in lattice constants, can be relaxed, as is known in the art.

91102218.ptd 第16頁 544930 五、發明説明(13) 作用原理,便可提昇結晶性。 再者,在上述分離步驟中,最好當基底基板與半導體結 晶A降温之際,將該等殘留於成長裝置的反應室中,並在 將略一定流量的氨(N H3)氣流通於反應室内的狀態下,依 大約「-lOlTC/min〜-0.5°C/min」左右的冷卻速度,冷卻 至略常溫的方法。譬如藉由此類方法,便可安定且優質的 維持半導體結晶A結晶性,並可確實的實施上述分離步 驟。 以上藉由本發明的手段,便可有效且合理的解決上述課 題。 【發明實施形態】 以下’針對本發明根據具體實施例進行說明。惟,本發 明並不僅限於以下實施例。 實施91102218.ptd Page 16 544930 V. Description of the invention (13) Principle of action can improve crystallinity. Furthermore, in the above-mentioned separation step, when the base substrate and the semiconductor crystal A are cooled, it is preferable to leave these in the reaction chamber of the growth device, and pass a slightly constant flow of ammonia (N H3) gas through the reaction. In the indoor state, the method is to cool to a normal temperature at a cooling rate of about "-10lTC / min to -0.5 ° C / min". For example, by this method, the crystallinity of the semiconductor crystal A can be maintained stably and with high quality, and the above-mentioned separation step can be carried out with certainty. The above problems can be effectively and reasonably solved by the means of the present invention. [Embodiment of the invention] Hereinafter, the present invention will be described based on specific embodiments. However, the present invention is not limited to the following examples. Implement

在本貫施例中,將由籽晶層第一層(A 1 N緩衝層1 〇 2 ),與 舒晶層第二層(GaN層1〇3)所構成的籽晶層(第冚族氮化物 糸,曰物半導體),利用有機金屬化合物氣相成長法(以下 稱movpe」)的氣相成長而成膜。所使用的載 , 二氨52,)、載送氣體(H2或义)、三曱基鎵(Ga(CH3)i,以下 冉 」)、三曱基鋁(A.1(CH3)3,以下稱「TMA」)。 首先 = 〇 、本具^例所例示半導體結晶之製造程库的本溪f 結晶模式剖面示意圖。 U序的 ’最初將1忖四方且厚度約2 50 //m的ij窨rIn this embodiment, a seed layer (Group IX nitrogen) composed of the first layer of the seed layer (A 1 N buffer layer 1 0 2) and the second layer of the Shu crystal layer (GaN layer 10 3) Chemical compounds (referred to as semiconductors) are formed by vapor phase growth of an organic metal compound vapor growth method (hereinafter referred to as movpe). Carriers used, Diamine 52,), carrier gas (H2 or synonym), trifluoride gallium (Ga (CH3) i, below) ", trifluorene aluminum (A.1 (CH3) 3, below Called "TMA"). First = 〇, Benxi f crystal pattern cross-section schematic diagram of the semiconductor crystal manufacturing process library illustrated in this example. U sequence ’s ’will initially be 1 的 square and ij 忖 r with a thickness of about 2 50 // m

544930 五、發明說明(14) 1 0 1(基底基板),利用有機洗淨與熱處理(烘烤)而洗淨。 然後’將此單結晶的基底基板〗〇 1之a面設為結晶成長面: 並依1 0公升/分供應H2,依5公升/分供應關3,依20 //mol/ 分供應TMA,而使A 1 N緩衝層1 〇 2 (籽晶層第一層)結晶成長 至約2 〇〇nm厚度為止。另,此時的結晶成長溫度約40 0 °C。 再者’將藍寳石基板1 〇 !的溫度昇溫至1 〇 〇 〇。〇,並依2 〇 公升/分導入H2,依1〇公升/分導入關3,依3〇〇 #m〇1/分供 應TMG ’而形成厚度約1 · 5 // m的GaN層1 03 (籽晶層第二 層)(圖 1(a))。 L侵名虫殘骸部形成舟砰 用烤硬光阻罩幕’並採用反應性離子勉刻 、、& '生軋式蝕刻,形成配置週期L与2 0 # m的停狀 知:蝕殘骸部(圖1 (b))。 认 汆狀 即,利用施行條狀蝕刻,直到條 、侧翼寬度$%15 日日見度㈧15 止,而來A/ 基板破飯刻至約0 · 1 // m為 ^且罩幕係條狀殘留的侵姓 】:二外’上述 1〇3(籽晶層第二層)的{11_2()}面。=2,層 期性的形成平頂部具有由⑽層丨 钱刻處理,而週 緩衝層m(籽晶第:層)所構成的軒層)與 部,且在侧翼谷部裸露出藍寶石基板ι〇θ狀侵餘殘骸 成县舟勺其中一部分。 ^,s ^條狀的知蝕殘骸部裸露面,卷# β、 成長面,利用HVPE法形成由GaN單社曰 田作取初的結 早、、日日所構成的標的半544930 V. Description of the invention (14) 1 0 1 (base substrate), cleaned by organic cleaning and heat treatment (baking). Then 'the single-crystal base substrate] 〇1 a side as the crystal growth surface: and supply H2 at 10 liters / minute, supply 3 at 5 liters / minute, and supply TMA at 20 // mol / minute, The A 1 N buffer layer 102 (the first layer of the seed layer) is grown to a thickness of about 2000 nm. The crystal growth temperature at this time was about 40 ° C. Furthermore, 'the temperature of the sapphire substrate 100 was raised to 1000. 〇, and introduce H2 at 20 liters / minute, introduce 3 at 10 liters / minute, and supply TMG 'at 300 # m〇1 / minute to form a GaN layer with a thickness of about 1 · 5 // m 1 03 (Seed layer second layer) (Figure 1 (a)). The invaded worm's wreckage formed a hardened photoresist mask for boat bangs, and was etched with reactive ions, and “raw rolling etching” to form a stop with a configuration period of L and 20 # m: etched wreckage (Figure 1 (b)). Recognize the shape of the strip, that is, use strip etching until the width of the strip and flanks is $% 15. The degree of visibility is ㈧15, and the A / substrate is broken to about 0 · 1 // m is ^ and the mask is strip. Residual invasion of the surname]: Erwai '{10_2 ()} plane of the above 103 (second layer of seed layer). = 2, periodical formation The flat top has a ⑽ layer 丨 money engraving treatment, and a peripheral buffer layer m (seed crystal layer: layer), and the sapphire substrate is exposed, and the sapphire substrate is exposed in the valley portion of the flanks. 〇θ-shaped invasion remains of the county boat spoon. ^, s ^ Strip-shaped exposed part of the wreckage, volume # β, growth surface, using the HVPE method to form a semi-structured target consisting of GaN single company field and field early and early days

導體結晶A。 日士取5 ’使標的半導體結晶“吉晶成長至25”m左右。此 在成長初期GaN係朝橫方向與縱方向成長,一但各部 二結亚平坦化為一連串略平面狀之後,結晶便朝縱 方向成長。 在此HVPE法中,採用橫型HVpE裝置。另,在第v族原料 便才木用氨(龍3) ’而在第π族原料中便採用“及^^進行 反應而獲得GaCl。 、如此,主要藉由橫方向磊晶成長而埋藏籽晶層的側邊, 然後便利用縱方向成長而獲得標的之較厚半導體結晶 A(GaN單結晶)(圖1(c))。另,圖中編號R係指「空洞」。 4.分離步驄 。將上述半導體結晶A,依丨· 5它/分的冷卻速度,從丨丨〇 〇 c緩^的冷部至略室溫為止。藉此便在A丨N緩衝層丨〇 2 (籽 晶層第一層)附近產生剝離,而獲得從基底基板1〇1獨立出 之標的較厚半導體結晶A (G a N單結晶)(圖1 (d))。 另,除此緩衝層之外,亦可更將與上述緩衝層略同組成 (如:AJN、或AlGaN)的中間層週期性的疊層,或與其他層 交叉疊層’或者形成多層構造的方式疊層。 藉由此種緩衝層(或中間層)的疊層,便可緩和隨晶格常 數差所衍生作用於半導體結晶A上的應力等,如同習知的 作用原理,便可提昇結晶性。 再者,在上述分離步驟中,最好當基底基板與半導體結 晶A降溫之際,將該等殘留於成長裝置的反應室中,並在Conductor crystal A. Nisushi takes 5 'to grow the target semiconductor crystal "Ji Jing" to about 25 "m. In this initial stage of growth, the GaN system grows horizontally and vertically, and once the two junctions of each part are flattened into a series of slightly flat shapes, the crystals grow in the vertical direction. In this HVPE method, a horizontal HVpE device is used. In addition, in Group V raw materials, ammonia is used (Dragon 3) ', and in Group π raw materials, "and ^^" are used to obtain GaCl. In this way, seeds are mainly buried by epitaxial growth in the horizontal direction. The side of the crystal layer is then grown in the longitudinal direction to obtain the target thicker semiconductor crystal A (GaN single crystal) (Fig. 1 (c)). In addition, the number R in the figure refers to "void". 4. Separation steps. The above-mentioned semiconductor crystal A is cooled from a cold section at a cooling rate of 5 it / min to a room temperature. In this way, peeling occurs near the A 丨 N buffer layer 丨 02 (the first layer of the seed layer), and the target thicker semiconductor crystal A (G a N single crystal) independently obtained from the base substrate 101 is obtained (Figure 1 (d)). In addition, in addition to this buffer layer, the intermediate layer having a composition (eg, AJN, or AlGaN) that is slightly the same as the above-mentioned buffer layer may be periodically laminated, or cross-laminated with other layers, or formed into a multilayer structure. Way stack. By stacking such a buffer layer (or an intermediate layer), the stress on the semiconductor crystal A, which is caused by the difference in the lattice constant, can be relaxed, and the crystallinity can be improved as in the conventional principle of action. Furthermore, in the above-mentioned separation step, when the base substrate and the semiconductor crystal A are cooled, it is preferable to leave them in the reaction chamber of the growth device, and

544930 五、發明說明(16) 將略一定流量的氨(N H3 )氣流通於反應室内的狀態下,依 大約 厂 -100 °C/m i η〜- 0. 5 °C / m i η」左右的冷 卻速度,冷卻 至略 常 溫的 方法 。若 此 冷卻速度過快的話 ,半導體結晶A 上恐 怕 將產 生破 裂、 龜 裂的現象。 【元 件 編號 說明 ] 101 基 底基 板(如: 藍寶石等) 102 A 1 N緩衝層( 籽 晶層第一層) 103 GaN 層( 籽晶 層 第二層) A 標 的半 導體 結 晶(第m族氮化物系 化合物半導體) R 空 洞 L 侵 蝕殘 骸部 的 配置週期 S 籽 晶寬 度 W 側 翼寬 度544930 V. Description of the invention (16) In a state where a slightly constant flow of ammonia (N H3) gas flows through the reaction chamber, the temperature is about -100 ° C / mi η ~-0.5 ° C / mi η " Cooling rate, the method of cooling to slightly normal temperature If the cooling rate is too fast, the semiconductor crystal A may be cracked or cracked. [Element number description] 101 Base substrate (such as sapphire, etc.) 102 A 1 N buffer layer (seed layer first layer) 103 GaN layer (seed layer second layer) A target semiconductor crystal (group m nitride system) Compound semiconductor) R Cavity L Erosion debris placement cycle S Seed width W Flank width

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Claims (1)

544930 六、申請專利範圍 1. 一種半導體結晶之製造方法,係在基底基板上,成長 由第m族氮化物系化合物半導體構成的半導體結晶,而獲 得從上述基底基板獨立出的優質半導體結晶A的方法,其 特徵在於包括有: /在上述基底基板上,豐層由單層或複數層第皿族氮化物 系化合物半導體所構成的籽晶層之籽晶層疊層步驟; 將上述基底基板上形成上述籽晶層之側面的一部分,施 订化學或物理侵蝕處理,而使上述籽晶層部分或分散殘留 於基底基板上的侵姓殘骸部形成步驟·, 將上述籽晶層的侵蝕殘骸部裸露面,設定為上述半導體 結晶A開始結晶成長的最初結晶成長面,並使此結晶成長 面利用結晶成長而結晶成長半導體結晶A,直到相互連結 且至少成長至一連串略平面為止的結晶成長步驟;以及 利用將上述侵蝕殘骸部予以斷裂,而將上述半導體結晶 A與上述基底基板予以分離的分離步驟。 2·如申Ϊ ^利範圍第1項之半導體結晶之製造方法,其 中,上述結晶成長步驟,係將半導體結晶A的厚度設定在 5 0 // m以上。 3·=申請專利範圍第}項之半導體結晶之製造方法,其 中’藉由將上述半導體結晶A與上述基底基板冷卻或加 熱、’並隨上述半導體結晶A與上述基底基板間的熱膨脹係 數差產生應力’以利用此應力而使上述侵蝕殘骸部斷裂。 4 ·如申請專利範圍第1項之半導體結晶之製造方法,其 中’上述軒晶層或上述籽晶層的最上層係由氮化鎵(GaN)544930 VI. Application Patent Scope 1. A method for manufacturing semiconductor crystals, which is to grow a semiconductor crystal composed of a group m nitride compound semiconductor on a base substrate, and obtain a high-quality semiconductor crystal A independently from the base substrate. The method is characterized in that it comprises: / on the base substrate, a seed layer stacking step of a seed layer composed of a single layer or a plurality of layers of a group III nitride-based compound semiconductor; and forming the base substrate on the base substrate; A part of the side surface of the seed layer is subjected to chemical or physical erosion treatment, so that the seed layer is partially or dispersedly formed on the base substrate to form a surviving wreckage part. The exposed wreckage wreckage part of the seed layer is exposed. A crystal growth step that is set to the first crystal growth surface where the above-mentioned semiconductor crystal A starts crystal growth, and the crystal growth surface is crystal-grown using the crystal growth until the semiconductor crystal A is connected to each other and grows to at least a series of slightly flat surfaces; and By breaking the erosion debris, the semiconductor crystal A is crystallized. Be separating step separates the base substrate. 2. The method of manufacturing a semiconductor crystal according to item 1 of the claim, in which the crystal growth step described above sets the thickness of the semiconductor crystal A to 50 0 // m or more. 3 · = The method of manufacturing a semiconductor crystal according to the item of the scope of the patent application, wherein 'the semiconductor crystal A and the base substrate are cooled or heated,' and the thermal expansion coefficient difference between the semiconductor crystal A and the base substrate is generated. The stress' is used to break the above-mentioned erosion debris. 4 · The method for manufacturing a semiconductor crystal according to item 1 of the scope of patent application, wherein the uppermost layer of the above-mentioned Xuanjing layer or the seed layer is made of gallium nitride (GaN)
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