JP4115187B2 - Semiconductor crystal manufacturing method and group III nitride compound semiconductor light emitting device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for growing a semiconductor crystal made of a group III nitride compound semiconductor on a base substrate to obtain a high-quality semiconductor crystal independent of the base substrate. Further, the present invention can be applied to the production of crystal growth substrates for various semiconductor elements represented by LEDs and the like.
[0002]
[Prior art]
As a conventional technique for growing a semiconductor crystal made of a group III nitride compound semiconductor on a base substrate and obtaining a semiconductor crystal independent of the base substrate, for example, Japanese Patent Laid-Open Publication No. 7-202265: Group III nitride is disclosed. Thick GaN (target semiconductor crystal) is grown on the sapphire substrate by the wet etching method described in “Semiconductor Manufacturing Method” or by HVPE method or the like, and the sapphire substrate is removed by laser irradiation or polishing. Methods and the like are generally known.
[0003]
[Problems to be solved by the invention]
However, in these conventional techniques, the temperature drop after completion of the crystal growth process is caused by the difference in thermal expansion coefficient or lattice constant between the base substrate (eg, sapphire) and the group III nitride compound semiconductor. There is a problem that stress is sometimes applied to the target single crystal (eg, GaN, etc.) and many dislocations and cracks are generated in the target single crystal.
[0004]
For example, when the conventional technology as described above is used, when a nitride semiconductor such as gallium nitride (GaN) is grown on a base substrate formed of sapphire or silicon (Si) and then cooled to room temperature, Many dislocations and cracks are generated in the nitride semiconductor layer due to the stress caused by the difference in expansion coefficient or the difference in lattice constant.
[0005]
In this way, when a large number of dislocations and cracks enter the growth layer (nitride semiconductor layer), when a device is fabricated thereon, a large number of lattice defects, dislocations, deformations, cracks, etc. occur in the device. It causes deterioration of characteristics. Further, when an independent substrate (crystal) is obtained by removing the base substrate and leaving only the growth layer, a large-area substrate cannot be obtained due to the above-described dislocations and cracks. Further, in the case of thick film growth, problems such as cracks in the target single crystal even during the growth and partial delamination occur very easily.
[0006]
The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a high-quality semiconductor crystal independent of a base substrate. Furthermore, a group III nitride compound semiconductor light emitting element was formed using a semiconductor crystal substrate made of a group III nitride compound semiconductor having irregularities on the back surface, and a light reflecting film was formed on the irregularities on the back surface. A simple method of forming a group III nitride compound semiconductor light emitting device is proposed.
[0007]
[Means for Solving the Problems]
  In order to solve the above problems, the following means are effective..
[0008]
  That is, the firstMeans is a method for growing a semiconductor crystal made of a group III nitride compound semiconductor on a base substrate to obtain a high-quality semiconductor crystal independent of the base substrate, and a substrate processing step of providing a protrusion or unevenness on the base substrate And an epitaxial growth preventing film forming step for forming an epitaxial growth preventing film on the upper surface portion and the side surface portion of the convex portion while leaving the bottom surface of the concave portion of the underlying substrate, and a bottom surface of the concave portion of the underlying substrate on which the epitaxial growth preventing film is not formed. A crystal growth step of crystal-growing the semiconductor crystal until the crystal growth surface is connected to each other by crystal growth and grows into at least a series of substantially planes. And a separation step of separating the semiconductor crystal and the base substrate by breaking at the bottom surface of the concave portion of the base substrate where the epitaxial growth preventing film is not formed.
[0010]
However, the “group III nitride compound semiconductor” in the present invention is generally a binary, ternary or quaternary “Al”._1-xyGa_yIn_xN; 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ 1-xy ≦ 1 ”is included, and semiconductors having an arbitrary mixed crystal ratio represented by the general formula are included, and p-type or n-type impurities are further included. The added semiconductor is also included in the category of “Group III nitride compound semiconductor” in this specification. Further, at least a part of the above group III elements (Al, Ga, In) is replaced with boron (B), thallium (Tl), or the like, or at least a part of nitrogen (N) is phosphorus (P ), Arsenic (As), antimony (Sb), semiconductors substituted with bismuth (Bi), and the like are also included in the category of “Group III nitride compound semiconductor” in this specification. Moreover, as said p-type impurity, magnesium (Mg), calcium (Ca), etc. can be added, for example. As the n-type impurity, for example, silicon (Si), sulfur (S), selenium (Se), tellurium (Te), germanium (Ge), or the like can be added. Further, two or more elements of these impurities may be added simultaneously, or both types (p-type and n-type) may be added simultaneously.
[0011]
In addition, as the material of the above-mentioned base substrate, sapphire, spinel, manganese oxide, lithium gallium oxide (LiGaO₂), Molybdenum sulfide (MoS), silicon (Si), silicon carbide (SiC), AlN, GaAs, InP, GaP, MgO, ZnO, or MgAl₂O_FourEtc. can be used. That is, as a material for these base substrates, a known or arbitrary crystal growth substrate useful for crystal growth of a group III nitride compound semiconductor can be used.
[0012]
Note that it is more preferable to select sapphire as the material of the base substrate from the viewpoint of reaction with GaN, difference in thermal expansion coefficient, and stability at high temperature.
[0013]
When a target semiconductor crystal made of a group III nitride compound is grown on a base substrate having a large number of exposed surfaces separated by an epitaxial growth prevention film for preventing epitaxial growth, the base substrate and the semiconductor crystal are only exposed portions. Connected with. For this reason, if the thickness of the semiconductor crystal is made sufficiently large, internal stress or external stress tends to concentrate on the exposed portion of the underlying substrate. As a result, these stresses in particular act as shear stresses on the exposed portion of the underlying substrate, and when this stress increases, the exposed portion of the underlying substrate and the connection portion of the semiconductor crystal substrate break.
[0014]
That is, if this stress is used according to the above-mentioned means of the present invention, the base substrate and the semiconductor crystal can be easily separated (peeled). By this means, a single crystal (semiconductor crystal) independent from the base substrate can be obtained.
[0015]
As an epitaxial growth preventing film for preventing epitaxial growth, silicon dioxide (SiO2)₂), Silicon nitride (SiN_x) Other compounds, titanium (Ti), tungsten (W) and other metals can be used. In addition, a mask material used for so-called lateral growth (ELO) may be arbitrarily used.
[0016]
The above-mentioned “many exposed portions separated by the epi growth prevention film” may be “many” at least as long as viewed from a vertical section as shown in FIG. 1, for example. There is no problem even if they are connected. Therefore, for example, even if the planar shape is formed in a one-dimensional continuous rectangular wave shape, a steep sine wave shape, a spiral shape, or the like, it is possible to obtain the operation and effect of the present invention. In addition, the planar shape of the exposed portion of the base substrate is not limited to the cross-sectional stripe shape, but may be any island shape such as a substantially circular shape, a substantially elliptical shape, a substantially polygonal shape, or a substantially regular polygonal shape. Even if the shape is formed, it is of course possible to obtain the functions and effects of the present invention.
[0017]
Further, when separating (separating) the base substrate and the semiconductor crystal, a part of the semiconductor crystal may remain on the base substrate side, or a part of the base substrate may remain on the semiconductor crystal side. That is, the above separation step does not assume (necessary conditions) the complete separation of each material so that some of the remnants of these materials are eliminated.
[0018]
  Also,SecondThe means is characterized in that, in the crystal growth step, the semiconductor crystal is grown after forming at least a buffer layer on the exposed surface of the base substrate on which no epitaxial growth preventing film is formed. Here, the formation of at least a buffer layer means that at least one buffer layer is formed on a base substrate. In the latter stage, “the crystal growth surfaces are connected to each other by crystal growth to form at least a series of substantially flat surfaces. The crystal growth surface at the time of “growing a semiconductor crystal until it grows” is the upper surface of the buffer layer, the upper surface of the layer formed on the buffer layer, or the upper surface of the uppermost layer of the multiple layers formed on the buffer layer. Either is fine. The buffer layer may be aluminum nitride (AlN) or other group III nitride compound semiconductor, zinc oxide (ZnO), or any other arbitrary formation method and formation temperature. In addition, it is also included in the present invention to form one or more group III nitride compound semiconductors after forming the buffer layer to form a high-quality layer to be the nucleus of epitaxial growth.
[0019]
  Also,ThirdMeans aboveFirst or secondIn the crystal growth step of the means, the film thickness of the semiconductor crystal is set to 50 μm or more. The thickness of the semiconductor crystal intended for crystal growth is desirably about 50 μm or more. The thicker the semiconductor crystal, the stronger the semiconductor crystal, and the more easily the above-described shear stress is concentrated on the erosion debris. In addition, due to these effects, exfoliation can occur even at high temperatures such as during crystal growth based on the difference in lattice constant, so that stress due to the difference in thermal expansion coefficient almost acts on the semiconductor crystal after the exfoliation. Therefore, dislocations and cracks do not occur, and a high-quality semiconductor crystal (eg, GaN single crystal) can be obtained. This film thickness is more preferably 70 μm or more.
[0020]
  Also,4thMeans above1st to 3rdIn the means, by cooling or heating the semiconductor crystal and the base substrate, a stress based on a difference in thermal expansion coefficient between the semiconductor crystal and the base substrate is generated, and the erosion debris is broken using this stress. . That is, the rupture (peeling) may be caused by stress (shear stress) based on a difference in thermal expansion coefficient between the semiconductor crystal and the base substrate. Further, according to this means, particularly when the film thickness of the semiconductor crystal is formed to be 50 μm or more, the semiconductor crystal and the base substrate can be surely broken while maintaining the crystallinity of the semiconductor crystal high.
[0021]
  Also,5thMeans above1st and itsAs a dependent2nd to 4thIn any one of the means, the arrangement interval of the exposed portions of the base substrate is set to 1 μm or more and 50 μm or less. That is, it is almost equal to the area covered by the epi growth prevention film. More desirably, the arrangement interval of the exposed portions of the base substrate is preferably about 5 to 30 μm, although it depends on crystal growth conditions. However, this arrangement | positioning space | interval means the distance between the center points of the exposed part which mutually approaches.
[0022]
By these means, it is possible to cover the upper portion of the epitaxial growth preventing film, which is not an exposed portion, with a semiconductor crystal. If this value becomes too large, the upper portion of the epi-growth prevention film cannot be reliably covered with a semiconductor crystal, and a crystal with uniform crystallinity and good quality (semiconductor crystal) cannot be obtained. If it is too large, the crystal orientation shift becomes remarkable, which is not desirable.
[0023]
Further, when the lateral thickness, width, or diameter of the exposed portion is S and the above-described arrangement interval (arrangement period) is L, the value of S / L is preferably about 1/4 to 1/6. Such setting sufficiently promotes the lateral growth (ELO) of the desired semiconductor crystal A, so that a high-quality single crystal can be obtained. Hereinafter, the distance between the exposed portions facing each other is W (= L−S), and this region (that is, the region above the epi growth prevention film) may be called a wing. Hereinafter, the width S may be referred to as a seed width. Therefore, the ratio S / W of the seed width to the wing is preferably about 1/3 to 1/5.
[0024]
Further, it is more desirable to carry out the processing step and the formation of the epitaxial growth preventing film so that the exposed portions of the base substrate are arranged at substantially equal intervals or at substantially constant intervals. As a result, the growth conditions for the lateral growth are substantially uniform as a whole, and the quality of crystallinity and unevenness in the growth film thickness are less likely to occur. In addition, since local variations are less likely to occur during the time until the upper portion of the epi-growth prevention film is completely covered by the semiconductor crystal, for example, from a crystal growth method with a low crystal growth rate, a crystal with a high crystal growth rate is used. When the crystal growth method is changed to the growth method, it becomes easy to determine the timing accurately, early, or uniquely. In addition, such a method makes it possible to distribute the above-mentioned shear stress to each erosion debris part evenly, so that the exposed portion of the base substrate is evenly broken and the base substrate and the semiconductor crystal are separated. Can be implemented reliably.
[0025]
Therefore, for example, the exposed portion of the base substrate may be formed on the upper surface of a striped mesa shape and arranged at equal intervals in the same direction. Such formation of the erosion debris has an advantage in light of the current state of the art of general etching processing, such as being easy and reliable. At this time, the direction of the mesa (exposed portion) may be <1-100> or <11-20> of the semiconductor crystal.
[0026]
It is also effective to form an exposed portion on a lattice point of a two-dimensional triangular lattice whose base is a substantially regular triangle having a side of 0.1 μm or more. According to this method, since the contact area with the base substrate can be further reduced, the number of dislocations can be reliably reduced and the base substrate can be easily separated based on the above-described action.
[0027]
It is also effective to form a horizontal shape of the exposed portion into a substantially regular triangle, a substantially regular hexagon, a substantial circle, or a quadrangle. By this method, the crystal axis direction of the crystal formed from the group III nitride compound semiconductor can be easily aligned in each part, or the horizontal length (thickness) of the exposed portion with respect to an arbitrary horizontal direction Therefore, the number of dislocations can be suppressed. In particular, regular hexagons and regular triangles are more desirable because they easily match the crystal structure of the semiconductor crystal. Further, there is a merit in light of the current state of the technical level of general etching processing, in which a circle or a rectangle is easy to form in terms of manufacturing technology.
[0028]
  In addition, the present invention6thThe means is to erode the base substrate by 0.01 μm or more. Further, if a part of the base substrate is eroded by the above erosion treatment (etching process or the like), the surface of the target semiconductor crystal (crystal growth surface) can be more easily flattened in the subsequent crystal growth step. The larger the “cavity” is, the more easily stress (shear stress) is concentrated on the exposed portion of the base substrate.
[0029]
  Also,7thMeans above1st to 6thIn one of the means, the thickness, width, or diameter in the lateral direction of the exposed portion of the base substrate is set to 0.1 μm or more and 20 μm or less in the epitaxial growth preventing film forming step. More desirably, the thickness, width, or diameter in the horizontal direction of the exposed portion of the base substrate is preferably about 0.5 to 10 μm, although it depends on the conditions for crystal growth. If the thickness is too thick, the influence of the stress acting on the semiconductor crystal based on the lattice constant difference becomes large, and the number of dislocations in the semiconductor crystal tends to increase. On the other hand, if it is too thin, it is difficult to form the exposed portion of the base substrate, or the crystal growth rate of the exposed portion of the base substrate is slow, which is not desirable.
[0030]
Also, when breaking due to stress (shear stress, etc.), if the lateral thickness, width, or diameter of the exposed portion of the base substrate becomes too large, the contact area with the base substrate will increase, so Unbreakable parts are likely to occur, which is not desirable. In addition, the magnitude of the influence of the stress acting on the semiconductor crystal based on the difference in lattice constant does not depend only on the lateral thickness (length) of the exposed portion of the base substrate, but the arrangement interval of the exposed portion of the base substrate, etc. Also depends on. If these setting ranges are inappropriate, the influence of stress based on the difference in lattice constant increases as described above, and the number of dislocations in the semiconductor crystal tends to increase, which is not desirable.
[0031]
Further, since the thickness, width, or diameter in the lateral direction near the top of the exposed portion of the base substrate has an optimum value or an appropriate range as described above, the shape of the exposed portion of the base substrate is at least local. Close shape (island shape), further, a shape closed convexly toward the outside is preferable. More preferably, this shape is a substantially circular shape, a substantially regular polygon shape, or the like. With such a setting, it becomes easy to reliably realize the optimum value or the appropriate range in any horizontal direction.
[0032]
  Also,8thMeans above1st to 7thIn the crystal growth process of any one means, the crystal growth method is changed from a crystal growth method having a low crystal growth rate to a crystal growth method having a high crystal growth rate. For example, a semiconductor crystal with good crystallinity can be obtained in a short time by changing the crystal growth method on the way from a crystal growth method having a fast lateral growth to a crystal growth method having a fast vertical growth.
[0033]
  Also,9thMeans above1st to 8thIn any one of the means, at least after the separation step, there is provided a step of removing the broken debris remaining on the back surface of the semiconductor crystal by chemical or physical processing such as etching. According to this means, when an electrode such as a semiconductor light emitting element is formed on the back surface of the semiconductor crystal (the surface on which the base substrate is peeled off), current unevenness and electrical resistance generated near the interface between the electrode and the semiconductor crystal. Therefore, it is possible to reduce the driving voltage or improve the light emission intensity.
[0034]
Furthermore, when the electrode is also used as a reflecting mirror such as a semiconductor light emitting device, the light absorption and scattering near the mirror surface is reduced and the reflectance is improved, so that the emission intensity is improved. Also, for example, when this process is performed by physical processing such as polishing, if there is a buffer layer on the back surface of the semiconductor crystal, it is also removed, or the back surface of the semiconductor crystal is flattened. Therefore, the above-described effects such as suppression of current unevenness and electric resistance, or reduction of light absorption and scattering near the mirror surface can be further reinforced.
[0035]
Note that the above processing may be heat treatment. If the sublimation temperature of the portion to be removed is lower than the sublimation temperature of the target semiconductor crystal, the unnecessary portion can be removed by a temperature increase process, laser irradiation, or the like.
[0038]
  Also,10thThe means has a semiconductor crystal manufactured by using the method for manufacturing a semiconductor crystal according to any one of the first to ninth means as a crystal growth substrate, and the unevenness or epi growth prevention film of the base substrate is formed on the back surface. And forming a group III nitride compound semiconductor light emitting device by forming a light reflecting film on the concavo-convex portion. As a result, the group III nitride compound semiconductor light-emitting element has irregularities with a reflective film formed on the back surface, so that the light extraction efficiency from the front surface side (the side opposite to the irregularities) is improved.
[0039]
When the main crystal growth step is performed after forming the buffer layer or the buffer layer and one or more semiconductor layers, the first semiconductor layer to be stacked is “Al_xGa_1-xIt is desirable to form a buffer layer made of N (0 ≦ x <1) ”. However, in addition to this buffer layer, an intermediate layer of substantially the same composition as the above buffer layer (eg, AlN or AlGaN) is formed periodically or alternately with other layers, or a multilayer structure is formed. As shown in FIG. With such a buffer layer (or intermediate layer), it is possible to improve the crystallinity by the same operation principle as before, such as the stress acting on the semiconductor crystal A caused by the difference in lattice constant can be relieved. .
[0040]
In the separation step, when the temperature of the base substrate and the semiconductor crystal A is lowered, these are left in the reaction chamber of the growth apparatus, and ammonia (NH_Three) A method of cooling to approximately room temperature at a cooling rate of approximately “-100 ° C./min to −0.5 ° C./min” with the gas flowing in the reaction chamber is desirable. For example, by such a method, it is possible to reliably perform the separation step while maintaining the crystallinity of the semiconductor crystal A stably and in good quality.
By the above means of the present invention, the above-mentioned problem can be effectively or rationally solved.
[0041]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described based on specific examples. However, the present invention is not limited to the following examples.
[0042]
In the following examples, silicon dioxide (SiO2) is used as an epi-growth prevention film on a sapphire substrate.₂), An AlN buffer layer was formed on the exposed surface of the sapphire substrate by sputtering, and then GaN crystal growth was performed by halide vapor phase epitaxy (HVPE).
[0043]
(First embodiment)
FIG. 1 is a schematic cross-sectional view of a semiconductor crystal, illustrating the manufacturing process of the semiconductor crystal of this example. First, the sapphire substrate 101 (underlying substrate) having a thickness of about 250 μm square on 1 inch was cleaned by organic cleaning and heat treatment (baking). ((A) in FIG. 1)
[0044]
1. Substrate processing process:
Next, stripe-shaped convex portions having an arrangement period L≈20 μm were formed by selective dry etching using reactive ion etching (RIE) using a hard bake resist mask (FIG. 1B). That is, the stripe width (seed width S) ≈5 μm, the wing width W≈15 μm, and the substrate was etched in stripes until the substrate was etched by about 0.5 μm, thereby forming a convex portion having a substantially rectangular cross-sectional shape. Further, the resist mask was formed so that the side wall of the convex portion remaining in the stripe shape was the {11-20} plane of the GaN layer to be formed thereafter. By this etching, stripe-shaped convex portions were formed substantially periodically on the surface of the sapphire substrate 101.
[0045]
2. Epi growth prevention film formation process:
Next, silicon dioxide (SiO 2) is formed on the side surface and the concave portion of the convex portion other than the upper surface of the striped convex portion on the surface of the sapphire substrate 101.₂The epitaxial growth prevention film 102 made of The film thickness of the epi growth prevention film 102 was about 0.2 μm. Thus, in the sapphire substrate 101, only the upper surface of the stripe-shaped convex portion was exposed ((c) in FIG. 1).
[0046]
Next, an AlN buffer layer (not shown in FIG. 1) was formed only on the upper surface of the convex portion of the base substrate 101 by sputtering.
[0047]
3. Crystal growth process:
Next, a target semiconductor crystal 1A made of a GaN single crystal was formed by the HVPE method with the upper surface of the convex portion of the base substrate 101 covered with the AlN buffer layer as the crystal growth surface.
[0048]
Finally, the target semiconductor crystal 1A is grown to about 250 μm. At this time, GaN grows in the horizontal direction and the vertical direction at the initial stage of growth, and after the respective parts are connected and flattened into a series of substantially planar shapes, the GaN crystal grows in the vertical direction. In this HVPE method, a horizontal HVPE apparatus was used. In addition, Group V materials include ammonia (NH_Three), And GaCl obtained by reacting Ga and HCl was used as the Group III raw material.
[0049]
In this way, the upper part of the epitaxial growth prevention film was mainly filled by lateral epitaxial growth, and thereafter, the semiconductor crystal 1A (GaN single crystal) having a desired film thickness was obtained by vertical growth (FIG. 1 (d)). . In addition, the code | symbol R in a figure has shown the "cavity."
[0050]
4). Separation process
The semiconductor crystal 1A is slowly cooled from 1100 ° C. to about room temperature at a cooling rate of 1.5 ° C./min. Thereby, peeling occurred in the vicinity of the AlN buffer layer formed on the upper surface of the convex portion of the sapphire substrate 101, and a semiconductor crystal 1A (GaN single crystal) having a target film thickness independent of the sapphire substrate 101 was obtained (FIG. 1 ( e)).
[0051]
(Second embodiment)
FIG. 2 is a schematic cross-sectional view of a semiconductor crystal, illustrating the manufacturing process of the semiconductor crystal of this example. In the first embodiment of FIG. 1, crystal growth was performed from the top surface of the convex portion formed on the sapphire substrate, but in this embodiment, crystal growth was performed from the bottom surface of the concave portion formed on the sapphire substrate. First, as in the first embodiment, a sapphire substrate 201 (underlying substrate) having a thickness of about 250 μm and measuring 1 inch square was cleaned by organic cleaning and heat treatment (baking). ((A) of FIG. 2)
[0052]
1. Substrate processing process:
Next, stripe-shaped convex portions and concave portions having an arrangement period L≈20 μm were formed by selective dry etching using reactive ion etching (RIE) using a hard bake resist mask (FIG. 2B). ). That is, the width of the bottom surface of the concave portion (stripe width, seed width) S≈5 μm, the width of the top surface of the convex portion (wing width) W≈15 μm, and the substrate is etched in a stripe shape until the substrate is etched by about 0.5 μm. A convex portion having a substantially rectangular shape was formed. Further, the resist mask was formed so that the side wall of the convex portion remaining in the stripe shape was the {11-20} plane of the GaN layer to be formed thereafter. By this etching, striped concave portions were formed on the surface of the sapphire substrate 101 substantially periodically.
[0053]
2. Epi growth prevention film formation process:
Next, silicon dioxide (SiO 2) is formed on the side surface and top surface of the convex portion other than the bottom surface of the striped concave portion on the sapphire substrate 201 surface.₂The epitaxial growth prevention film 202 made of The film thickness of the epi growth prevention film 202 was about 0.2 μm. Thus, in the sapphire substrate 201, only the bottom surface of the striped recess was exposed ((c) in FIG. 2).
[0054]
3. Crystal growth process:
Next, a target semiconductor crystal 2A made of a GaN single crystal was formed by HVPE using the bottom surface of the recess of the base substrate 201 as a crystal growth surface.
[0055]
Finally, the target semiconductor crystal 2A is grown to about 250 μm. At this time, GaN grows in the horizontal direction and the vertical direction at the initial stage of growth, and after the respective parts are connected and flattened into a series of substantially planar shapes, the GaN crystal grows in the vertical direction. In this HVPE method, a horizontal HVPE apparatus was used. In addition, Group V materials include ammonia (NH_Three), And GaCl obtained by reacting Ga and HCl was used as the Group III raw material.
[0056]
Thus, the upper part of the epitaxial growth preventing film was mainly buried by lateral epitaxial growth, and thereafter, the semiconductor crystal 2A (GaN single crystal) having a desired film thickness was obtained by vertical growth (FIG. 2D). In this embodiment, the so large “cavity” of the first embodiment could not be formed.
[0057]
4). Separation process
The semiconductor crystal 2A is slowly cooled from 1100 ° C. to approximately room temperature at a cooling rate of 1.5 ° C./min. As a result, separation occurred near the interface between the recess of the sapphire substrate 201 and the semiconductor crystal 2A, and a semiconductor crystal 2A (GaN single crystal) having a target thickness independent of the sapphire substrate 201 was obtained (FIG. 2 (e)). . The semiconductor crystal 2A (GaN single crystal) was a semiconductor crystal having unevenness on the back surface corresponding to the unevenness of the sapphire substrate 201.
[0058]
(Third embodiment)
FIG. 3 is a schematic cross-sectional view of a semiconductor crystal, illustrating the manufacturing process of the semiconductor crystal of this example. In this embodiment, the processing step of the sapphire substrate is omitted, and a semiconductor crystal having the unevenness obtained in the second embodiment on the back surface is obtained. First, as in the first and second embodiments, a sapphire substrate 301 (underlying substrate) having a thickness of about 250 μm on one inch square was cleaned by organic cleaning and heat treatment (baking). ((A) of FIG. 3)
[0059]
1. Epi growth prevention film formation process:
Next, stripes of silicon dioxide (SiO2) are formed on the surface of the sapphire substrate 301.₂The epitaxial growth prevention film 302 made of The film thickness of the epi growth prevention film 302 was about 0.2 μm. Further, L, S, and W were the same as those of the unevenness of the second example. Thus, the sapphire substrate 301 was exposed in a stripe shape ((b) of FIG. 3).
[0060]
Next, using the exposed surface of the base substrate 301 as a crystal growth surface, H₂10 liters / minute, NH_ThreeWas supplied at 5 liters / minute and TMA was supplied at 20 μmol / minute, and an AlN buffer layer (not shown in FIG. 3) was grown to a thickness of about 200 nm.
[0061]
2. Crystal growth process:
Next, the target semiconductor crystal 3A made of a GaN single crystal was formed by the HVPE method using the exposed surface of the base substrate 301 covered with the AlN buffer layer as the crystal growth surface.
[0062]
Finally, the target semiconductor crystal 3A is grown to about 250 μm. At this time, GaN grows in the horizontal direction and the vertical direction at the initial stage of growth, and after the respective parts are connected and flattened into a series of substantially planar shapes, the GaN crystal grows in the vertical direction. Also in this example, a horizontal HVPE apparatus was used. In addition, Group V materials include ammonia (NH_Three), And GaCl obtained by reacting Ga and HCl was used as the Group III raw material.
[0063]
Thus, the upper part of the epitaxial growth preventing film was mainly buried by lateral epitaxial growth, and thereafter, a semiconductor crystal 3A (GaN single crystal) having a desired film thickness was obtained by vertical growth (FIG. 3C). In this example, as in the second example, a large “cavity” could not be formed.
[0064]
3. Separation process
The semiconductor crystal 3A is slowly cooled from 1100 ° C. to about room temperature at a cooling rate of 1.5 ° C./min. As a result, separation occurred in the vicinity of the AlN buffer layer formed on the exposed surface of the sapphire substrate 301, and a semiconductor crystal 3A (GaN single crystal) having a target film thickness independent of the sapphire substrate 301 was obtained (FIG. 3D). ). The semiconductor crystal 3A (GaN single crystal) was a semiconductor crystal having irregularities on the back surface corresponding to the epi-growth preventing film 302 formed on the sapphire substrate 301.
[0065]
(Fourth embodiment)
Using the semiconductor crystal (GaN single crystal) 2A obtained in the second example, a Group III nitride compound semiconductor light emitting device 100 was produced. The configuration is shown in FIG. The group III nitride compound semiconductor light emitting device 100 is an LED formed by epitaxially growing a group III nitride compound semiconductor layer on an n-type GaN single crystal 2A, and the uppermost layer is a p-type layer. . In FIG. 4, the group III nitride compound semiconductor layers other than the n-type GaN single crystal 2A are collectively indicated by reference numeral 3. The n-type GaN single crystal 2A has an n-electrode 1M having a function of a light reflection film on the back surface. The upper layer of the group III nitride compound semiconductor layer 3 has a light-transmitting p-electrode 4M. In the group III nitride compound semiconductor light emitting device 100, the n-type GaN single crystal 2 </ b> A has an n-side electrode 1 </ b> M having irregularities on the back surface and also functioning as a light reflection film. Improved light extraction efficiency.
[0066]
In addition to the above buffer layer, an intermediate layer of substantially the same composition (eg, AlN or AlGaN) as the above buffer layer is formed periodically or alternately with other layers, or a multilayer structure is formed. As is done, they may be stacked. Crystallinity is improved by the same principle of action as in the past, such as relaxation of the stress acting on the semiconductor crystals 1A, 2A, 3A due to the difference in lattice constant by the lamination of such buffer layers (or intermediate layers). Is possible.
[0067]
In the separation step, when the temperature of the base substrate and the semiconductor crystals 1A, 2A, and 3A is lowered, these are left in the reaction chamber of the growth apparatus, and ammonia (NH_Three) A method of cooling to a substantially normal temperature at a cooling rate of approximately “-100 ° C./min to −0.5 ° C./min” while the gas is allowed to flow into the reaction chamber may be used. If this cooling rate is too high, cracks and cracks may occur in the semiconductor crystal.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view illustrating a process for manufacturing a semiconductor crystal according to a first embodiment of the invention.
FIG. 2 is a schematic cross-sectional view illustrating a semiconductor crystal manufacturing process according to a second embodiment of the invention.
FIG. 3 is a schematic cross-sectional view illustrating a process for manufacturing a semiconductor crystal according to a third example of the invention.
FIG. 4 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting element according to a fourth example of the invention.
[Explanation of symbols]
101, 201, 301 ... Underlying substrate (eg, sapphire, etc.)
102… SiO₂Layer (Epitaxial growth prevention film)
1A, 2A, 3A ... Target semiconductor crystal (Group III nitride compound semiconductor)
L ... Arrangement cycle of erosion debris
S… Seed width
W… Wing width
1M: n electrode having a function of a light reflecting film
3 Group III nitride compound semiconductor layer constituting LED
4M ... Light transmissive p-electrode

Claims (10)

A method of growing a semiconductor crystal composed of a group III nitride compound semiconductor on a base substrate to obtain a high-quality semiconductor crystal independent of the base substrate,
A substrate processing step of providing irregularities on the base substrate;
An epi-growth prevention film forming step for forming an epi-growth prevention film on the upper surface part and side surface part of the convex part while leaving the bottom surface of the concave part of the base substrate;
The bottom surface of the concave portion of the base substrate on which the epi growth prevention film is not formed is the first crystal growth surface where the semiconductor crystal begins to grow, and the crystal growth surfaces are connected to each other by crystal growth to form at least a series of substantially flat surfaces. A crystal growth step of growing the semiconductor crystal until it grows into
And a separation step of separating the semiconductor crystal and the base substrate by breaking at the bottom surface of the concave portion of the base substrate on which the epi-growth preventing film is not formed.   2. The semiconductor crystal according to claim 1, wherein, in the crystal growth step, the semiconductor crystal is grown after at least a buffer layer is formed on an exposed surface of the base substrate on which the epitaxial growth prevention film is not formed. Manufacturing method.   3. The method of manufacturing a semiconductor crystal according to claim 1, wherein in the crystal growth step, the film thickness of the semiconductor crystal is 50 μm or more.   The semiconductor crystal and the base substrate are cooled or heated to generate a stress based on a difference in thermal expansion coefficient between the semiconductor crystal and the base substrate, and the stress is used to break. The manufacturing method of the semiconductor crystal of any one of Claim 1 thru | or 3.   5. The method of manufacturing a semiconductor crystal according to claim 1, wherein, in the substrate processing step, an interval between the recesses is 1 μm or more and 50 μm or less.   6. The method of manufacturing a semiconductor crystal according to claim 1, wherein in the substrate processing step, the base substrate is eroded by 0.01 μm or more.   The thickness, width, or diameter in the lateral direction of the exposed portion of the base substrate is set to 0.1 μm or more and 20 μm or less in the epi growth prevention film forming step. 2. A method for producing a semiconductor crystal according to item 1.   8. The crystal growth method according to claim 1, wherein in the crystal growth step, the crystal growth method is changed halfway from a crystal growth method having a low crystal growth rate to a crystal growth method having a high crystal growth rate. The manufacturing method of the semiconductor crystal of description.   9. The method according to claim 1, further comprising a step of removing the back surface of the semiconductor crystal by chemical or physical processing such as etching after at least the separation step. 10. The manufacturing method of the semiconductor crystal of description.   An unevenness or epi-growth prevention film of the base substrate on the back surface, having the semiconductor crystal manufactured as a crystal growth substrate, manufactured using the method for manufacturing a semiconductor crystal according to any one of claims 1 to 9. A Group III nitride compound semiconductor light-emitting element having irregularities corresponding to the presence or absence of the light-emitting element and having a light reflecting film formed on the back surface having the irregularities.

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