JP2013534052A5 - - Google Patents
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- Publication number
- JP2013534052A5 JP2013534052A5 JP2013516599A JP2013516599A JP2013534052A5 JP 2013534052 A5 JP2013534052 A5 JP 2013534052A5 JP 2013516599 A JP2013516599 A JP 2013516599A JP 2013516599 A JP2013516599 A JP 2013516599A JP 2013534052 A5 JP2013534052 A5 JP 2013534052A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- gate stack
- dopant
- doped semiconductor
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 54
- 239000010410 layer Substances 0.000 claims 32
- 239000002019 doping agent Substances 0.000 claims 23
- 239000000463 material Substances 0.000 claims 22
- 239000002356 single layer Substances 0.000 claims 13
- 239000000758 substrate Substances 0.000 claims 12
- 238000000034 method Methods 0.000 claims 8
- 238000000407 epitaxy Methods 0.000 claims 7
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims 6
- 229910021332 silicide Inorganic materials 0.000 claims 5
- 229910045601 alloy Inorganic materials 0.000 claims 4
- 239000000956 alloy Substances 0.000 claims 4
- 239000002184 metal Substances 0.000 claims 3
- 238000000231 atomic layer deposition Methods 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000011065 in-situ storage Methods 0.000 claims 1
- 238000007373 indentation Methods 0.000 claims 1
- 239000012212 insulator Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/823,163 US8299535B2 (en) | 2010-06-25 | 2010-06-25 | Delta monolayer dopants epitaxy for embedded source/drain silicide |
| US12/823,163 | 2010-06-25 | ||
| PCT/US2011/039892 WO2011162977A2 (en) | 2010-06-25 | 2011-06-10 | Delta monolayer dopants epitaxy for embedded source/drain silicide |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2013534052A JP2013534052A (ja) | 2013-08-29 |
| JP2013534052A5 true JP2013534052A5 (enExample) | 2014-08-21 |
Family
ID=45351702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013516599A Pending JP2013534052A (ja) | 2010-06-25 | 2011-06-10 | 埋め込みストレッサ要素を含む半導体構造およびその製造方法 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US8299535B2 (enExample) |
| JP (1) | JP2013534052A (enExample) |
| KR (1) | KR20130028941A (enExample) |
| CN (1) | CN102906880B (enExample) |
| BR (1) | BR112012031951A2 (enExample) |
| DE (1) | DE112011101378B4 (enExample) |
| GB (1) | GB2494608B (enExample) |
| SG (1) | SG184824A1 (enExample) |
| WO (1) | WO2011162977A2 (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9537004B2 (en) * | 2011-05-24 | 2017-01-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Source/drain formation and structure |
| US20130270647A1 (en) | 2012-04-17 | 2013-10-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for nfet with high k metal gate |
| TWI605592B (zh) * | 2012-11-22 | 2017-11-11 | 三星電子股份有限公司 | 在凹處包括一應力件的半導體裝置及其形成方法（二） |
| KR102059526B1 (ko) | 2012-11-22 | 2019-12-26 | 삼성전자주식회사 | 내장 스트레서를 갖는 반도체 소자 형성 방법 및 관련된 소자 |
| US9029226B2 (en) | 2013-03-13 | 2015-05-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for doping lightly-doped-drain (LDD) regions of finFET devices |
| US9219133B2 (en) * | 2013-05-30 | 2015-12-22 | Stmicroelectronics, Inc. | Method of making a semiconductor device using spacers for source/drain confinement |
| US9293534B2 (en) | 2014-03-21 | 2016-03-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Formation of dislocations in source and drain regions of FinFET devices |
| US8841189B1 (en) | 2013-06-14 | 2014-09-23 | International Business Machines Corporation | Transistor having all-around source/drain metal contact channel stressor and method to fabricate same |
| US10164107B2 (en) * | 2014-01-24 | 2018-12-25 | Taiwan Semiconductor Manufacturing Company Ltd. | Embedded source or drain region of transistor with laterally extended portion |
| US9853154B2 (en) | 2014-01-24 | 2017-12-26 | Taiwan Semiconductor Manufacturing Company Ltd. | Embedded source or drain region of transistor with downward tapered region under facet region |
| US9673295B2 (en) | 2014-05-27 | 2017-06-06 | Globalfoundries Inc. | Contact resistance optimization via EPI growth engineering |
| US9893183B2 (en) * | 2014-07-10 | 2018-02-13 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method thereof |
| CN105280492B (zh) * | 2014-07-21 | 2018-08-10 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
| US9601574B2 (en) * | 2014-12-29 | 2017-03-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | V-shaped epitaxially formed semiconductor layer |
| KR102326112B1 (ko) | 2015-03-30 | 2021-11-15 | 삼성전자주식회사 | 반도체 소자 |
| US10665693B2 (en) * | 2015-04-30 | 2020-05-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure and manufacturing method thereof |
| US10177187B2 (en) | 2015-05-28 | 2019-01-08 | Taiwan Semiconductor Manufacturing Company Ltd. | Implant damage free image sensor and method of the same |
| US9812570B2 (en) | 2015-06-30 | 2017-11-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US10084090B2 (en) * | 2015-11-09 | 2018-09-25 | International Business Machines Corporation | Method and structure of stacked FinFET |
| CN108735894B (zh) * | 2017-04-14 | 2022-02-25 | 上海磁宇信息科技有限公司 | 一种高密度随机存储器架构 |
| US10763328B2 (en) | 2018-10-04 | 2020-09-01 | Globalfoundries Inc. | Epitaxial semiconductor material grown with enhanced local isotropy |
Family Cites Families (49)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100272523B1 (ko) | 1998-01-26 | 2000-12-01 | 김영환 | 반도체소자의배선형성방법 |
| US6331486B1 (en) | 2000-03-06 | 2001-12-18 | International Business Machines Corporation | Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy |
| US7329923B2 (en) | 2003-06-17 | 2008-02-12 | International Business Machines Corporation | High-performance CMOS devices on hybrid crystal oriented substrates |
| US7078742B2 (en) * | 2003-07-25 | 2006-07-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained-channel semiconductor structure and method of fabricating the same |
| US7303949B2 (en) * | 2003-10-20 | 2007-12-04 | International Business Machines Corporation | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture |
| US7023055B2 (en) | 2003-10-29 | 2006-04-04 | International Business Machines Corporation | CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding |
| US20050116290A1 (en) | 2003-12-02 | 2005-06-02 | De Souza Joel P. | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers |
| US7115955B2 (en) | 2004-07-30 | 2006-10-03 | International Business Machines Corporation | Semiconductor device having a strained raised source/drain |
| US7256121B2 (en) | 2004-12-02 | 2007-08-14 | Texas Instruments Incorporated | Contact resistance reduction by new barrier stack process |
| JP4369359B2 (ja) * | 2004-12-28 | 2009-11-18 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
| US20060234455A1 (en) | 2005-04-19 | 2006-10-19 | Chien-Hao Chen | Structures and methods for forming a locally strained transistor |
| US20070026599A1 (en) | 2005-07-27 | 2007-02-01 | Advanced Micro Devices, Inc. | Methods for fabricating a stressed MOS device |
| US7612389B2 (en) | 2005-09-15 | 2009-11-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Embedded SiGe stressor with tensile strain for NMOS current enhancement |
| JP2007157924A (ja) | 2005-12-02 | 2007-06-21 | Fujitsu Ltd | 半導体装置および半導体装置の製造方法 |
| US7939413B2 (en) | 2005-12-08 | 2011-05-10 | Samsung Electronics Co., Ltd. | Embedded stressor structure and process |
| US7718500B2 (en) | 2005-12-16 | 2010-05-18 | Chartered Semiconductor Manufacturing, Ltd | Formation of raised source/drain structures in NFET with embedded SiGe in PFET |
| US8900980B2 (en) | 2006-01-20 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Defect-free SiGe source/drain formation by epitaxy-free process |
| US7446026B2 (en) | 2006-02-08 | 2008-11-04 | Freescale Semiconductor, Inc. | Method of forming a CMOS device with stressor source/drain regions |
| US8017487B2 (en) * | 2006-04-05 | 2011-09-13 | Globalfoundries Singapore Pte. Ltd. | Method to control source/drain stressor profiles for stress engineering |
| US7288822B1 (en) * | 2006-04-07 | 2007-10-30 | United Microelectronics Corp. | Semiconductor structure and fabricating method thereof |
| JP4345774B2 (ja) * | 2006-04-26 | 2009-10-14 | ソニー株式会社 | 半導体装置の製造方法 |
| DE102006019937B4 (de) | 2006-04-28 | 2010-11-25 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung eines SOI-Transistors mit eingebetteter Verformungsschicht und einem reduzierten Effekt des potentialfreien Körpers |
| US7413961B2 (en) | 2006-05-17 | 2008-08-19 | Chartered Semiconductor Manufacturing Ltd. | Method of fabricating a transistor structure |
| US7618866B2 (en) * | 2006-06-09 | 2009-11-17 | International Business Machines Corporation | Structure and method to form multilayer embedded stressors |
| JP2008004776A (ja) * | 2006-06-22 | 2008-01-10 | Toshiba Corp | 半導体装置およびその製造方法 |
| US7795124B2 (en) | 2006-06-23 | 2010-09-14 | Applied Materials, Inc. | Methods for contact resistance reduction of advanced CMOS devices |
| US8853746B2 (en) | 2006-06-29 | 2014-10-07 | International Business Machines Corporation | CMOS devices with stressed channel regions, and methods for fabricating the same |
| US7554110B2 (en) * | 2006-09-15 | 2009-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS devices with partial stressor channel |
| US7494884B2 (en) | 2006-10-05 | 2009-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | SiGe selective growth without a hard mask |
| US7750338B2 (en) * | 2006-12-05 | 2010-07-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual-SiGe epitaxy for MOS devices |
| US20080157200A1 (en) | 2006-12-27 | 2008-07-03 | International Business Machines Corporation | Stress liner surrounded facetless embedded stressor mosfet |
| US7544997B2 (en) * | 2007-02-16 | 2009-06-09 | Freescale Semiconductor, Inc. | Multi-layer source/drain stressor |
| US8344447B2 (en) * | 2007-04-05 | 2013-01-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Silicon layer for stopping dislocation propagation |
| US8124473B2 (en) | 2007-04-12 | 2012-02-28 | Advanced Micro Devices, Inc. | Strain enhanced semiconductor devices and methods for their fabrication |
| US7989901B2 (en) * | 2007-04-27 | 2011-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS devices with improved source/drain regions with SiGe |
| US7736957B2 (en) | 2007-05-31 | 2010-06-15 | Freescale Semiconductor, Inc. | Method of making a semiconductor device with embedded stressor |
| JP2009099702A (ja) * | 2007-10-16 | 2009-05-07 | Toshiba Corp | 半導体装置及びその製造方法 |
| US20090140186A1 (en) * | 2007-12-03 | 2009-06-04 | Metso Automation Usa Inc. | Energy efficient solenoid for mechanically actuating a movable member |
| JP2009164200A (ja) * | 2007-12-28 | 2009-07-23 | Fujitsu Microelectronics Ltd | 半導体装置及びその製造方法 |
| US7687354B2 (en) | 2008-02-29 | 2010-03-30 | Freescale Semiconductor, Inc. | Fabrication of a semiconductor device with stressor |
| US20090242989A1 (en) | 2008-03-25 | 2009-10-01 | Chan Kevin K | Complementary metal-oxide-semiconductor device with embedded stressor |
| US8361895B2 (en) | 2008-09-16 | 2013-01-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Ultra-shallow junctions using atomic-layer doping |
| US8299453B2 (en) * | 2009-03-03 | 2012-10-30 | International Business Machines Corporation | CMOS transistors with silicon germanium channel and dual embedded stressors |
| JP2011066042A (ja) * | 2009-09-15 | 2011-03-31 | Panasonic Corp | 半導体装置とその製造方法 |
| US8022488B2 (en) * | 2009-09-24 | 2011-09-20 | International Business Machines Corporation | High-performance FETs with embedded stressors |
| US20110079861A1 (en) * | 2009-09-30 | 2011-04-07 | Lucian Shifren | Advanced Transistors with Threshold Voltage Set Dopant Structures |
| US8035141B2 (en) * | 2009-10-28 | 2011-10-11 | International Business Machines Corporation | Bi-layer nFET embedded stressor element and integration to enhance drive current |
| US8236660B2 (en) * | 2010-04-21 | 2012-08-07 | International Business Machines Corporation | Monolayer dopant embedded stressor for advanced CMOS |
| US9263339B2 (en) * | 2010-05-20 | 2016-02-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Selective etching in the formation of epitaxy regions in MOS devices |
-
2010
- 2010-06-25 US US12/823,163 patent/US8299535B2/en active Active
-
2011
- 2011-06-10 SG SG2012075586A patent/SG184824A1/en unknown
- 2011-06-10 KR KR1020127032728A patent/KR20130028941A/ko not_active Ceased
- 2011-06-10 JP JP2013516599A patent/JP2013534052A/ja active Pending
- 2011-06-10 GB GB1300789.3A patent/GB2494608B/en not_active Expired - Fee Related
- 2011-06-10 WO PCT/US2011/039892 patent/WO2011162977A2/en not_active Ceased
- 2011-06-10 CN CN201180023991.XA patent/CN102906880B/zh not_active Expired - Fee Related
- 2011-06-10 BR BR112012031951A patent/BR112012031951A2/pt not_active IP Right Cessation
- 2011-06-10 DE DE112011101378.7T patent/DE112011101378B4/de active Active
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