CN102906880B - 半导体结构及其制造方法 - Google Patents
半导体结构及其制造方法 Download PDFInfo
- Publication number
- CN102906880B CN102906880B CN201180023991.XA CN201180023991A CN102906880B CN 102906880 B CN102906880 B CN 102906880B CN 201180023991 A CN201180023991 A CN 201180023991A CN 102906880 B CN102906880 B CN 102906880B
- Authority
- CN
- China
- Prior art keywords
- layer
- gate stack
- doped semiconductor
- semiconductor material
- epitaxially doped
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/608—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having non-planar bodies, e.g. having recessed gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/82—Heterojunctions
- H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/823,163 US8299535B2 (en) | 2010-06-25 | 2010-06-25 | Delta monolayer dopants epitaxy for embedded source/drain silicide |
| US12/823,163 | 2010-06-25 | ||
| PCT/US2011/039892 WO2011162977A2 (en) | 2010-06-25 | 2011-06-10 | Delta monolayer dopants epitaxy for embedded source/drain silicide |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102906880A CN102906880A (zh) | 2013-01-30 |
| CN102906880B true CN102906880B (zh) | 2015-08-19 |
Family
ID=45351702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201180023991.XA Expired - Fee Related CN102906880B (zh) | 2010-06-25 | 2011-06-10 | 半导体结构及其制造方法 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US8299535B2 (enExample) |
| JP (1) | JP2013534052A (enExample) |
| KR (1) | KR20130028941A (enExample) |
| CN (1) | CN102906880B (enExample) |
| BR (1) | BR112012031951A2 (enExample) |
| DE (1) | DE112011101378B4 (enExample) |
| GB (1) | GB2494608B (enExample) |
| SG (1) | SG184824A1 (enExample) |
| WO (1) | WO2011162977A2 (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9537004B2 (en) * | 2011-05-24 | 2017-01-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Source/drain formation and structure |
| US20130270647A1 (en) | 2012-04-17 | 2013-10-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for nfet with high k metal gate |
| TWI605592B (zh) * | 2012-11-22 | 2017-11-11 | 三星電子股份有限公司 | 在凹處包括一應力件的半導體裝置及其形成方法(二) |
| KR102059526B1 (ko) | 2012-11-22 | 2019-12-26 | 삼성전자주식회사 | 내장 스트레서를 갖는 반도체 소자 형성 방법 및 관련된 소자 |
| US9029226B2 (en) | 2013-03-13 | 2015-05-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for doping lightly-doped-drain (LDD) regions of finFET devices |
| US9219133B2 (en) * | 2013-05-30 | 2015-12-22 | Stmicroelectronics, Inc. | Method of making a semiconductor device using spacers for source/drain confinement |
| US9293534B2 (en) | 2014-03-21 | 2016-03-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Formation of dislocations in source and drain regions of FinFET devices |
| US8841189B1 (en) | 2013-06-14 | 2014-09-23 | International Business Machines Corporation | Transistor having all-around source/drain metal contact channel stressor and method to fabricate same |
| US10164107B2 (en) * | 2014-01-24 | 2018-12-25 | Taiwan Semiconductor Manufacturing Company Ltd. | Embedded source or drain region of transistor with laterally extended portion |
| US9853154B2 (en) | 2014-01-24 | 2017-12-26 | Taiwan Semiconductor Manufacturing Company Ltd. | Embedded source or drain region of transistor with downward tapered region under facet region |
| US9673295B2 (en) | 2014-05-27 | 2017-06-06 | Globalfoundries Inc. | Contact resistance optimization via EPI growth engineering |
| US9893183B2 (en) * | 2014-07-10 | 2018-02-13 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method thereof |
| CN105280492B (zh) * | 2014-07-21 | 2018-08-10 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
| US9601574B2 (en) * | 2014-12-29 | 2017-03-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | V-shaped epitaxially formed semiconductor layer |
| KR102326112B1 (ko) | 2015-03-30 | 2021-11-15 | 삼성전자주식회사 | 반도체 소자 |
| US10665693B2 (en) * | 2015-04-30 | 2020-05-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure and manufacturing method thereof |
| US10177187B2 (en) | 2015-05-28 | 2019-01-08 | Taiwan Semiconductor Manufacturing Company Ltd. | Implant damage free image sensor and method of the same |
| US9812570B2 (en) | 2015-06-30 | 2017-11-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US10084090B2 (en) * | 2015-11-09 | 2018-09-25 | International Business Machines Corporation | Method and structure of stacked FinFET |
| CN108735894B (zh) * | 2017-04-14 | 2022-02-25 | 上海磁宇信息科技有限公司 | 一种高密度随机存储器架构 |
| US10763328B2 (en) | 2018-10-04 | 2020-09-01 | Globalfoundries Inc. | Epitaxial semiconductor material grown with enhanced local isotropy |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050082616A1 (en) * | 2003-10-20 | 2005-04-21 | Huajie Chen | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture |
| US20070235802A1 (en) * | 2006-04-05 | 2007-10-11 | Chartered Semiconductor Manufacturing Ltd | Method to control source/drain stressor profiles for stress engineering |
| CN101064257A (zh) * | 2006-04-26 | 2007-10-31 | 索尼株式会社 | 制造半导体器件的方法和半导体器件 |
| JP2009164200A (ja) * | 2007-12-28 | 2009-07-23 | Fujitsu Microelectronics Ltd | 半導体装置及びその製造方法 |
Family Cites Families (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100272523B1 (ko) | 1998-01-26 | 2000-12-01 | 김영환 | 반도체소자의배선형성방법 |
| US6331486B1 (en) | 2000-03-06 | 2001-12-18 | International Business Machines Corporation | Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy |
| US7329923B2 (en) | 2003-06-17 | 2008-02-12 | International Business Machines Corporation | High-performance CMOS devices on hybrid crystal oriented substrates |
| US7078742B2 (en) * | 2003-07-25 | 2006-07-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained-channel semiconductor structure and method of fabricating the same |
| US7023055B2 (en) | 2003-10-29 | 2006-04-04 | International Business Machines Corporation | CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding |
| US20050116290A1 (en) | 2003-12-02 | 2005-06-02 | De Souza Joel P. | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers |
| US7115955B2 (en) | 2004-07-30 | 2006-10-03 | International Business Machines Corporation | Semiconductor device having a strained raised source/drain |
| US7256121B2 (en) | 2004-12-02 | 2007-08-14 | Texas Instruments Incorporated | Contact resistance reduction by new barrier stack process |
| JP4369359B2 (ja) * | 2004-12-28 | 2009-11-18 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
| US20060234455A1 (en) | 2005-04-19 | 2006-10-19 | Chien-Hao Chen | Structures and methods for forming a locally strained transistor |
| US20070026599A1 (en) | 2005-07-27 | 2007-02-01 | Advanced Micro Devices, Inc. | Methods for fabricating a stressed MOS device |
| US7612389B2 (en) | 2005-09-15 | 2009-11-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Embedded SiGe stressor with tensile strain for NMOS current enhancement |
| JP2007157924A (ja) | 2005-12-02 | 2007-06-21 | Fujitsu Ltd | 半導体装置および半導体装置の製造方法 |
| US7939413B2 (en) | 2005-12-08 | 2011-05-10 | Samsung Electronics Co., Ltd. | Embedded stressor structure and process |
| US7718500B2 (en) | 2005-12-16 | 2010-05-18 | Chartered Semiconductor Manufacturing, Ltd | Formation of raised source/drain structures in NFET with embedded SiGe in PFET |
| US8900980B2 (en) | 2006-01-20 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Defect-free SiGe source/drain formation by epitaxy-free process |
| US7446026B2 (en) | 2006-02-08 | 2008-11-04 | Freescale Semiconductor, Inc. | Method of forming a CMOS device with stressor source/drain regions |
| US7288822B1 (en) * | 2006-04-07 | 2007-10-30 | United Microelectronics Corp. | Semiconductor structure and fabricating method thereof |
| DE102006019937B4 (de) | 2006-04-28 | 2010-11-25 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung eines SOI-Transistors mit eingebetteter Verformungsschicht und einem reduzierten Effekt des potentialfreien Körpers |
| US7413961B2 (en) | 2006-05-17 | 2008-08-19 | Chartered Semiconductor Manufacturing Ltd. | Method of fabricating a transistor structure |
| US7618866B2 (en) * | 2006-06-09 | 2009-11-17 | International Business Machines Corporation | Structure and method to form multilayer embedded stressors |
| JP2008004776A (ja) * | 2006-06-22 | 2008-01-10 | Toshiba Corp | 半導体装置およびその製造方法 |
| US7795124B2 (en) | 2006-06-23 | 2010-09-14 | Applied Materials, Inc. | Methods for contact resistance reduction of advanced CMOS devices |
| US8853746B2 (en) | 2006-06-29 | 2014-10-07 | International Business Machines Corporation | CMOS devices with stressed channel regions, and methods for fabricating the same |
| US7554110B2 (en) * | 2006-09-15 | 2009-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS devices with partial stressor channel |
| US7494884B2 (en) | 2006-10-05 | 2009-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | SiGe selective growth without a hard mask |
| US7750338B2 (en) * | 2006-12-05 | 2010-07-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual-SiGe epitaxy for MOS devices |
| US20080157200A1 (en) | 2006-12-27 | 2008-07-03 | International Business Machines Corporation | Stress liner surrounded facetless embedded stressor mosfet |
| US7544997B2 (en) * | 2007-02-16 | 2009-06-09 | Freescale Semiconductor, Inc. | Multi-layer source/drain stressor |
| US8344447B2 (en) * | 2007-04-05 | 2013-01-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Silicon layer for stopping dislocation propagation |
| US8124473B2 (en) | 2007-04-12 | 2012-02-28 | Advanced Micro Devices, Inc. | Strain enhanced semiconductor devices and methods for their fabrication |
| US7989901B2 (en) * | 2007-04-27 | 2011-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS devices with improved source/drain regions with SiGe |
| US7736957B2 (en) | 2007-05-31 | 2010-06-15 | Freescale Semiconductor, Inc. | Method of making a semiconductor device with embedded stressor |
| JP2009099702A (ja) * | 2007-10-16 | 2009-05-07 | Toshiba Corp | 半導体装置及びその製造方法 |
| US20090140186A1 (en) * | 2007-12-03 | 2009-06-04 | Metso Automation Usa Inc. | Energy efficient solenoid for mechanically actuating a movable member |
| US7687354B2 (en) | 2008-02-29 | 2010-03-30 | Freescale Semiconductor, Inc. | Fabrication of a semiconductor device with stressor |
| US20090242989A1 (en) | 2008-03-25 | 2009-10-01 | Chan Kevin K | Complementary metal-oxide-semiconductor device with embedded stressor |
| US8361895B2 (en) | 2008-09-16 | 2013-01-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Ultra-shallow junctions using atomic-layer doping |
| US8299453B2 (en) * | 2009-03-03 | 2012-10-30 | International Business Machines Corporation | CMOS transistors with silicon germanium channel and dual embedded stressors |
| JP2011066042A (ja) * | 2009-09-15 | 2011-03-31 | Panasonic Corp | 半導体装置とその製造方法 |
| US8022488B2 (en) * | 2009-09-24 | 2011-09-20 | International Business Machines Corporation | High-performance FETs with embedded stressors |
| US20110079861A1 (en) * | 2009-09-30 | 2011-04-07 | Lucian Shifren | Advanced Transistors with Threshold Voltage Set Dopant Structures |
| US8035141B2 (en) * | 2009-10-28 | 2011-10-11 | International Business Machines Corporation | Bi-layer nFET embedded stressor element and integration to enhance drive current |
| US8236660B2 (en) * | 2010-04-21 | 2012-08-07 | International Business Machines Corporation | Monolayer dopant embedded stressor for advanced CMOS |
| US9263339B2 (en) * | 2010-05-20 | 2016-02-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Selective etching in the formation of epitaxy regions in MOS devices |
-
2010
- 2010-06-25 US US12/823,163 patent/US8299535B2/en active Active
-
2011
- 2011-06-10 SG SG2012075586A patent/SG184824A1/en unknown
- 2011-06-10 KR KR1020127032728A patent/KR20130028941A/ko not_active Ceased
- 2011-06-10 JP JP2013516599A patent/JP2013534052A/ja active Pending
- 2011-06-10 GB GB1300789.3A patent/GB2494608B/en not_active Expired - Fee Related
- 2011-06-10 WO PCT/US2011/039892 patent/WO2011162977A2/en not_active Ceased
- 2011-06-10 CN CN201180023991.XA patent/CN102906880B/zh not_active Expired - Fee Related
- 2011-06-10 BR BR112012031951A patent/BR112012031951A2/pt not_active IP Right Cessation
- 2011-06-10 DE DE112011101378.7T patent/DE112011101378B4/de active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050082616A1 (en) * | 2003-10-20 | 2005-04-21 | Huajie Chen | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture |
| US20070235802A1 (en) * | 2006-04-05 | 2007-10-11 | Chartered Semiconductor Manufacturing Ltd | Method to control source/drain stressor profiles for stress engineering |
| CN101064257A (zh) * | 2006-04-26 | 2007-10-31 | 索尼株式会社 | 制造半导体器件的方法和半导体器件 |
| JP2009164200A (ja) * | 2007-12-28 | 2009-07-23 | Fujitsu Microelectronics Ltd | 半導体装置及びその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US8299535B2 (en) | 2012-10-30 |
| GB2494608A (en) | 2013-03-13 |
| JP2013534052A (ja) | 2013-08-29 |
| CN102906880A (zh) | 2013-01-30 |
| DE112011101378T8 (de) | 2013-05-08 |
| DE112011101378T5 (de) | 2013-03-07 |
| US20110316044A1 (en) | 2011-12-29 |
| GB2494608B (en) | 2013-09-04 |
| KR20130028941A (ko) | 2013-03-20 |
| DE112011101378B4 (de) | 2018-12-27 |
| WO2011162977A2 (en) | 2011-12-29 |
| SG184824A1 (en) | 2012-11-29 |
| BR112012031951A2 (pt) | 2018-03-06 |
| GB201300789D0 (en) | 2013-02-27 |
| WO2011162977A3 (en) | 2012-03-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102906880B (zh) | 半导体结构及其制造方法 | |
| JP5689470B2 (ja) | 埋め込みストレッサを有する高性能fetを形成するための方法および構造 | |
| US8035141B2 (en) | Bi-layer nFET embedded stressor element and integration to enhance drive current | |
| US7154118B2 (en) | Bulk non-planar transistor having strained enhanced mobility and methods of fabrication | |
| US8236660B2 (en) | Monolayer dopant embedded stressor for advanced CMOS | |
| TWI230460B (en) | Gate-induced strain for MOS performance improvement | |
| US8148214B2 (en) | Stressed field effect transistor and methods for its fabrication | |
| US8841190B2 (en) | MOS device for making the source/drain region closer to the channel region and method of manufacturing the same | |
| US20070269970A1 (en) | Structure and method for forming cmos devices with intrinsically stressed silicide using silicon nitride cap | |
| US7612389B2 (en) | Embedded SiGe stressor with tensile strain for NMOS current enhancement | |
| US20120061684A1 (en) | Transistor devices and methods of making | |
| CN107123670B (zh) | 鳍式场效应晶体管及其形成方法 | |
| TWI261323B (en) | MOSFET device with localized stressor | |
| KR101071787B1 (ko) | 간단한 이중 응력 라이너 구성을 이용하여 향상된 성능을 갖는 반도체 구조체 | |
| CN103066122A (zh) | Mosfet及其制造方法 | |
| JP2007150319A (ja) | 電界効果トランジスタデバイスおよびその製造方法 | |
| TW201248735A (en) | Method for fabricating semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20171027 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171027 Address after: American New York Patentee after: Core USA second LLC Address before: American New York Patentee before: International Business Machines Corp. |
|
| TR01 | Transfer of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150819 Termination date: 20190610 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |