JP2013534052A - 埋め込みストレッサ要素を含む半導体構造およびその製造方法 - Google Patents

埋め込みストレッサ要素を含む半導体構造およびその製造方法 Download PDF

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JP2013534052A
JP2013534052A JP2013516599A JP2013516599A JP2013534052A JP 2013534052 A JP2013534052 A JP 2013534052A JP 2013516599 A JP2013516599 A JP 2013516599A JP 2013516599 A JP2013516599 A JP 2013516599A JP 2013534052 A JP2013534052 A JP 2013534052A
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layer
gate stack
dopant
doped semiconductor
semiconductor substrate
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JP2013534052A5 (enExample
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チャン、ケヴィン、ケー
デューブ、アビシェク
ホルト、ジャドソン、アール
ジョンソン、ジェフリー、ビー
イ、ジンホン
パク、テギュ
ズー、ゼンマオ
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International Business Machines Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/608—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having non-planar bodies, e.g. having recessed gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2013516599A 2010-06-25 2011-06-10 埋め込みストレッサ要素を含む半導体構造およびその製造方法 Pending JP2013534052A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/823,163 US8299535B2 (en) 2010-06-25 2010-06-25 Delta monolayer dopants epitaxy for embedded source/drain silicide
US12/823,163 2010-06-25
PCT/US2011/039892 WO2011162977A2 (en) 2010-06-25 2011-06-10 Delta monolayer dopants epitaxy for embedded source/drain silicide

Publications (2)

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JP2013534052A true JP2013534052A (ja) 2013-08-29
JP2013534052A5 JP2013534052A5 (enExample) 2014-08-21

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JP2013516599A Pending JP2013534052A (ja) 2010-06-25 2011-06-10 埋め込みストレッサ要素を含む半導体構造およびその製造方法

Country Status (9)

Country Link
US (1) US8299535B2 (enExample)
JP (1) JP2013534052A (enExample)
KR (1) KR20130028941A (enExample)
CN (1) CN102906880B (enExample)
BR (1) BR112012031951A2 (enExample)
DE (1) DE112011101378B4 (enExample)
GB (1) GB2494608B (enExample)
SG (1) SG184824A1 (enExample)
WO (1) WO2011162977A2 (enExample)

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US9029226B2 (en) 2013-03-13 2015-05-12 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for doping lightly-doped-drain (LDD) regions of finFET devices
US9219133B2 (en) * 2013-05-30 2015-12-22 Stmicroelectronics, Inc. Method of making a semiconductor device using spacers for source/drain confinement
US9293534B2 (en) 2014-03-21 2016-03-22 Taiwan Semiconductor Manufacturing Company, Ltd. Formation of dislocations in source and drain regions of FinFET devices
US8841189B1 (en) 2013-06-14 2014-09-23 International Business Machines Corporation Transistor having all-around source/drain metal contact channel stressor and method to fabricate same
US10164107B2 (en) * 2014-01-24 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Embedded source or drain region of transistor with laterally extended portion
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US9673295B2 (en) 2014-05-27 2017-06-06 Globalfoundries Inc. Contact resistance optimization via EPI growth engineering
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US10665693B2 (en) * 2015-04-30 2020-05-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and manufacturing method thereof
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US8299535B2 (en) 2012-10-30
GB2494608A (en) 2013-03-13
CN102906880A (zh) 2013-01-30
DE112011101378T8 (de) 2013-05-08
DE112011101378T5 (de) 2013-03-07
US20110316044A1 (en) 2011-12-29
GB2494608B (en) 2013-09-04
KR20130028941A (ko) 2013-03-20
DE112011101378B4 (de) 2018-12-27
WO2011162977A2 (en) 2011-12-29
SG184824A1 (en) 2012-11-29
BR112012031951A2 (pt) 2018-03-06
CN102906880B (zh) 2015-08-19
GB201300789D0 (en) 2013-02-27
WO2011162977A3 (en) 2012-03-15

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