GB2494608B - Delta monolayer dopants epitaxy for embedded source/drain silicide - Google Patents

Delta monolayer dopants epitaxy for embedded source/drain silicide

Info

Publication number
GB2494608B
GB2494608B GB1300789.3A GB201300789A GB2494608B GB 2494608 B GB2494608 B GB 2494608B GB 201300789 A GB201300789 A GB 201300789A GB 2494608 B GB2494608 B GB 2494608B
Authority
GB
United Kingdom
Prior art keywords
epitaxy
dopants
drain silicide
embedded source
delta monolayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB1300789.3A
Other languages
English (en)
Other versions
GB2494608A (en
GB201300789D0 (en
Inventor
Kevin K Chan
Abhishek Dube
Judson R Holt
Jeffrey B Johnson
Jinghong Li
Dae-Gyu Park
Zhengmao Zhu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB201300789D0 publication Critical patent/GB201300789D0/en
Publication of GB2494608A publication Critical patent/GB2494608A/en
Application granted granted Critical
Publication of GB2494608B publication Critical patent/GB2494608B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/608—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having non-planar bodies, e.g. having recessed gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
GB1300789.3A 2010-06-25 2011-06-10 Delta monolayer dopants epitaxy for embedded source/drain silicide Expired - Fee Related GB2494608B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/823,163 US8299535B2 (en) 2010-06-25 2010-06-25 Delta monolayer dopants epitaxy for embedded source/drain silicide
PCT/US2011/039892 WO2011162977A2 (en) 2010-06-25 2011-06-10 Delta monolayer dopants epitaxy for embedded source/drain silicide

Publications (3)

Publication Number Publication Date
GB201300789D0 GB201300789D0 (en) 2013-02-27
GB2494608A GB2494608A (en) 2013-03-13
GB2494608B true GB2494608B (en) 2013-09-04

Family

ID=45351702

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1300789.3A Expired - Fee Related GB2494608B (en) 2010-06-25 2011-06-10 Delta monolayer dopants epitaxy for embedded source/drain silicide

Country Status (9)

Country Link
US (1) US8299535B2 (enExample)
JP (1) JP2013534052A (enExample)
KR (1) KR20130028941A (enExample)
CN (1) CN102906880B (enExample)
BR (1) BR112012031951A2 (enExample)
DE (1) DE112011101378B4 (enExample)
GB (1) GB2494608B (enExample)
SG (1) SG184824A1 (enExample)
WO (1) WO2011162977A2 (enExample)

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KR102059526B1 (ko) 2012-11-22 2019-12-26 삼성전자주식회사 내장 스트레서를 갖는 반도체 소자 형성 방법 및 관련된 소자
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US9219133B2 (en) * 2013-05-30 2015-12-22 Stmicroelectronics, Inc. Method of making a semiconductor device using spacers for source/drain confinement
US9293534B2 (en) 2014-03-21 2016-03-22 Taiwan Semiconductor Manufacturing Company, Ltd. Formation of dislocations in source and drain regions of FinFET devices
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US10164107B2 (en) * 2014-01-24 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Embedded source or drain region of transistor with laterally extended portion
US9853154B2 (en) 2014-01-24 2017-12-26 Taiwan Semiconductor Manufacturing Company Ltd. Embedded source or drain region of transistor with downward tapered region under facet region
US9673295B2 (en) 2014-05-27 2017-06-06 Globalfoundries Inc. Contact resistance optimization via EPI growth engineering
US9893183B2 (en) * 2014-07-10 2018-02-13 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
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US9601574B2 (en) * 2014-12-29 2017-03-21 Taiwan Semiconductor Manufacturing Company, Ltd. V-shaped epitaxially formed semiconductor layer
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US10665693B2 (en) * 2015-04-30 2020-05-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and manufacturing method thereof
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Also Published As

Publication number Publication date
US8299535B2 (en) 2012-10-30
GB2494608A (en) 2013-03-13
JP2013534052A (ja) 2013-08-29
CN102906880A (zh) 2013-01-30
DE112011101378T8 (de) 2013-05-08
DE112011101378T5 (de) 2013-03-07
US20110316044A1 (en) 2011-12-29
KR20130028941A (ko) 2013-03-20
DE112011101378B4 (de) 2018-12-27
WO2011162977A2 (en) 2011-12-29
SG184824A1 (en) 2012-11-29
BR112012031951A2 (pt) 2018-03-06
CN102906880B (zh) 2015-08-19
GB201300789D0 (en) 2013-02-27
WO2011162977A3 (en) 2012-03-15

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Effective date: 20130930

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20160610