JP2017112383A - 室温金属直接ボンディング - Google Patents
室温金属直接ボンディング Download PDFInfo
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- JP2017112383A JP2017112383A JP2017006744A JP2017006744A JP2017112383A JP 2017112383 A JP2017112383 A JP 2017112383A JP 2017006744 A JP2017006744 A JP 2017006744A JP 2017006744 A JP2017006744 A JP 2017006744A JP 2017112383 A JP2017112383 A JP 2017112383A
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- metal
- bonding
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- 229910052751 metal Inorganic materials 0.000 title claims description 405
- 239000002184 metal Substances 0.000 title claims description 405
- 239000000758 substrate Substances 0.000 claims abstract description 157
- 238000000034 method Methods 0.000 claims description 153
- 239000000463 material Substances 0.000 claims description 86
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 46
- 229910052755 nonmetal Inorganic materials 0.000 claims description 29
- 239000011800 void material Substances 0.000 claims description 23
- 239000000377 silicon dioxide Substances 0.000 claims description 21
- 235000012239 silicon dioxide Nutrition 0.000 claims description 21
- 229910052737 gold Inorganic materials 0.000 claims description 15
- 238000000151 deposition Methods 0.000 claims description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 238000010438 heat treatment Methods 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 229910052697 platinum Inorganic materials 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 6
- 238000000926 separation method Methods 0.000 claims description 5
- 230000005489 elastic deformation Effects 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 4
- 229910045601 alloy Inorganic materials 0.000 claims description 2
- 239000000956 alloy Substances 0.000 claims description 2
- 230000000977 initiatory effect Effects 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 180
- 239000010410 layer Substances 0.000 description 91
- 230000008569 process Effects 0.000 description 56
- 210000002381 plasma Anatomy 0.000 description 43
- 239000000126 substance Substances 0.000 description 41
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 34
- 239000010703 silicon Substances 0.000 description 34
- 229910052710 silicon Inorganic materials 0.000 description 33
- 239000010931 gold Substances 0.000 description 29
- 239000004065 semiconductor Substances 0.000 description 29
- 238000003860 storage Methods 0.000 description 16
- 150000002739 metals Chemical class 0.000 description 15
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 14
- 239000003570 air Substances 0.000 description 13
- 238000005530 etching Methods 0.000 description 13
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 13
- 238000009832 plasma treatment Methods 0.000 description 12
- 238000007654 immersion Methods 0.000 description 11
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 10
- 229910004298 SiO 2 Inorganic materials 0.000 description 10
- 238000000137 annealing Methods 0.000 description 10
- 238000009792 diffusion process Methods 0.000 description 10
- 239000007789 gas Substances 0.000 description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 9
- 238000004544 sputter deposition Methods 0.000 description 9
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 8
- 238000004140 cleaning Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 8
- 239000007769 metal material Substances 0.000 description 8
- 230000003746 surface roughness Effects 0.000 description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 8
- 239000006227 byproduct Substances 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 7
- 239000012212 insulator Substances 0.000 description 7
- 238000012545 processing Methods 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 230000010354 integration Effects 0.000 description 6
- 230000003647 oxidation Effects 0.000 description 6
- 238000007254 oxidation reaction Methods 0.000 description 6
- 238000005498 polishing Methods 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 230000035882 stress Effects 0.000 description 6
- 239000010409 thin film Substances 0.000 description 6
- 229910008051 Si-OH Inorganic materials 0.000 description 5
- 229910006358 Si—OH Inorganic materials 0.000 description 5
- 229910052786 argon Inorganic materials 0.000 description 5
- 125000004429 atom Chemical group 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 229910017855 NH 4 F Inorganic materials 0.000 description 4
- 238000001994 activation Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 239000008367 deionised water Substances 0.000 description 4
- 229910021641 deionized water Inorganic materials 0.000 description 4
- 238000009429 electrical wiring Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 238000003475 lamination Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 229910002808 Si–O–Si Inorganic materials 0.000 description 3
- 229910008284 Si—F Inorganic materials 0.000 description 3
- 238000013459 approach Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000008030 elimination Effects 0.000 description 3
- 238000003379 elimination reaction Methods 0.000 description 3
- 238000001704 evaporation Methods 0.000 description 3
- 230000008020 evaporation Effects 0.000 description 3
- 229930195733 hydrocarbon Natural products 0.000 description 3
- 150000002430 hydrocarbons Chemical class 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000006116 polymerization reaction Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 238000003855 Adhesive Lamination Methods 0.000 description 2
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 229910014299 N-Si Inorganic materials 0.000 description 2
- 229910020175 SiOH Inorganic materials 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 235000011114 ammonium hydroxide Nutrition 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000006835 compression Effects 0.000 description 2
- 238000007906 compression Methods 0.000 description 2
- 239000000356 contaminant Substances 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000010494 dissociation reaction Methods 0.000 description 2
- 230000005593 dissociations Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 230000002209 hydrophobic effect Effects 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000001055 reflectance spectroscopy Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000011343 solid material Substances 0.000 description 2
- 230000002269 spontaneous effect Effects 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 238000012876 topography Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonium chloride Substances [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 description 1
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 102100021765 E3 ubiquitin-protein ligase RNF139 Human genes 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 101001106970 Homo sapiens E3 ubiquitin-protein ligase RNF139 Proteins 0.000 description 1
- 101100515452 Neurospora crassa (strain ATCC 24698 / 74-OR23-1A / CBS 708.71 / DSM 1257 / FGSC 987) rca-1 gene Proteins 0.000 description 1
- 229910008072 Si-N-Si Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910000756 V alloy Inorganic materials 0.000 description 1
- UFUVJROSOIXJGR-WLISBCLRSA-N [(9s,10s)-8,8-dimethyl-10-(3-methylbutanoyloxy)-2-oxo-9,10-dihydropyrano[2,3-f]chromen-9-yl] (z)-2-methylbut-2-enoate Chemical compound C1=CC(=O)OC2=C1C=CC1=C2[C@H](OC(=O)CC(C)C)[C@H](OC(=O)C(\C)=C/C)C(C)(C)O1 UFUVJROSOIXJGR-WLISBCLRSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 239000012080 ambient air Substances 0.000 description 1
- 239000000908 ammonium hydroxide Substances 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 235000021028 berry Nutrition 0.000 description 1
- 238000006664 bond formation reaction Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000001311 chemical methods and process Methods 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000000374 eutectic mixture Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 239000003574 free electron Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 230000005661 hydrophobic surface Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000001182 laser chemical vapour deposition Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 150000002843 nonmetals Chemical class 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000010943 off-gassing Methods 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- -1 oxide / oxide Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
- B23K20/02—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating by means of a press ; Diffusion bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/09—Structure, shape, material or disposition of the bonding areas after the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/89—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using at least one connector not provided for in any of the groups H01L24/81 - H01L24/86
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Abstract
Description
発明の分野
本発明は、好ましくは室温での、直接ウエーハー貼り合わせの分野に係り、より具体的には、半導体デバイスおよび集積回路の製造に利用される基板の張り合わせに関する。
従来のCMOSデバイスの物理的限界が到来し、高性能電子システムについての要求が緊急となっているため、システムオンチップ(SOC)が半導体産業の自然な解決策となっている。システム・オン・チップの製造のためには、さまざまの機能がチップ上で要求される。シリコン技術が多数のデバイスを加工するための主力技術であるけれども、所望の回路および光電子機能の多くは、現在、シリコン以外の材料で製造される個々のデバイスおよび/または回路から最もよく得ることができる。したがって、非シリコン系デバイスをシリコン系デバイスと一体化するハイブリッドシステムは、純粋なシリコンまたは純粋な非シリコンデバイスのみからは得られない独特のSOC機能を提供する潜在能力を与える。
したがって、本発明の目的は、単一のボンディング工程によりウエーハーとダイの間の機械的および電気的接触を獲得することである。
ここで、いくつかの図面を通して同様の参照番号が同様のまたは対応する部分を示す図面、より具体的には、本発明のボンディングプロセスの第1の態様を例示する図1A〜1Dおよび2を参照する。本発明の第1の態様において、金属領域の周囲の非金属領域が室温化学結合を受けるときに発生する固有の力により、整合の際の別々のウエーハー上の金属接触領域が接触圧力結合するとき直接金属−金属ボンディングが発生する。この明細書を通じて用いられる化学結合は、1枚のウエーハーの表面上の表面結合が共有結合のような表面要素間の直接結合を形成するように対向するウエーハーの表面上の表面結合と反応するとき生み出される結合強度として定義される。化学結合は、例えば、ウエーハー材料の破壊強度に近い強い結合強度により明らかであり、したがって、例えば、単なるファンデルワールス結合からは区別される。本発明の方法により達成される化学結合強度の例は以下に検討される。化学結合プロセスにおいては、実質的な力が展開されている。それらの力は化学結合が対向する非金属領域の間で増加するとき金属領域を弾性的に変形するのに十分に大きいものであり得る。
2Si−OH+2NH4 OH 2Si−NH2 +4HOH (1)
代わりに、多くのSi−F基は、NH4 FまたはHF浸漬後にPECVD SiO2 表面上で終端する。
Si−NH2 +Si−OH Si−O−Si+NH3 (2)
Si−NH2 +Si−NH2 Si−N−N−Si+2H2 (3)
代わりに、HFまたはNH4 F浸漬された酸化物表面がSiOH基に加えてSi−F基により終端させられる。HFまたはNH4 F溶液は、酸化シリコンを強力にエッチングするので、その濃度は、適切に低いレベルに制御されねばならず、浸漬時間は十分に短くなければならない。これは、ポストVSEプロセスが第2のVSEプロセスであることの例である。ボンディング界面間の共有結合は、水素結合されたSi−HFまたはSi−OH基のあいだの重合反応により形成される:
Si−HF+Si−HF Si−F−F−Si+H2 (4)
Si−F+Si−OH Si−O−Si+HF (5)
図9は、室温ボンディングの前に0.05%HF中に浸漬された、貼り合わされた熱酸化物被覆シリコンウエーハーのフッ素濃度プロファイルを示す。フッ素濃度ピークは、ボンディング界面で明らかに観察される。このことは、上記化学プロセスの存在証明を提供し、その場合、所望の種は、ボンディング界面に位置する。
Eおよびtwは、ウエーハー1および2についてのヤング率および厚さであり、tbは、ウエーハーのエッジから長さLのウエーハー分離をもたらす2枚のウエーハーの間に挿入されたウエッジの厚さである。
W=[(2E’tw 3 )/(3γ)]1/4 h1/2 (1)
式中、E’はE/(1−ν2 )により与えられ、νはポアソン比である。
P=(16E’tw 3 h)/(3W4 ) (3)として表現され得る。
P=8γ/3h (4)
そして、W<2tw であるとき、以下の式が得られる:
P=(16E’tw 3 )/(3k4 h3 ) (5)
金属パッドが500Åの高さhを有し、結合エネルギーが300mJ/m2 である貼り合わされたシリコンウエーハーについては、金属ボンディングパッド上の圧縮圧力は、約1.6×108 ダイン/cm2 、すなわち160気圧である。この圧力は金属ボンディングのためには十分に高いので、ボンディングの間にいずれの外的圧力を適用する必要も存在しない。金属高さhが300Å以下であるとき、W<2tw が満足され、金属対上の圧力は、もしk=1が仮定されるならば、5000気圧台となる。
および
圧力=(応力)*4*(金属厚さ)*(表面上の金属高さ)/(領域の幅の半分)2 式中、圧力は、ボンディングプロセスにより発生しているものである。それらの関係式についての参照記事は、「ハンドブック・オブ・シン・フィルム・テクノロジー」、メイゼル・アンド・グラング、1983年再発行、12〜24ページにおいて見出され得る。
以下に、本願出願時の特許請求の範囲に記載された発明を付記する。
[1]第1の複数の金属パッドおよび該金属パッドに近接する第1の非金属ボンディング領域を有する第1の基板を準備すること、
第2の複数の金属パッドおよび該金属パッドに近接する第2の非金属ボンディング領域を有する第2の基板を準備すること、
前記第1の複数の金属パッドのうちの少なくとも1つのパッドと前記第2の複数の金属パッドのうちの少なくとも1つのパッドを接触させること、
前記第1の非金属ボンディング領域を前記第2の非金属ボンディング領域と直接接触させること、および
前記第1の非金属ボンディング領域を前記第2の非金属ボンディング領域にボンディングすることを包含するウエーハーの貼り合わせ方法。
[2]前記第1の基板上の前記非金属ボンディング領域の表面上に延出する上方表面を有するように前記第1の複数の金属パッドの少なくとも1つのパッドを形成すること、および
前記第2の基板上の前記非金属ボンディング領域の表面上に延出する上方表面を有するように前記第2の複数の金属パッドの少なくとも1つのパッドを形成することを包含する[1]記載の方法。
[3]前記接触工程が、前記第1の組の金属パッドを前記第2の組の金属パッドにボンディングすることを包含する[1]記載の方法。
[4]前記第1と第2の基板の少なくとも一方を弾性的に変形させることを包含する[1]記載の方法。
[5]前記第1の基板上に前記非金属ボンディング領域を形成した後、前記第1の基板と第2の基板上に金属パッドを堆積させることを包含する[1]記載の方法。
[6]前記堆積工程が、Pt、Au、Pdおよびそれらの合金のうちの少なくとも1つを堆積させることを包含する[5]記載の方法。
[7]金属ボンディングパッド間の離間距離より実質的に小さい厚さを有する前記第1と第2の複数の金属ボンディングパッドを形成することを包含する[1]記載の方法。
[8]前記第1と第2の非金属領域のそれぞれの表面上に1000Å未満の厚さまで前記第1と第2の複数の金属ボンディングパッドを形成することを包含する[1]記載の方法。
[9]前記第1の複数の金属パッドを被覆するように前記第1の基板上に第1のボンディング層を形成すること、
前記第1の複数のパッドうちの選択されたパッドの上の前記第1のボンディング層内に開口を形成すること、
前記第2の基板上に第2のボンディング層を形成すること、
前記ボンディング層上に、前記第1のボンディング層内の開口に対応する前記第2の複数のパッドを形成すること、および
前記第1と第2のボンディング層を直接接触させることを包含する[1]記載の方法。
[10]前記第1と第2の複数の金属パッドの前記少なくとも1つの上に形成されたる酸化物層を除去することを包含する[1]記載の方法。
[11]前記第1と第2の基板を酸素プラズマに暴露すること、および
前記金属パッドから酸化物層を除去することを包含する[1]記載の方法。
[12]前記第1の基板を準備することが、それぞれすくなくとも1つの第3の金属ボンディングパッドを有する複数の第3の基板を形成することを包含し、
前記少なくとも1つのパッドを接触させることが、前記第3の基板のそれぞれの第3の金属パッドを前記第2の複数の金属パッドの1つと接触させることを包含し、
直接接触させることが前記第3の基板のそれぞれの第3の非金属領域を前記第2の基板の前記非金属領域と接触させることを包含し、
前記ボンディングが、前記第3の非金属領域を前記第2の非金属領域にボンディングすることを包含する、[1]記載の方法。
[13]前記第1の基板を準備することおよび前記第2の基板を調製することのそれぞれが、
二酸化シリコン層を形成すること、
前記二酸化シリコン層をパターニングすること、
前記二酸化シリコン層内にビアホールを形成すること、および
前記ビアホール内に金属構造を形成することを包含する[1]記載の方法。
[14]前記第1の基板上に第1の酸化物層を形成すること、
前記第1の酸化物層の表面上に延出する前記第1の複数の金属パッドを形成すること、
前記第2の基板上に第2の酸化物層を形成すること、および
前記第2の酸化物層の表面の下に凹設された前記第2の複数の金属パッドを形成すること、
前記第1と第2の金属構造をボンディングすること
包含する[1]記載の方法。
[15]少なくとも1つの第1の金属パッドおよび前記第1の金属パッドに近接する第1の非金属ボンディング領域をそれぞれ有し、前記第2の基板の平面サイズより小さい平面サイズをそれぞれ有する複数の第1の基板を準備すること、
前記第1の複数の金属パッドのそれぞれのうちの少なくとも1つの第1の金属パッドを前記第2の複数の金属パッドの少なくとも1つと接触させること、
前記複数の第1の基板のそれぞれの前記第1の非金属ボンディング領域を前記第2の非金属ボンディング領域の少なくとも一部に直接接触させること、および
前記第1の非金属ボンディング領域のそれぞれを前記第2の非金属ボンディング領域にボンディングすることを包含する[1]記載の方法。
[16]前記第1と第2の基板の少なくとも1つを弾性的に変形させて前記第1と第2の基板の間に少なくとも1つの接触点を生じさせること、
前記接触点でのボンドを開始させること、および
前記第1と第2の非金属領域の実質的部分にわたって前記第1と第2の基板の間に前記ボンドを拡張させることを包含する[1]記載の方法。
[17]前記第1の複数のパッドの少なくとも1つの下にボイドを形成させることを包含する[1]記載の方法。
[18]前記ボイドの下の材料の層中に前記ボイドを形成することを包含する[17]記載の方法。
[19]前記パッド下の材料を変形させて前記ボイド中に延出させることを包含する[17]記載の方法。
[20]前記少なくとも1つのパッドに近接して配置されたボイドを用いて前記第1と第2の複数のパッドの少なくとも1つの周りの非ボンド領域を減少させることを包含する[1]記載の方法。
[21]前記第1の複数のパッドの少なくとも1つの下に、変形可能な材料を配置することを包含する[1]記載の方法。
[22]前記少なくとも1つのパッドの下の領域における前記低K材料の厚さを減少させることにより前記パッド下の前記変形可能な材料を変形させることを包含する[21]記載の方法。
[23]前記第1の複数のパッドの少なくとも1つの下に変形可能な低K材料を配置することを包含する[1]記載の方法。
[24]前記第1の複数のパッドの少なくとも1つの下の前記低K材料を変形させることを包含する[23]記載の方法。
[25]前記パッドの下の前記低K材料を変形させることが、前記少なくとも1つのパッド下の領域における前記低K材料の厚さを減少させることを包含する[23]記載の方法。
[26]前記少なくとも1つのパッドに近接して配置された変形可能な材料を用いて前記第1と第2の複数のパッドの少なくとも1つの周りの非ボンド領域を減少させることを包含する[1]記載の方法。
[27]第1の基板上に第1の複数の金属パッドを形成することであって、前記第1の基板は前記第1の複数の金属パッドに近接するそれぞれの複数の第1の非金属ボンディング領域を有し、前記第1の複数のパッドの上方表面が前記第1の非金属ボンディング領域のそれぞれの表面の下に形成されるところのもの、
第2の基板上に第2の複数の金属パッドを形成することであって、前記第2の基板は前記第2の複数の金属パッドに近接するそれぞれの複数の第2の非金属ボンディング領域を有するところのもの、
前記第2の非金属ボンディング領域のそれぞれに前記第1の非金属ボンディング領域を直接接触させること、
前記第2の非金属ボンディング領域のそれぞれに前記第1の非金属ボンディング領域をボンディングすること、および
前記第2の複数の金属パッドのそれぞれに前記第1の複数の金属パッドを接続するように前記第1と第2の複数の金属パッドを加熱して、接続されたパッドの対を形成することを包含するウエーハーの貼り合わせ方法。
[28]加熱が、前記接続された対を形成する前記第1と第2の複数の金属パッドのそれぞれの対の少なくとも一方をリフローさせることを包含する[27]記載の方法。
[29]前記第2の複数のパッドの上方表面が前記第2の非金属ボンディング領域のそれぞれの表面の下に形成される[27]記載の方法。
[30]加熱が、前記接続された対を形成する前記第1と第2の複数の金属パッドのそれぞれの対の少なくとも一方をリフローさせることを包含する[29]記載の方法。
[31]前記第2の複数のパッドの上方表面が前記第2の非金属ボンディング領域のそれぞれの表面上に形成される[27]記載の方法。
[32]加熱が、前記接続された対を形成する前記第1と第2の複数の金属パッドのそれぞれの対の少なくとも一方をリフローさせることを包含する[31]記載の方法。
[33]前記第2の複数のパッドの前記上方表面が、第1の距離だけ前記第2の非金属ボンディング表面の前記それぞれの表面上に延出し、
前記第1の複数のパッドの前記上方表面が、第2の距離だけ前記第1の非金属ボンディング領域のそれぞれの表面の下に延出し、および
前記第1の距離は、前記第2の距離未満である[31]記載の方法。
[34]第1の基板であって、該第1の基板の第1の表面上に延出する第1の複数の金属パッドを有する第1の基板、
前記第1の表面内に第1の複数の金属パッドに近接して位置する第1の非金属領域、
第2の基板であって、該第2の基板の第2の表面上に延出する第2の複数の金属パッドを有する第2の基板、
前記第2の表面内に第2の複数の金属パッドに近接して位置する第2の非金属領域を具備し、
前記第2の複数の金属パッドは、それぞれ、前記第1の複数の金属パッドと直接接触し、
前記第1の非金属領域は、前記第1の基板および前記第2の基板の少なくとも一方の弾性変形により、前記第2の非金属領域と接触し、直接ボンディングされている貼り合わせ構造。
[35]デバイスに接続される前記第1と第2の複数の金属パッドの少なくとも1つを具備する[34]記載の構造。
[36]前記金属パッドの隣接するパッド間の離間距離より実質的に小さい厚さをそれぞれ有する前記第1と第2の複数の金属パッドを具備する[35]記載の構造。
[37]前記厚さが1000Å未満である[36]記載の構造。
[38]前記第1と第2の非金属領域の少なくとも一方が二酸化シリコン層を具備する[37]記載の構造。
[39]前記二酸化シリコン層が、酸素プラズマに暴露されたものである[38]記載の構造。
[40]前記二酸化シリコン層内に、メタル化ビアホールを具備する[38]記載の構造。
[41]前記メタル化ビアホールが、
前記第1の基板および前記第2の基板の一方に形成された突出する金属パッド、および
前記突出する金属ボンディングパッドを有さない前記第1の基板および前記第2の基板の他方上に形成された凹設金属パッドを具備する[40]記載の構造。
[42]前記第1の基板および第2の基板の少なくとも一方が集積回路を含む[34]記載の構造。
[43]弾性的に変形された前記第1と第2の基板の少なくとも一方を具備する[34]記載の構造。
[44]前記第1の複数のパッドの少なくとも1つの下に形成されたボイドを具備する[34]記載の構造。
[45]前記ボイドの下の材料の層に形成されたボイドを具備する[34]記載の構造。
[46]前記ボイド中に延出するように変形された、前記パッド下の材料を具備する[34]記載の構造。
[47]前記第1の複数の金属パッドの少なくとも1つの下に配置された変形可能な材料を具備する[34]記載の構造。
[48]前記少なくとも1つのパッドの下に厚さの減少した領域を有する前記変形可能な材料を具備する[47]記載の構造。
[49]前記第1の複数の金属パッドの少なくとも1つの下に配置された変形可能な低K材料を具備する[34]記載の構造。
[50]前記第1の複数のパッドの少なくとも1つの下の領域において変形された前記低K材料を具備する[49]記載の構造。
[51]前記低K材料が、前記少なくとも1つのパッドの下に厚さの減少した領域を有する[49]記載の構造。
[52]第1の基板上に配置された第1の複数の金属パッド、
前記第1の表面の第1の表面内に前記第1の複数の金属パッドに近接して位置する第1の非金属領域であって、前記複数の金属パッドの上方表面が前記第1の表面の下にあるところの第1の非金属領域、
第2の基板上に配置された第2の複数の金属パッド、
前記第2の表面内に前記第2の複数の金属パッドに近接して位置する第2の非金属領域を備え、
前記第1の複数の金属パッドの一部は、前記第2の複数の金属パッドのそれぞれのパッドに直接接触し、
前記第1の非金属領域は、前記第1の基板と前記第2の基板の少なくとも一方の前記第2の非金属領域に接触し、直接ボンディングされている貼り合わせ構造。
[53]前記一部が、リフロー部分を具備する[52]記載の構造。
[54]前記第2の基板の表面上に延出する上方表面を有する前記第2の複数の金属パッドを具備する[52]記載の構造。
[55]前記第1の複数の金属パッドの前記上方表面が、第1の距離だけ前記第1の表面の下に位置し、
前記第2の複数の金属パッドの前記上方表面が、第2の距離だけ前記第2の基板の表面上に延出し、
前記第1の距離が前記第2の距離より大きい[54]記載の構造。
[56]前記第2の複数の金属パッドが前記第2の基板の表面の下に延出する上方表面を有する[52]記載の構造。
[57]前記第1の複数の金属パッドが配置される凹部を有する前記第1の基板を具備する[52]記載の構造。
[58]前記第2の複数の金属パッドが配置された凹部を有する前記第2の基板を備え、前記第2の複数の金属パッドの上方表面が前記第2の基板の表面の下にある[57]記載の構造。
[59]前記第2の複数の金属パッドが配置された凹部を有する前記第2の基板を有し、前記第2の複数の金属パッドの上方表面が前記第2の基板の表面の下にある[52]記載の構造。
Claims (59)
- 第1の複数の金属パッドおよび該金属パッドに近接する第1の非金属ボンディング領域を有する第1の基板を準備すること、
第2の複数の金属パッドおよび該金属パッドに近接する第2の非金属ボンディング領域を有する第2の基板を準備すること、
前記第1の複数の金属パッドのうちの少なくとも1つのパッドと前記第2の複数の金属パッドのうちの少なくとも1つのパッドを接触させること、
前記第1の非金属ボンディング領域を前記第2の非金属ボンディング領域と直接接触させること、および
前記第1の非金属ボンディング領域を前記第2の非金属ボンディング領域にボンディングすることを包含するウエーハーの貼り合わせ方法。 - 前記第1の基板上の前記非金属ボンディング領域の表面上に延出する上方表面を有するように前記第1の複数の金属パッドの少なくとも1つのパッドを形成すること、および
前記第2の基板上の前記非金属ボンディング領域の表面上に延出する上方表面を有するように前記第2の複数の金属パッドの少なくとも1つのパッドを形成することを包含する請求項1記載の方法。 - 前記接触工程が、前記第1の組の金属パッドを前記第2の組の金属パッドにボンディングすることを包含する請求項1記載の方法。
- 前記第1と第2の基板の少なくとも一方を弾性的に変形させることを包含する請求項1記載の方法。
- 前記第1の基板上に前記非金属ボンディング領域を形成した後、前記第1の基板と第2の基板上に金属パッドを堆積させることを包含する請求項1記載の方法。
- 前記堆積工程が、Pt、Au、Pdおよびそれらの合金のうちの少なくとも1つを堆積させることを包含する請求項5記載の方法。
- 金属ボンディングパッド間の離間距離より実質的に小さい厚さを有する前記第1と第2の複数の金属ボンディングパッドを形成することを包含する請求項1記載の方法。
- 前記第1と第2の非金属領域のそれぞれの表面上に1000Å未満の厚さまで前記第1と第2の複数の金属ボンディングパッドを形成することを包含する請求項1記載の方法。
- 前記第1の複数の金属パッドを被覆するように前記第1の基板上に第1のボンディング層を形成すること、
前記第1の複数のパッドうちの選択されたパッドの上の前記第1のボンディング層内に開口を形成すること、
前記第2の基板上に第2のボンディング層を形成すること、
前記ボンディング層上に、前記第1のボンディング層内の開口に対応する前記第2の複数のパッドを形成すること、および
前記第1と第2のボンディング層を直接接触させることを包含する請求項1記載の方法。 - 前記第1と第2の複数の金属パッドの前記少なくとも1つの上に形成されたる酸化物層を除去することを包含する請求項1記載の方法。
- 前記第1と第2の基板を酸素プラズマに暴露すること、および
前記金属パッドから酸化物層を除去することを包含する請求項1記載の方法。 - 前記第1の基板を準備することが、それぞれすくなくとも1つの第3の金属ボンディングパッドを有する複数の第3の基板を形成することを包含し、
前記少なくとも1つのパッドを接触させることが、前記第3の基板のそれぞれの第3の金属パッドを前記第2の複数の金属パッドの1つと接触させることを包含し、
直接接触させることが前記第3の基板のそれぞれの第3の非金属領域を前記第2の基板の前記非金属領域と接触させることを包含し、
前記ボンディングが、前記第3の非金属領域を前記第2の非金属領域にボンディングすることを包含する、請求項1記載の方法。 - 前記第1の基板を準備することおよび前記第2の基板を調製することのそれぞれが、
二酸化シリコン層を形成すること、
前記二酸化シリコン層をパターニングすること、
前記二酸化シリコン層内にビアホールを形成すること、および
前記ビアホール内に金属構造を形成することを包含する請求項1記載の方法。 - 前記第1の基板上に第1の酸化物層を形成すること、
前記第1の酸化物層の表面上に延出する前記第1の複数の金属パッドを形成すること、
前記第2の基板上に第2の酸化物層を形成すること、および
前記第2の酸化物層の表面の下に凹設された前記第2の複数の金属パッドを形成すること、
前記第1と第2の金属構造をボンディングすること
包含する請求項1記載の方法。 - 少なくとも1つの第1の金属パッドおよび前記第1の金属パッドに近接する第1の非金属ボンディング領域をそれぞれ有し、前記第2の基板の平面サイズより小さい平面サイズをそれぞれ有する複数の第1の基板を準備すること、
前記第1の複数の金属パッドのそれぞれのうちの少なくとも1つの第1の金属パッドを前記第2の複数の金属パッドの少なくとも1つと接触させること、
前記複数の第1の基板のそれぞれの前記第1の非金属ボンディング領域を前記第2の非金属ボンディング領域の少なくとも一部に直接接触させること、および
前記第1の非金属ボンディング領域のそれぞれを前記第2の非金属ボンディング領域にボンディングすることを包含する請求項1記載の方法。 - 前記第1と第2の基板の少なくとも1つを弾性的に変形させて前記第1と第2の基板の間に少なくとも1つの接触点を生じさせること、
前記接触点でのボンドを開始させること、および
前記第1と第2の非金属領域の実質的部分にわたって前記第1と第2の基板の間に前記ボンドを拡張させることを包含する請求項1記載の方法。 - 前記第1の複数のパッドの少なくとも1つの下にボイドを形成させることを包含する請求項1記載の方法。
- 前記ボイドの下の材料の層中に前記ボイドを形成することを包含する請求項17記載の方法。
- 前記パッド下の材料を変形させて前記ボイド中に延出させることを包含する請求項17記載の方法。
- 前記少なくとも1つのパッドに近接して配置されたボイドを用いて前記第1と第2の複数のパッドの少なくとも1つの周りの非ボンド領域を減少させることを包含する請求項1記載の方法。
- 前記第1の複数のパッドの少なくとも1つの下に、変形可能な材料を配置することを包含する請求項1記載の方法。
- 前記少なくとも1つのパッドの下の領域における前記低K材料の厚さを減少させることにより前記パッド下の前記変形可能な材料を変形させることを包含する請求項21記載の方法。
- 前記第1の複数のパッドの少なくとも1つの下に変形可能な低K材料を配置することを包含する請求項1記載の方法。
- 前記第1の複数のパッドの少なくとも1つの下の前記低K材料を変形させることを包含する請求項23記載の方法。
- 前記パッドの下の前記低K材料を変形させることが、前記少なくとも1つのパッド下の領域における前記低K材料の厚さを減少させることを包含する請求項23記載の方法。
- 前記少なくとも1つのパッドに近接して配置された変形可能な材料を用いて前記第1と第2の複数のパッドの少なくとも1つの周りの非ボンド領域を減少させることを包含する請求項1記載の方法。
- 第1の基板上に第1の複数の金属パッドを形成することであって、前記第1の基板は前記第1の複数の金属パッドに近接するそれぞれの複数の第1の非金属ボンディング領域を有し、前記第1の複数のパッドの上方表面が前記第1の非金属ボンディング領域のそれぞれの表面の下に形成されるところのもの、
第2の基板上に第2の複数の金属パッドを形成することであって、前記第2の基板は前記第2の複数の金属パッドに近接するそれぞれの複数の第2の非金属ボンディング領域を有するところのもの、
前記第2の非金属ボンディング領域のそれぞれに前記第1の非金属ボンディング領域を直接接触させること、
前記第2の非金属ボンディング領域のそれぞれに前記第1の非金属ボンディング領域をボンディングすること、および
前記第2の複数の金属パッドのそれぞれに前記第1の複数の金属パッドを接続するように前記第1と第2の複数の金属パッドを加熱して、接続されたパッドの対を形成することを包含するウエーハーの貼り合わせ方法。 - 加熱が、前記接続された対を形成する前記第1と第2の複数の金属パッドのそれぞれの対の少なくとも一方をリフローさせることを包含する請求項27記載の方法。
- 前記第2の複数のパッドの上方表面が前記第2の非金属ボンディング領域のそれぞれの表面の下に形成される請求項27記載の方法。
- 加熱が、前記接続された対を形成する前記第1と第2の複数の金属パッドのそれぞれの対の少なくとも一方をリフローさせることを包含する請求項29記載の方法。
- 前記第2の複数のパッドの上方表面が前記第2の非金属ボンディング領域のそれぞれの表面上に形成される請求項27記載の方法。
- 加熱が、前記接続された対を形成する前記第1と第2の複数の金属パッドのそれぞれの対の少なくとも一方をリフローさせることを包含する請求項31記載の方法。
- 前記第2の複数のパッドの前記上方表面が、第1の距離だけ前記第2の非金属ボンディング表面の前記それぞれの表面上に延出し、
前記第1の複数のパッドの前記上方表面が、第2の距離だけ前記第1の非金属ボンディング領域のそれぞれの表面の下に延出し、および
前記第1の距離は、前記第2の距離未満である請求項31記載の方法。 - 第1の基板であって、該第1の基板の第1の表面上に延出する第1の複数の金属パッドを有する第1の基板、
前記第1の表面内に第1の複数の金属パッドに近接して位置する第1の非金属領域、
第2の基板であって、該第2の基板の第2の表面上に延出する第2の複数の金属パッドを有する第2の基板、
前記第2の表面内に第2の複数の金属パッドに近接して位置する第2の非金属領域を具備し、
前記第2の複数の金属パッドは、それぞれ、前記第1の複数の金属パッドと直接接触し、
前記第1の非金属領域は、前記第1の基板および前記第2の基板の少なくとも一方の弾性変形により、前記第2の非金属領域と接触し、直接ボンディングされている貼り合わせ構造。 - デバイスに接続される前記第1と第2の複数の金属パッドの少なくとも1つを具備する請求項34記載の構造。
- 前記金属パッドの隣接するパッド間の離間距離より実質的に小さい厚さをそれぞれ有する前記第1と第2の複数の金属パッドを具備する請求項35記載の構造。
- 前記厚さが1000Å未満である請求項36記載の構造。
- 前記第1と第2の非金属領域の少なくとも一方が二酸化シリコン層を具備する請求項37記載の構造。
- 前記二酸化シリコン層が、酸素プラズマに暴露されたものである請求項38記載の構造。
- 前記二酸化シリコン層内に、メタル化ビアホールを具備する請求項38記載の構造。
- 前記メタル化ビアホールが、
前記第1の基板および前記第2の基板の一方に形成された突出する金属パッド、および
前記突出する金属ボンディングパッドを有さない前記第1の基板および前記第2の基板の他方上に形成された凹設金属パッドを具備する請求項40記載の構造。 - 前記第1の基板および第2の基板の少なくとも一方が集積回路を含む請求項34記載の構造。
- 弾性的に変形された前記第1と第2の基板の少なくとも一方を具備する請求項34記載の構造。
- 前記第1の複数のパッドの少なくとも1つの下に形成されたボイドを具備する請求項34記載の構造。
- 前記ボイドの下の材料の層に形成されたボイドを具備する請求項34記載の構造。
- 前記ボイド中に延出するように変形された、前記パッド下の材料を具備する請求項34記載の構造。
- 前記第1の複数の金属パッドの少なくとも1つの下に配置された変形可能な材料を具備する請求項34記載の構造。
- 前記少なくとも1つのパッドの下に厚さの減少した領域を有する前記変形可能な材料を具備する請求項47記載の構造。
- 前記第1の複数の金属パッドの少なくとも1つの下に配置された変形可能な低K材料を具備する請求項34記載の構造。
- 前記第1の複数のパッドの少なくとも1つの下の領域において変形された前記低K材料を具備する請求項49記載の構造。
- 前記低K材料が、前記少なくとも1つのパッドの下に厚さの減少した領域を有する請求項49記載の構造。
- 第1の基板上に配置された第1の複数の金属パッド、
前記第1の表面の第1の表面内に前記第1の複数の金属パッドに近接して位置する第1の非金属領域であって、前記複数の金属パッドの上方表面が前記第1の表面の下にあるところの第1の非金属領域、
第2の基板上に配置された第2の複数の金属パッド、
前記第2の表面内に前記第2の複数の金属パッドに近接して位置する第2の非金属領域を備え、
前記第1の複数の金属パッドの一部は、前記第2の複数の金属パッドのそれぞれのパッドに直接接触し、
前記第1の非金属領域は、前記第1の基板と前記第2の基板の少なくとも一方の前記第2の非金属領域に接触し、直接ボンディングされている貼り合わせ構造。 - 前記一部が、リフロー部分を具備する請求項52記載の構造。
- 前記第2の基板の表面上に延出する上方表面を有する前記第2の複数の金属パッドを具備する請求項52記載の構造。
- 前記第1の複数の金属パッドの前記上方表面が、第1の距離だけ前記第1の表面の下に位置し、
前記第2の複数の金属パッドの前記上方表面が、第2の距離だけ前記第2の基板の表面上に延出し、
前記第1の距離が前記第2の距離より大きい請求項54記載の構造。 - 前記第2の複数の金属パッドが前記第2の基板の表面の下に延出する上方表面を有する請求項52記載の構造。
- 前記第1の複数の金属パッドが配置される凹部を有する前記第1の基板を具備する請求項52記載の構造。
- 前記第2の複数の金属パッドが配置された凹部を有する前記第2の基板を備え、前記第2の複数の金属パッドの上方表面が前記第2の基板の表面の下にある請求項57記載の構造。
- 前記第2の複数の金属パッドが配置された凹部を有する前記第2の基板を有し、前記第2の複数の金属パッドの上方表面が前記第2の基板の表面の下にある請求項52記載の構造。
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KR (2) | KR101252292B1 (ja) |
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Families Citing this family (288)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6984571B1 (en) | 1999-10-01 | 2006-01-10 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
US6902987B1 (en) * | 2000-02-16 | 2005-06-07 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
US6871942B2 (en) * | 2002-04-15 | 2005-03-29 | Timothy R. Emery | Bonding structure and method of making |
US6962835B2 (en) | 2003-02-07 | 2005-11-08 | Ziptronix, Inc. | Method for room temperature metal direct bonding |
US7109092B2 (en) | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
US20040262772A1 (en) * | 2003-06-30 | 2004-12-30 | Shriram Ramanathan | Methods for bonding wafers using a metal interlayer |
US20050170609A1 (en) * | 2003-12-15 | 2005-08-04 | Alie Susan A. | Conductive bond for through-wafer interconnect |
JP3790995B2 (ja) | 2004-01-22 | 2006-06-28 | 有限会社ボンドテック | 接合方法及びこの方法により作成されるデバイス並びに接合装置 |
US7716823B2 (en) * | 2004-04-08 | 2010-05-18 | Hewlett-Packard Development Company, L.P. | Bonding an interconnect to a circuit device and related devices |
US7608534B2 (en) | 2004-06-02 | 2009-10-27 | Analog Devices, Inc. | Interconnection of through-wafer vias using bridge structures |
JP4710282B2 (ja) * | 2004-09-06 | 2011-06-29 | 富士ゼロックス株式会社 | 多波長面発光レーザの製造方法 |
US7262495B2 (en) * | 2004-10-07 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | 3D interconnect with protruding contacts |
US7422962B2 (en) * | 2004-10-27 | 2008-09-09 | Hewlett-Packard Development Company, L.P. | Method of singulating electronic devices |
US7172921B2 (en) * | 2005-01-03 | 2007-02-06 | Miradia Inc. | Method and structure for forming an integrated spatial light modulator |
US7361586B2 (en) * | 2005-07-01 | 2008-04-22 | Spansion Llc | Preamorphization to minimize void formation |
US7485968B2 (en) | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
US7545042B2 (en) * | 2005-12-22 | 2009-06-09 | Princo Corp. | Structure combining an IC integrated substrate and a carrier, and method of manufacturing such structure |
US20070161150A1 (en) * | 2005-12-28 | 2007-07-12 | Intel Corporation | Forming ultra dense 3-D interconnect structures |
US7579258B2 (en) * | 2006-01-25 | 2009-08-25 | Freescale Semiconductor, Inc. | Semiconductor interconnect having adjacent reservoir for bonding and method for formation |
US20070259523A1 (en) * | 2006-05-04 | 2007-11-08 | Yechuri Sitaramarao S | Method of fabricating high speed integrated circuits |
US7402501B2 (en) * | 2006-05-04 | 2008-07-22 | Intel Corporation | Method of manufacturing a coaxial trace in a surrounding material, coaxial trace formed thereby, and semiconducting material containing same |
US7425465B2 (en) * | 2006-05-15 | 2008-09-16 | Fujifilm Diamatix, Inc. | Method of fabricating a multi-post structures on a substrate |
DE102006028692B4 (de) * | 2006-05-19 | 2021-09-02 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Elektrisch leitende Verbindung mit isolierendem Verbindungsmedium |
JP4162094B2 (ja) * | 2006-05-30 | 2008-10-08 | 三菱重工業株式会社 | 常温接合によるデバイス、デバイス製造方法ならびに常温接合装置 |
JP4858692B2 (ja) * | 2006-06-22 | 2012-01-18 | 日本電気株式会社 | チップ積層型半導体装置 |
JP5129939B2 (ja) * | 2006-08-31 | 2013-01-30 | 沖電気工業株式会社 | 半導体装置の製造方法 |
US20080087979A1 (en) * | 2006-10-13 | 2008-04-17 | Analog Devices, Inc. | Integrated Circuit with Back Side Conductive Paths |
US7812459B2 (en) | 2006-12-19 | 2010-10-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three-dimensional integrated circuits with protection layers |
US20080164606A1 (en) * | 2007-01-08 | 2008-07-10 | Christoffer Graae Greisen | Spacers for wafer bonding |
WO2008086537A2 (en) * | 2007-01-11 | 2008-07-17 | Analog Devices, Inc. | Aluminum based bonding of semiconductor wafers |
US7605477B2 (en) * | 2007-01-25 | 2009-10-20 | Raytheon Company | Stacked integrated circuit assembly |
US7703661B2 (en) | 2007-05-23 | 2010-04-27 | International Business Machines Corporation | Method and process for reducing undercooling in a lead-free tin-rich solder alloy |
JP5016382B2 (ja) * | 2007-05-24 | 2012-09-05 | パナソニック株式会社 | センサ装置およびその製造方法 |
US20090056989A1 (en) * | 2007-08-27 | 2009-03-05 | Intel Corporation | Printed circuit board and method for preparation thereof |
US8387674B2 (en) * | 2007-11-30 | 2013-03-05 | Taiwan Semiconductor Manufacturing Comany, Ltd. | Chip on wafer bonder |
US8273603B2 (en) | 2008-04-04 | 2012-09-25 | The Charles Stark Draper Laboratory, Inc. | Interposers, electronic modules, and methods for forming the same |
US8017451B2 (en) | 2008-04-04 | 2011-09-13 | The Charles Stark Draper Laboratory, Inc. | Electronic modules and methods for forming the same |
US7863721B2 (en) * | 2008-06-11 | 2011-01-04 | Stats Chippac, Ltd. | Method and apparatus for wafer level integration using tapered vias |
WO2010013728A1 (ja) * | 2008-07-31 | 2010-02-04 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US8956904B2 (en) | 2008-09-10 | 2015-02-17 | Analog Devices, Inc. | Apparatus and method of wafer bonding using compatible alloy |
US7981765B2 (en) | 2008-09-10 | 2011-07-19 | Analog Devices, Inc. | Substrate bonding with bonding material having rare earth metal |
US7863097B2 (en) * | 2008-11-07 | 2011-01-04 | Raytheon Company | Method of preparing detectors for oxide bonding to readout integrated chips |
DE102008043735A1 (de) * | 2008-11-14 | 2010-05-20 | Robert Bosch Gmbh | Anordnung von mindestens zwei Wafern mit einer Bondverbindung und Verfahren zur Herstellung einer solchen Anordnung |
US8451012B2 (en) | 2009-02-17 | 2013-05-28 | International Business Machines Corporation | Contact resistance test structure and method suitable for three-dimensional integrated circuits |
JP5177015B2 (ja) * | 2009-02-27 | 2013-04-03 | 富士通株式会社 | パッケージドデバイスおよびパッケージドデバイス製造方法 |
US20100248424A1 (en) * | 2009-03-27 | 2010-09-30 | Intellectual Business Machines Corporation | Self-Aligned Chip Stacking |
KR101049083B1 (ko) * | 2009-04-10 | 2011-07-15 | (주)실리콘화일 | 3차원 구조를 갖는 이미지 센서의 단위 화소 및 그 제조방법 |
EP2251893B1 (en) * | 2009-05-14 | 2014-10-29 | IMS Nanofabrication AG | Multi-beam deflector array means with bonded electrodes |
US20100314149A1 (en) | 2009-06-10 | 2010-12-16 | Medtronic, Inc. | Hermetically-sealed electrical circuit apparatus |
US8172760B2 (en) | 2009-06-18 | 2012-05-08 | Medtronic, Inc. | Medical device encapsulated within bonded dies |
JP5187284B2 (ja) * | 2009-06-26 | 2013-04-24 | ソニー株式会社 | 半導体装置の製造方法 |
US8669588B2 (en) * | 2009-07-06 | 2014-03-11 | Raytheon Company | Epitaxially-grown position sensitive detector |
US8567658B2 (en) * | 2009-07-20 | 2013-10-29 | Ontos Equipment Systems, Inc. | Method of plasma preparation of metallic contacts to enhance mechanical and electrical integrity of subsequent interconnect bonds |
US11134598B2 (en) * | 2009-07-20 | 2021-09-28 | Set North America, Llc | 3D packaging with low-force thermocompression bonding of oxidizable materials |
US20110156195A1 (en) * | 2009-12-31 | 2011-06-30 | Tivarus Cristian A | Interwafer interconnects for stacked CMOS image sensors |
US20110156197A1 (en) * | 2009-12-31 | 2011-06-30 | Tivarus Cristian A | Interwafer interconnects for stacked CMOS image sensors |
US8841777B2 (en) | 2010-01-12 | 2014-09-23 | International Business Machines Corporation | Bonded structure employing metal semiconductor alloy bonding |
TW202315049A (zh) * | 2010-02-16 | 2023-04-01 | 凡 歐貝克 | 製造3d半導體晶圓的方法 |
EP2597671A3 (de) * | 2010-03-31 | 2013-09-25 | EV Group E. Thallner GmbH | Verfahren zum permanenten Verbinden zweier Metalloberflächen |
US8546188B2 (en) * | 2010-04-09 | 2013-10-01 | International Business Machines Corporation | Bow-balanced 3D chip stacking |
US8433402B2 (en) * | 2010-04-28 | 2013-04-30 | Medtronic, Inc. | Hermetic wafer-to-wafer bonding with electrical interconnection |
US8513120B2 (en) | 2010-04-29 | 2013-08-20 | Medtronic, Inc. | Gold-tin etch using combination of halogen plasma and wet etch |
FI123860B (fi) * | 2010-05-18 | 2013-11-29 | Corelase Oy | Menetelmä substraattien tiivistämiseksi ja kontaktoimiseksi laservalon avulla ja elektroniikkamoduli |
JP5517800B2 (ja) | 2010-07-09 | 2014-06-11 | キヤノン株式会社 | 固体撮像装置用の部材および固体撮像装置の製造方法 |
US8461017B2 (en) | 2010-07-19 | 2013-06-11 | Soitec | Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region |
SG177817A1 (en) * | 2010-07-19 | 2012-02-28 | Soitec Silicon On Insulator | Temporary semiconductor structure bonding methods and related bonded semiconductor structures |
FR2963158B1 (fr) * | 2010-07-21 | 2013-05-17 | Commissariat Energie Atomique | Procede d'assemblage par collage direct entre deux elements comprenant des portions de cuivre et de materiaux dielectriques |
FR2964112B1 (fr) * | 2010-08-31 | 2013-07-19 | Commissariat Energie Atomique | Traitement avant collage d'une surface mixte cu-oxyde, par un plasma contenant de l'azote et de l'hydrogene |
FR2966283B1 (fr) * | 2010-10-14 | 2012-11-30 | Soi Tec Silicon On Insulator Tech Sa | Procede pour realiser une structure de collage |
US8666505B2 (en) | 2010-10-26 | 2014-03-04 | Medtronic, Inc. | Wafer-scale package including power source |
US8486758B2 (en) | 2010-12-20 | 2013-07-16 | Tessera, Inc. | Simultaneous wafer bonding and interconnect joining |
KR101810310B1 (ko) * | 2011-01-25 | 2017-12-18 | 에베 그룹 에. 탈너 게엠베하 | 웨이퍼들의 영구적 결합을 위한 방법 |
US8424388B2 (en) | 2011-01-28 | 2013-04-23 | Medtronic, Inc. | Implantable capacitive pressure sensor apparatus and methods regarding same |
US8501537B2 (en) | 2011-03-31 | 2013-08-06 | Soitec | Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures formed using such methods |
US8912017B2 (en) * | 2011-05-10 | 2014-12-16 | Ostendo Technologies, Inc. | Semiconductor wafer bonding incorporating electrical and optical interconnects |
KR102084337B1 (ko) * | 2011-05-24 | 2020-04-23 | 소니 주식회사 | 반도체 장치 |
FR2978606B1 (fr) * | 2011-07-27 | 2014-02-21 | Soitec Silicon On Insulator | Surfaces de liaison améliorées pour le collage direct de structures semi-conductrices |
US8697493B2 (en) | 2011-07-18 | 2014-04-15 | Soitec | Bonding surfaces for direct bonding of semiconductor structures |
US8441087B2 (en) | 2011-07-22 | 2013-05-14 | Raytheon Company | Direct readout focal plane array |
US10115764B2 (en) | 2011-08-15 | 2018-10-30 | Raytheon Company | Multi-band position sensitive imaging arrays |
US8754424B2 (en) | 2011-08-29 | 2014-06-17 | Micron Technology, Inc. | Discontinuous patterned bonds for semiconductor devices and associated systems and methods |
US9673163B2 (en) * | 2011-10-18 | 2017-06-06 | Rohm Co., Ltd. | Semiconductor device with flip chip structure and fabrication method of the semiconductor device |
US9748214B2 (en) | 2011-10-21 | 2017-08-29 | Santa Barbara Infrared, Inc. | Techniques for tiling arrays of pixel elements and fabricating hybridized tiles |
US9040837B2 (en) * | 2011-12-14 | 2015-05-26 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
KR101870155B1 (ko) | 2012-02-02 | 2018-06-25 | 삼성전자주식회사 | 비아 연결 구조체, 그것을 갖는 반도체 소자 및 그 제조 방법들 |
FR2990565B1 (fr) * | 2012-05-09 | 2016-10-28 | Commissariat Energie Atomique | Procede de realisation de detecteurs infrarouges |
CN103426732B (zh) * | 2012-05-18 | 2015-12-02 | 上海丽恒光微电子科技有限公司 | 低温晶圆键合的方法及通过该方法形成的结构 |
US8896060B2 (en) | 2012-06-01 | 2014-11-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Trench power MOSFET |
US8969955B2 (en) | 2012-06-01 | 2015-03-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Power MOSFET and methods for forming the same |
US9048283B2 (en) | 2012-06-05 | 2015-06-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid bonding systems and methods for semiconductor wafers |
FR2992772B1 (fr) * | 2012-06-28 | 2014-07-04 | Soitec Silicon On Insulator | Procede de realisation de structure composite avec collage de type metal/metal |
US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
US9087905B2 (en) | 2012-10-03 | 2015-07-21 | International Business Machines Corporation | Transistor formation using cold welding |
CN103043605B (zh) * | 2012-12-07 | 2015-11-18 | 中国电子科技集团公司第五十五研究所 | 微型电镀立体结构提高圆片级金属键合强度的工艺方法 |
US9196606B2 (en) | 2013-01-09 | 2015-11-24 | Nthdegree Technologies Worldwide Inc. | Bonding transistor wafer to LED wafer to form active LED modules |
EP2757571B1 (en) * | 2013-01-17 | 2017-09-20 | IMS Nanofabrication AG | High-voltage insulation device for charged-particle optical apparatus |
US9673169B2 (en) * | 2013-02-05 | 2017-06-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for a wafer seal ring |
FR3003087B1 (fr) * | 2013-03-05 | 2015-04-10 | Commissariat Energie Atomique | Procede de realisation d’un collage direct metallique conducteur |
US9446467B2 (en) * | 2013-03-14 | 2016-09-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrate rinse module in hybrid bonding platform |
US8921992B2 (en) | 2013-03-14 | 2014-12-30 | Raytheon Company | Stacked wafer with coolant channels |
US9443796B2 (en) | 2013-03-15 | 2016-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Air trench in packages incorporating hybrid bonding |
WO2014184988A1 (ja) * | 2013-05-16 | 2014-11-20 | パナソニックIpマネジメント株式会社 | 半導体装置及びその製造方法 |
JP2015023286A (ja) | 2013-07-17 | 2015-02-02 | アイエムエス ナノファブリケーション アーゲー | 複数のブランキングアレイを有するパターン画定装置 |
EP2830083B1 (en) | 2013-07-25 | 2016-05-04 | IMS Nanofabrication AG | Method for charged-particle multi-beam exposure |
KR102136845B1 (ko) | 2013-09-16 | 2020-07-23 | 삼성전자 주식회사 | 적층형 이미지 센서 및 그 제조방법 |
JP6330151B2 (ja) * | 2013-09-17 | 2018-05-30 | パナソニックIpマネジメント株式会社 | 半導体装置及びその製造方法 |
JP6212720B2 (ja) | 2013-09-20 | 2017-10-18 | パナソニックIpマネジメント株式会社 | 半導体装置及びその製造方法 |
US9779965B2 (en) * | 2013-10-08 | 2017-10-03 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US9780065B2 (en) | 2013-10-08 | 2017-10-03 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US9136240B2 (en) * | 2013-10-08 | 2015-09-15 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US9360623B2 (en) * | 2013-12-20 | 2016-06-07 | The Regents Of The University Of California | Bonding of heterogeneous material grown on silicon to a silicon photonic circuit |
US9148923B2 (en) * | 2013-12-23 | 2015-09-29 | Infineon Technologies Ag | Device having a plurality of driver circuits to provide a current to a plurality of loads and method of manufacturing the same |
FR3017993B1 (fr) * | 2014-02-27 | 2017-08-11 | Commissariat Energie Atomique | Procede de realisation d'une structure par assemblage d'au moins deux elements par collage direct |
EP2913838B1 (en) | 2014-02-28 | 2018-09-19 | IMS Nanofabrication GmbH | Compensation of defective beamlets in a charged-particle multi-beam exposure tool |
US20150262902A1 (en) | 2014-03-12 | 2015-09-17 | Invensas Corporation | Integrated circuits protected by substrates with cavities, and methods of manufacture |
US9349690B2 (en) | 2014-03-13 | 2016-05-24 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor arrangement and formation thereof |
CN104051337B (zh) * | 2014-04-24 | 2017-02-15 | 上海珏芯光电科技有限公司 | 立体堆叠集成电路系统芯片封装的制造方法与测试方法 |
US9443699B2 (en) | 2014-04-25 | 2016-09-13 | Ims Nanofabrication Ag | Multi-beam tool for cutting patterns |
EP3358599B1 (en) | 2014-05-30 | 2021-01-27 | IMS Nanofabrication GmbH | Compensation of dose inhomogeneity using row calibration |
JP6892214B2 (ja) | 2014-07-10 | 2021-06-23 | アイエムエス ナノファブリケーション ゲーエムベーハー | 畳み込みカーネルを使用する粒子ビーム描画機のカスタマイズ化 |
KR102275705B1 (ko) | 2014-07-11 | 2021-07-09 | 삼성전자주식회사 | 웨이퍼 대 웨이퍼 접합 구조 |
KR102161793B1 (ko) | 2014-07-18 | 2020-10-06 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
GB201413578D0 (en) | 2014-07-31 | 2014-09-17 | Infiniled Ltd | A colour iled display on silicon |
JP6417777B2 (ja) * | 2014-08-08 | 2018-11-07 | 株式会社ニコン | 基板積層装置および基板積層方法 |
CN105470153B (zh) * | 2014-09-03 | 2018-03-06 | 中芯国际集成电路制造(上海)有限公司 | 晶圆键合方法 |
US9568907B2 (en) | 2014-09-05 | 2017-02-14 | Ims Nanofabrication Ag | Correction of short-range dislocations in a multi-beam writer |
FR3028050B1 (fr) * | 2014-10-29 | 2016-12-30 | Commissariat Energie Atomique | Substrat pre-structure pour la realisation de composants photoniques, circuit photonique et procede de fabrication associes |
US10852492B1 (en) * | 2014-10-29 | 2020-12-01 | Acacia Communications, Inc. | Techniques to combine two integrated photonic substrates |
JP6313189B2 (ja) * | 2014-11-04 | 2018-04-18 | 東芝メモリ株式会社 | 半導体装置の製造方法 |
JP6335099B2 (ja) | 2014-11-04 | 2018-05-30 | 東芝メモリ株式会社 | 半導体装置および半導体装置の製造方法 |
JP6636534B2 (ja) | 2014-11-12 | 2020-01-29 | オントス イクイップメント システムズ インコーポレイテッド | フォトレジスト表面および金属表面処理の同時親水化:方法、システム、および製品 |
KR102211143B1 (ko) | 2014-11-13 | 2021-02-02 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
KR102274775B1 (ko) | 2014-11-13 | 2021-07-08 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US9536853B2 (en) | 2014-11-18 | 2017-01-03 | International Business Machines Corporation | Semiconductor device including built-in crack-arresting film structure |
US11069734B2 (en) | 2014-12-11 | 2021-07-20 | Invensas Corporation | Image sensor device |
US9653263B2 (en) | 2015-03-17 | 2017-05-16 | Ims Nanofabrication Ag | Multi-beam writing of pattern areas of relaxed critical dimension |
EP3096342B1 (en) | 2015-03-18 | 2017-09-20 | IMS Nanofabrication AG | Bi-directional double-pass multi-beam writing |
US10410831B2 (en) | 2015-05-12 | 2019-09-10 | Ims Nanofabrication Gmbh | Multi-beam writing using inclined exposure stripes |
JP6415391B2 (ja) * | 2015-06-08 | 2018-10-31 | 東京エレクトロン株式会社 | 表面改質方法、プログラム、コンピュータ記憶媒体、表面改質装置及び接合システム |
US9741620B2 (en) | 2015-06-24 | 2017-08-22 | Invensas Corporation | Structures and methods for reliable packages |
US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
WO2017033839A1 (ja) | 2015-08-21 | 2017-03-02 | 株式会社Nttドコモ | ユーザ端末、無線基地局及び無線通信方法 |
US9953941B2 (en) | 2015-08-25 | 2018-04-24 | Invensas Bonding Technologies, Inc. | Conductive barrier direct hybrid bonding |
US9832867B2 (en) | 2015-11-23 | 2017-11-28 | Medtronic, Inc. | Embedded metallic structures in glass |
KR102423813B1 (ko) | 2015-11-27 | 2022-07-22 | 삼성전자주식회사 | 반도체 소자 |
DE102015121066B4 (de) * | 2015-12-03 | 2021-10-28 | Infineon Technologies Ag | Halbleitersubstrat-auf-halbleitersubstrat-package und verfahren zu seiner herstellung |
US9496239B1 (en) | 2015-12-11 | 2016-11-15 | International Business Machines Corporation | Nitride-enriched oxide-to-oxide 3D wafer bonding |
US9852988B2 (en) * | 2015-12-18 | 2017-12-26 | Invensas Bonding Technologies, Inc. | Increased contact alignment tolerance for direct bonding |
US10446532B2 (en) | 2016-01-13 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Systems and methods for efficient transfer of semiconductor elements |
US10373830B2 (en) | 2016-03-08 | 2019-08-06 | Ostendo Technologies, Inc. | Apparatus and methods to remove unbonded areas within bonded substrates using localized electromagnetic wave annealing |
US9673220B1 (en) | 2016-03-09 | 2017-06-06 | Globalfoundries Inc. | Chip structures with distributed wiring |
US10354975B2 (en) | 2016-05-16 | 2019-07-16 | Raytheon Company | Barrier layer for interconnects in 3D integrated device |
US10204893B2 (en) | 2016-05-19 | 2019-02-12 | Invensas Bonding Technologies, Inc. | Stacked dies and methods for forming bonded structures |
US10325756B2 (en) | 2016-06-13 | 2019-06-18 | Ims Nanofabrication Gmbh | Method for compensating pattern placement errors caused by variation of pattern exposure density in a multi-beam writer |
US10163771B2 (en) * | 2016-08-08 | 2018-12-25 | Qualcomm Incorporated | Interposer device including at least one transistor and at least one through-substrate via |
US10446487B2 (en) | 2016-09-30 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
KR20240036154A (ko) | 2016-10-07 | 2024-03-19 | 엑셀시스 코포레이션 | 직접-접합된 네이티브 상호접속부 및 능동 베이스 다이 |
US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
US10672745B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D processor |
US10672663B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D chip sharing power circuit |
US10607136B2 (en) | 2017-08-03 | 2020-03-31 | Xcelsis Corporation | Time borrowing between layers of a three dimensional chip stack |
US10600691B2 (en) | 2016-10-07 | 2020-03-24 | Xcelsis Corporation | 3D chip sharing power interconnect layer |
US10580757B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Face-to-face mounted IC dies with orthogonal top interconnect layers |
TW202414634A (zh) | 2016-10-27 | 2024-04-01 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
CN108122823B (zh) * | 2016-11-30 | 2020-11-03 | 中芯国际集成电路制造(上海)有限公司 | 晶圆键合方法及晶圆键合结构 |
US10002844B1 (en) | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
US10796936B2 (en) | 2016-12-22 | 2020-10-06 | Invensas Bonding Technologies, Inc. | Die tray with channels |
EP3563411B1 (en) | 2016-12-28 | 2021-04-14 | Invensas Bonding Technologies, Inc. | Method of processing a substrate on a temporary substrate |
US20180182665A1 (en) | 2016-12-28 | 2018-06-28 | Invensas Bonding Technologies, Inc. | Processed Substrate |
US20180190583A1 (en) * | 2016-12-29 | 2018-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures with integrated passive component |
TWI782939B (zh) | 2016-12-29 | 2022-11-11 | 美商英帆薩斯邦德科技有限公司 | 具有整合式被動構件的接合結構 |
US10276909B2 (en) | 2016-12-30 | 2019-04-30 | Invensas Bonding Technologies, Inc. | Structure comprising at least a first element bonded to a carrier having a closed metallic channel waveguide formed therein |
US10325757B2 (en) | 2017-01-27 | 2019-06-18 | Ims Nanofabrication Gmbh | Advanced dose-level quantization of multibeam-writers |
EP3580166A4 (en) | 2017-02-09 | 2020-09-02 | Invensas Bonding Technologies, Inc. | RELATED STRUCTURES |
US10629577B2 (en) | 2017-03-16 | 2020-04-21 | Invensas Corporation | Direct-bonded LED arrays and applications |
US10515913B2 (en) * | 2017-03-17 | 2019-12-24 | Invensas Bonding Technologies, Inc. | Multi-metal contact structure |
US10508030B2 (en) * | 2017-03-21 | 2019-12-17 | Invensas Bonding Technologies, Inc. | Seal for microelectronic assembly |
WO2018183739A1 (en) | 2017-03-31 | 2018-10-04 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
US10269756B2 (en) | 2017-04-21 | 2019-04-23 | Invensas Bonding Technologies, Inc. | Die processing |
US10879212B2 (en) | 2017-05-11 | 2020-12-29 | Invensas Bonding Technologies, Inc. | Processed stacked dies |
US10529634B2 (en) | 2017-05-11 | 2020-01-07 | Invensas Bonding Technologies, Inc. | Probe methodology for ultrafine pitch interconnects |
KR20190142382A (ko) | 2017-05-25 | 2019-12-26 | 가부시키가이샤 신가와 | 구조체의 제조 방법 및 구조체 |
US10446441B2 (en) | 2017-06-05 | 2019-10-15 | Invensas Corporation | Flat metal features for microelectronics applications |
US10217720B2 (en) | 2017-06-15 | 2019-02-26 | Invensas Corporation | Multi-chip modules formed using wafer-level processing of a reconstitute wafer |
US10522329B2 (en) | 2017-08-25 | 2019-12-31 | Ims Nanofabrication Gmbh | Dose-related feature reshaping in an exposure pattern to be exposed in a multi beam writing apparatus |
US10636774B2 (en) * | 2017-09-06 | 2020-04-28 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming a 3D integrated system-in-package module |
US11569064B2 (en) | 2017-09-18 | 2023-01-31 | Ims Nanofabrication Gmbh | Method for irradiating a target using restricted placement grids |
US10840205B2 (en) | 2017-09-24 | 2020-11-17 | Invensas Bonding Technologies, Inc. | Chemical mechanical polishing for hybrid bonding |
US11195748B2 (en) | 2017-09-27 | 2021-12-07 | Invensas Corporation | Interconnect structures and methods for forming same |
US11031285B2 (en) | 2017-10-06 | 2021-06-08 | Invensas Bonding Technologies, Inc. | Diffusion barrier collar for interconnects |
CN111418060A (zh) | 2017-10-20 | 2020-07-14 | 艾克瑟尔西斯公司 | 具有正交的顶部互连层的、面对面安装的ic裸片 |
EP3698402A1 (en) | 2017-10-20 | 2020-08-26 | XCelsis Corporation | 3d compute circuit with high density z-axis interconnects |
US10584027B2 (en) | 2017-12-01 | 2020-03-10 | Elbit Systems Of America, Llc | Method for forming hermetic seals in MEMS devices |
US20190181119A1 (en) * | 2017-12-07 | 2019-06-13 | United Microelectronics Corp. | Stacked semiconductor device and method for forming the same |
US10658313B2 (en) | 2017-12-11 | 2020-05-19 | Invensas Bonding Technologies, Inc. | Selective recess |
US11011503B2 (en) * | 2017-12-15 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Direct-bonded optoelectronic interconnect for high-density integrated photonics |
US11380597B2 (en) | 2017-12-22 | 2022-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures |
US10923408B2 (en) | 2017-12-22 | 2021-02-16 | Invensas Bonding Technologies, Inc. | Cavity packages |
US10651010B2 (en) | 2018-01-09 | 2020-05-12 | Ims Nanofabrication Gmbh | Non-linear dose- and blur-dependent edge placement correction |
US10840054B2 (en) | 2018-01-30 | 2020-11-17 | Ims Nanofabrication Gmbh | Charged-particle source and method for cleaning a charged-particle source using back-sputtering |
US10886249B2 (en) | 2018-01-31 | 2021-01-05 | Ams International Ag | Hybrid wafer-to-wafer bonding and methods of surface preparation for wafers comprising an aluminum metalization |
DE102018103169A1 (de) * | 2018-02-13 | 2019-08-14 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements und Halbleiterbauelement |
DE102018103431A1 (de) * | 2018-02-15 | 2019-08-22 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung einer Verbindung zwischen Bauteilen und Bauelement aus Bauteilen |
US10727219B2 (en) | 2018-02-15 | 2020-07-28 | Invensas Bonding Technologies, Inc. | Techniques for processing devices |
US11169326B2 (en) | 2018-02-26 | 2021-11-09 | Invensas Bonding Technologies, Inc. | Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects |
US11256004B2 (en) | 2018-03-20 | 2022-02-22 | Invensas Bonding Technologies, Inc. | Direct-bonded lamination for improved image clarity in optical devices |
EP3669398A4 (en) * | 2018-03-22 | 2021-09-01 | SanDisk Technologies LLC | THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A CHIP ASSEMBLY LINKED WITH INTERCONNECTION HOLE STRUCTURES THROUGH A SUBSTRATE AND ITS MANUFACTURING PROCESS |
US11056348B2 (en) | 2018-04-05 | 2021-07-06 | Invensas Bonding Technologies, Inc. | Bonding surfaces for microelectronics |
US10790262B2 (en) | 2018-04-11 | 2020-09-29 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
US11244916B2 (en) | 2018-04-11 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
US11342302B2 (en) | 2018-04-20 | 2022-05-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding with pre-deoxide process and apparatus for performing the same |
US10964664B2 (en) | 2018-04-20 | 2021-03-30 | Invensas Bonding Technologies, Inc. | DBI to Si bonding for simplified handle wafer |
JP6918074B2 (ja) * | 2018-05-02 | 2021-08-11 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | ボンディング層を施与する方法 |
US10403577B1 (en) * | 2018-05-03 | 2019-09-03 | Invensas Corporation | Dielets on flexible and stretchable packaging for microelectronics |
US11004757B2 (en) | 2018-05-14 | 2021-05-11 | Invensas Bonding Technologies, Inc. | Bonded structures |
US11276676B2 (en) | 2018-05-15 | 2022-03-15 | Invensas Bonding Technologies, Inc. | Stacked devices and methods of fabrication |
DE102018112586A1 (de) * | 2018-05-25 | 2019-11-28 | Osram Opto Semiconductors Gmbh | Verfahren zur herstellung einer verbindung zwischen bauteilen und bauelement |
US10923413B2 (en) | 2018-05-30 | 2021-02-16 | Xcelsis Corporation | Hard IP blocks with physically bidirectional passageways |
WO2019241367A1 (en) | 2018-06-12 | 2019-12-19 | Invensas Bonding Technologies, Inc. | Interlayer connection of stacked microelectronic components |
US11393779B2 (en) | 2018-06-13 | 2022-07-19 | Invensas Bonding Technologies, Inc. | Large metal pads over TSV |
US11749645B2 (en) | 2018-06-13 | 2023-09-05 | Adeia Semiconductor Bonding Technologies Inc. | TSV as pad |
US10910344B2 (en) | 2018-06-22 | 2021-02-02 | Xcelsis Corporation | Systems and methods for releveled bump planes for chiplets |
US10340249B1 (en) * | 2018-06-25 | 2019-07-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method |
WO2020010056A1 (en) | 2018-07-03 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Techniques for joining dissimilar materials in microelectronics |
WO2020010136A1 (en) | 2018-07-06 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Molded direct bonded and interconnected stack |
US11462419B2 (en) | 2018-07-06 | 2022-10-04 | Invensas Bonding Technologies, Inc. | Microelectronic assemblies |
CN108922870B (zh) * | 2018-08-22 | 2024-07-12 | 中国电子科技集团公司第四十三研究所 | 一种氮化铝陶瓷管壳及其制作方法 |
US11515291B2 (en) | 2018-08-28 | 2022-11-29 | Adeia Semiconductor Inc. | Integrated voltage regulator and passive components |
US20200075533A1 (en) | 2018-08-29 | 2020-03-05 | Invensas Bonding Technologies, Inc. | Bond enhancement in microelectronics by trapping contaminants and arresting cracks during direct-bonding processes |
US11011494B2 (en) * | 2018-08-31 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics |
CN110875268A (zh) * | 2018-09-04 | 2020-03-10 | 中芯集成电路(宁波)有限公司 | 晶圆级封装方法及封装结构 |
JP2021536131A (ja) * | 2018-09-04 | 2021-12-23 | 中芯集成電路(寧波)有限公司 | ウェハレベルパッケージング方法およびパッケージング構造 |
JP2021535613A (ja) | 2018-09-04 | 2021-12-16 | 中芯集成電路(寧波)有限公司 | ウェハレベルパッケージ方法及びパッケージ構造 |
US11158573B2 (en) | 2018-10-22 | 2021-10-26 | Invensas Bonding Technologies, Inc. | Interconnect structures |
US11244920B2 (en) | 2018-12-18 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Method and structures for low temperature device bonding |
US11139283B2 (en) | 2018-12-22 | 2021-10-05 | Xcelsis Corporation | Abstracted NAND logic in stacks |
US11469214B2 (en) | 2018-12-22 | 2022-10-11 | Xcelsis Corporation | Stacked architecture for three-dimensional NAND |
CN113330557A (zh) | 2019-01-14 | 2021-08-31 | 伊文萨思粘合技术公司 | 键合结构 |
US11901281B2 (en) | 2019-03-11 | 2024-02-13 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
US10629439B1 (en) * | 2019-03-27 | 2020-04-21 | Mikro Mesa Technology Co., Ltd. | Method for minimizing average surface roughness of soft metal layer for bonding |
US10643848B1 (en) * | 2019-03-27 | 2020-05-05 | Mikro Mesa Technology Co., Ltd. | Method for minimizing average surface roughness of soft metal layer for bonding |
US10854578B2 (en) | 2019-03-29 | 2020-12-01 | Invensas Corporation | Diffused bitline replacement in stacked wafer memory |
US11610846B2 (en) | 2019-04-12 | 2023-03-21 | Adeia Semiconductor Bonding Technologies Inc. | Protective elements for bonded structures including an obstructive element |
US11205625B2 (en) | 2019-04-12 | 2021-12-21 | Invensas Bonding Technologies, Inc. | Wafer-level bonding of obstructive elements |
US11373963B2 (en) | 2019-04-12 | 2022-06-28 | Invensas Bonding Technologies, Inc. | Protective elements for bonded structures |
US11355404B2 (en) | 2019-04-22 | 2022-06-07 | Invensas Bonding Technologies, Inc. | Mitigating surface damage of probe pads in preparation for direct bonding of a substrate |
US11099482B2 (en) | 2019-05-03 | 2021-08-24 | Ims Nanofabrication Gmbh | Adapting the duration of exposure slots in multi-beam writers |
US11385278B2 (en) | 2019-05-23 | 2022-07-12 | Invensas Bonding Technologies, Inc. | Security circuitry for bonded structures |
US20200395321A1 (en) | 2019-06-12 | 2020-12-17 | Invensas Bonding Technologies, Inc. | Sealed bonded structures and methods for forming the same |
US11296053B2 (en) | 2019-06-26 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Direct bonded stack structures for increased reliability and improved yield in microelectronics |
CN110429097B (zh) * | 2019-07-31 | 2022-07-12 | 成都辰显光电有限公司 | 一种显示面板、显示装置和显示面板的制备方法 |
CN110429038A (zh) * | 2019-08-09 | 2019-11-08 | 芯盟科技有限公司 | 半导体结构及其形成方法 |
JP7391574B2 (ja) | 2019-08-29 | 2023-12-05 | キヤノン株式会社 | 半導体装置の製造方法および半導体装置 |
US12080672B2 (en) | 2019-09-26 | 2024-09-03 | Adeia Semiconductor Bonding Technologies Inc. | Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive |
CN110797329B (zh) * | 2019-10-15 | 2021-04-30 | 上海集成电路研发中心有限公司 | 一种三维堆叠方法 |
US12113054B2 (en) | 2019-10-21 | 2024-10-08 | Adeia Semiconductor Technologies Llc | Non-volatile dynamic random access memory |
US11862602B2 (en) | 2019-11-07 | 2024-01-02 | Adeia Semiconductor Technologies Llc | Scalable architecture for reduced cycles across SOC |
US11094653B2 (en) | 2019-11-13 | 2021-08-17 | Sandisk Technologies Llc | Bonded assembly containing a dielectric bonding pattern definition layer and methods of forming the same |
US11599299B2 (en) | 2019-11-19 | 2023-03-07 | Invensas Llc | 3D memory circuit |
GB2589329B (en) * | 2019-11-26 | 2022-02-09 | Plessey Semiconductors Ltd | Substrate bonding |
US11762200B2 (en) | 2019-12-17 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded optical devices |
US11876076B2 (en) | 2019-12-20 | 2024-01-16 | Adeia Semiconductor Technologies Llc | Apparatus for non-volatile random access memory stacks |
US11721653B2 (en) | 2019-12-23 | 2023-08-08 | Adeia Semiconductor Bonding Technologies Inc. | Circuitry for electrical redundancy in bonded structures |
CN115088068A (zh) | 2019-12-23 | 2022-09-20 | 伊文萨思粘合技术公司 | 用于接合结构的电冗余 |
JP7398475B2 (ja) | 2020-01-07 | 2023-12-14 | 長江存儲科技有限責任公司 | 金属誘電体接合方法及び構造 |
US11508684B2 (en) | 2020-01-08 | 2022-11-22 | Raytheon Company | Structure for bonding and electrical contact for direct bond hybridization |
US11127719B2 (en) | 2020-01-23 | 2021-09-21 | Nvidia Corporation | Face-to-face dies with enhanced power delivery using extended TSVS |
US11616023B2 (en) * | 2020-01-23 | 2023-03-28 | Nvidia Corporation | Face-to-face dies with a void for enhanced inductor performance |
US11699662B2 (en) | 2020-01-23 | 2023-07-11 | Nvidia Corporation | Face-to-face dies with probe pads for pre-assembly testing |
KR20230003471A (ko) | 2020-03-19 | 2023-01-06 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 직접 결합된 구조체들을 위한 치수 보상 제어 |
US11742314B2 (en) | 2020-03-31 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
KR20210132599A (ko) | 2020-04-24 | 2021-11-04 | 아이엠에스 나노패브릭케이션 게엠베하 | 대전 입자 소스 |
US11340512B2 (en) * | 2020-04-27 | 2022-05-24 | Raytheon Bbn Technologies Corp. | Integration of electronics with Lithium Niobate photonics |
WO2021236361A1 (en) | 2020-05-19 | 2021-11-25 | Invensas Bonding Technologies, Inc. | Laterally unconfined structure |
US11631647B2 (en) | 2020-06-30 | 2023-04-18 | Adeia Semiconductor Bonding Technologies Inc. | Integrated device packages with integrated device die and dummy element |
KR20220016365A (ko) | 2020-07-30 | 2022-02-09 | 삼성전자주식회사 | 반도체 패키지 |
US11764177B2 (en) | 2020-09-04 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
US11728273B2 (en) | 2020-09-04 | 2023-08-15 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
CN112289904B (zh) * | 2020-09-16 | 2022-06-17 | 华灿光电(苏州)有限公司 | 红光led的制作方法 |
US11264357B1 (en) | 2020-10-20 | 2022-03-01 | Invensas Corporation | Mixed exposure for large die |
WO2022094587A1 (en) * | 2020-10-29 | 2022-05-05 | Invensas Bonding Technologies, Inc. | Direct bonding methods and structures |
EP4095882A1 (en) | 2021-05-25 | 2022-11-30 | IMS Nanofabrication GmbH | Pattern data processing for programmable direct-write apparatus |
JP2022191901A (ja) | 2021-06-16 | 2022-12-28 | キオクシア株式会社 | 半導体装置およびその製造方法 |
CN115602650A (zh) | 2021-07-09 | 2023-01-13 | 佳能株式会社(Jp) | 半导体设备、装备以及半导体设备的制造方法 |
US20230065622A1 (en) | 2021-09-02 | 2023-03-02 | Raytheon Company | Wafer-scale direct bonded array core block for an active electronically steerable array (aesa) |
US20230326887A1 (en) * | 2022-04-11 | 2023-10-12 | Western Digital Technologies, Inc. | Clamped semiconductor wafers and semiconductor devices |
CN114735642A (zh) * | 2022-04-24 | 2022-07-12 | 中山大学南昌研究院 | 一种提高金属键合强度的方法 |
CN114823594B (zh) * | 2022-06-28 | 2022-11-11 | 之江实验室 | 一种基于二维材料界面的混合键合结构及方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0529183A (ja) * | 1991-07-22 | 1993-02-05 | Fuji Electric Co Ltd | 接合方法 |
JPH0613456A (ja) * | 1992-09-28 | 1994-01-21 | Toshiba Corp | 半導体装置の製造方法 |
JPH07283382A (ja) * | 1994-04-12 | 1995-10-27 | Sony Corp | シリコン基板のはり合わせ方法 |
JPH0878645A (ja) * | 1994-09-05 | 1996-03-22 | Mitsubishi Materials Corp | シリコン半導体ウェーハ及びその製造方法 |
JPH09120979A (ja) * | 1995-10-25 | 1997-05-06 | Matsushita Electric Ind Co Ltd | 半導体装置とその製造方法 |
JPH10135404A (ja) * | 1996-10-28 | 1998-05-22 | Matsushita Electric Ind Co Ltd | 半導体チップモジュール及びその製造方法 |
JPH11186120A (ja) * | 1997-12-24 | 1999-07-09 | Canon Inc | 同種あるいは異種材料基板間の密着接合法 |
US20020094661A1 (en) * | 1999-10-01 | 2002-07-18 | Ziptronix | Three dimensional device intergration method and intergrated device |
Family Cites Families (96)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6130059A (ja) * | 1984-07-20 | 1986-02-12 | Nec Corp | 半導体装置の製造方法 |
KR900008647B1 (ko) * | 1986-03-20 | 1990-11-26 | 후지쓰 가부시끼가이샤 | 3차원 집적회로와 그의 제조방법 |
JPH07112041B2 (ja) * | 1986-12-03 | 1995-11-29 | シャープ株式会社 | 半導体装置の製造方法 |
US4904328A (en) * | 1987-09-08 | 1990-02-27 | Gencorp Inc. | Bonding of FRP parts |
BR8801696A (pt) * | 1987-09-08 | 1989-03-21 | Gencorp Inc | Processo para ligacao de partes de poliester reforcadas e produto |
US4784970A (en) | 1987-11-18 | 1988-11-15 | Grumman Aerospace Corporation | Process for making a double wafer moated signal processor |
JPH0272642A (ja) | 1988-09-07 | 1990-03-12 | Nec Corp | 基板の接続構造および接続方法 |
JPH0344067A (ja) | 1989-07-11 | 1991-02-25 | Nec Corp | 半導体基板の積層方法 |
US5489804A (en) * | 1989-08-28 | 1996-02-06 | Lsi Logic Corporation | Flexible preformed planar structures for interposing between a chip and a substrate |
JP3190057B2 (ja) * | 1990-07-02 | 2001-07-16 | 株式会社東芝 | 複合集積回路装置 |
JP2729413B2 (ja) | 1991-02-14 | 1998-03-18 | 三菱電機株式会社 | 半導体装置 |
JPH05198739A (ja) | 1991-09-10 | 1993-08-06 | Mitsubishi Electric Corp | 積層型半導体装置およびその製造方法 |
CA2083072C (en) | 1991-11-21 | 1998-02-03 | Shinichi Hasegawa | Method for manufacturing polyimide multilayer wiring substrate |
US6008126A (en) | 1992-04-08 | 1999-12-28 | Elm Technology Corporation | Membrane dielectric isolation IC fabrication |
EP0610709B1 (de) | 1993-02-11 | 1998-06-10 | Siemens Aktiengesellschaft | Verfahren zur Herstellung einer dreidimensionalen Schaltungsanordnung |
US5516727A (en) * | 1993-04-19 | 1996-05-14 | International Business Machines Corporation | Method for encapsulating light emitting diodes |
JPH0766093A (ja) * | 1993-08-23 | 1995-03-10 | Sumitomo Sitix Corp | 半導体ウエーハの貼り合わせ方法およびその装置 |
US5501003A (en) * | 1993-12-15 | 1996-03-26 | Bel Fuse Inc. | Method of assembling electronic packages for surface mount applications |
FR2718571B1 (fr) * | 1994-04-08 | 1996-05-15 | Thomson Csf | Composant hybride semiconducteur. |
KR960009074A (ko) * | 1994-08-29 | 1996-03-22 | 모리시다 요이치 | 반도체 장치 및 그 제조방법 |
JPH08125121A (ja) | 1994-08-29 | 1996-05-17 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
DE4433330C2 (de) | 1994-09-19 | 1997-01-30 | Fraunhofer Ges Forschung | Verfahren zur Herstellung von Halbleiterstrukturen mit vorteilhaften Hochfrequenzeigenschaften sowie eine Halbleiterwaferstruktur |
DE4433845A1 (de) | 1994-09-22 | 1996-03-28 | Fraunhofer Ges Forschung | Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung |
JPH08186235A (ja) | 1994-12-16 | 1996-07-16 | Texas Instr Inc <Ti> | 半導体装置の製造方法 |
JP2679681B2 (ja) * | 1995-04-28 | 1997-11-19 | 日本電気株式会社 | 半導体装置、半導体装置用パッケージ及びその製造方法 |
US5610431A (en) * | 1995-05-12 | 1997-03-11 | The Charles Stark Draper Laboratory, Inc. | Covers for micromechanical sensors and other semiconductor devices |
JP3979687B2 (ja) * | 1995-10-26 | 2007-09-19 | アプライド マテリアルズ インコーポレイテッド | ハロゲンをドープした酸化珪素膜の膜安定性を改良する方法 |
KR100438256B1 (ko) * | 1995-12-18 | 2004-08-25 | 마츠시타 덴끼 산교 가부시키가이샤 | 반도체장치 및 그 제조방법 |
US5956605A (en) * | 1996-09-20 | 1999-09-21 | Micron Technology, Inc. | Use of nitrides for flip-chip encapsulation |
US6054363A (en) * | 1996-11-15 | 2000-04-25 | Canon Kabushiki Kaisha | Method of manufacturing semiconductor article |
US5821692A (en) * | 1996-11-26 | 1998-10-13 | Motorola, Inc. | Organic electroluminescent device hermetic encapsulation package |
EP0951064A4 (en) * | 1996-12-24 | 2005-02-23 | Nitto Denko Corp | PREPARATION OF A SEMICONDUCTOR DEVICE |
US6221753B1 (en) | 1997-01-24 | 2001-04-24 | Micron Technology, Inc. | Flip chip technique for chip assembly |
JPH10223636A (ja) * | 1997-02-12 | 1998-08-21 | Nec Yamagata Ltd | 半導体集積回路装置の製造方法 |
US5929512A (en) * | 1997-03-18 | 1999-07-27 | Jacobs; Richard L. | Urethane encapsulated integrated circuits and compositions therefor |
US6551857B2 (en) * | 1997-04-04 | 2003-04-22 | Elm Technology Corporation | Three dimensional structure integrated circuits |
US5915167A (en) | 1997-04-04 | 1999-06-22 | Elm Technology Corporation | Three dimensional structure memory |
US6322600B1 (en) * | 1997-04-23 | 2001-11-27 | Advanced Technology Materials, Inc. | Planarization compositions and methods for removing interlayer dielectric films |
JP4032454B2 (ja) | 1997-06-27 | 2008-01-16 | ソニー株式会社 | 三次元回路素子の製造方法 |
US6097096A (en) * | 1997-07-11 | 2000-08-01 | Advanced Micro Devices | Metal attachment method and structure for attaching substrates at low temperatures |
US6137063A (en) * | 1998-02-27 | 2000-10-24 | Micron Technology, Inc. | Electrical interconnections |
EP0951068A1 (en) * | 1998-04-17 | 1999-10-20 | Interuniversitair Micro-Elektronica Centrum Vzw | Method of fabrication of a microstructure having an inside cavity |
US6316786B1 (en) * | 1998-08-29 | 2001-11-13 | International Business Machines Corporation | Organic opto-electronic devices |
JP2000100679A (ja) | 1998-09-22 | 2000-04-07 | Canon Inc | 薄片化による基板間微小領域固相接合法及び素子構造 |
US6232150B1 (en) * | 1998-12-03 | 2001-05-15 | The Regents Of The University Of Michigan | Process for making microstructures and microstructures made thereby |
US6410415B1 (en) * | 1999-03-23 | 2002-06-25 | Polymer Flip Chip Corporation | Flip chip mounting technique |
JP3532788B2 (ja) * | 1999-04-13 | 2004-05-31 | 唯知 須賀 | 半導体装置及びその製造方法 |
EP1186009B1 (en) * | 1999-05-03 | 2012-05-30 | Imec | Method for removal of sic |
US6093969A (en) * | 1999-05-15 | 2000-07-25 | Lin; Paul T. | Face-to-face (FTF) stacked assembly of substrate-on-bare-chip (SOBC) modules |
US6258625B1 (en) * | 1999-05-18 | 2001-07-10 | International Business Machines Corporation | Method of interconnecting electronic components using a plurality of conductive studs |
US6218203B1 (en) | 1999-06-28 | 2001-04-17 | Advantest Corp. | Method of producing a contact structure |
KR100333384B1 (ko) | 1999-06-28 | 2002-04-18 | 박종섭 | 칩 사이즈 스택 패키지 및 그의 제조방법 |
WO2001001485A2 (en) * | 1999-06-29 | 2001-01-04 | Koninklijke Philips Electronics N.V. | A semiconductor device |
US6756253B1 (en) * | 1999-08-27 | 2004-06-29 | Micron Technology, Inc. | Method for fabricating a semiconductor component with external contact polymer support layer |
US6583515B1 (en) * | 1999-09-03 | 2003-06-24 | Texas Instruments Incorporated | Ball grid array package for enhanced stress tolerance |
JP2001102479A (ja) | 1999-09-27 | 2001-04-13 | Toshiba Corp | 半導体集積回路装置およびその製造方法 |
US6902987B1 (en) | 2000-02-16 | 2005-06-07 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
US6326698B1 (en) * | 2000-06-08 | 2001-12-04 | Micron Technology, Inc. | Semiconductor devices having protective layers thereon through which contact pads are exposed and stereolithographic methods of fabricating such semiconductor devices |
JP4322402B2 (ja) | 2000-06-22 | 2009-09-02 | 大日本印刷株式会社 | プリント配線基板及びその製造方法 |
JP3440057B2 (ja) * | 2000-07-05 | 2003-08-25 | 唯知 須賀 | 半導体装置およびその製造方法 |
CN1222195C (zh) * | 2000-07-24 | 2005-10-05 | Tdk株式会社 | 发光元件 |
JP2002064268A (ja) * | 2000-08-18 | 2002-02-28 | Toray Eng Co Ltd | 実装方法および装置 |
JP2002110799A (ja) | 2000-09-27 | 2002-04-12 | Toshiba Corp | 半導体装置及びその製造方法 |
US6600224B1 (en) * | 2000-10-31 | 2003-07-29 | International Business Machines Corporation | Thin film attachment to laminate using a dendritic interconnection |
US6552436B2 (en) * | 2000-12-08 | 2003-04-22 | Motorola, Inc. | Semiconductor device having a ball grid array and method therefor |
JP2002353416A (ja) | 2001-05-25 | 2002-12-06 | Sony Corp | 半導体記憶装置およびその製造方法 |
JP3705159B2 (ja) * | 2001-06-11 | 2005-10-12 | 株式会社デンソー | 半導体装置の製造方法 |
JP2003023071A (ja) | 2001-07-05 | 2003-01-24 | Sony Corp | 半導体装置製造方法および半導体装置 |
US6555917B1 (en) * | 2001-10-09 | 2003-04-29 | Amkor Technology, Inc. | Semiconductor package having stacked semiconductor chips and method of making the same |
US6667225B2 (en) * | 2001-12-17 | 2003-12-23 | Intel Corporation | Wafer-bonding using solder and method of making the same |
US20030113947A1 (en) * | 2001-12-19 | 2003-06-19 | Vandentop Gilroy J. | Electrical/optical integration scheme using direct copper bonding |
US6660564B2 (en) * | 2002-01-25 | 2003-12-09 | Sony Corporation | Wafer-level through-wafer packaging process for MEMS and MEMS package produced thereby |
US6887769B2 (en) | 2002-02-06 | 2005-05-03 | Intel Corporation | Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same |
US6624003B1 (en) * | 2002-02-06 | 2003-09-23 | Teravicta Technologies, Inc. | Integrated MEMS device and package |
US6762076B2 (en) | 2002-02-20 | 2004-07-13 | Intel Corporation | Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
US6627814B1 (en) * | 2002-03-22 | 2003-09-30 | David H. Stark | Hermetically sealed micro-device package with window |
US6642081B1 (en) | 2002-04-11 | 2003-11-04 | Robert Patti | Interlocking conductor method for bonding wafers to produce stacked integrated circuits |
US7354798B2 (en) | 2002-12-20 | 2008-04-08 | International Business Machines Corporation | Three-dimensional device fabrication method |
US6962835B2 (en) | 2003-02-07 | 2005-11-08 | Ziptronix, Inc. | Method for room temperature metal direct bonding |
US7135780B2 (en) * | 2003-02-12 | 2006-11-14 | Micron Technology, Inc. | Semiconductor substrate for build-up packages |
US7109092B2 (en) | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
US20040262772A1 (en) | 2003-06-30 | 2004-12-30 | Shriram Ramanathan | Methods for bonding wafers using a metal interlayer |
US6867073B1 (en) | 2003-10-21 | 2005-03-15 | Ziptronix, Inc. | Single mask via method and device |
JP2005135988A (ja) | 2003-10-28 | 2005-05-26 | Toshiba Corp | 半導体装置の製造方法 |
US7485968B2 (en) | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
US7750488B2 (en) | 2006-07-10 | 2010-07-06 | Tezzaron Semiconductor, Inc. | Method for bonding wafers to produce stacked integrated circuits |
KR100945800B1 (ko) | 2008-12-09 | 2010-03-05 | 김영혜 | 이종 접합 웨이퍼 제조방법 |
FR2954585B1 (fr) | 2009-12-23 | 2012-03-02 | Soitec Silicon Insulator Technologies | Procede de realisation d'une heterostructure avec minimisation de contrainte |
US8476146B2 (en) | 2010-12-03 | 2013-07-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reducing wafer distortion through a low CTE layer |
US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
US9953941B2 (en) | 2015-08-25 | 2018-04-24 | Invensas Bonding Technologies, Inc. | Conductive barrier direct hybrid bonding |
US9496239B1 (en) | 2015-12-11 | 2016-11-15 | International Business Machines Corporation | Nitride-enriched oxide-to-oxide 3D wafer bonding |
US9852988B2 (en) | 2015-12-18 | 2017-12-26 | Invensas Bonding Technologies, Inc. | Increased contact alignment tolerance for direct bonding |
US10446532B2 (en) | 2016-01-13 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Systems and methods for efficient transfer of semiconductor elements |
US10204893B2 (en) | 2016-05-19 | 2019-02-12 | Invensas Bonding Technologies, Inc. | Stacked dies and methods for forming bonded structures |
US10446487B2 (en) | 2016-09-30 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
-
2003
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-
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Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0529183A (ja) * | 1991-07-22 | 1993-02-05 | Fuji Electric Co Ltd | 接合方法 |
JPH0613456A (ja) * | 1992-09-28 | 1994-01-21 | Toshiba Corp | 半導体装置の製造方法 |
JPH07283382A (ja) * | 1994-04-12 | 1995-10-27 | Sony Corp | シリコン基板のはり合わせ方法 |
JPH0878645A (ja) * | 1994-09-05 | 1996-03-22 | Mitsubishi Materials Corp | シリコン半導体ウェーハ及びその製造方法 |
JPH09120979A (ja) * | 1995-10-25 | 1997-05-06 | Matsushita Electric Ind Co Ltd | 半導体装置とその製造方法 |
JPH10135404A (ja) * | 1996-10-28 | 1998-05-22 | Matsushita Electric Ind Co Ltd | 半導体チップモジュール及びその製造方法 |
JPH11186120A (ja) * | 1997-12-24 | 1999-07-09 | Canon Inc | 同種あるいは異種材料基板間の密着接合法 |
US20020094661A1 (en) * | 1999-10-01 | 2002-07-18 | Ziptronix | Three dimensional device intergration method and intergrated device |
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