JP5571227B2 - 室温共有結合方法 - Google Patents
室温共有結合方法 Download PDFInfo
- Publication number
- JP5571227B2 JP5571227B2 JP2013108206A JP2013108206A JP5571227B2 JP 5571227 B2 JP5571227 B2 JP 5571227B2 JP 2013108206 A JP2013108206 A JP 2013108206A JP 2013108206 A JP2013108206 A JP 2013108206A JP 5571227 B2 JP5571227 B2 JP 5571227B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- bonding
- tie
- tie layer
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims description 100
- 230000008569 process Effects 0.000 claims description 54
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 22
- 229910052731 fluorine Inorganic materials 0.000 claims description 22
- 239000011737 fluorine Substances 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 22
- 229910020177 SiOF Inorganic materials 0.000 claims description 13
- 238000010304 firing Methods 0.000 claims description 13
- 230000003746 surface roughness Effects 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 5
- 230000003213 activating effect Effects 0.000 claims 2
- 239000010410 layer Substances 0.000 description 117
- 235000012431 wafers Nutrition 0.000 description 85
- 239000000758 substrate Substances 0.000 description 44
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 41
- 239000000463 material Substances 0.000 description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 25
- 239000010703 silicon Substances 0.000 description 25
- 229910052710 silicon Inorganic materials 0.000 description 25
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 19
- 238000000151 deposition Methods 0.000 description 18
- 230000008021 deposition Effects 0.000 description 16
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 16
- 239000000377 silicon dioxide Substances 0.000 description 15
- 235000012239 silicon dioxide Nutrition 0.000 description 15
- 238000006243 chemical reaction Methods 0.000 description 13
- 238000009792 diffusion process Methods 0.000 description 13
- 239000000243 solution Substances 0.000 description 13
- 229910052739 hydrogen Inorganic materials 0.000 description 12
- 238000007654 immersion Methods 0.000 description 12
- 241000894007 species Species 0.000 description 12
- 239000001257 hydrogen Substances 0.000 description 11
- 239000006227 byproduct Substances 0.000 description 10
- 229910052814 silicon oxide Inorganic materials 0.000 description 10
- 229910008051 Si-OH Inorganic materials 0.000 description 9
- 229910006358 Si—OH Inorganic materials 0.000 description 9
- 239000007789 gas Substances 0.000 description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 8
- 238000003860 storage Methods 0.000 description 8
- 239000000126 substance Substances 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 7
- 238000002791 soaking Methods 0.000 description 7
- 238000004544 sputter deposition Methods 0.000 description 7
- 238000011282 treatment Methods 0.000 description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 6
- 238000003780 insertion Methods 0.000 description 6
- 230000037431 insertion Effects 0.000 description 6
- 239000001301 oxygen Substances 0.000 description 6
- 229910052760 oxygen Inorganic materials 0.000 description 6
- 238000009832 plasma treatment Methods 0.000 description 6
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 6
- 229910008284 Si—F Inorganic materials 0.000 description 5
- 238000000137 annealing Methods 0.000 description 5
- 239000003989 dielectric material Substances 0.000 description 5
- 230000010354 integration Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000005259 measurement Methods 0.000 description 5
- 239000002344 surface layer Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 229910002808 Si–O–Si Inorganic materials 0.000 description 4
- 238000001994 activation Methods 0.000 description 4
- 238000004026 adhesive bonding Methods 0.000 description 4
- 238000001354 calcination Methods 0.000 description 4
- 238000003682 fluorination reaction Methods 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- QGZKDVFQNNGYKY-UHFFFAOYSA-O Ammonium Chemical compound [NH4+] QGZKDVFQNNGYKY-UHFFFAOYSA-O 0.000 description 3
- 102100021765 E3 ubiquitin-protein ligase RNF139 Human genes 0.000 description 3
- 101001106970 Homo sapiens E3 ubiquitin-protein ligase RNF139 Proteins 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000007864 aqueous solution Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- 238000009616 inductively coupled plasma Methods 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000006116 polymerization reaction Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910007991 Si-N Inorganic materials 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 229910006294 Si—N Inorganic materials 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 235000011114 ammonium hydroxide Nutrition 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000032798 delamination Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 125000001153 fluoro group Chemical group F* 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 150000002431 hydrogen Chemical class 0.000 description 2
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000002441 reversible effect Effects 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonium chloride Substances [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- 229910014299 N-Si Inorganic materials 0.000 description 1
- 229910018557 Si O Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000000908 ammonium hydroxide Substances 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 235000021028 berry Nutrition 0.000 description 1
- 239000013590 bulk material Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 230000002301 combined effect Effects 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 230000008034 disappearance Effects 0.000 description 1
- 238000010494 dissociation reaction Methods 0.000 description 1
- 230000005593 dissociations Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000036571 hydration Effects 0.000 description 1
- 238000006703 hydration reaction Methods 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 230000005660 hydrophilic surface Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- 238000003887 surface segregation Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
- B32B7/04—Interconnection of layers
-
- H01L29/02—
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00349—Creating layers of material on a substrate
- B81C1/00357—Creating layers of material on a substrate involving bonding one or several substrates on a non-temporary support, e.g. another substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H01L29/70—
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2250/00—Layers arrangement
- B32B2250/04—4 layers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0174—Manufacture or treatment of microstructural devices or systems in or on a substrate for making multi-layered devices, film deposition or growing
- B81C2201/019—Bonding or gluing multiple substrate layers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0118—Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0172—Seals
- B81C2203/019—Seals characterised by the material or arrangement of seals between parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/0805—Shape
- H01L2224/08057—Shape in side view
- H01L2224/08059—Shape in side view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80896—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically insulating surfaces, e.g. oxide or nitride layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/81895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/83896—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically insulating surfaces, e.g. oxide or nitride layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/9202—Forming additional connectors after the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01016—Sulfur [S]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01018—Argon [Ar]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01067—Holmium [Ho]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01072—Hafnium [Hf]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24355—Continuous and nonuniform or irregular surface on layer or component [e.g., roofing, etc.]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24942—Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/31504—Composite [nonstructural laminate]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/31504—Composite [nonstructural laminate]
- Y10T428/31678—Of metal
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Formation Of Insulating Films (AREA)
Description
発明の分野
本発明は、室温でのウエーハ直接結合の分野に関し、より具体的には、誘電体、特にシリコン酸化物層におけるフッ素およびアンモニウムの効果および組み合わせ効果を用いる加工された基板の製造、封入、および3次元デバイス集積のための基板の結合に関する。
従来のCMOSデバイスの物理的限界が近づきつつあり、高性能電子システムについての要求が緊急であるので、システム・オン・チップ(SOC)が半導体産業の自然な解決策となっている。システム・オン・チップ製造のためには、さまざまの機能がチップ上で要求される。シリコン技術は、多数のデバイスを加工するための主要技術であるけれども、所望の回路および光電子機能の多くは、現在、シリコン以外の材料で製造される個別のデバイスおよび/または回路から最良のものとして獲得され得る。したがって、非シリコン系デバイスをシリコン系デバイスと集積させるハイブリッドシステムは、純粋なシリコンまたは純粋な非シリコンデバイス単独では得られない独特のSOC機能を提供する潜在力を提供する。
本発明は、第1の要素および第2の要素に、それぞれ、第1の結合層および第2の結合層であって、該結合層の少なくとも一方がフッ素化された酸化物層を含むものであるところのものを形成すること、周囲環境中、室温で前記第1の結合層と第2の結合層を接触させること、および前記第1の層および第2の層の間に室温で結合を形成することを含む結合方法に関する。
さて、いくつかの図を通して同様の参照番号が同様のまたは対応する部分を示す図面、特に図1、および本発明の結合プロセスの第1の態様を例示する図2A〜2Bを参照する。図1は、一般的な用語で本発明による方法を例示する。結合層は、基板またはウエーハのような結合される要素上に形成される(工程10)。結合層の少なくとも一方は、例えば、フッ素への表面の暴露またはフッ素注入によりフッ素化される(工程11)。層は直接接触され、結合界面を形成し(工程12)、共有結合が化学反応の結果として形成される(工程13)。結合の強度は付加的な共有結合が形成し、および/または前記化学反応由来の副生成物は、前記結合界面から離れて拡散していくので、時間とともに増加する。好ましくは、結合プロセスは、室温、約20〜25℃で行われる。
第1の態様の第1の例において、PECVD(プラズマ増強化学気相堆積)二酸化シリコンを、200〜250℃で片面研磨されたシリコンウエーハ上に堆積させた。PECVD酸化物の厚さは重要ではなく、略1.0μmとして随意に選択した。PECVD酸化物層で被覆されたウエーハを、表面を平滑化するために研磨した。AFM(原子間力顕微鏡)を用いて、表面のマイクロ粗さのRMS(実効値)値が1〜3Åであると決定した。ウエーハを、修正RCA1(H2 O:H2 O2 :NH4 OH=5:1:0.25)溶液により洗浄し、スピン乾燥した。
Si−O+F→Si−F+O+1.1eV (1)
を介してSi−O−Si環の破壊と、より低密度の大きなサイズの環への二酸化シリコン網状構造の変化を引き起こすことを報告した。
Si−OH+HF2 -→Si−F+F+ +H2 O (2)
例えば、内容全体が参照により本明細書に組み込まれているH.ニールセンおよびD.ハックルマン、J.Electrochem.Soc.Vol.130(1983)p.708を参照されたい。高温での、HF後の焼成は上記反応により発生する水分を除去する働きをし、フッ素拡散を高める。フッ素原子は酸化物中に拡散し、式(1)に従ってSiOFを形成するようにSi−O−Si結合と反応する。
Si−F+HOH→Si−OH+HF (3)
により、RCA1溶液洗浄の後のSi−OHに変換される。
Si−OH+NH4 OH→Si−NH2 +2HOH (4)
しかしながら、表面は、NH4 OH中のH2 O含有量のためにNH4 OH浸漬の後に、なおOH基で終端する。
Si−NH2 +Si−NH2 ⇔Si−N−N−Si+H2 (5)
Si−OH+HO−Si⇔Si−O−Si+HOH (6)
例えば、Q.Y.トンおよびU.ゲーゼレ、J.Electroch.Soc.,142(1995)、3975頁は、Si−O−Si共有結合が、対向する結合親水性表面上に水素結合する2つのSi−OH基の間に室温で形成され得ることを報告している。しかしながら、上記重合反応は、略425℃未満の温度で可逆的である。例えば、内容全体が参照により本明細書に組み込まれるM.L.ヘア、シリコン・ケミストリー、E.R.コーリー、J.Y.コーリーおよびP.P.ガスパー編、ウイリー、ニューヨーク(1987)、482頁を参照されたい。
Cs1=S/(πD1t)1/2 (7.1)
Cs2=S/(πD2t)1/2 (7.2)
例えば、内容全体が参照により本明細書に組み込まれるJ.C.C.ツァイ、VLSIテクノロジー、S.M.ツェ編集、マグローヒル、オークランド(1983)、147頁を参照されたい。
γ〜(Cs1+Cs2)-1 (8)
NH2 終端の濃度は、OH終端基より大きいものであり得、結合後にH2 Oよりも高濃度のH2 をもたらし得るものであるが、水素の拡散性は、はるかに小さなサイズ(2.5Å対3.3Å)のために水の拡散性より有意に大きいことが予期される。このとき、結合エネルギーの増加は、水の拡散により支配され得、拡散係数が定数であるならば、時間の平方根に比例する:
γ〜1/CS1=(πD1 t)1/2 /S (9)
この理解と一致して、図7に示されるように、測定された結合エネルギー対貯蔵時間の平方根の近似線形関係が観察され、結合界面から離れるフッ素化酸化物層中への水(と水素)の拡散と一致する。したがって、本発明で観察される結合エネルギーの増強は、結合界面から離れる水(と水素)の拡散に帰することができるが、しかし、本発明は、水副生成物と前記結合界面からの前記水(と水素)の副生成物の拡散をもたらす反応に限定されない。
方法の第2の例を、図8A〜8Cを用いて再び記載する。第1の酸化物層81は、基板80上に形成される(図8A)。フッ素は、上記手順の1つ、すなわち、HFへの暴露またはF含有ガスへの暴露により、フィルム81中に導入される。第2の酸化物フィルム82は、例えばPECVDにより、フィルム81上に形成される(図8B)。フッ素は、拡散および/または表面偏析により、第2のフィルム中に導入される。それは、また、前記酸化物フィルム82の堆積のための適切なF含有前駆体の使用により第2のフィルムに導入され得る。フィルム81および82の寸法は、この例については、一定率の拡大ではないことに注意されたい。この図は、フィルム82がフィルム81の表面内に形成される例を記載するためにも用いられるからであるが、しかし、この図は、フィルム81および82の位置を正確に表す。この例において、構造は、前記酸化物フィルム82に関連する堆積温度および/またはF含有前駆体故に、反応副生成物の除去を補助するフッ素化層を作り出すために焼成される必要は無い。このとき、試料は、図8Cに示される別のウエーハに結合される準備が整っている。
Claims (23)
- 第1の要素および第2の要素に、少なくとも一方がフッ素化された層を包含する第1の結合層および第2の結合層をそれぞれ形成し、
前記第1の結合層および第2の結合層上にそれぞれ、第1の金属パッド及び第2の金属パッドを形成し、
前記フッ素化された層を焼成し、
焼成後に、周囲環境中室温で前記第1の結合層と第2の結合層とを接触させ、
前記第1の金属パッドを前記第2の金属パッドに直接接続させ、および
前記第1の結合層と前記第2の結合層との間に共有結合を形成させること
を包含する結合方法。 - 室温で少なくとも500mJ/m2 の結合を形成することを含む請求項1記載の方法。
- 室温で少なくとも1000mJ/m2 の結合を形成することを含む請求項1記載の方法。
- 室温で少なくとも2500mJ/m2 の結合を形成することを含む請求項1記載の方法。
- 前記第1の結合層および第2の結合層のそれぞれを、0.1〜3nmRMSの範囲内の表面粗さを有するように形成することを含む請求項1記載の方法。
- 前記第1の結合層および第2の結合層を活性化させることを含む請求項5記載の方法。
- 前記第1の結合層および第2の結合層を活性化させることを含む請求項1記載の方法。
- フッ素化された層を包含する前記結合層の少なくとも一方を形成することが、
酸化物層を形成すること、および
前記酸化物層をフッ素含有溶液にさらすこと
を含む請求項1記載の方法。 - フッ素化された酸化物層を100〜300℃の範囲内の温度で加熱することを含む請求項1記載の方法。
- フッ素化された酸化物層を250℃の温度で加熱することを含む請求項1記載の方法。
- フッ素化された酸化物層を含む前記少なくとも一方の結合層を形成することが、
酸化物層を形成すること、および
前記酸化物層をフッ素含有ガスに曝すこと
を含む請求項1記載の方法。 - 前記第1の結合層および前記第2の結合層を、プラズマプロセスに供することによりエッチングすることを含む請求項1記載の方法。
- 前記第1の結合層と第2の結合層との間の界面の近傍に第1のピークを、そして前記第1の結合層および第2の結合層の少なくとも一方中に、前記第1のピークから分離された第2のピークを有するフッ素濃度を生成させることを含む請求項1記載の方法。
- 第1の要素および第2の要素、
前記第1の要素および第2の要素上にそれぞれ形成された第1の結合層および第2の結合層を備え、
前記第1の要素は、前記第1の結合層中に形成された第1の金属パッドを有し、前記第2の要素は、前記第2の結合層中に形成された第2の金属パッドを有し、前記結合層の少なくとも一方は、表面SiOF層を有するフッ素化された酸化物層を含み、
前記第1の結合層および前記第2の結合層は共有結合により互いに直接結合されており、
前記第1の金属パッドは前記第2の金属パッドに直接接続されており、
前記第1の結合層および前記第2の結合層の各々は、0.1〜3nmRMSの範囲内の表面粗さを有する
結合された構造。 - 前記結合が少なくとも500mJ/m2の強さを有する請求項14記載の構造。
- 前記結合が少なくとも1000mJ/m2の強さを有する請求項14記載の構造。
- 前記結合が少なくとも2500mJ/m2の強さを有する請求項14記載の構造。
- 前記第1の結合層および第2の結合層が活性化された表面を有する請求項14記載の構造。
- 前記結合層の少なくとも一方がフッ素含有溶液に曝された酸化物層を含む請求項14記載の構造。
- 前記フッ素化された酸化物層が100〜300℃の範囲内にある温度まで加熱された層を含む請求項14記載の構造。
- 前記フッ素化された層が250℃の温度まで加熱された層を含む請求項14記載の構造。
- 前記第1の結合層および第2の結合層の少なくとも一方がエッチングされた層である請求項14記載の構造。
- 前記構造は、前記第1の結合層と前記第2の結合層との間の界面の近傍に位置する第1のピーク、および、前記第1の結合層および前記第2の結合層の少なくとも一方に位置する、前記第1のピークから分離された第2のピークを有するフッ素濃度を有する請求項14記載の構造。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/440,099 | 2003-05-19 | ||
US10/440,099 US7109092B2 (en) | 2003-05-19 | 2003-05-19 | Method of room temperature covalent bonding |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006532508A Division JP5570680B2 (ja) | 2003-05-19 | 2004-05-19 | 室温共有結合方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013219370A JP2013219370A (ja) | 2013-10-24 |
JP5571227B2 true JP5571227B2 (ja) | 2014-08-13 |
Family
ID=33449761
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006532508A Expired - Lifetime JP5570680B2 (ja) | 2003-05-19 | 2004-05-19 | 室温共有結合方法 |
JP2013108206A Expired - Lifetime JP5571227B2 (ja) | 2003-05-19 | 2013-05-22 | 室温共有結合方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006532508A Expired - Lifetime JP5570680B2 (ja) | 2003-05-19 | 2004-05-19 | 室温共有結合方法 |
Country Status (9)
Country | Link |
---|---|
US (8) | US7109092B2 (ja) |
EP (1) | EP1631981A4 (ja) |
JP (2) | JP5570680B2 (ja) |
KR (1) | KR101154227B1 (ja) |
CN (2) | CN100468639C (ja) |
CA (1) | CA2526481A1 (ja) |
IL (2) | IL171996A0 (ja) |
SG (1) | SG185826A1 (ja) |
WO (1) | WO2004105084A2 (ja) |
Families Citing this family (362)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8058142B2 (en) * | 1996-11-04 | 2011-11-15 | Besang Inc. | Bonded semiconductor structure and method of making the same |
US7470142B2 (en) * | 2004-06-21 | 2008-12-30 | Sang-Yun Lee | Wafer bonding method |
US8018058B2 (en) * | 2004-06-21 | 2011-09-13 | Besang Inc. | Semiconductor memory device |
FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
US6984571B1 (en) | 1999-10-01 | 2006-01-10 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
US6902987B1 (en) | 2000-02-16 | 2005-06-07 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
US6962835B2 (en) | 2003-02-07 | 2005-11-08 | Ziptronix, Inc. | Method for room temperature metal direct bonding |
US7109092B2 (en) | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
US8071438B2 (en) | 2003-06-24 | 2011-12-06 | Besang Inc. | Semiconductor circuit |
DE102004060364A1 (de) * | 2004-12-15 | 2006-06-29 | Austriamicrosystems Ag | Halbleitersubstrat mit Mehrschichtaufbau und Verfahren zur Herstellung |
US8367524B2 (en) | 2005-03-29 | 2013-02-05 | Sang-Yun Lee | Three-dimensional integrated circuit structure |
US7485968B2 (en) | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
FR2889887B1 (fr) | 2005-08-16 | 2007-11-09 | Commissariat Energie Atomique | Procede de report d'une couche mince sur un support |
FR2891281B1 (fr) * | 2005-09-28 | 2007-12-28 | Commissariat Energie Atomique | Procede de fabrication d'un element en couches minces. |
US7812459B2 (en) * | 2006-12-19 | 2010-10-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three-dimensional integrated circuits with protection layers |
FR2910179B1 (fr) | 2006-12-19 | 2009-03-13 | Commissariat Energie Atomique | PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART |
JP2009016393A (ja) * | 2007-06-29 | 2009-01-22 | Toshiba Corp | 半導体基板、半導体装置、及び半導体基板の製造方法 |
JP5452900B2 (ja) * | 2007-09-21 | 2014-03-26 | 株式会社半導体エネルギー研究所 | 半導体膜付き基板の作製方法 |
FR2922359B1 (fr) * | 2007-10-12 | 2009-12-18 | Commissariat Energie Atomique | Procede de fabrication d'une structure micro-electronique impliquant un collage moleculaire |
JP4348454B2 (ja) * | 2007-11-08 | 2009-10-21 | 三菱重工業株式会社 | デバイスおよびデバイス製造方法 |
US8119490B2 (en) * | 2008-02-04 | 2012-02-21 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
US8273603B2 (en) | 2008-04-04 | 2012-09-25 | The Charles Stark Draper Laboratory, Inc. | Interposers, electronic modules, and methods for forming the same |
US8017451B2 (en) | 2008-04-04 | 2011-09-13 | The Charles Stark Draper Laboratory, Inc. | Electronic modules and methods for forming the same |
US8459779B2 (en) | 2008-04-11 | 2013-06-11 | Lexmark International, Inc. | Heater chips with silicon die bonded on silicon substrate, including offset wire bonding |
US7938513B2 (en) * | 2008-04-11 | 2011-05-10 | Lexmark International, Inc. | Heater chips with silicon die bonded on silicon substrate and methods of fabricating the heater chips |
DE102008040221A1 (de) * | 2008-07-07 | 2010-01-14 | Evonik Röhm Gmbh | Verfahren zur Herstellung von (Meth)acrylsäureestern |
US7863097B2 (en) * | 2008-11-07 | 2011-01-04 | Raytheon Company | Method of preparing detectors for oxide bonding to readout integrated chips |
KR100945800B1 (ko) * | 2008-12-09 | 2010-03-05 | 김영혜 | 이종 접합 웨이퍼 제조방법 |
US8402831B2 (en) | 2009-03-05 | 2013-03-26 | The Board Of Trustees Of The Leland Standford Junior University | Monolithic integrated CMUTs fabricated by low-temperature wafer bonding |
US8395191B2 (en) | 2009-10-12 | 2013-03-12 | Monolithic 3D Inc. | Semiconductor device and structure |
US8362482B2 (en) | 2009-04-14 | 2013-01-29 | Monolithic 3D Inc. | Semiconductor device and structure |
US8378715B2 (en) | 2009-04-14 | 2013-02-19 | Monolithic 3D Inc. | Method to construct systems |
US8754533B2 (en) | 2009-04-14 | 2014-06-17 | Monolithic 3D Inc. | Monolithic three-dimensional semiconductor device and structure |
US9509313B2 (en) | 2009-04-14 | 2016-11-29 | Monolithic 3D Inc. | 3D semiconductor device |
US8669778B1 (en) | 2009-04-14 | 2014-03-11 | Monolithic 3D Inc. | Method for design and manufacturing of a 3D semiconductor device |
US8058137B1 (en) | 2009-04-14 | 2011-11-15 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
US8384426B2 (en) | 2009-04-14 | 2013-02-26 | Monolithic 3D Inc. | Semiconductor device and structure |
US7986042B2 (en) | 2009-04-14 | 2011-07-26 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
US8405420B2 (en) | 2009-04-14 | 2013-03-26 | Monolithic 3D Inc. | System comprising a semiconductor device and structure |
US8373439B2 (en) | 2009-04-14 | 2013-02-12 | Monolithic 3D Inc. | 3D semiconductor device |
US9577642B2 (en) | 2009-04-14 | 2017-02-21 | Monolithic 3D Inc. | Method to form a 3D semiconductor device |
US9711407B2 (en) | 2009-04-14 | 2017-07-18 | Monolithic 3D Inc. | Method of manufacturing a three dimensional integrated circuit by transfer of a mono-crystalline layer |
US8427200B2 (en) | 2009-04-14 | 2013-04-23 | Monolithic 3D Inc. | 3D semiconductor device |
US8362800B2 (en) | 2010-10-13 | 2013-01-29 | Monolithic 3D Inc. | 3D semiconductor device including field repairable logics |
US7902851B2 (en) * | 2009-06-10 | 2011-03-08 | Medtronic, Inc. | Hermeticity testing |
FR2947098A1 (fr) | 2009-06-18 | 2010-12-24 | Commissariat Energie Atomique | Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince |
US8172760B2 (en) * | 2009-06-18 | 2012-05-08 | Medtronic, Inc. | Medical device encapsulated within bonded dies |
US10366970B2 (en) | 2009-10-12 | 2019-07-30 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US8581349B1 (en) | 2011-05-02 | 2013-11-12 | Monolithic 3D Inc. | 3D memory semiconductor device and structure |
US8476145B2 (en) | 2010-10-13 | 2013-07-02 | Monolithic 3D Inc. | Method of fabricating a semiconductor device and structure |
US8450804B2 (en) | 2011-03-06 | 2013-05-28 | Monolithic 3D Inc. | Semiconductor device and structure for heat removal |
US12027518B1 (en) | 2009-10-12 | 2024-07-02 | Monolithic 3D Inc. | 3D semiconductor devices and structures with metal layers |
US11984445B2 (en) | 2009-10-12 | 2024-05-14 | Monolithic 3D Inc. | 3D semiconductor devices and structures with metal layers |
US10354995B2 (en) | 2009-10-12 | 2019-07-16 | Monolithic 3D Inc. | Semiconductor memory device and structure |
US8536023B2 (en) | 2010-11-22 | 2013-09-17 | Monolithic 3D Inc. | Method of manufacturing a semiconductor device and structure |
US8742476B1 (en) | 2012-11-27 | 2014-06-03 | Monolithic 3D Inc. | Semiconductor device and structure |
US8148728B2 (en) | 2009-10-12 | 2012-04-03 | Monolithic 3D, Inc. | Method for fabrication of a semiconductor device and structure |
US10910364B2 (en) | 2009-10-12 | 2021-02-02 | Monolitaic 3D Inc. | 3D semiconductor device |
US9099424B1 (en) | 2012-08-10 | 2015-08-04 | Monolithic 3D Inc. | Semiconductor system, device and structure with heat removal |
US10043781B2 (en) | 2009-10-12 | 2018-08-07 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11374118B2 (en) | 2009-10-12 | 2022-06-28 | Monolithic 3D Inc. | Method to form a 3D integrated circuit |
US11018133B2 (en) | 2009-10-12 | 2021-05-25 | Monolithic 3D Inc. | 3D integrated circuit |
US10388863B2 (en) | 2009-10-12 | 2019-08-20 | Monolithic 3D Inc. | 3D memory device and structure |
US10157909B2 (en) | 2009-10-12 | 2018-12-18 | Monolithic 3D Inc. | 3D semiconductor device and structure |
JP5760392B2 (ja) * | 2009-11-04 | 2015-08-12 | ボンドテック株式会社 | 接合方法、接合システムおよび半導体装置 |
US8461035B1 (en) | 2010-09-30 | 2013-06-11 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
US8026521B1 (en) | 2010-10-11 | 2011-09-27 | Monolithic 3D Inc. | Semiconductor device and structure |
US8492886B2 (en) | 2010-02-16 | 2013-07-23 | Monolithic 3D Inc | 3D integrated circuit with logic |
US8541819B1 (en) | 2010-12-09 | 2013-09-24 | Monolithic 3D Inc. | Semiconductor device and structure |
US9099526B2 (en) | 2010-02-16 | 2015-08-04 | Monolithic 3D Inc. | Integrated circuit device and structure |
US8373230B1 (en) | 2010-10-13 | 2013-02-12 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
EP2654074B1 (de) * | 2010-03-31 | 2016-10-26 | EV Group E. Thallner GmbH | Verfahren zum permanenten Verbinden zweier Metalloberflächen |
JP5789798B2 (ja) * | 2010-05-28 | 2015-10-07 | ボンドテック株式会社 | 接合方法および接合システム |
KR101134819B1 (ko) | 2010-07-02 | 2012-04-13 | 이상윤 | 반도체 메모리 장치의 제조 방법 |
US10217667B2 (en) | 2011-06-28 | 2019-02-26 | Monolithic 3D Inc. | 3D semiconductor device, fabrication method and system |
US8642416B2 (en) | 2010-07-30 | 2014-02-04 | Monolithic 3D Inc. | Method of forming three dimensional integrated circuit devices using layer transfer technique |
US8901613B2 (en) | 2011-03-06 | 2014-12-02 | Monolithic 3D Inc. | Semiconductor device and structure for heat removal |
US9953925B2 (en) | 2011-06-28 | 2018-04-24 | Monolithic 3D Inc. | Semiconductor system and device |
US9219005B2 (en) | 2011-06-28 | 2015-12-22 | Monolithic 3D Inc. | Semiconductor system and device |
FR2963982B1 (fr) * | 2010-08-20 | 2012-09-28 | Soitec Silicon On Insulator | Procede de collage a basse temperature |
US8522322B2 (en) * | 2010-09-22 | 2013-08-27 | Intel Corporation | Platform firmware armoring technology |
US10497713B2 (en) | 2010-11-18 | 2019-12-03 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11482440B2 (en) | 2010-12-16 | 2022-10-25 | Monolithic 3D Inc. | 3D semiconductor device and structure with a built-in test circuit for repairing faulty circuits |
US8163581B1 (en) | 2010-10-13 | 2012-04-24 | Monolith IC 3D | Semiconductor and optoelectronic devices |
US8273610B2 (en) | 2010-11-18 | 2012-09-25 | Monolithic 3D Inc. | Method of constructing a semiconductor device and structure |
US10896931B1 (en) | 2010-10-11 | 2021-01-19 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11600667B1 (en) | 2010-10-11 | 2023-03-07 | Monolithic 3D Inc. | Method to produce 3D semiconductor devices and structures with memory |
US11469271B2 (en) | 2010-10-11 | 2022-10-11 | Monolithic 3D Inc. | Method to produce 3D semiconductor devices and structures with memory |
US11018191B1 (en) | 2010-10-11 | 2021-05-25 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11024673B1 (en) | 2010-10-11 | 2021-06-01 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11227897B2 (en) | 2010-10-11 | 2022-01-18 | Monolithic 3D Inc. | Method for producing a 3D semiconductor memory device and structure |
US11257867B1 (en) | 2010-10-11 | 2022-02-22 | Monolithic 3D Inc. | 3D semiconductor device and structure with oxide bonds |
US11315980B1 (en) | 2010-10-11 | 2022-04-26 | Monolithic 3D Inc. | 3D semiconductor device and structure with transistors |
US8114757B1 (en) | 2010-10-11 | 2012-02-14 | Monolithic 3D Inc. | Semiconductor device and structure |
US11158674B2 (en) | 2010-10-11 | 2021-10-26 | Monolithic 3D Inc. | Method to produce a 3D semiconductor device and structure |
US10290682B2 (en) | 2010-10-11 | 2019-05-14 | Monolithic 3D Inc. | 3D IC semiconductor device and structure with stacked memory |
US11605663B2 (en) | 2010-10-13 | 2023-03-14 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US11063071B1 (en) | 2010-10-13 | 2021-07-13 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with waveguides |
US11133344B2 (en) | 2010-10-13 | 2021-09-28 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors |
US9197804B1 (en) | 2011-10-14 | 2015-11-24 | Monolithic 3D Inc. | Semiconductor and optoelectronic devices |
US11043523B1 (en) | 2010-10-13 | 2021-06-22 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors |
US11984438B2 (en) | 2010-10-13 | 2024-05-14 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with oxide bonding |
US12080743B2 (en) | 2010-10-13 | 2024-09-03 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US11327227B2 (en) | 2010-10-13 | 2022-05-10 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with electromagnetic modulators |
US11929372B2 (en) | 2010-10-13 | 2024-03-12 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US10978501B1 (en) | 2010-10-13 | 2021-04-13 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with waveguides |
US11404466B2 (en) | 2010-10-13 | 2022-08-02 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors |
US10833108B2 (en) | 2010-10-13 | 2020-11-10 | Monolithic 3D Inc. | 3D microdisplay device and structure |
US11855114B2 (en) | 2010-10-13 | 2023-12-26 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US11869915B2 (en) | 2010-10-13 | 2024-01-09 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US11694922B2 (en) | 2010-10-13 | 2023-07-04 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with oxide bonding |
US10998374B1 (en) | 2010-10-13 | 2021-05-04 | Monolithic 3D Inc. | Multilevel semiconductor device and structure |
US11163112B2 (en) | 2010-10-13 | 2021-11-02 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with electromagnetic modulators |
US10943934B2 (en) | 2010-10-13 | 2021-03-09 | Monolithic 3D Inc. | Multilevel semiconductor device and structure |
US12094892B2 (en) | 2010-10-13 | 2024-09-17 | Monolithic 3D Inc. | 3D micro display device and structure |
US10679977B2 (en) | 2010-10-13 | 2020-06-09 | Monolithic 3D Inc. | 3D microdisplay device and structure |
US11855100B2 (en) | 2010-10-13 | 2023-12-26 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with oxide bonding |
US11164898B2 (en) | 2010-10-13 | 2021-11-02 | Monolithic 3D Inc. | Multilevel semiconductor device and structure |
US11437368B2 (en) | 2010-10-13 | 2022-09-06 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with oxide bonding |
US8379458B1 (en) | 2010-10-13 | 2013-02-19 | Monolithic 3D Inc. | Semiconductor device and structure |
US8666505B2 (en) | 2010-10-26 | 2014-03-04 | Medtronic, Inc. | Wafer-scale package including power source |
US11211279B2 (en) | 2010-11-18 | 2021-12-28 | Monolithic 3D Inc. | Method for processing a 3D integrated circuit and structure |
US11031275B2 (en) | 2010-11-18 | 2021-06-08 | Monolithic 3D Inc. | 3D semiconductor device and structure with memory |
US11610802B2 (en) | 2010-11-18 | 2023-03-21 | Monolithic 3D Inc. | Method for producing a 3D semiconductor device and structure with single crystal transistors and metal gate electrodes |
US11495484B2 (en) | 2010-11-18 | 2022-11-08 | Monolithic 3D Inc. | 3D semiconductor devices and structures with at least two single-crystal layers |
US12100611B2 (en) | 2010-11-18 | 2024-09-24 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
US11482439B2 (en) | 2010-11-18 | 2022-10-25 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device comprising charge trap junction-less transistors |
US11355381B2 (en) | 2010-11-18 | 2022-06-07 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11004719B1 (en) | 2010-11-18 | 2021-05-11 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device and structure |
US11164770B1 (en) | 2010-11-18 | 2021-11-02 | Monolithic 3D Inc. | Method for producing a 3D semiconductor memory device and structure |
US12068187B2 (en) | 2010-11-18 | 2024-08-20 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding and DRAM memory cells |
US11107721B2 (en) | 2010-11-18 | 2021-08-31 | Monolithic 3D Inc. | 3D semiconductor device and structure with NAND logic |
US11923230B1 (en) | 2010-11-18 | 2024-03-05 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US11901210B2 (en) | 2010-11-18 | 2024-02-13 | Monolithic 3D Inc. | 3D semiconductor device and structure with memory |
US11018042B1 (en) | 2010-11-18 | 2021-05-25 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11862503B2 (en) | 2010-11-18 | 2024-01-02 | Monolithic 3D Inc. | Method for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
US11355380B2 (en) | 2010-11-18 | 2022-06-07 | Monolithic 3D Inc. | Methods for producing 3D semiconductor memory device and structure utilizing alignment marks |
US11804396B2 (en) | 2010-11-18 | 2023-10-31 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
US11735462B2 (en) | 2010-11-18 | 2023-08-22 | Monolithic 3D Inc. | 3D semiconductor device and structure with single-crystal layers |
US11443971B2 (en) | 2010-11-18 | 2022-09-13 | Monolithic 3D Inc. | 3D semiconductor device and structure with memory |
US11569117B2 (en) | 2010-11-18 | 2023-01-31 | Monolithic 3D Inc. | 3D semiconductor device and structure with single-crystal layers |
US12136562B2 (en) | 2010-11-18 | 2024-11-05 | Monolithic 3D Inc. | 3D semiconductor device and structure with single-crystal layers |
US11521888B2 (en) | 2010-11-18 | 2022-12-06 | Monolithic 3D Inc. | 3D semiconductor device and structure with high-k metal gate transistors |
US11615977B2 (en) | 2010-11-18 | 2023-03-28 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US12125737B1 (en) | 2010-11-18 | 2024-10-22 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and memory cells |
US11784082B2 (en) | 2010-11-18 | 2023-10-10 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US11482438B2 (en) | 2010-11-18 | 2022-10-25 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device and structure |
US11094576B1 (en) | 2010-11-18 | 2021-08-17 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device and structure |
US11854857B1 (en) | 2010-11-18 | 2023-12-26 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
US11121021B2 (en) | 2010-11-18 | 2021-09-14 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11508605B2 (en) | 2010-11-18 | 2022-11-22 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US12033884B2 (en) | 2010-11-18 | 2024-07-09 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
KR102353489B1 (ko) * | 2011-01-25 | 2022-01-19 | 에베 그룹 에. 탈너 게엠베하 | 웨이퍼들의 영구적 결합을 위한 방법 |
US8424388B2 (en) | 2011-01-28 | 2013-04-23 | Medtronic, Inc. | Implantable capacitive pressure sensor apparatus and methods regarding same |
US8975670B2 (en) | 2011-03-06 | 2015-03-10 | Monolithic 3D Inc. | Semiconductor device and structure for heat removal |
US10825793B2 (en) | 2011-04-08 | 2020-11-03 | Ev Group E. Thallner Gmbh | Method for permanently bonding wafers |
US8912017B2 (en) | 2011-05-10 | 2014-12-16 | Ostendo Technologies, Inc. | Semiconductor wafer bonding incorporating electrical and optical interconnects |
US10388568B2 (en) | 2011-06-28 | 2019-08-20 | Monolithic 3D Inc. | 3D semiconductor device and system |
US8687399B2 (en) | 2011-10-02 | 2014-04-01 | Monolithic 3D Inc. | Semiconductor device and structure |
US9029173B2 (en) | 2011-10-18 | 2015-05-12 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
CN102489420A (zh) * | 2011-11-22 | 2012-06-13 | 路达(厦门)工业有限公司 | 喷射旋转按摩出水结构 |
US9000557B2 (en) | 2012-03-17 | 2015-04-07 | Zvi Or-Bach | Semiconductor device and structure |
JP2013226389A (ja) * | 2012-03-31 | 2013-11-07 | Canon Inc | 探触子及びその製造方法、及びそれを用いた被検体情報取得装置 |
US10600888B2 (en) | 2012-04-09 | 2020-03-24 | Monolithic 3D Inc. | 3D semiconductor device |
US8557632B1 (en) | 2012-04-09 | 2013-10-15 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
US11164811B2 (en) | 2012-04-09 | 2021-11-02 | Monolithic 3D Inc. | 3D semiconductor device with isolation layers and oxide-to-oxide bonding |
US11594473B2 (en) | 2012-04-09 | 2023-02-28 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11476181B1 (en) | 2012-04-09 | 2022-10-18 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11088050B2 (en) | 2012-04-09 | 2021-08-10 | Monolithic 3D Inc. | 3D semiconductor device with isolation layers |
US11881443B2 (en) | 2012-04-09 | 2024-01-23 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11735501B1 (en) | 2012-04-09 | 2023-08-22 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11410912B2 (en) | 2012-04-09 | 2022-08-09 | Monolithic 3D Inc. | 3D semiconductor device with vias and isolation layers |
US11694944B1 (en) | 2012-04-09 | 2023-07-04 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11616004B1 (en) | 2012-04-09 | 2023-03-28 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
DE102012214411B4 (de) | 2012-08-14 | 2022-05-25 | Osram Oled Gmbh | Vorrichtung und verfahren zum herstellen hermetisch dichter kavitäten |
US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
US9837374B2 (en) * | 2012-09-07 | 2017-12-05 | Kyocera Corporation | Method of manufacturing a device |
EP2902104B1 (en) * | 2012-09-28 | 2019-05-22 | Japan Science And Technology Agency | Functional device and functional device manufacturing method |
US8686428B1 (en) | 2012-11-16 | 2014-04-01 | Monolithic 3D Inc. | Semiconductor device and structure |
US8574929B1 (en) | 2012-11-16 | 2013-11-05 | Monolithic 3D Inc. | Method to form a 3D semiconductor device and structure |
US11018116B2 (en) | 2012-12-22 | 2021-05-25 | Monolithic 3D Inc. | Method to form a 3D semiconductor device and structure |
US11309292B2 (en) | 2012-12-22 | 2022-04-19 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11967583B2 (en) | 2012-12-22 | 2024-04-23 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11916045B2 (en) | 2012-12-22 | 2024-02-27 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11961827B1 (en) | 2012-12-22 | 2024-04-16 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US8674470B1 (en) | 2012-12-22 | 2014-03-18 | Monolithic 3D Inc. | Semiconductor device and structure |
US11063024B1 (en) | 2012-12-22 | 2021-07-13 | Monlithic 3D Inc. | Method to form a 3D semiconductor device and structure |
US12051674B2 (en) | 2012-12-22 | 2024-07-30 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11217565B2 (en) | 2012-12-22 | 2022-01-04 | Monolithic 3D Inc. | Method to form a 3D semiconductor device and structure |
US11784169B2 (en) | 2012-12-22 | 2023-10-10 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US9385058B1 (en) | 2012-12-29 | 2016-07-05 | Monolithic 3D Inc. | Semiconductor device and structure |
US11430667B2 (en) | 2012-12-29 | 2022-08-30 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US11177140B2 (en) | 2012-12-29 | 2021-11-16 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10115663B2 (en) | 2012-12-29 | 2018-10-30 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10892169B2 (en) | 2012-12-29 | 2021-01-12 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10651054B2 (en) | 2012-12-29 | 2020-05-12 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10903089B1 (en) | 2012-12-29 | 2021-01-26 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10600657B2 (en) | 2012-12-29 | 2020-03-24 | Monolithic 3D Inc | 3D semiconductor device and structure |
US11087995B1 (en) | 2012-12-29 | 2021-08-10 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11004694B1 (en) | 2012-12-29 | 2021-05-11 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US9871034B1 (en) | 2012-12-29 | 2018-01-16 | Monolithic 3D Inc. | Semiconductor device and structure |
US11430668B2 (en) | 2012-12-29 | 2022-08-30 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US8902663B1 (en) | 2013-03-11 | 2014-12-02 | Monolithic 3D Inc. | Method of maintaining a memory state |
US11869965B2 (en) | 2013-03-11 | 2024-01-09 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and memory cells |
US11935949B1 (en) | 2013-03-11 | 2024-03-19 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and memory cells |
US10325651B2 (en) | 2013-03-11 | 2019-06-18 | Monolithic 3D Inc. | 3D semiconductor device with stacked memory |
US12094965B2 (en) | 2013-03-11 | 2024-09-17 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and memory cells |
US12100646B2 (en) | 2013-03-12 | 2024-09-24 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11088130B2 (en) | 2014-01-28 | 2021-08-10 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11398569B2 (en) | 2013-03-12 | 2022-07-26 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10840239B2 (en) | 2014-08-26 | 2020-11-17 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11923374B2 (en) | 2013-03-12 | 2024-03-05 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US8994404B1 (en) | 2013-03-12 | 2015-03-31 | Monolithic 3D Inc. | Semiconductor device and structure |
US8921992B2 (en) | 2013-03-14 | 2014-12-30 | Raytheon Company | Stacked wafer with coolant channels |
US9117749B1 (en) | 2013-03-15 | 2015-08-25 | Monolithic 3D Inc. | Semiconductor device and structure |
US10224279B2 (en) | 2013-03-15 | 2019-03-05 | Monolithic 3D Inc. | Semiconductor device and structure |
US11341309B1 (en) | 2013-04-15 | 2022-05-24 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US11720736B2 (en) | 2013-04-15 | 2023-08-08 | Monolithic 3D Inc. | Automation methods for 3D integrated circuits and devices |
US9021414B1 (en) | 2013-04-15 | 2015-04-28 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US11030371B2 (en) | 2013-04-15 | 2021-06-08 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US11487928B2 (en) | 2013-04-15 | 2022-11-01 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US11574109B1 (en) | 2013-04-15 | 2023-02-07 | Monolithic 3D Inc | Automation methods for 3D integrated circuits and devices |
US11270055B1 (en) | 2013-04-15 | 2022-03-08 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US10297586B2 (en) | 2015-03-09 | 2019-05-21 | Monolithic 3D Inc. | Methods for processing a 3D semiconductor device |
US11031394B1 (en) | 2014-01-28 | 2021-06-08 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11107808B1 (en) | 2014-01-28 | 2021-08-31 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US12094829B2 (en) | 2014-01-28 | 2024-09-17 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US20150262902A1 (en) | 2014-03-12 | 2015-09-17 | Invensas Corporation | Integrated circuits protected by substrates with cavities, and methods of manufacture |
US9536853B2 (en) | 2014-11-18 | 2017-01-03 | International Business Machines Corporation | Semiconductor device including built-in crack-arresting film structure |
US11069734B2 (en) * | 2014-12-11 | 2021-07-20 | Invensas Corporation | Image sensor device |
US11011507B1 (en) | 2015-04-19 | 2021-05-18 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11056468B1 (en) | 2015-04-19 | 2021-07-06 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10381328B2 (en) | 2015-04-19 | 2019-08-13 | Monolithic 3D Inc. | Semiconductor device and structure |
US10825779B2 (en) | 2015-04-19 | 2020-11-03 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US9741620B2 (en) | 2015-06-24 | 2017-08-22 | Invensas Corporation | Structures and methods for reliable packages |
US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
US11956952B2 (en) | 2015-08-23 | 2024-04-09 | Monolithic 3D Inc. | Semiconductor memory device and structure |
US9953941B2 (en) | 2015-08-25 | 2018-04-24 | Invensas Bonding Technologies, Inc. | Conductive barrier direct hybrid bonding |
US11937422B2 (en) | 2015-11-07 | 2024-03-19 | Monolithic 3D Inc. | Semiconductor memory device and structure |
US12100658B2 (en) | 2015-09-21 | 2024-09-24 | Monolithic 3D Inc. | Method to produce a 3D multilayer semiconductor device and structure |
US11114427B2 (en) | 2015-11-07 | 2021-09-07 | Monolithic 3D Inc. | 3D semiconductor processor and memory device and structure |
CN115942752A (zh) | 2015-09-21 | 2023-04-07 | 莫诺利特斯3D有限公司 | 3d半导体器件和结构 |
US11978731B2 (en) | 2015-09-21 | 2024-05-07 | Monolithic 3D Inc. | Method to produce a multi-level semiconductor memory device and structure |
US10522225B1 (en) | 2015-10-02 | 2019-12-31 | Monolithic 3D Inc. | Semiconductor device with non-volatile memory |
US12120880B1 (en) | 2015-10-24 | 2024-10-15 | Monolithic 3D Inc. | 3D semiconductor device and structure with logic and memory |
US12035531B2 (en) | 2015-10-24 | 2024-07-09 | Monolithic 3D Inc. | 3D semiconductor device and structure with logic and memory |
US11114464B2 (en) | 2015-10-24 | 2021-09-07 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10847540B2 (en) | 2015-10-24 | 2020-11-24 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11296115B1 (en) | 2015-10-24 | 2022-04-05 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11991884B1 (en) | 2015-10-24 | 2024-05-21 | Monolithic 3D Inc. | 3D semiconductor device and structure with logic and memory |
US10418369B2 (en) | 2015-10-24 | 2019-09-17 | Monolithic 3D Inc. | Multi-level semiconductor memory device and structure |
US12016181B2 (en) | 2015-10-24 | 2024-06-18 | Monolithic 3D Inc. | 3D semiconductor device and structure with logic and memory |
US9852988B2 (en) | 2015-12-18 | 2017-12-26 | Invensas Bonding Technologies, Inc. | Increased contact alignment tolerance for direct bonding |
US10446532B2 (en) | 2016-01-13 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Systems and methods for efficient transfer of semiconductor elements |
DE102016202482A1 (de) | 2016-02-18 | 2017-08-24 | Robert Bosch Gmbh | Hermetisch abgeschlossener Halbleiter-Drucksensor |
US10373830B2 (en) | 2016-03-08 | 2019-08-06 | Ostendo Technologies, Inc. | Apparatus and methods to remove unbonded areas within bonded substrates using localized electromagnetic wave annealing |
US9673220B1 (en) | 2016-03-09 | 2017-06-06 | Globalfoundries Inc. | Chip structures with distributed wiring |
US10354975B2 (en) | 2016-05-16 | 2019-07-16 | Raytheon Company | Barrier layer for interconnects in 3D integrated device |
US10204893B2 (en) | 2016-05-19 | 2019-02-12 | Invensas Bonding Technologies, Inc. | Stacked dies and methods for forming bonded structures |
US10446487B2 (en) | 2016-09-30 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
US10719762B2 (en) | 2017-08-03 | 2020-07-21 | Xcelsis Corporation | Three dimensional chip structure implementing machine trained network |
US11711928B2 (en) | 2016-10-10 | 2023-07-25 | Monolithic 3D Inc. | 3D memory devices and structures with control circuits |
US11812620B2 (en) | 2016-10-10 | 2023-11-07 | Monolithic 3D Inc. | 3D DRAM memory devices and structures with control circuits |
US11930648B1 (en) | 2016-10-10 | 2024-03-12 | Monolithic 3D Inc. | 3D memory devices and structures with metal layers |
US11869591B2 (en) | 2016-10-10 | 2024-01-09 | Monolithic 3D Inc. | 3D memory devices and structures with control circuits |
US11329059B1 (en) | 2016-10-10 | 2022-05-10 | Monolithic 3D Inc. | 3D memory devices and structures with thinned single crystal substrates |
US11251149B2 (en) | 2016-10-10 | 2022-02-15 | Monolithic 3D Inc. | 3D memory device and structure |
TWI822659B (zh) | 2016-10-27 | 2023-11-21 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
JP6558355B2 (ja) * | 2016-12-19 | 2019-08-14 | 信越半導体株式会社 | Soiウェーハの製造方法 |
JP6673183B2 (ja) * | 2016-12-21 | 2020-03-25 | 株式会社Sumco | pn接合シリコンウェーハの製造方法 |
US10002844B1 (en) | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
US10796936B2 (en) | 2016-12-22 | 2020-10-06 | Invensas Bonding Technologies, Inc. | Die tray with channels |
US20180182665A1 (en) | 2016-12-28 | 2018-06-28 | Invensas Bonding Technologies, Inc. | Processed Substrate |
KR102320673B1 (ko) | 2016-12-28 | 2021-11-01 | 인벤사스 본딩 테크놀로지스 인코포레이티드 | 적층된 기판의 처리 |
US11626363B2 (en) | 2016-12-29 | 2023-04-11 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
US10276909B2 (en) | 2016-12-30 | 2019-04-30 | Invensas Bonding Technologies, Inc. | Structure comprising at least a first element bonded to a carrier having a closed metallic channel waveguide formed therein |
JP7030825B2 (ja) | 2017-02-09 | 2022-03-07 | インヴェンサス ボンディング テクノロジーズ インコーポレイテッド | 接合構造物 |
EP3367425A1 (en) * | 2017-02-28 | 2018-08-29 | IMEC vzw | A method for direct bonding of semiconductor substrates |
US10629577B2 (en) | 2017-03-16 | 2020-04-21 | Invensas Corporation | Direct-bonded LED arrays and applications |
US10515913B2 (en) | 2017-03-17 | 2019-12-24 | Invensas Bonding Technologies, Inc. | Multi-metal contact structure |
US10508030B2 (en) | 2017-03-21 | 2019-12-17 | Invensas Bonding Technologies, Inc. | Seal for microelectronic assembly |
WO2018183739A1 (en) | 2017-03-31 | 2018-10-04 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
US10269756B2 (en) | 2017-04-21 | 2019-04-23 | Invensas Bonding Technologies, Inc. | Die processing |
US10529634B2 (en) | 2017-05-11 | 2020-01-07 | Invensas Bonding Technologies, Inc. | Probe methodology for ultrafine pitch interconnects |
US10879212B2 (en) | 2017-05-11 | 2020-12-29 | Invensas Bonding Technologies, Inc. | Processed stacked dies |
US10446441B2 (en) | 2017-06-05 | 2019-10-15 | Invensas Corporation | Flat metal features for microelectronics applications |
US11422369B1 (en) | 2017-06-14 | 2022-08-23 | Meta Platforms Technologies, Llc | Multi-layered substrates for waveguide displays |
US10217720B2 (en) | 2017-06-15 | 2019-02-26 | Invensas Corporation | Multi-chip modules formed using wafer-level processing of a reconstitute wafer |
US10840205B2 (en) | 2017-09-24 | 2020-11-17 | Invensas Bonding Technologies, Inc. | Chemical mechanical polishing for hybrid bonding |
US11195748B2 (en) | 2017-09-27 | 2021-12-07 | Invensas Corporation | Interconnect structures and methods for forming same |
US11031285B2 (en) | 2017-10-06 | 2021-06-08 | Invensas Bonding Technologies, Inc. | Diffusion barrier collar for interconnects |
US10658313B2 (en) | 2017-12-11 | 2020-05-19 | Invensas Bonding Technologies, Inc. | Selective recess |
US11011503B2 (en) | 2017-12-15 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Direct-bonded optoelectronic interconnect for high-density integrated photonics |
US11380597B2 (en) | 2017-12-22 | 2022-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures |
US10923408B2 (en) | 2017-12-22 | 2021-02-16 | Invensas Bonding Technologies, Inc. | Cavity packages |
US10727219B2 (en) | 2018-02-15 | 2020-07-28 | Invensas Bonding Technologies, Inc. | Techniques for processing devices |
US11169326B2 (en) | 2018-02-26 | 2021-11-09 | Invensas Bonding Technologies, Inc. | Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects |
US11256004B2 (en) | 2018-03-20 | 2022-02-22 | Invensas Bonding Technologies, Inc. | Direct-bonded lamination for improved image clarity in optical devices |
US11056348B2 (en) | 2018-04-05 | 2021-07-06 | Invensas Bonding Technologies, Inc. | Bonding surfaces for microelectronics |
US10790262B2 (en) | 2018-04-11 | 2020-09-29 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
US11244916B2 (en) | 2018-04-11 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
US10964664B2 (en) | 2018-04-20 | 2021-03-30 | Invensas Bonding Technologies, Inc. | DBI to Si bonding for simplified handle wafer |
US11004757B2 (en) | 2018-05-14 | 2021-05-11 | Invensas Bonding Technologies, Inc. | Bonded structures |
US11276676B2 (en) | 2018-05-15 | 2022-03-15 | Invensas Bonding Technologies, Inc. | Stacked devices and methods of fabrication |
US10923413B2 (en) | 2018-05-30 | 2021-02-16 | Xcelsis Corporation | Hard IP blocks with physically bidirectional passageways |
CN118448377A (zh) | 2018-06-12 | 2024-08-06 | 隔热半导体粘合技术公司 | 堆叠微电子组件的层间连接 |
EP3807927A4 (en) | 2018-06-13 | 2022-02-23 | Invensas Bonding Technologies, Inc. | TSV AS A HIDEPAD |
US11393779B2 (en) | 2018-06-13 | 2022-07-19 | Invensas Bonding Technologies, Inc. | Large metal pads over TSV |
US10910344B2 (en) | 2018-06-22 | 2021-02-02 | Xcelsis Corporation | Systems and methods for releveled bump planes for chiplets |
US11664357B2 (en) | 2018-07-03 | 2023-05-30 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for joining dissimilar materials in microelectronics |
JP6679666B2 (ja) * | 2018-07-05 | 2020-04-15 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | ウエハの永久接合方法 |
WO2020010136A1 (en) | 2018-07-06 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Molded direct bonded and interconnected stack |
US11462419B2 (en) | 2018-07-06 | 2022-10-04 | Invensas Bonding Technologies, Inc. | Microelectronic assemblies |
US10388627B1 (en) * | 2018-07-23 | 2019-08-20 | Mikro Mesa Technology Co., Ltd. | Micro-bonding structure and method of forming the same |
US11515291B2 (en) | 2018-08-28 | 2022-11-29 | Adeia Semiconductor Inc. | Integrated voltage regulator and passive components |
US20200075533A1 (en) | 2018-08-29 | 2020-03-05 | Invensas Bonding Technologies, Inc. | Bond enhancement in microelectronics by trapping contaminants and arresting cracks during direct-bonding processes |
US11011494B2 (en) | 2018-08-31 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics |
US11158573B2 (en) | 2018-10-22 | 2021-10-26 | Invensas Bonding Technologies, Inc. | Interconnect structures |
US11244920B2 (en) | 2018-12-18 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Method and structures for low temperature device bonding |
WO2020150159A1 (en) | 2019-01-14 | 2020-07-23 | Invensas Bonding Technologies, Inc. | Bonded structures |
US11996285B2 (en) * | 2019-02-28 | 2024-05-28 | The Board Of Trustees Of The Leland Stanford Junior University | Silicon-carbide-on-insulator via photoelectrochemical etching |
US11901281B2 (en) | 2019-03-11 | 2024-02-13 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
US10854578B2 (en) | 2019-03-29 | 2020-12-01 | Invensas Corporation | Diffused bitline replacement in stacked wafer memory |
US11018156B2 (en) | 2019-04-08 | 2021-05-25 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11158652B1 (en) | 2019-04-08 | 2021-10-26 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11296106B2 (en) | 2019-04-08 | 2022-04-05 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11763864B2 (en) | 2019-04-08 | 2023-09-19 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures with bit-line pillars |
US10892016B1 (en) | 2019-04-08 | 2021-01-12 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11610846B2 (en) | 2019-04-12 | 2023-03-21 | Adeia Semiconductor Bonding Technologies Inc. | Protective elements for bonded structures including an obstructive element |
US11373963B2 (en) | 2019-04-12 | 2022-06-28 | Invensas Bonding Technologies, Inc. | Protective elements for bonded structures |
US11205625B2 (en) | 2019-04-12 | 2021-12-21 | Invensas Bonding Technologies, Inc. | Wafer-level bonding of obstructive elements |
US11355404B2 (en) | 2019-04-22 | 2022-06-07 | Invensas Bonding Technologies, Inc. | Mitigating surface damage of probe pads in preparation for direct bonding of a substrate |
US11385278B2 (en) | 2019-05-23 | 2022-07-12 | Invensas Bonding Technologies, Inc. | Security circuitry for bonded structures |
US20200395321A1 (en) | 2019-06-12 | 2020-12-17 | Invensas Bonding Technologies, Inc. | Sealed bonded structures and methods for forming the same |
US11296053B2 (en) | 2019-06-26 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Direct bonded stack structures for increased reliability and improved yield in microelectronics |
US10971472B2 (en) * | 2019-07-09 | 2021-04-06 | Mikro Mesa Technology Co., Ltd. | Method of liquid assisted bonding |
KR20210021626A (ko) | 2019-08-19 | 2021-03-02 | 삼성전자주식회사 | 반도체 장치 |
US12080672B2 (en) | 2019-09-26 | 2024-09-03 | Adeia Semiconductor Bonding Technologies Inc. | Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive |
CN110676164A (zh) * | 2019-10-14 | 2020-01-10 | 芯盟科技有限公司 | 半导体工艺部件及其形成方法、以及半导体工艺设备 |
US12113054B2 (en) | 2019-10-21 | 2024-10-08 | Adeia Semiconductor Technologies Llc | Non-volatile dynamic random access memory |
CN110767541A (zh) * | 2019-10-28 | 2020-02-07 | 苏师大半导体材料与设备研究院(邳州)有限公司 | 一种晶圆键合方法 |
US11862602B2 (en) | 2019-11-07 | 2024-01-02 | Adeia Semiconductor Technologies Llc | Scalable architecture for reduced cycles across SOC |
US11762200B2 (en) | 2019-12-17 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded optical devices |
US11876076B2 (en) | 2019-12-20 | 2024-01-16 | Adeia Semiconductor Technologies Llc | Apparatus for non-volatile random access memory stacks |
US11842894B2 (en) | 2019-12-23 | 2023-12-12 | Adeia Semiconductor Bonding Technologies Inc. | Electrical redundancy for bonded structures |
US11721653B2 (en) | 2019-12-23 | 2023-08-08 | Adeia Semiconductor Bonding Technologies Inc. | Circuitry for electrical redundancy in bonded structures |
KR20230003471A (ko) | 2020-03-19 | 2023-01-06 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 직접 결합된 구조체들을 위한 치수 보상 제어 |
US11742314B2 (en) | 2020-03-31 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
US11735523B2 (en) | 2020-05-19 | 2023-08-22 | Adeia Semiconductor Bonding Technologies Inc. | Laterally unconfined structure |
US11631647B2 (en) | 2020-06-30 | 2023-04-18 | Adeia Semiconductor Bonding Technologies Inc. | Integrated device packages with integrated device die and dummy element |
US11764177B2 (en) | 2020-09-04 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
US11728273B2 (en) | 2020-09-04 | 2023-08-15 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
US11264357B1 (en) | 2020-10-20 | 2022-03-01 | Invensas Corporation | Mixed exposure for large die |
US20220139869A1 (en) * | 2020-10-29 | 2022-05-05 | Invensas Bonding Technologies, Inc. | Direct bonding methods and structures |
US20220139867A1 (en) * | 2020-10-29 | 2022-05-05 | Invensas Bonding Technologies, Inc. | Direct bonding methods and structures |
FR3131433B1 (fr) | 2021-12-29 | 2023-12-22 | Commissariat Energie Atomique | Procédé d’activation d’une couche exposée |
FR3131434B1 (fr) | 2021-12-29 | 2023-12-15 | Commissariat Energie Atomique | Procédé d’activation d’une couche exposée |
US12001193B2 (en) | 2022-03-11 | 2024-06-04 | Applied Materials, Inc. | Apparatus for environmental control of dies and substrates for hybrid bonding |
FR3134650B1 (fr) * | 2022-04-19 | 2024-03-01 | Soitec Silicon On Insulator | Procede d’assemblage de deux substrats par adhesion moleculaire, et structure obtenue par un tel procede |
CN114975501A (zh) * | 2022-07-28 | 2022-08-30 | 晶芯成(北京)科技有限公司 | 晶圆键合方法以及背照式图像传感器的形成方法 |
CN115376966A (zh) * | 2022-08-09 | 2022-11-22 | 长春长光圆辰微电子技术有限公司 | 一种石英常温键合方法 |
Family Cites Families (451)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3587166A (en) | 1965-02-26 | 1971-06-28 | Texas Instruments Inc | Insulated isolation techniques in integrated circuits |
US3423823A (en) | 1965-10-18 | 1969-01-28 | Hewlett Packard Co | Method for making thin diaphragms |
US3488834A (en) | 1965-10-20 | 1970-01-13 | Texas Instruments Inc | Microelectronic circuit formed in an insulating substrate and method of making same |
DE1665794C3 (de) | 1966-10-28 | 1974-06-12 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Herstellen einer magnetfeldabhängigen Widerstandsanordnung |
US3579391A (en) | 1967-01-05 | 1971-05-18 | Trw Inc | Method of producing dielectric isolation for monolithic circuit |
NL158024B (nl) | 1967-05-13 | 1978-09-15 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting en halfgeleiderinrichting verkregen door toepassing van de werkwijze. |
US3508980A (en) | 1967-07-26 | 1970-04-28 | Motorola Inc | Method of fabricating an integrated circuit structure with dielectric isolation |
GB1206308A (en) | 1967-11-22 | 1970-09-23 | Sony Corp | Method of making semiconductor wafer |
GB1186340A (en) | 1968-07-11 | 1970-04-02 | Standard Telephones Cables Ltd | Manufacture of Semiconductor Devices |
NL6910274A (ja) | 1969-07-04 | 1971-01-06 | ||
US3888708A (en) | 1972-02-17 | 1975-06-10 | Kensall D Wise | Method for forming regions of predetermined thickness in silicon |
JPS54116888A (en) | 1978-03-03 | 1979-09-11 | Hitachi Ltd | Manufacture of dielectric separate substrate |
JPS54155770A (en) | 1978-05-29 | 1979-12-08 | Nec Corp | Manufacture of semiconductor device |
US4416054A (en) | 1980-07-01 | 1983-11-22 | Westinghouse Electric Corp. | Method of batch-fabricating flip-chip bonded dual integrated circuit arrays |
US4500905A (en) | 1981-09-30 | 1985-02-19 | Tokyo Shibaura Denki Kabushiki Kaisha | Stacked semiconductor device with sloping sides |
JPS60167439A (ja) | 1984-02-10 | 1985-08-30 | Nec Corp | 相補型誘電体分離基板の製造方法 |
JPS6130059A (ja) | 1984-07-20 | 1986-02-12 | Nec Corp | 半導体装置の製造方法 |
US4617160A (en) | 1984-11-23 | 1986-10-14 | Irvine Sensors Corporation | Method for fabricating modules comprising uniformly stacked, aligned circuit-carrying layers |
JPH0680794B2 (ja) | 1985-01-29 | 1994-10-12 | 日本電信電話株式会社 | 半導体集積回路装置の製造方法 |
US4754544A (en) | 1985-01-30 | 1988-07-05 | Energy Conversion Devices, Inc. | Extremely lightweight, flexible semiconductor device arrays |
JPH0770476B2 (ja) | 1985-02-08 | 1995-07-31 | 株式会社東芝 | 半導体装置の製造方法 |
US4649630A (en) | 1985-04-01 | 1987-03-17 | Motorola, Inc. | Process for dielectrically isolated semiconductor structure |
NL8501773A (nl) | 1985-06-20 | 1987-01-16 | Philips Nv | Werkwijze voor het vervaardigen van halfgeleiderinrichtingen. |
JPS6231138A (ja) | 1985-08-02 | 1987-02-10 | Nec Corp | 誘電体分離半導体集積回路装置 |
JPS62283655A (ja) | 1986-06-02 | 1987-12-09 | Nippon Telegr & Teleph Corp <Ntt> | 半導体多層基板の製造方法 |
US4829018A (en) | 1986-06-27 | 1989-05-09 | Wahlstrom Sven E | Multilevel integrated circuits employing fused oxide layers |
AU588700B2 (en) | 1986-06-30 | 1989-09-21 | Canon Kabushiki Kaisha | Semiconductor device and method for producing the same |
NL8700033A (nl) | 1987-01-09 | 1988-08-01 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting van het type halfgeleider op isolator. |
JP2579979B2 (ja) | 1987-02-26 | 1997-02-12 | 株式会社東芝 | 半導体素子の製造方法 |
JPS63237408A (ja) | 1987-03-26 | 1988-10-03 | Sumitomo Metal Mining Co Ltd | 半導体デバイス用基板 |
JPS63246841A (ja) | 1987-04-02 | 1988-10-13 | Toshiba Corp | シリコン結晶体の誘電体分離法 |
US5196375A (en) | 1987-07-24 | 1993-03-23 | Kabushiki Kaisha Toshiba | Method for manufacturing bonded semiconductor body |
US5121706A (en) | 1987-10-16 | 1992-06-16 | The Curators Of The University Of Missouri | Apparatus for applying a composite insulative coating to a substrate |
US4963505A (en) | 1987-10-27 | 1990-10-16 | Nippondenso Co., Ltd. | Semiconductor device and method of manufacturing same |
JPH01259546A (ja) | 1988-04-08 | 1989-10-17 | Fujitsu Ltd | 半導体装置の製造方法 |
US5354695A (en) | 1992-04-08 | 1994-10-11 | Leedy Glenn J | Membrane dielectric isolation IC fabrication |
US4992847A (en) | 1988-06-06 | 1991-02-12 | Regents Of The University Of California | Thin-film chip-to-substrate interconnect and methods for making same |
US5270259A (en) | 1988-06-21 | 1993-12-14 | Hitachi, Ltd. | Method for fabricating an insulating film from a silicone resin using O.sub. |
NL8801981A (nl) | 1988-08-09 | 1990-03-01 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
JPH0691147B2 (ja) | 1988-10-14 | 1994-11-14 | 信越半導体株式会社 | 接合ウエーハ検査方法 |
US4962879A (en) | 1988-12-19 | 1990-10-16 | Duke University | Method for bubble-free bonding of silicon wafers |
JPH02177435A (ja) | 1988-12-28 | 1990-07-10 | Sony Corp | 半導体基板の製法 |
US5070026A (en) | 1989-06-26 | 1991-12-03 | Spire Corporation | Process of making a ferroelectric electronic component and product |
JPH0344067A (ja) | 1989-07-11 | 1991-02-25 | Nec Corp | 半導体基板の積層方法 |
US5071792A (en) | 1990-11-05 | 1991-12-10 | Harris Corporation | Process for forming extremely thin integrated circuit dice |
JP2750163B2 (ja) | 1989-08-10 | 1998-05-13 | 沖電気工業株式会社 | 誘電体分離型半導体装置の製造方法 |
US5383993A (en) | 1989-09-01 | 1995-01-24 | Nippon Soken Inc. | Method of bonding semiconductor substrates |
JPH03101128A (ja) | 1989-09-13 | 1991-04-25 | Casio Comput Co Ltd | 半導体チップの製造方法 |
GB2237929A (en) | 1989-10-23 | 1991-05-15 | Philips Electronic Associated | A method of manufacturing a semiconductor device |
US4978421A (en) | 1989-11-13 | 1990-12-18 | International Business Machines Corporation | Monolithic silicon membrane device fabrication process |
US5362667A (en) * | 1992-07-28 | 1994-11-08 | Harris Corporation | Bonded wafer processing |
US5849627A (en) | 1990-02-07 | 1998-12-15 | Harris Corporation | Bonded wafer processing with oxidative bonding |
US5387555A (en) | 1992-09-03 | 1995-02-07 | Harris Corporation | Bonded wafer processing with metal silicidation |
US5081061A (en) | 1990-02-23 | 1992-01-14 | Harris Corporation | Manufacturing ultra-thin dielectrically isolated wafers |
US5034343A (en) | 1990-03-08 | 1991-07-23 | Harris Corporation | Manufacturing ultra-thin wafer using a handle wafer |
US5024723A (en) | 1990-05-07 | 1991-06-18 | Goesele Ulrich M | Method of producing a thin silicon on insulator layer by wafer bonding and chemical thinning |
JPH0719738B2 (ja) | 1990-09-06 | 1995-03-06 | 信越半導体株式会社 | 接合ウェーハ及びその製造方法 |
JPH07118505B2 (ja) | 1990-12-28 | 1995-12-18 | 信越半導体株式会社 | 誘電体分離基板の製造方法 |
US5668057A (en) | 1991-03-13 | 1997-09-16 | Matsushita Electric Industrial Co., Ltd. | Methods of manufacture for electronic components having high-frequency elements |
US5747857A (en) | 1991-03-13 | 1998-05-05 | Matsushita Electric Industrial Co., Ltd. | Electronic components having high-frequency elements and methods of manufacture therefor |
JP2812405B2 (ja) | 1991-03-15 | 1998-10-22 | 信越半導体株式会社 | 半導体基板の製造方法 |
US5162251A (en) | 1991-03-18 | 1992-11-10 | Hughes Danbury Optical Systems, Inc. | Method for making thinned charge-coupled devices |
DE4115046A1 (de) | 1991-05-08 | 1992-11-12 | Fraunhofer Ges Forschung | Direktes substratbonden |
US5266412A (en) * | 1991-07-15 | 1993-11-30 | Technology Applications Group, Inc. | Coated magnesium alloys |
US5264113A (en) | 1991-07-15 | 1993-11-23 | Technology Applications Group, Inc. | Two-step electrochemical process for coating magnesium alloys |
US5451547A (en) | 1991-08-26 | 1995-09-19 | Nippondenso Co., Ltd. | Method of manufacturing semiconductor substrate |
US5270261A (en) | 1991-09-13 | 1993-12-14 | International Business Machines Corporation | Three dimensional multichip package methods of fabrication |
AU650782B2 (en) | 1991-09-24 | 1994-06-30 | Canon Kabushiki Kaisha | Solar cell |
US5266511A (en) | 1991-10-02 | 1993-11-30 | Fujitsu Limited | Process for manufacturing three dimensional IC's |
US5561303A (en) | 1991-11-07 | 1996-10-01 | Harris Corporation | Silicon on diamond circuit structure |
JP3187109B2 (ja) | 1992-01-31 | 2001-07-11 | キヤノン株式会社 | 半導体部材およびその製造方法 |
US6909146B1 (en) | 1992-02-12 | 2005-06-21 | Intersil Corporation | Bonded wafer with metal silicidation |
US5234860A (en) | 1992-03-19 | 1993-08-10 | Eastman Kodak Company | Thinning of imaging device processed wafers |
US5321301A (en) | 1992-04-08 | 1994-06-14 | Nec Corporation | Semiconductor device |
JPH05299578A (ja) | 1992-04-17 | 1993-11-12 | Rohm Co Ltd | 半導体装置およびその製法 |
US5236118A (en) | 1992-05-12 | 1993-08-17 | The Regents Of The University Of California | Aligned wafer bonding |
US5427638A (en) | 1992-06-04 | 1995-06-27 | Alliedsignal Inc. | Low temperature reaction bonding |
US5407506A (en) * | 1992-06-04 | 1995-04-18 | Alliedsignal Inc. | Reaction bonding through activation by ion bombardment |
EP0818693A1 (en) | 1992-07-08 | 1998-01-14 | Matsushita Electric Industrial Co., Ltd. | Optical waveguide device and manufacturing method of the same |
JPH06291587A (ja) | 1992-07-08 | 1994-10-18 | Matsushita Electric Ind Co Ltd | 圧電振動子 |
US5489554A (en) | 1992-07-21 | 1996-02-06 | Hughes Aircraft Company | Method of making a 3-dimensional circuit assembly having electrical contacts that extend through the IC layer |
US5226412A (en) * | 1992-07-30 | 1993-07-13 | Winters Alva B | Emergency respirator |
JP3192000B2 (ja) | 1992-08-25 | 2001-07-23 | キヤノン株式会社 | 半導体基板及びその作製方法 |
JP3105089B2 (ja) | 1992-09-11 | 2000-10-30 | 株式会社東芝 | 半導体装置 |
JPH06112451A (ja) | 1992-09-29 | 1994-04-22 | Nagano Denshi Kogyo Kk | Soi基板の製造方法 |
US5324687A (en) | 1992-10-16 | 1994-06-28 | General Electric Company | Method for thinning of integrated circuit chips for lightweight packaged electronic systems |
KR0137125B1 (ko) | 1992-11-16 | 1998-06-15 | 모리시타 요이찌 | 광도파로소자와 그 제조방법 |
US5503704A (en) | 1993-01-06 | 1996-04-02 | The Regents Of The University Of California | Nitrogen based low temperature direct bonding |
WO2004077537A1 (ja) | 1993-01-18 | 2004-09-10 | Shinsuke Sakai | 半導体基板の製造方法 |
US5591678A (en) | 1993-01-19 | 1997-01-07 | He Holdings, Inc. | Process of manufacturing a microelectric device using a removable support substrate and etch-stop |
US5353498A (en) | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
JP2701709B2 (ja) | 1993-02-16 | 1998-01-21 | 株式会社デンソー | 2つの材料の直接接合方法及び材料直接接合装置 |
US5349207A (en) | 1993-02-22 | 1994-09-20 | Texas Instruments Incorporated | Silicon carbide wafer bonded to a silicon wafer |
US5272104A (en) | 1993-03-11 | 1993-12-21 | Harris Corporation | Bonded wafer process incorporating diamond insulator |
US5516727A (en) | 1993-04-19 | 1996-05-14 | International Business Machines Corporation | Method for encapsulating light emitting diodes |
JP3354937B2 (ja) | 1993-04-23 | 2002-12-09 | イルビン センサーズ コーポレーション | それぞれが積層体表面に固定されたicチップと相互作用するicチップの積層体を含んだ電子モジュール |
DE69426789T2 (de) | 1993-04-28 | 2001-08-02 | Matsushita Electric Industrial Co., Ltd. | Akustische Oberflächenwellenanordnung und Herstellungsverfahren dafür |
US5737192A (en) | 1993-04-30 | 1998-04-07 | The United States Of America As Represented By The Secretary Of The Air Force | Density improvement in integration modules |
US5647932A (en) | 1993-05-18 | 1997-07-15 | Matsushita Electric Industrial Co., Ltd. | Method of processing a piezoelectric device |
JP2771423B2 (ja) | 1993-05-20 | 1998-07-02 | 日本電気株式会社 | バイポーラトランジスタ |
US5441591A (en) | 1993-06-07 | 1995-08-15 | The United States Of America As Represented By The Secretary Of The Navy | Silicon to sapphire bond |
JPH06350371A (ja) | 1993-06-10 | 1994-12-22 | Matsushita Electric Ind Co Ltd | 圧電デバイスの製造方法 |
JP2856030B2 (ja) | 1993-06-29 | 1999-02-10 | 信越半導体株式会社 | 結合ウエーハの製造方法 |
US5344524A (en) | 1993-06-30 | 1994-09-06 | Honeywell Inc. | SOI substrate fabrication |
US5376579A (en) | 1993-07-02 | 1994-12-27 | The United States Of America As Represented By The Secretary Of The Air Force | Schemes to form silicon-on-diamond structure |
JP3806151B2 (ja) | 1993-07-13 | 2006-08-09 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 第1物体の第2物体への結合方法 |
JP3644980B2 (ja) | 1993-09-06 | 2005-05-11 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
US6004865A (en) | 1993-09-06 | 1999-12-21 | Hitachi, Ltd. | Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator |
JPH09503622A (ja) | 1993-09-30 | 1997-04-08 | コピン・コーポレーシヨン | 転写薄膜回路を使用した3次元プロセッサー |
DE69429848T2 (de) | 1993-11-01 | 2002-09-26 | Matsushita Electric Industrial Co., Ltd. | Elektronische Anordnung und Verfahren zur Herstellung |
JPH07161705A (ja) | 1993-12-03 | 1995-06-23 | Nec Corp | 半導体装置の多層配線層間絶縁膜の形成方法 |
DE69409215T2 (de) | 1993-12-06 | 1998-07-16 | Matsushita Electric Ind Co Ltd | Hybrid Magnetstruktur und deren Herstellungsverfahren |
US5460659A (en) | 1993-12-10 | 1995-10-24 | Spectrolab, Inc. | Concentrating photovoltaic module and fabrication method |
US5413955A (en) | 1993-12-21 | 1995-05-09 | Delco Electronics Corporation | Method of bonding silicon wafers at temperatures below 500 degrees centigrade for sensor applications |
DE4400985C1 (de) | 1994-01-14 | 1995-05-11 | Siemens Ag | Verfahren zur Herstellung einer dreidimensionalen Schaltungsanordnung |
TW289837B (ja) | 1994-01-18 | 1996-11-01 | Hwelett Packard Co | |
FR2715502B1 (fr) | 1994-01-26 | 1996-04-05 | Commissariat Energie Atomique | Structure présentant des cavités et procédé de réalisation d'une telle structure. |
US5413952A (en) | 1994-02-02 | 1995-05-09 | Motorola, Inc. | Direct wafer bonded structure method of making |
JP3352340B2 (ja) | 1995-10-06 | 2002-12-03 | キヤノン株式会社 | 半導体基体とその製造方法 |
JP3294934B2 (ja) | 1994-03-11 | 2002-06-24 | キヤノン株式会社 | 半導体基板の作製方法及び半導体基板 |
US5380681A (en) | 1994-03-21 | 1995-01-10 | United Microelectronics Corporation | Three-dimensional multichip package and methods of fabricating |
US5362659A (en) | 1994-04-25 | 1994-11-08 | The United States Of America As Represented By The Secretary Of The Navy | Method for fabricating vertical bipolar junction transistors in silicon bonded to an insulator |
US6278174B1 (en) | 1994-04-28 | 2001-08-21 | Texas Instruments Incorporated | Integrated circuit insulator and structure using low dielectric insulator material including HSQ and fluorinated oxide |
US5565384A (en) | 1994-04-28 | 1996-10-15 | Texas Instruments Inc | Self-aligned via using low permittivity dielectric |
US5753529A (en) | 1994-05-05 | 1998-05-19 | Siliconix Incorporated | Surface mount and flip chip technology for total integrated circuit isolation |
US5627106A (en) | 1994-05-06 | 1997-05-06 | United Microelectronics Corporation | Trench method for three dimensional chip connecting during IC fabrication |
US5517754A (en) | 1994-06-02 | 1996-05-21 | International Business Machines Corporation | Fabrication processes for monolithic electronic modules |
JPH0818115A (ja) * | 1994-07-04 | 1996-01-19 | Matsushita Electric Ind Co Ltd | 複合圧電デバイス |
WO1996001497A1 (de) | 1994-07-05 | 1996-01-18 | Siemens Aktiengesellschaft | Verfahren zur herstellung einer dreidimensionalen schaltungsanordnung |
JPH0822987A (ja) | 1994-07-05 | 1996-01-23 | Asahi Chem Ind Co Ltd | 半導体装置およびその製造方法 |
US5880010A (en) | 1994-07-12 | 1999-03-09 | Sun Microsystems, Inc. | Ultrathin electronics |
KR960009074A (ko) | 1994-08-29 | 1996-03-22 | 모리시다 요이치 | 반도체 장치 및 그 제조방법 |
US5753975A (en) * | 1994-09-01 | 1998-05-19 | Kabushiki Kaisha Toshiba | Semiconductor device with improved adhesion between titanium-based metal wiring layer and insulation film |
DE4433845A1 (de) | 1994-09-22 | 1996-03-28 | Fraunhofer Ges Forschung | Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung |
DE4433846C2 (de) | 1994-09-22 | 1999-06-02 | Fraunhofer Ges Forschung | Verfahren zur Herstellung einer vertikalen integrierten Schaltungsstruktur |
DE4433833A1 (de) | 1994-09-22 | 1996-03-28 | Fraunhofer Ges Forschung | Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung unter Erreichung hoher Systemausbeuten |
IT1268123B1 (it) | 1994-10-13 | 1997-02-20 | Sgs Thomson Microelectronics | Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione. |
WO1996013060A1 (de) | 1994-10-24 | 1996-05-02 | Daimler-Benz Aktiengesellschaft | Verfahren zum direkten verbinden von planaren körpern und nach dem verfahren aus planaren körpern hergestellte gegenstände |
JPH08195334A (ja) | 1994-11-17 | 1996-07-30 | Canon Inc | シリコン基板の接合方法 |
US5841197A (en) | 1994-11-18 | 1998-11-24 | Adamic, Jr.; Fred W. | Inverted dielectric isolation process |
US5466634A (en) | 1994-12-20 | 1995-11-14 | International Business Machines Corporation | Electronic modules with interconnected surface metallization layers and fabrication methods therefore |
US5534465A (en) | 1995-01-10 | 1996-07-09 | At&T Corp. | Method for making multichip circuits using active semiconductor substrates |
US5547896A (en) | 1995-02-13 | 1996-08-20 | Harris Corporation | Direct etch for thin film resistor using a hard mask |
JPH08236695A (ja) | 1995-02-24 | 1996-09-13 | Kyocera Corp | 三次元集積回路装置およびその製造方法 |
JPH08298260A (ja) | 1995-02-28 | 1996-11-12 | Hitachi Ltd | 誘電体及びその製造方法並びに半導体装置 |
US5673478A (en) | 1995-04-28 | 1997-10-07 | Texas Instruments Incorporated | Method of forming an electronic device having I/O reroute |
JP2679681B2 (ja) | 1995-04-28 | 1997-11-19 | 日本電気株式会社 | 半導体装置、半導体装置用パッケージ及びその製造方法 |
DE19516487C1 (de) | 1995-05-05 | 1996-07-25 | Fraunhofer Ges Forschung | Verfahren zur vertikalen Integration mikroelektronischer Systeme |
JP3328102B2 (ja) | 1995-05-08 | 2002-09-24 | 松下電器産業株式会社 | 弾性表面波装置及びその製造方法 |
DE69609559T2 (de) | 1995-05-08 | 2001-04-19 | Matsushita Electric Industrial Co., Ltd. | Verfahren zur Herstellung eines Verbundsubstrats und eine dieses Substrat benutzende piezoelektrischer Anordnung |
US5915193A (en) | 1995-05-18 | 1999-06-22 | Tong; Qin-Yi | Method for the cleaning and direct bonding of solids |
JPH097908A (ja) | 1995-06-15 | 1997-01-10 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
US5661901A (en) | 1995-07-10 | 1997-09-02 | Micron Technology, Inc. | Method for mounting and electrically interconnecting semiconductor dice |
US5759753A (en) | 1995-07-19 | 1998-06-02 | Matsushita Electric Industrial Co., Ltd. | Piezoelectric device and method of manufacturing the same |
US5691248A (en) | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
TW374211B (en) | 1995-08-03 | 1999-11-11 | Ibm | Machine structures fabricated of multiple microstructure layers |
US5652436A (en) | 1995-08-14 | 1997-07-29 | Kobe Steel Usa Inc. | Smooth diamond based mesa structures |
US5653019A (en) | 1995-08-31 | 1997-08-05 | Regents Of The University Of California | Repairable chip bonding/interconnect process |
JPH0982588A (ja) | 1995-09-12 | 1997-03-28 | Denso Corp | 窒化物の直接接合方法及びその直接接合物 |
DE19543540C1 (de) | 1995-11-22 | 1996-11-21 | Siemens Ag | Vertikal integriertes Halbleiterbauelement mit zwei miteinander verbundenen Substraten und Herstellungsverfahren dafür |
JPH09148321A (ja) * | 1995-11-24 | 1997-06-06 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US5567657A (en) | 1995-12-04 | 1996-10-22 | General Electric Company | Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers |
JP3250721B2 (ja) | 1995-12-12 | 2002-01-28 | キヤノン株式会社 | Soi基板の製造方法 |
JP3250722B2 (ja) | 1995-12-12 | 2002-01-28 | キヤノン株式会社 | Soi基板の製造方法および製造装置 |
DE69718693T2 (de) | 1996-03-08 | 2003-11-27 | Matsushita Electric Industrial Co., Ltd. | Elektronisches Bauteil und Herstellungsverfahren |
JPH09252100A (ja) | 1996-03-18 | 1997-09-22 | Shin Etsu Handotai Co Ltd | 結合ウェーハの製造方法及びこの方法により製造される結合ウェーハ |
US5858876A (en) | 1996-04-01 | 1999-01-12 | Chartered Semiconductor Manufacturing, Ltd. | Simultaneous deposit and etch method for forming a void-free and gap-filling insulator layer upon a patterned substrate layer |
JPH09331049A (ja) | 1996-04-08 | 1997-12-22 | Canon Inc | 貼り合わせsoi基板の作製方法及びsoi基板 |
US5841193A (en) | 1996-05-20 | 1998-11-24 | Epic Technologies, Inc. | Single chip modules, repairable multichip modules, and methods of fabrication thereof |
JPH09330925A (ja) | 1996-06-13 | 1997-12-22 | Sony Corp | 低誘電率酸化シリコン系絶縁膜の形成方法およびこれを用いた半導体装置 |
US5834375A (en) * | 1996-08-09 | 1998-11-10 | Industrial Technology Research Institute | Chemical-mechanical polishing planarization monitor |
US5760478A (en) | 1996-08-20 | 1998-06-02 | International Business Machines Corporation | Clock skew minimization system and method for integrated circuits |
US6080487A (en) | 1996-08-26 | 2000-06-27 | 3M Innovative Properties Company | Method of improving adhesion between a fluoropolymer and a substrate |
US5783477A (en) | 1996-09-20 | 1998-07-21 | Hewlett-Packard Company | Method for bonding compounds semiconductor wafers to create an ohmic interface |
DE19639682A1 (de) | 1996-09-26 | 1998-04-02 | Fraunhofer Ges Forschung | Verfahren zum dauerhaften Verbinden von anorganischen Substraten |
US5807783A (en) | 1996-10-07 | 1998-09-15 | Harris Corporation | Surface mount die by handle replacement |
JP3383811B2 (ja) * | 1996-10-28 | 2003-03-10 | 松下電器産業株式会社 | 半導体チップモジュール及びその製造方法 |
DE19648759A1 (de) | 1996-11-25 | 1998-05-28 | Max Planck Gesellschaft | Verfahren zur Herstellung von Mikrostrukturen sowie Mikrostruktur |
JPH10223495A (ja) | 1997-02-04 | 1998-08-21 | Nippon Telegr & Teleph Corp <Ntt> | 柔軟な構造を有する半導体装置とその製造方法 |
JPH10223636A (ja) | 1997-02-12 | 1998-08-21 | Nec Yamagata Ltd | 半導体集積回路装置の製造方法 |
JP3765902B2 (ja) | 1997-02-19 | 2006-04-12 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法および電子デバイスの作製方法 |
US5990562A (en) | 1997-02-25 | 1999-11-23 | International Business Machines Corporation | Semiconductor devices having backside probing capability |
US5929512A (en) | 1997-03-18 | 1999-07-27 | Jacobs; Richard L. | Urethane encapsulated integrated circuits and compositions therefor |
CA2233115C (en) | 1997-03-27 | 2002-03-12 | Canon Kabushiki Kaisha | Semiconductor substrate and method of manufacturing the same |
JPH10275752A (ja) | 1997-03-28 | 1998-10-13 | Ube Ind Ltd | 張合わせウエハ−及びその製造方法、基板 |
US5915167A (en) | 1997-04-04 | 1999-06-22 | Elm Technology Corporation | Three dimensional structure memory |
US6551857B2 (en) | 1997-04-04 | 2003-04-22 | Elm Technology Corporation | Three dimensional structure integrated circuits |
US5889302A (en) | 1997-04-21 | 1999-03-30 | Advanced Micro Devices, Inc. | Multilayer floating gate field effect transistor structure for use in integrated circuit devices |
JPH10294995A (ja) | 1997-04-21 | 1998-11-04 | Matsushita Electric Ind Co Ltd | 防滴型超音波送信器 |
US5936280A (en) | 1997-04-21 | 1999-08-10 | Advanced Micro Devices, Inc. | Multilayer quadruple gate field effect transistor structure for use in integrated circuit devices |
US6270202B1 (en) | 1997-04-24 | 2001-08-07 | Matsushita Electric Industrial Co., Ltd. | Liquid jetting apparatus having a piezoelectric drive element directly bonded to a casing |
JP3920399B2 (ja) | 1997-04-25 | 2007-05-30 | 株式会社東芝 | マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置 |
US5877070A (en) | 1997-05-31 | 1999-03-02 | Max-Planck Society | Method for the transfer of thin layers of monocrystalline material to a desirable substrate |
US6054369A (en) | 1997-06-30 | 2000-04-25 | Intersil Corporation | Lifetime control for semiconductor devices |
US6097096A (en) | 1997-07-11 | 2000-08-01 | Advanced Micro Devices | Metal attachment method and structure for attaching substrates at low temperatures |
US6255731B1 (en) | 1997-07-30 | 2001-07-03 | Canon Kabushiki Kaisha | SOI bonding structure |
WO1999010927A1 (en) | 1997-08-29 | 1999-03-04 | Farrens Sharon N | In situ plasma wafer bonding method |
JPH1187203A (ja) * | 1997-09-11 | 1999-03-30 | Sony Corp | 基板の貼り合わせ方法 |
US5990472A (en) | 1997-09-29 | 1999-11-23 | Mcnc | Microelectronic radiation detectors for detecting and emitting radiation signals |
JP4439602B2 (ja) | 1997-09-29 | 2010-03-24 | 株式会社東芝 | 半導体装置の製造方法 |
US5966622A (en) | 1997-10-08 | 1999-10-12 | Lucent Technologies Inc. | Process for bonding crystalline substrates with different crystal lattices |
JP4085459B2 (ja) | 1998-03-02 | 2008-05-14 | セイコーエプソン株式会社 | 3次元デバイスの製造方法 |
US6274892B1 (en) | 1998-03-09 | 2001-08-14 | Intersil Americas Inc. | Devices formable by low temperature direct bonding |
US6153495A (en) | 1998-03-09 | 2000-11-28 | Intersil Corporation | Advanced methods for making semiconductor devices by low temperature direct bonding |
US5877516A (en) | 1998-03-20 | 1999-03-02 | The United States Of America As Represented By The Secretary Of The Army | Bonding of silicon carbide directly to a semiconductor substrate by using silicon to silicon bonding |
DE19813239C1 (de) | 1998-03-26 | 1999-12-23 | Fraunhofer Ges Forschung | Verdrahtungsverfahren zur Herstellung einer vertikalen integrierten Schaltungsstruktur und vertikale integrierte Schaltungsstruktur |
US6028365A (en) | 1998-03-30 | 2000-02-22 | Micron Technology, Inc. | Integrated circuit package and method of fabrication |
US5980770A (en) | 1998-04-16 | 1999-11-09 | Siemens Aktiengesellschaft | Removal of post-RIE polymer on Al/Cu metal line |
DE19818962A1 (de) | 1998-04-28 | 1999-11-04 | Degussa | Verfahren zum Verbinden zweier Festkörper und das so hergestellte Bauelement |
JP3697106B2 (ja) | 1998-05-15 | 2005-09-21 | キヤノン株式会社 | 半導体基板の作製方法及び半導体薄膜の作製方法 |
US6136691A (en) | 1998-05-26 | 2000-10-24 | Taiwan Semiconductor Manufacturing Corporation | In situ plasma clean for tungsten etching back |
FR2781925B1 (fr) | 1998-07-30 | 2001-11-23 | Commissariat Energie Atomique | Transfert selectif d'elements d'un support vers un autre support |
US6004883A (en) * | 1998-10-23 | 1999-12-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual damascene patterned conductor layer formation method without etch stop layer |
US6316332B1 (en) | 1998-11-30 | 2001-11-13 | Lo Yu-Hwa | Method for joining wafers at a low temperature and low stress |
US6236141B1 (en) | 1998-12-14 | 2001-05-22 | Matsushita Electric Industrial Co., Ltd. | Surface acoustic wave element |
US6194323B1 (en) | 1998-12-16 | 2001-02-27 | Lucent Technologies Inc. | Deep sub-micron metal etch with in-situ hard mask etch |
TW389965B (en) | 1998-12-31 | 2000-05-11 | San Fu Chemical Co Ltd | Method for improving reliability of a gate oxide layer by NF3 annealing |
JP2000223703A (ja) | 1999-01-29 | 2000-08-11 | Toshiba Corp | 半導体装置及びその製造方法 |
US6328796B1 (en) | 1999-02-01 | 2001-12-11 | The United States Of America As Represented By The Secretary Of The Navy | Single-crystal material on non-single-crystalline substrate |
JP3532788B2 (ja) | 1999-04-13 | 2004-05-31 | 唯知 須賀 | 半導体装置及びその製造方法 |
JP2000299263A (ja) * | 1999-04-14 | 2000-10-24 | Seiko Epson Corp | シリコン系部材の固体接合方法 |
US6323108B1 (en) | 1999-07-27 | 2001-11-27 | The United States Of America As Represented By The Secretary Of The Navy | Fabrication ultra-thin bonded semiconductor layers |
US6242324B1 (en) | 1999-08-10 | 2001-06-05 | The United States Of America As Represented By The Secretary Of The Navy | Method for fabricating singe crystal materials over CMOS devices |
US6265319B1 (en) * | 1999-09-01 | 2001-07-24 | Taiwan Semiconductor Manufacturing Company | Dual damascene method employing spin-on polymer (SOP) etch stop layer |
US6255899B1 (en) | 1999-09-01 | 2001-07-03 | International Business Machines Corporation | Method and apparatus for increasing interchip communications rates |
KR100462980B1 (ko) | 1999-09-13 | 2004-12-23 | 비쉐이 메저먼츠 그룹, 인코포레이티드 | 반도체장치용 칩 스케일 표면 장착 패키지 및 그 제조공정 |
US6500694B1 (en) | 2000-03-22 | 2002-12-31 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
US6984571B1 (en) | 1999-10-01 | 2006-01-10 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
JP2001144273A (ja) * | 1999-11-17 | 2001-05-25 | Denso Corp | 半導体装置の製造方法 |
US6197663B1 (en) | 1999-12-07 | 2001-03-06 | Lucent Technologies Inc. | Process for fabricating integrated circuit devices having thin film transistors |
KR100390938B1 (ko) | 2000-02-09 | 2003-07-10 | 주식회사 하이닉스반도체 | 반도체 소자의 캐패시터 제조 방법 |
US6902987B1 (en) | 2000-02-16 | 2005-06-07 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
GR1003602B (el) | 2000-02-29 | 2001-06-19 | Αλεξανδρος Γεωργακιλας | Διαδικασια ολοκληρωσης, σε κλιμακα ακεραιων δισκιων ημιαγωγων, οπτοηλεκτρονικων ημιαγωγικων διαταξεων, βασισμενων σε αρσενικουχογαλλιο και ολοκληρωμενων κυκλωματων πυριτιου |
US6348706B1 (en) * | 2000-03-20 | 2002-02-19 | Micron Technology, Inc. | Method to form etch and/or CMP stop layers |
US6440878B1 (en) | 2000-04-03 | 2002-08-27 | Sharp Laboratories Of America, Inc. | Method to enhance the adhesion of silicon nitride to low-k fluorinated amorphous carbon using a silicon carbide adhesion promoter layer |
US6423640B1 (en) | 2000-08-09 | 2002-07-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Headless CMP process for oxide planarization |
US6563133B1 (en) | 2000-08-09 | 2003-05-13 | Ziptronix, Inc. | Method of epitaxial-like wafer bonding at low temperature and bonded structure |
US6475072B1 (en) * | 2000-09-29 | 2002-11-05 | International Business Machines Corporation | Method of wafer smoothing for bonding using chemo-mechanical polishing (CMP) |
JP2002208684A (ja) * | 2001-01-10 | 2002-07-26 | Seiko Epson Corp | Soi基板の製造方法とsoi基板 |
US6497763B2 (en) | 2001-01-19 | 2002-12-24 | The United States Of America As Represented By The Secretary Of The Navy | Electronic device with composite substrate |
US20020096760A1 (en) | 2001-01-24 | 2002-07-25 | Gregory Simelgor | Side access layer for semiconductor chip or stack thereof |
TW477029B (en) * | 2001-02-21 | 2002-02-21 | Nat Science Council | Method of reducing thick film stress of spin on dielectric and the resulting sandwich dielectric structure |
US20020181827A1 (en) | 2001-06-01 | 2002-12-05 | Motorola, Inc. | Optically-communicating integrated circuits |
US7119400B2 (en) | 2001-07-05 | 2006-10-10 | Isonics Corporation | Isotopically pure silicon-on-insulator wafers and method of making same |
US20030020104A1 (en) | 2001-07-25 | 2003-01-30 | Motorola, Inc. | Increased efficiency semiconductor devices including intermetallic layer |
US6887769B2 (en) | 2002-02-06 | 2005-05-03 | Intel Corporation | Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same |
US6762076B2 (en) | 2002-02-20 | 2004-07-13 | Intel Corporation | Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
KR200281328Y1 (ko) | 2002-04-01 | 2002-07-13 | 채종술 | 납골당의 납골단 |
US7105980B2 (en) | 2002-07-03 | 2006-09-12 | Sawtek, Inc. | Saw filter device and method employing normal temperature bonding for producing desirable filter production and performance characteristics |
US7535100B2 (en) | 2002-07-12 | 2009-05-19 | The United States Of America As Represented By The Secretary Of The Navy | Wafer bonding of thinned electronic materials and circuits to high performance substrates |
JP4083502B2 (ja) | 2002-08-19 | 2008-04-30 | 株式会社フジミインコーポレーテッド | 研磨方法及びそれに用いられる研磨用組成物 |
US7023093B2 (en) | 2002-10-24 | 2006-04-04 | International Business Machines Corporation | Very low effective dielectric constant interconnect Structures and methods for fabricating the same |
US20040126993A1 (en) | 2002-12-30 | 2004-07-01 | Chan Kevin K. | Low temperature fusion bonding with high surface energy using a wet chemical treatment |
US6962835B2 (en) | 2003-02-07 | 2005-11-08 | Ziptronix, Inc. | Method for room temperature metal direct bonding |
US6989314B2 (en) | 2003-02-12 | 2006-01-24 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Semiconductor structure and method of making same |
US6908027B2 (en) | 2003-03-31 | 2005-06-21 | Intel Corporation | Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process |
US7156946B2 (en) * | 2003-04-28 | 2007-01-02 | Strasbaugh | Wafer carrier pivot mechanism |
US7109092B2 (en) * | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
TWI275168B (en) | 2003-06-06 | 2007-03-01 | Sanyo Electric Co | Semiconductor device and method for making the same |
US6867073B1 (en) | 2003-10-21 | 2005-03-15 | Ziptronix, Inc. | Single mask via method and device |
KR100574957B1 (ko) | 2003-11-21 | 2006-04-28 | 삼성전자주식회사 | 수직으로 적층된 다기판 집적 회로 장치 및 그 제조방법 |
US20060057945A1 (en) | 2004-09-16 | 2006-03-16 | Chia-Lin Hsu | Chemical mechanical polishing process |
US20060076634A1 (en) | 2004-09-27 | 2006-04-13 | Lauren Palmateer | Method and system for packaging MEMS devices with incorporated getter |
GB0505680D0 (en) | 2005-03-22 | 2005-04-27 | Cambridge Display Tech Ltd | Apparatus and method for increased device lifetime in an organic electro-luminescent device |
US7485968B2 (en) | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
US7193423B1 (en) | 2005-12-12 | 2007-03-20 | International Business Machines Corporation | Wafer-to-wafer alignments |
TWI299552B (en) | 2006-03-24 | 2008-08-01 | Advanced Semiconductor Eng | Package structure |
US7972683B2 (en) | 2006-03-28 | 2011-07-05 | Innovative Micro Technology | Wafer bonding material with embedded conductive particles |
US7750488B2 (en) | 2006-07-10 | 2010-07-06 | Tezzaron Semiconductor, Inc. | Method for bonding wafers to produce stacked integrated circuits |
US7803693B2 (en) | 2007-02-15 | 2010-09-28 | John Trezza | Bowed wafer hybridization compensation |
US8349635B1 (en) | 2008-05-20 | 2013-01-08 | Silicon Laboratories Inc. | Encapsulated MEMS device and method to form the same |
US9893004B2 (en) | 2011-07-27 | 2018-02-13 | Broadpak Corporation | Semiconductor interposer integration |
US8476165B2 (en) | 2009-04-01 | 2013-07-02 | Tokyo Electron Limited | Method for thinning a bonding wafer |
US8482132B2 (en) | 2009-10-08 | 2013-07-09 | International Business Machines Corporation | Pad bonding employing a self-aligned plated liner for adhesion enhancement |
JP5517800B2 (ja) | 2010-07-09 | 2014-06-11 | キヤノン株式会社 | 固体撮像装置用の部材および固体撮像装置の製造方法 |
FR2966283B1 (fr) | 2010-10-14 | 2012-11-30 | Soi Tec Silicon On Insulator Tech Sa | Procede pour realiser une structure de collage |
US8377798B2 (en) | 2010-11-10 | 2013-02-19 | Taiwan Semiconductor Manufacturing Co., Ltd | Method and structure for wafer to wafer bonding in semiconductor packaging |
US8620164B2 (en) | 2011-01-20 | 2013-12-31 | Intel Corporation | Hybrid III-V silicon laser formed by direct bonding |
US8988299B2 (en) | 2011-02-17 | 2015-03-24 | International Business Machines Corporation | Integrated antenna for RFIC package applications |
US8716105B2 (en) | 2011-03-31 | 2014-05-06 | Soitec | Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures and intermediate structures formed using such methods |
US8501537B2 (en) | 2011-03-31 | 2013-08-06 | Soitec | Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures formed using such methods |
KR102574526B1 (ko) | 2011-05-24 | 2023-09-07 | 소니그룹주식회사 | 반도체 장치 |
JP5982748B2 (ja) | 2011-08-01 | 2016-08-31 | ソニー株式会社 | 半導体装置、半導体装置の製造方法、および電子機器 |
US8697493B2 (en) | 2011-07-18 | 2014-04-15 | Soitec | Bonding surfaces for direct bonding of semiconductor structures |
US8441131B2 (en) | 2011-09-12 | 2013-05-14 | Globalfoundries Inc. | Strain-compensating fill patterns for controlling semiconductor chip package interactions |
FR2983188B1 (fr) * | 2011-11-30 | 2016-07-01 | Commissariat Energie Atomique | Procede de realisation d'une structure comportant au moins une partie active multiepaisseur |
CN103377911B (zh) | 2012-04-16 | 2016-09-21 | 中国科学院微电子研究所 | 提高化学机械平坦化工艺均匀性的方法 |
US9142517B2 (en) | 2012-06-05 | 2015-09-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid bonding mechanisms for semiconductor wafers |
US8809123B2 (en) | 2012-06-05 | 2014-08-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers |
US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
DE102012224310A1 (de) | 2012-12-21 | 2014-06-26 | Tesa Se | Gettermaterial enthaltendes Klebeband |
US20140175655A1 (en) | 2012-12-22 | 2014-06-26 | Industrial Technology Research Institute | Chip bonding structure and manufacturing method thereof |
TWI518991B (zh) | 2013-02-08 | 2016-01-21 | Sj Antenna Design | Integrated antenna and integrated circuit components of the shielding module |
US8946784B2 (en) | 2013-02-18 | 2015-02-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for image sensor packaging |
US9443796B2 (en) | 2013-03-15 | 2016-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Air trench in packages incorporating hybrid bonding |
US8802538B1 (en) | 2013-03-15 | 2014-08-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for hybrid wafer bonding |
US9064937B2 (en) | 2013-05-30 | 2015-06-23 | International Business Machines Corporation | Substrate bonding with diffusion barrier structures |
US9929050B2 (en) | 2013-07-16 | 2018-03-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for forming three-dimensional integrated circuit (3DIC) stacking structure |
US9723716B2 (en) | 2013-09-27 | 2017-08-01 | Infineon Technologies Ag | Contact pad structure, an electronic component, and a method for manufacturing a contact pad structure |
US9257399B2 (en) | 2013-10-17 | 2016-02-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D integrated circuit and methods of forming the same |
JP2015115446A (ja) | 2013-12-11 | 2015-06-22 | 株式会社東芝 | 半導体装置の製造方法 |
US9437572B2 (en) | 2013-12-18 | 2016-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Conductive pad structure for hybrid bonding and methods of forming same |
US20150262902A1 (en) | 2014-03-12 | 2015-09-17 | Invensas Corporation | Integrated circuits protected by substrates with cavities, and methods of manufacture |
US9299736B2 (en) | 2014-03-28 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid bonding with uniform pattern density |
US9230941B2 (en) | 2014-03-28 | 2016-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding structure for stacked semiconductor devices |
US9472458B2 (en) | 2014-06-04 | 2016-10-18 | Semiconductor Components Industries, Llc | Method of reducing residual contamination in singulated semiconductor die |
KR102275705B1 (ko) | 2014-07-11 | 2021-07-09 | 삼성전자주식회사 | 웨이퍼 대 웨이퍼 접합 구조 |
US9536848B2 (en) | 2014-10-16 | 2017-01-03 | Globalfoundries Inc. | Bond pad structure for low temperature flip chip bonding |
US9394161B2 (en) | 2014-11-14 | 2016-07-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | MEMS and CMOS integration with low-temperature bonding |
US9899442B2 (en) | 2014-12-11 | 2018-02-20 | Invensas Corporation | Image sensor device |
US11069734B2 (en) | 2014-12-11 | 2021-07-20 | Invensas Corporation | Image sensor device |
US9741620B2 (en) | 2015-06-24 | 2017-08-22 | Invensas Corporation | Structures and methods for reliable packages |
US9656852B2 (en) | 2015-07-06 | 2017-05-23 | Taiwan Semiconductor Manufacturing Company Ltd. | CMOS-MEMS device structure, bonding mesa structure and associated method |
US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
US10075657B2 (en) | 2015-07-21 | 2018-09-11 | Fermi Research Alliance, Llc | Edgeless large area camera system |
US9728521B2 (en) | 2015-07-23 | 2017-08-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Hybrid bond using a copper alloy for yield improvement |
US9559081B1 (en) | 2015-08-21 | 2017-01-31 | Apple Inc. | Independent 3D stacking |
US9953941B2 (en) | 2015-08-25 | 2018-04-24 | Invensas Bonding Technologies, Inc. | Conductive barrier direct hybrid bonding |
US9496239B1 (en) | 2015-12-11 | 2016-11-15 | International Business Machines Corporation | Nitride-enriched oxide-to-oxide 3D wafer bonding |
US9852988B2 (en) | 2015-12-18 | 2017-12-26 | Invensas Bonding Technologies, Inc. | Increased contact alignment tolerance for direct bonding |
US9881882B2 (en) | 2016-01-06 | 2018-01-30 | Mediatek Inc. | Semiconductor package with three-dimensional antenna |
US9923011B2 (en) | 2016-01-12 | 2018-03-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device structure with stacked semiconductor dies |
US10446532B2 (en) | 2016-01-13 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Systems and methods for efficient transfer of semiconductor elements |
US10636767B2 (en) | 2016-02-29 | 2020-04-28 | Invensas Corporation | Correction die for wafer/die stack |
US10026716B2 (en) | 2016-04-15 | 2018-07-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3DIC formation with dies bonded to formed RDLs |
US10204893B2 (en) | 2016-05-19 | 2019-02-12 | Invensas Bonding Technologies, Inc. | Stacked dies and methods for forming bonded structures |
KR102505856B1 (ko) | 2016-06-09 | 2023-03-03 | 삼성전자 주식회사 | 웨이퍼 대 웨이퍼 접합 구조체 |
US9941241B2 (en) | 2016-06-30 | 2018-04-10 | International Business Machines Corporation | Method for wafer-wafer bonding |
US9892961B1 (en) | 2016-08-09 | 2018-02-13 | International Business Machines Corporation | Air gap spacer formation for nano-scale semiconductor devices |
US10446487B2 (en) | 2016-09-30 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
US10672663B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D chip sharing power circuit |
US10719762B2 (en) | 2017-08-03 | 2020-07-21 | Xcelsis Corporation | Three dimensional chip structure implementing machine trained network |
US10163750B2 (en) | 2016-12-05 | 2018-12-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure for heat dissipation |
US10453832B2 (en) | 2016-12-15 | 2019-10-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Seal ring structures and methods of forming same |
US10002844B1 (en) | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
KR102320673B1 (ko) | 2016-12-28 | 2021-11-01 | 인벤사스 본딩 테크놀로지스 인코포레이티드 | 적층된 기판의 처리 |
US20180182665A1 (en) | 2016-12-28 | 2018-06-28 | Invensas Bonding Technologies, Inc. | Processed Substrate |
US11626363B2 (en) | 2016-12-29 | 2023-04-11 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
US20180190583A1 (en) | 2016-12-29 | 2018-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures with integrated passive component |
US10276909B2 (en) | 2016-12-30 | 2019-04-30 | Invensas Bonding Technologies, Inc. | Structure comprising at least a first element bonded to a carrier having a closed metallic channel waveguide formed therein |
US10431614B2 (en) | 2017-02-01 | 2019-10-01 | Semiconductor Components Industries, Llc | Edge seals for semiconductor packages |
JP7030825B2 (ja) | 2017-02-09 | 2022-03-07 | インヴェンサス ボンディング テクノロジーズ インコーポレイテッド | 接合構造物 |
US10629577B2 (en) | 2017-03-16 | 2020-04-21 | Invensas Corporation | Direct-bonded LED arrays and applications |
US10515913B2 (en) | 2017-03-17 | 2019-12-24 | Invensas Bonding Technologies, Inc. | Multi-metal contact structure |
US10508030B2 (en) | 2017-03-21 | 2019-12-17 | Invensas Bonding Technologies, Inc. | Seal for microelectronic assembly |
JP6640780B2 (ja) | 2017-03-22 | 2020-02-05 | キオクシア株式会社 | 半導体装置の製造方法および半導体装置 |
WO2018183739A1 (en) | 2017-03-31 | 2018-10-04 | Invensas Bonding Technologies, Inc. | Interface structures and methods for forming same |
US10269756B2 (en) | 2017-04-21 | 2019-04-23 | Invensas Bonding Technologies, Inc. | Die processing |
US10580823B2 (en) | 2017-05-03 | 2020-03-03 | United Microelectronics Corp. | Wafer level packaging method |
US10879212B2 (en) | 2017-05-11 | 2020-12-29 | Invensas Bonding Technologies, Inc. | Processed stacked dies |
US10446441B2 (en) | 2017-06-05 | 2019-10-15 | Invensas Corporation | Flat metal features for microelectronics applications |
US10217720B2 (en) | 2017-06-15 | 2019-02-26 | Invensas Corporation | Multi-chip modules formed using wafer-level processing of a reconstitute wafer |
US10840205B2 (en) | 2017-09-24 | 2020-11-17 | Invensas Bonding Technologies, Inc. | Chemical mechanical polishing for hybrid bonding |
US11195748B2 (en) | 2017-09-27 | 2021-12-07 | Invensas Corporation | Interconnect structures and methods for forming same |
US11031285B2 (en) | 2017-10-06 | 2021-06-08 | Invensas Bonding Technologies, Inc. | Diffusion barrier collar for interconnects |
US11251157B2 (en) | 2017-11-01 | 2022-02-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Die stack structure with hybrid bonding structure and method of fabricating the same and package |
US11011503B2 (en) | 2017-12-15 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Direct-bonded optoelectronic interconnect for high-density integrated photonics |
US11380597B2 (en) | 2017-12-22 | 2022-07-05 | Invensas Bonding Technologies, Inc. | Bonded structures |
US10923408B2 (en) | 2017-12-22 | 2021-02-16 | Invensas Bonding Technologies, Inc. | Cavity packages |
US11127738B2 (en) | 2018-02-09 | 2021-09-21 | Xcelsis Corporation | Back biasing of FD-SOI circuit blocks |
US10727219B2 (en) | 2018-02-15 | 2020-07-28 | Invensas Bonding Technologies, Inc. | Techniques for processing devices |
US11169326B2 (en) | 2018-02-26 | 2021-11-09 | Invensas Bonding Technologies, Inc. | Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects |
US11256004B2 (en) | 2018-03-20 | 2022-02-22 | Invensas Bonding Technologies, Inc. | Direct-bonded lamination for improved image clarity in optical devices |
US10991804B2 (en) | 2018-03-29 | 2021-04-27 | Xcelsis Corporation | Transistor level interconnection methodologies utilizing 3D interconnects |
US11056348B2 (en) | 2018-04-05 | 2021-07-06 | Invensas Bonding Technologies, Inc. | Bonding surfaces for microelectronics |
US10790262B2 (en) | 2018-04-11 | 2020-09-29 | Invensas Bonding Technologies, Inc. | Low temperature bonded structures |
US10964664B2 (en) | 2018-04-20 | 2021-03-30 | Invensas Bonding Technologies, Inc. | DBI to Si bonding for simplified handle wafer |
US11398258B2 (en) | 2018-04-30 | 2022-07-26 | Invensas Llc | Multi-die module with low power operation |
US10403577B1 (en) | 2018-05-03 | 2019-09-03 | Invensas Corporation | Dielets on flexible and stretchable packaging for microelectronics |
US11004757B2 (en) | 2018-05-14 | 2021-05-11 | Invensas Bonding Technologies, Inc. | Bonded structures |
US11276676B2 (en) | 2018-05-15 | 2022-03-15 | Invensas Bonding Technologies, Inc. | Stacked devices and methods of fabrication |
US10923413B2 (en) | 2018-05-30 | 2021-02-16 | Xcelsis Corporation | Hard IP blocks with physically bidirectional passageways |
CN118448377A (zh) | 2018-06-12 | 2024-08-06 | 隔热半导体粘合技术公司 | 堆叠微电子组件的层间连接 |
US11393779B2 (en) | 2018-06-13 | 2022-07-19 | Invensas Bonding Technologies, Inc. | Large metal pads over TSV |
EP3807927A4 (en) | 2018-06-13 | 2022-02-23 | Invensas Bonding Technologies, Inc. | TSV AS A HIDEPAD |
US10910344B2 (en) | 2018-06-22 | 2021-02-02 | Xcelsis Corporation | Systems and methods for releveled bump planes for chiplets |
US11664357B2 (en) | 2018-07-03 | 2023-05-30 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for joining dissimilar materials in microelectronics |
WO2020010136A1 (en) | 2018-07-06 | 2020-01-09 | Invensas Bonding Technologies, Inc. | Molded direct bonded and interconnected stack |
US11462419B2 (en) | 2018-07-06 | 2022-10-04 | Invensas Bonding Technologies, Inc. | Microelectronic assemblies |
US20200035641A1 (en) | 2018-07-26 | 2020-01-30 | Invensas Bonding Technologies, Inc. | Post cmp processing for hybrid bonding |
US11515291B2 (en) | 2018-08-28 | 2022-11-29 | Adeia Semiconductor Inc. | Integrated voltage regulator and passive components |
US20200075533A1 (en) | 2018-08-29 | 2020-03-05 | Invensas Bonding Technologies, Inc. | Bond enhancement in microelectronics by trapping contaminants and arresting cracks during direct-bonding processes |
US11011494B2 (en) | 2018-08-31 | 2021-05-18 | Invensas Bonding Technologies, Inc. | Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics |
US11158573B2 (en) | 2018-10-22 | 2021-10-26 | Invensas Bonding Technologies, Inc. | Interconnect structures |
US11244920B2 (en) | 2018-12-18 | 2022-02-08 | Invensas Bonding Technologies, Inc. | Method and structures for low temperature device bonding |
WO2020150159A1 (en) | 2019-01-14 | 2020-07-23 | Invensas Bonding Technologies, Inc. | Bonded structures |
US11387202B2 (en) | 2019-03-01 | 2022-07-12 | Invensas Llc | Nanowire bonding interconnect for fine-pitch microelectronics |
US11901281B2 (en) | 2019-03-11 | 2024-02-13 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
US10854578B2 (en) | 2019-03-29 | 2020-12-01 | Invensas Corporation | Diffused bitline replacement in stacked wafer memory |
US11373963B2 (en) | 2019-04-12 | 2022-06-28 | Invensas Bonding Technologies, Inc. | Protective elements for bonded structures |
US11610846B2 (en) | 2019-04-12 | 2023-03-21 | Adeia Semiconductor Bonding Technologies Inc. | Protective elements for bonded structures including an obstructive element |
US11205625B2 (en) | 2019-04-12 | 2021-12-21 | Invensas Bonding Technologies, Inc. | Wafer-level bonding of obstructive elements |
US11355404B2 (en) | 2019-04-22 | 2022-06-07 | Invensas Bonding Technologies, Inc. | Mitigating surface damage of probe pads in preparation for direct bonding of a substrate |
US11385278B2 (en) | 2019-05-23 | 2022-07-12 | Invensas Bonding Technologies, Inc. | Security circuitry for bonded structures |
US20200395321A1 (en) | 2019-06-12 | 2020-12-17 | Invensas Bonding Technologies, Inc. | Sealed bonded structures and methods for forming the same |
US11296053B2 (en) | 2019-06-26 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Direct bonded stack structures for increased reliability and improved yield in microelectronics |
US12080672B2 (en) | 2019-09-26 | 2024-09-03 | Adeia Semiconductor Bonding Technologies Inc. | Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive |
US12113054B2 (en) | 2019-10-21 | 2024-10-08 | Adeia Semiconductor Technologies Llc | Non-volatile dynamic random access memory |
US11862602B2 (en) | 2019-11-07 | 2024-01-02 | Adeia Semiconductor Technologies Llc | Scalable architecture for reduced cycles across SOC |
US11762200B2 (en) | 2019-12-17 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded optical devices |
US11876076B2 (en) | 2019-12-20 | 2024-01-16 | Adeia Semiconductor Technologies Llc | Apparatus for non-volatile random access memory stacks |
US11721653B2 (en) | 2019-12-23 | 2023-08-08 | Adeia Semiconductor Bonding Technologies Inc. | Circuitry for electrical redundancy in bonded structures |
US11842894B2 (en) | 2019-12-23 | 2023-12-12 | Adeia Semiconductor Bonding Technologies Inc. | Electrical redundancy for bonded structures |
US20210242152A1 (en) | 2020-02-05 | 2021-08-05 | Invensas Bonding Technologies, Inc. | Selective alteration of interconnect pads for direct bonding |
KR20230003471A (ko) | 2020-03-19 | 2023-01-06 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 직접 결합된 구조체들을 위한 치수 보상 제어 |
US11742314B2 (en) | 2020-03-31 | 2023-08-29 | Adeia Semiconductor Bonding Technologies Inc. | Reliable hybrid bonded apparatus |
US11735523B2 (en) | 2020-05-19 | 2023-08-22 | Adeia Semiconductor Bonding Technologies Inc. | Laterally unconfined structure |
US11631647B2 (en) | 2020-06-30 | 2023-04-18 | Adeia Semiconductor Bonding Technologies Inc. | Integrated device packages with integrated device die and dummy element |
US11728273B2 (en) | 2020-09-04 | 2023-08-15 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
US11764177B2 (en) | 2020-09-04 | 2023-09-19 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structure with interconnect structure |
US11264357B1 (en) | 2020-10-20 | 2022-03-01 | Invensas Corporation | Mixed exposure for large die |
US20220139867A1 (en) | 2020-10-29 | 2022-05-05 | Invensas Bonding Technologies, Inc. | Direct bonding methods and structures |
US20220139869A1 (en) | 2020-10-29 | 2022-05-05 | Invensas Bonding Technologies, Inc. | Direct bonding methods and structures |
EP4268273A4 (en) | 2020-12-28 | 2024-10-23 | Adeia Semiconductor Bonding Tech Inc | STRUCTURES WITH THROUGH-THROUGH-SUBSTRATE VIA HOLES AND METHODS OF FORMING THE SAME |
CN116762163A (zh) | 2020-12-28 | 2023-09-15 | 美商艾德亚半导体接合科技有限公司 | 具有贯穿衬底过孔的结构及其形成方法 |
WO2022147459A1 (en) | 2020-12-30 | 2022-07-07 | Invensas Bonding Technologies, Inc. | Structure with conductive feature and method of forming same |
US20220208723A1 (en) | 2020-12-30 | 2022-06-30 | Invensas Bonding Technologies, Inc. | Directly bonded structures |
WO2022187402A1 (en) | 2021-03-03 | 2022-09-09 | Invensas Bonding Technologies, Inc. | Contact structures for direct bonding |
JP2024512696A (ja) | 2021-03-31 | 2024-03-19 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 直接接合方法及び構造体 |
CN117296132A (zh) | 2021-03-31 | 2023-12-26 | 美商艾德亚半导体接合科技有限公司 | 载体的直接接合和去接合 |
WO2022212594A1 (en) | 2021-03-31 | 2022-10-06 | Invensas Bonding Technologies, Inc. | Direct bonding and debonding of carrier |
JP2024524391A (ja) | 2021-06-30 | 2024-07-05 | アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド | 接合層内にルーティング構造体を有する素子 |
KR20240036032A (ko) | 2021-07-16 | 2024-03-19 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 접합된 구조물의 광학적 차단 보호 요소 |
EP4381540A1 (en) | 2021-08-02 | 2024-06-12 | Adeia Semiconductor Bonding Technologies Inc. | Protective semiconductor elements for bonded structures |
EP4396872A1 (en) | 2021-09-01 | 2024-07-10 | Adeia Semiconductor Technologies LLC | Stacked structure with interposer |
US20230067677A1 (en) | 2021-09-01 | 2023-03-02 | Invensas Bonding Technologies, Inc. | Sequences and equipment for direct bonding |
US20230115122A1 (en) | 2021-09-14 | 2023-04-13 | Adeia Semiconductor Bonding Technologies Inc. | Method of bonding thin substrates |
CN118215999A (zh) | 2021-09-24 | 2024-06-18 | 美商艾德亚半导体接合科技有限公司 | 具有有源转接件的接合结构 |
US20230122531A1 (en) | 2021-10-18 | 2023-04-20 | Invensas Llc | Reduced parasitic capacitance in bonded structures |
KR20240090512A (ko) | 2021-10-19 | 2024-06-21 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 멀티-다이 스태킹에서의 적층된 인덕터 |
WO2023070033A1 (en) | 2021-10-22 | 2023-04-27 | Adeia Semiconductor Technologies Llc | Radio frequency device packages |
WO2023076842A1 (en) | 2021-10-25 | 2023-05-04 | Adeia Semiconductor Bonding Technologies Inc. | Power distribution for stacked electronic devices |
US20230125395A1 (en) | 2021-10-27 | 2023-04-27 | Adeia Semiconductor Bonding Technologies Inc. | Stacked structures with capacitive coupling connections |
US20230140107A1 (en) | 2021-10-28 | 2023-05-04 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding methods and structures |
US20230132632A1 (en) | 2021-10-28 | 2023-05-04 | Adeia Semiconductor Bonding Technologies Inc. | Diffusion barriers and method of forming same |
US20230142680A1 (en) | 2021-10-28 | 2023-05-11 | Adeia Semiconductor Bonding Technologies Inc. | Stacked electronic devices |
WO2023081273A1 (en) | 2021-11-05 | 2023-05-11 | Adeia Semiconductor Bonding Technologies Inc. | Multi-channel device stacking |
CN118476024A (zh) | 2021-11-17 | 2024-08-09 | 美商艾德亚半导体接合科技有限公司 | 用于堆叠管芯的热旁路 |
CN118613910A (zh) | 2021-11-18 | 2024-09-06 | 美商艾德亚半导体接合科技有限公司 | 用于裸片堆叠的流体冷却 |
US20230187264A1 (en) | 2021-12-13 | 2023-06-15 | Adeia Semiconductor Technologies Llc | Methods for bonding semiconductor elements |
US20230187317A1 (en) | 2021-12-13 | 2023-06-15 | Adeia Semiconductor Bonding Technologies Inc. | Interconnect structures |
KR20240118874A (ko) | 2021-12-17 | 2024-08-05 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 직접 접합을 위한 전도성 특징부를 갖는 구조체 및 그 형성 방법 |
KR20240128904A (ko) | 2021-12-20 | 2024-08-27 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 다이 패키지를 위한 열전 냉각 |
WO2023122510A1 (en) | 2021-12-20 | 2023-06-29 | Adeia Semiconductor Bonding Technologies Inc. | Thermoelectric cooling in microelectronics |
US20230197496A1 (en) | 2021-12-20 | 2023-06-22 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding and debonding of elements |
KR20240126868A (ko) | 2021-12-22 | 2024-08-21 | 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 | 낮은 스트레스 직접 하이브리드 접합 |
US20230207514A1 (en) | 2021-12-23 | 2023-06-29 | Adeia Semiconductor Bonding Technologies Inc. | Apparatuses and methods for die bond control |
EP4454013A1 (en) | 2021-12-23 | 2024-10-30 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with interconnect assemblies |
EP4454008A1 (en) | 2021-12-23 | 2024-10-30 | Adeia Semiconductor Bonding Technologies Inc. | Direct bonding on package substrates |
WO2023129901A1 (en) | 2021-12-27 | 2023-07-06 | Adeia Semiconductor Bonding Technologies Inc. | Directly bonded frame wafers |
-
2003
- 2003-05-19 US US10/440,099 patent/US7109092B2/en not_active Expired - Lifetime
-
2004
- 2004-05-19 WO PCT/US2004/013306 patent/WO2004105084A2/en active Application Filing
- 2004-05-19 JP JP2006532508A patent/JP5570680B2/ja not_active Expired - Lifetime
- 2004-05-19 CN CNB2004800181251A patent/CN100468639C/zh not_active Expired - Lifetime
- 2004-05-19 EP EP04750940A patent/EP1631981A4/en not_active Withdrawn
- 2004-05-19 CA CA 2526481 patent/CA2526481A1/en not_active Abandoned
- 2004-05-19 CN CN2008101340522A patent/CN101359605B/zh not_active Expired - Lifetime
- 2004-05-19 KR KR1020057022105A patent/KR101154227B1/ko active IP Right Grant
- 2004-05-19 SG SG2008091480A patent/SG185826A1/en unknown
-
2005
- 2005-11-16 IL IL171996A patent/IL171996A0/en not_active IP Right Cessation
-
2006
- 2006-05-30 US US11/442,394 patent/US7335996B2/en not_active Expired - Lifetime
-
2007
- 2007-12-17 US US11/958,071 patent/US7862885B2/en not_active Expired - Lifetime
-
2010
- 2010-04-21 IL IL205212A patent/IL205212A0/en unknown
- 2010-11-26 US US12/954,735 patent/US8163373B2/en not_active Expired - Fee Related
-
2012
- 2012-03-28 US US13/432,682 patent/US8841002B2/en not_active Expired - Lifetime
-
2013
- 2013-05-22 JP JP2013108206A patent/JP5571227B2/ja not_active Expired - Lifetime
-
2014
- 2014-09-02 US US14/474,501 patent/US10434749B2/en not_active Expired - Lifetime
-
2019
- 2019-07-24 US US16/521,493 patent/US11760059B2/en active Active
- 2019-07-24 US US16/521,457 patent/US20190344533A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP1631981A2 (en) | 2006-03-08 |
IL171996A0 (en) | 2009-02-11 |
US20080187757A1 (en) | 2008-08-07 |
EP1631981A4 (en) | 2010-01-20 |
US20040235266A1 (en) | 2004-11-25 |
IL205212A0 (en) | 2011-07-31 |
US20060216904A1 (en) | 2006-09-28 |
KR20060028391A (ko) | 2006-03-29 |
CN101359605A (zh) | 2009-02-04 |
US10434749B2 (en) | 2019-10-08 |
WO2004105084A3 (en) | 2006-01-05 |
US8841002B2 (en) | 2014-09-23 |
JP5570680B2 (ja) | 2014-08-13 |
US20120183808A1 (en) | 2012-07-19 |
US20190344534A1 (en) | 2019-11-14 |
US8163373B2 (en) | 2012-04-24 |
US7862885B2 (en) | 2011-01-04 |
US11760059B2 (en) | 2023-09-19 |
US20190344533A1 (en) | 2019-11-14 |
JP2013219370A (ja) | 2013-10-24 |
CN1860590A (zh) | 2006-11-08 |
JP2007515779A (ja) | 2007-06-14 |
CN100468639C (zh) | 2009-03-11 |
US7109092B2 (en) | 2006-09-19 |
US7335996B2 (en) | 2008-02-26 |
KR101154227B1 (ko) | 2012-06-07 |
US20110143150A1 (en) | 2011-06-16 |
SG185826A1 (en) | 2012-12-28 |
WO2004105084A2 (en) | 2004-12-02 |
US20150064498A1 (en) | 2015-03-05 |
CN101359605B (zh) | 2010-10-13 |
CA2526481A1 (en) | 2004-12-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5571227B2 (ja) | 室温共有結合方法 | |
JP6887811B2 (ja) | 室温金属直接ボンディング | |
US10312217B2 (en) | Method for low temperature bonding and bonded structure |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130726 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140212 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140213 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140509 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140527 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140625 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5571227 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
EXPY | Cancellation because of completion of term |