KR100607186B1 - 수소이온 주입 박리법에 의한 soi 웨이퍼 제조방법 및그 방법으로 제조된 soi 웨이퍼 - Google Patents
수소이온 주입 박리법에 의한 soi 웨이퍼 제조방법 및그 방법으로 제조된 soi 웨이퍼 Download PDFInfo
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- KR100607186B1 KR100607186B1 KR1020007006562A KR20007006562A KR100607186B1 KR 100607186 B1 KR100607186 B1 KR 100607186B1 KR 1020007006562 A KR1020007006562 A KR 1020007006562A KR 20007006562 A KR20007006562 A KR 20007006562A KR 100607186 B1 KR100607186 B1 KR 100607186B1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
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- Condensed Matter Physics & Semiconductors (AREA)
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- Microelectronics & Electronic Packaging (AREA)
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Abstract
Description
Claims (13)
- 수소이온 박리법에 의한 SOI웨이퍼를 제조하는 방법에 있어서,결합열처리후, 산화성분위기하의 열처리에 의해 SOI층에 산화막을 형성한 후에 그 산화막을 제거하고, 이어 환원성분위기하에 열처리를 수행함을 특징으로 하는 SOI웨이퍼 제조방법.
- 수소이온 박리법에 의한 SOI웨이퍼를 제조하는 방법에 있어서,박리열처리후, 산화성분위기하의 열처리에 의해 SOI층에 산화막을 형성한 후에 그 산화막을 제거하고, 이어 환원성분위기하에 열처리를 수행함을 특징으로 하는 SOI웨이퍼 제조방법.
- 제1항에 있어서, 상기 환원성분위기하의 열처리는,급속가열/급속냉각장치를 이용하여 1000~1300℃의 온도범위에서, 1~60초간 실시함을 특징으로 하는 SOI웨이퍼 제조방법.
- 제2항에 있어서, 상기 환원성분위기하의 열처리는,급속가열/급속냉각장치를 이용하여 1000~1300℃의 온도범위에서, 1~60초간 실시함을 특징으로 하는 SOI웨이퍼 제조방법.
- 제1항에 있어서, 상기 환원성분위기하의 열처리는,100% 수소분위기 또는 수소와 아르곤의 혼합분위기에서 실시함을 특징으로 하는 SOI웨이퍼 제조방법.
- 제2항에 있어서, 상기 환원성분위기하의 열처리는,100% 수소분위기 또는 수소와 아르곤의 혼합분위기에서 실시함을 특징으로 하는 SOI웨이퍼 제조방법.
- 제1항에 있어서,상기 산화성분위기하의 열처리에 의해 SOI층에 형성되는 산화막의 두께는, 산화막형성전에 SOI층 표면에 잔류하는 손상층 두께의 2배이상임을 특징으로 하는 SOI웨이퍼 제조방법.
- 제2항에 있어서,상기 산화성분위기하의 열처리에 의해 SOI층에 형성되는 산화막의 두께는, 산화막형성전에 SOI층 표면에 잔류하는 손상층 두께의 2배이상임을 특징으로 하는 SOI웨이퍼 제조방법.
- 제1항에 있어서, 상기 산화성분위기하의 열처리온도는,상기 환원성분위기하의 열처리온도보다 저온임을 특징으로 하는 SOI웨이퍼 제조방법.
- 제2항에 있어서, 상기 산화성분위기하의 열처리온도는,상기 환원성분위기하의 열처리온도보다 저온임을 특징으로 하는 SOI웨이퍼 제조방법.
- 제1항에 있어서, 상기 산화성분위기하의 열처리는,1000℃이하에서 실시함을 특징으로 하는 SOI웨이퍼 제조방법.
- 제2항에 있어서, 상기 산화성분위기하의 열처리는,1000℃이하에서 실시함을 특징으로 하는 SOI웨이퍼 제조방법.
- 삭제
Applications Claiming Priority (3)
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JP10-314018 | 1998-10-16 | ||
JP10314018A JP2000124092A (ja) | 1998-10-16 | 1998-10-16 | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
PCT/JP1999/005588 WO2000024059A1 (fr) | 1998-10-16 | 1999-10-08 | Procede de production de tranche soi utilisant un procede de separation d'implantation d'ions hydrogene et tranche soi produite a l'aide du procede |
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Publication Number | Publication Date |
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KR20010033179A KR20010033179A (ko) | 2001-04-25 |
KR100607186B1 true KR100607186B1 (ko) | 2006-08-01 |
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KR1020007006562A KR100607186B1 (ko) | 1998-10-16 | 1999-10-08 | 수소이온 주입 박리법에 의한 soi 웨이퍼 제조방법 및그 방법으로 제조된 soi 웨이퍼 |
Country Status (6)
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US (1) | US6372609B1 (ko) |
EP (1) | EP1045448B1 (ko) |
JP (1) | JP2000124092A (ko) |
KR (1) | KR100607186B1 (ko) |
TW (1) | TW521314B (ko) |
WO (1) | WO2000024059A1 (ko) |
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SG67458A1 (en) * | 1996-12-18 | 1999-09-21 | Canon Kk | Process for producing semiconductor article |
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- 1999-10-08 KR KR1020007006562A patent/KR100607186B1/ko active IP Right Grant
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JPH10275905A (ja) * | 1997-03-31 | 1998-10-13 | Mitsubishi Electric Corp | シリコンウェーハの製造方法およびシリコンウェーハ |
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TW521314B (en) | 2003-02-21 |
JP2000124092A (ja) | 2000-04-28 |
KR20010033179A (ko) | 2001-04-25 |
EP1045448A1 (en) | 2000-10-18 |
WO2000024059A1 (fr) | 2000-04-27 |
EP1045448B1 (en) | 2016-04-27 |
US6372609B1 (en) | 2002-04-16 |
EP1045448A4 (en) | 2005-03-09 |
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