FR3032555B1 - Procede de report d'une couche utile - Google Patents
Procede de report d'une couche utile Download PDFInfo
- Publication number
- FR3032555B1 FR3032555B1 FR1551046A FR1551046A FR3032555B1 FR 3032555 B1 FR3032555 B1 FR 3032555B1 FR 1551046 A FR1551046 A FR 1551046A FR 1551046 A FR1551046 A FR 1551046A FR 3032555 B1 FR3032555 B1 FR 3032555B1
- Authority
- FR
- France
- Prior art keywords
- deferring
- useful layer
- useful
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Element Separation (AREA)
- Micromachines (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1551046A FR3032555B1 (fr) | 2015-02-10 | 2015-02-10 | Procede de report d'une couche utile |
JP2016014598A JP6606705B2 (ja) | 2015-02-10 | 2016-01-28 | 有用層を移動する方法 |
CN201610076558.7A CN105870048B (zh) | 2015-02-10 | 2016-02-03 | 用于转移有用层的方法 |
US15/018,465 US9922867B2 (en) | 2015-02-10 | 2016-02-08 | Method for transferring a useful layer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1551046 | 2015-02-10 | ||
FR1551046A FR3032555B1 (fr) | 2015-02-10 | 2015-02-10 | Procede de report d'une couche utile |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3032555A1 FR3032555A1 (fr) | 2016-08-12 |
FR3032555B1 true FR3032555B1 (fr) | 2018-01-19 |
Family
ID=52737357
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1551046A Active FR3032555B1 (fr) | 2015-02-10 | 2015-02-10 | Procede de report d'une couche utile |
Country Status (4)
Country | Link |
---|---|
US (1) | US9922867B2 (fr) |
JP (1) | JP6606705B2 (fr) |
CN (1) | CN105870048B (fr) |
FR (1) | FR3032555B1 (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3061988B1 (fr) * | 2017-01-13 | 2019-11-01 | Soitec | Procede de lissage de surface d'un substrat semiconducteur sur isolant |
FR3063176A1 (fr) * | 2017-02-17 | 2018-08-24 | Soitec | Masquage d'une zone au bord d'un substrat donneur lors d'une etape d'implantation ionique |
FR3074958B1 (fr) * | 2017-12-08 | 2020-05-29 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de collage par adhesion directe |
FR3079346B1 (fr) * | 2018-03-26 | 2020-05-29 | Soitec | Procede de fabrication d'un substrat donneur pour le transfert d'une couche piezoelectrique, et procede de transfert d'une telle couche piezoelectrique |
FR3091620B1 (fr) * | 2019-01-07 | 2021-01-29 | Commissariat Energie Atomique | Procédé de transfert de couche avec réduction localisée d’une capacité à initier une fracture |
FR3113772B1 (fr) * | 2020-08-25 | 2024-05-03 | Commissariat Energie Atomique | Procédé de transfert d’une couche mince sur un substrat receveur comportant des cavités et une région dépourvue de cavités en bordure d’une face de collage |
FR3126809A1 (fr) * | 2021-09-06 | 2023-03-10 | Soitec | Procede de transfert d’une couche utile sur une face avant d’un substrat support |
FR3135820B1 (fr) * | 2022-05-18 | 2024-04-26 | Commissariat Energie Atomique | Procédé de transfert d'une couche depuis un substrat source vers un substrat destination |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001525991A (ja) * | 1997-05-12 | 2001-12-11 | シリコン・ジェネシス・コーポレーション | 制御された劈開プロセス |
JP2000124092A (ja) * | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
JP2000349264A (ja) * | 1998-12-04 | 2000-12-15 | Canon Inc | 半導体ウエハの製造方法、使用方法および利用方法 |
JP4313874B2 (ja) * | 1999-02-02 | 2009-08-12 | キヤノン株式会社 | 基板の製造方法 |
US7176108B2 (en) * | 2002-11-07 | 2007-02-13 | Soitec Silicon On Insulator | Method of detaching a thin film at moderate temperature after co-implantation |
JP3886959B2 (ja) * | 2002-12-10 | 2007-02-28 | エス オー アイ テック シリコン オン インシュレータ テクノロジーズ エス.アー. | 材料複合体の製造方法 |
EP1429381B1 (fr) * | 2002-12-10 | 2011-07-06 | S.O.I.Tec Silicon on Insulator Technologies | Procédé de fabrication d'un matériau composé |
JPWO2005006420A1 (ja) * | 2003-07-15 | 2006-09-28 | 財団法人神奈川科学技術アカデミー | 窒化物半導体素子並びにその作製方法 |
FR2861497B1 (fr) | 2003-10-28 | 2006-02-10 | Soitec Silicon On Insulator | Procede de transfert catastrophique d'une couche fine apres co-implantation |
US20060027459A1 (en) * | 2004-05-28 | 2006-02-09 | Lake Shore Cryotronics, Inc. | Mesoporous silicon infrared filters and methods of making same |
US9362439B2 (en) * | 2008-05-07 | 2016-06-07 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled shear region |
JP5271279B2 (ja) * | 2007-02-08 | 2013-08-21 | ソイテック | 高熱消散基板を製造する方法 |
JP5096556B2 (ja) * | 2007-04-17 | 2012-12-12 | アイメック | 基板の薄層化方法 |
JP5245380B2 (ja) * | 2007-06-21 | 2013-07-24 | 信越半導体株式会社 | Soiウェーハの製造方法 |
FR2920912B1 (fr) * | 2007-09-12 | 2010-08-27 | S O I Tec Silicon On Insulator Tech | Procede de fabrication d'une structure par transfert de couche |
FR2926674B1 (fr) * | 2008-01-21 | 2010-03-26 | Soitec Silicon On Insulator | Procede de fabrication d'une structure composite avec couche d'oxyde de collage stable |
FR2987166B1 (fr) * | 2012-02-16 | 2017-05-12 | Soitec Silicon On Insulator | Procede de transfert d'une couche |
-
2015
- 2015-02-10 FR FR1551046A patent/FR3032555B1/fr active Active
-
2016
- 2016-01-28 JP JP2016014598A patent/JP6606705B2/ja active Active
- 2016-02-03 CN CN201610076558.7A patent/CN105870048B/zh active Active
- 2016-02-08 US US15/018,465 patent/US9922867B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US9922867B2 (en) | 2018-03-20 |
JP6606705B2 (ja) | 2019-11-20 |
US20160233125A1 (en) | 2016-08-11 |
CN105870048B (zh) | 2020-09-04 |
FR3032555A1 (fr) | 2016-08-12 |
JP2016149538A (ja) | 2016-08-18 |
CN105870048A (zh) | 2016-08-17 |
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PLFP | Fee payment |
Year of fee payment: 2 |
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