JP5248838B2 - 半導体基板の製造方法 - Google Patents
半導体基板の製造方法 Download PDFInfo
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- JP5248838B2 JP5248838B2 JP2007277502A JP2007277502A JP5248838B2 JP 5248838 B2 JP5248838 B2 JP 5248838B2 JP 2007277502 A JP2007277502 A JP 2007277502A JP 2007277502 A JP2007277502 A JP 2007277502A JP 5248838 B2 JP5248838 B2 JP 5248838B2
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- substrate
- silicon
- film
- soi
- gas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Description
11 イオン注入層
12 シリコン膜
13 SOI膜
20 石英基板
Claims (5)
- シリコン基板の主面に水素イオン注入層を形成するイオン注入工程と、高抵抗シリコン基板、酸化膜付きシリコン基板、石英基板、サファイア基板の何れかである絶縁性基板と前記シリコン基板の少なくとも一方の主面にプラズマ処理を施す表面処理工程と、前記絶縁性基板と前記シリコン基板の主面同士を貼り合わせる工程と、前記貼り合せ基板の前記シリコン基板からシリコン薄膜を機械的剥離して前記絶縁性基板の主面上にシリコン膜を有するSOI基板とする剥離工程と、前記SOI基板を600℃〜1000℃の温度で熱処理して前記シリコン膜の表面領域に金属不純物をゲッタリングする工程と、前記熱処理後のSOI基板のシリコン膜の表面層を除去する工程を備えている半導体基板の製造方法。
- 前記熱処理工程の雰囲気が、窒素ガス、アルゴンガス、又はヘリウムガスの少なくとも1種を主成分とする不活性ガスである請求項1に記載の半導体基板の製造方法。
- 前記熱処理工程の雰囲気が、窒素ガス、アルゴンガス、又はヘリウムガスの少なくとも1種を主成分とする不活性ガスと酸化性ガスの混合ガスである請求項1に記載の半導体基板の製造方法。
- 前記熱処理工程の後に、前記シリコン膜上の酸化膜を除去する工程を備えている請求項3に記載の半導体基板の製造方法。
- 前記剥離工程の前に、前記貼り合せ基板を100〜300℃の温度で熱処理する工程を備えている請求項1乃至4の何れか1項に記載の半導体基板の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007277502A JP5248838B2 (ja) | 2007-10-25 | 2007-10-25 | 半導体基板の製造方法 |
KR1020080073997A KR101380514B1 (ko) | 2007-10-25 | 2008-07-29 | 반도체 기판의 제조 방법 |
US12/230,984 US7972937B2 (en) | 2007-10-25 | 2008-09-09 | Method for producing semiconductor substrate |
EP08016060A EP2053650B1 (en) | 2007-10-25 | 2008-09-11 | Method for producing semiconductor substrate |
TW097140888A TWI450366B (zh) | 2007-10-25 | 2008-10-24 | Semiconductor substrate manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007277502A JP5248838B2 (ja) | 2007-10-25 | 2007-10-25 | 半導体基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009105314A JP2009105314A (ja) | 2009-05-14 |
JP5248838B2 true JP5248838B2 (ja) | 2013-07-31 |
Family
ID=40291066
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007277502A Active JP5248838B2 (ja) | 2007-10-25 | 2007-10-25 | 半導体基板の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7972937B2 (ja) |
EP (1) | EP2053650B1 (ja) |
JP (1) | JP5248838B2 (ja) |
KR (1) | KR101380514B1 (ja) |
TW (1) | TWI450366B (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5499455B2 (ja) * | 2007-10-22 | 2014-05-21 | 株式会社デンソー | SOI(Silicononinsulator)構造の半導体装置およびその製造方法 |
JP5030992B2 (ja) | 2009-04-30 | 2012-09-19 | 信越化学工業株式会社 | サンドブラスト処理された裏面を有するsoi基板の製造方法 |
TWI423466B (zh) * | 2009-12-30 | 2014-01-11 | Nat Univ Chung Hsing | Defective method |
WO2012033125A1 (ja) * | 2010-09-07 | 2012-03-15 | 住友電気工業株式会社 | 基板、基板の製造方法およびsawデバイス |
EP2849207B1 (en) * | 2012-05-08 | 2020-02-26 | Shin-Etsu Chemical Co., Ltd. | Heat dissipation substrate and method for producing same |
US9390942B2 (en) * | 2012-11-30 | 2016-07-12 | Peregrine Semiconductor Corporation | Method, system, and apparatus for preparing substrates and bonding semiconductor layers to substrates |
TWI591211B (zh) * | 2013-03-13 | 2017-07-11 | 應用材料股份有限公司 | 蝕刻包含過渡金屬的膜之方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57149301A (en) | 1981-03-11 | 1982-09-14 | Daiichi Togyo Kk | Novel polysaccharide having coagulating property |
KR970030317A (ko) * | 1995-11-23 | 1997-06-26 | 김주용 | 반도체소자 제조 방법 |
US6155909A (en) * | 1997-05-12 | 2000-12-05 | Silicon Genesis Corporation | Controlled cleavage system using pressurized fluid |
US6548382B1 (en) | 1997-07-18 | 2003-04-15 | Silicon Genesis Corporation | Gettering technique for wafers made using a controlled cleaving process |
JP3327180B2 (ja) * | 1997-08-29 | 2002-09-24 | 信越半導体株式会社 | Soi層上酸化膜の形成方法ならびに結合ウエーハの製造方法およびこの方法で製造される結合ウエーハ |
JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
JP2001144275A (ja) * | 1999-08-27 | 2001-05-25 | Shin Etsu Handotai Co Ltd | 貼り合わせsoiウエーハの製造方法および貼り合わせsoiウエーハ |
US6368938B1 (en) | 1999-10-05 | 2002-04-09 | Silicon Wafer Technologies, Inc. | Process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate |
KR100745309B1 (ko) * | 2002-04-10 | 2007-08-01 | 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 | 이상적인 산소 침전 실리콘 웨이퍼에서 디누드 구역깊이를 조절하기 위한 방법 |
JP2004063730A (ja) * | 2002-07-29 | 2004-02-26 | Shin Etsu Handotai Co Ltd | Soiウェーハの製造方法 |
US7052978B2 (en) * | 2003-08-28 | 2006-05-30 | Intel Corporation | Arrangements incorporating laser-induced cleaving |
JP4407384B2 (ja) * | 2004-05-28 | 2010-02-03 | 株式会社Sumco | Soi基板の製造方法 |
JP4624812B2 (ja) * | 2005-01-20 | 2011-02-02 | 信越化学工業株式会社 | Soiウエーハの製造方法 |
FR2898431B1 (fr) | 2006-03-13 | 2008-07-25 | Soitec Silicon On Insulator | Procede de fabrication de film mince |
JP5249511B2 (ja) * | 2006-11-22 | 2013-07-31 | 信越化学工業株式会社 | Soq基板およびsoq基板の製造方法 |
-
2007
- 2007-10-25 JP JP2007277502A patent/JP5248838B2/ja active Active
-
2008
- 2008-07-29 KR KR1020080073997A patent/KR101380514B1/ko active IP Right Grant
- 2008-09-09 US US12/230,984 patent/US7972937B2/en active Active
- 2008-09-11 EP EP08016060A patent/EP2053650B1/en active Active
- 2008-10-24 TW TW097140888A patent/TWI450366B/zh active
Also Published As
Publication number | Publication date |
---|---|
KR20090042138A (ko) | 2009-04-29 |
EP2053650A2 (en) | 2009-04-29 |
JP2009105314A (ja) | 2009-05-14 |
US7972937B2 (en) | 2011-07-05 |
EP2053650A3 (en) | 2010-11-17 |
KR101380514B1 (ko) | 2014-04-01 |
US20090111242A1 (en) | 2009-04-30 |
TWI450366B (zh) | 2014-08-21 |
EP2053650B1 (en) | 2012-10-24 |
TW200931601A (en) | 2009-07-16 |
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