JP5275608B2 - 半導体基板の作製方法 - Google Patents
半導体基板の作製方法 Download PDFInfo
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- JP5275608B2 JP5275608B2 JP2007272297A JP2007272297A JP5275608B2 JP 5275608 B2 JP5275608 B2 JP 5275608B2 JP 2007272297 A JP2007272297 A JP 2007272297A JP 2007272297 A JP2007272297 A JP 2007272297A JP 5275608 B2 JP5275608 B2 JP 5275608B2
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- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- GVGCUCJTUSOZKP-UHFFFAOYSA-N nitrogen trifluoride Chemical compound FN(F)F GVGCUCJTUSOZKP-UHFFFAOYSA-N 0.000 description 1
- 238000007645 offset printing Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 239000000049 pigment Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920001690 polydopamine Polymers 0.000 description 1
- 229920001709 polysilazane Polymers 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 150000003254 radicals Chemical class 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 229910052703 rhodium Inorganic materials 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910001415 sodium ion Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 1
- 239000004408 titanium dioxide Substances 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
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- Thin Film Transistor (AREA)
Description
本発明に係る半導体基板を図1(A)(B)に示す。なお、本明細書中において、半導体基板とは絶縁表面を有する基板若しくは絶縁基板上に半導体層が設けられた基板のことを指す。半導体層は主に単結晶半導体層であるが、多結晶、若しくは化合物半導体からなる層であっても良い。
本実施の形態では、本発明の半導体装置の一例としてCMOS(相補型金属酸化物半導体:Complementary Metal Oxide Semiconductor)に関して図5及び図6を用いて説明する。なお、同時に当該半導体装置の作製方法も説明する。本実施の形態では実施の形態1で説明した半導体基板を用いてCMOSを作製することによって、高性能で動作が安定なCMOSを提供することができる。なお、実施の形態1と同一部分又は同様な機能を有する部分の繰り返しの説明は省略する。
本実施の形態では、本発明の半導体装置の一例として液晶表示装置について図6を用いて説明する。本実施の形態では実施の形態1で説明した半導体基板を用いて液晶表示装置を作製することによって、高性能で動作が安定な液晶表示装置を提供することができる。
本実施の形態では本発明の半導体装置の一例として、発光素子を有する半導体装置(発光表示装置)について図7を用いて説明する。本実施の形態では実施の形態1で説明した半導体基板を用いて発光表示装置を作製することによって、高性能で高い信頼性を有する発光表示装置を提供することができる。
本発明によって形成される表示装置を有する半導体装置によって、テレビジョン装置を完成させることができる。高い性能を付与することを目的としたテレビジョン装置の例を説明する。
本実施の形態では、高性能、かつ高い信頼性を付与することを目的とした半導体装置の例について説明する。詳しくは半導体装置の一例として、マイクロプロセッサ及び非接触でデータの送受信を行うことのできる演算機能を備えた半導体装置の一例について説明する。
本実施の形態を図12を用いて説明する。本実施の形態は、実施の形態1乃至8で作製する半導体基板又は半導体装置を有するパネルを用いたモジュールの例を示す。本実施の形態では、高性能且つ高い信頼性を付与することを目的とした半導体装置を有するモジュールの例を説明する。
本実施の形態を図13を用いて説明する。図13は、実施の形態9で作製するモジュールを含む無線を用いた持ち運び可能な小型電話機(携帯電話)の一態様を示している。パネル900はハウジング1001に脱着自在に組み込んでモジュール999と容易に組み合わせできるようにしている。ハウジング1001は組み入れる電子機器に合わせて、形状や寸法を適宜変更することができる。本実施の形態に示した携帯電話は実施の形態1に記載の半導体基板を用いて作成されていることから、高性能且つ高い信頼性を有する携帯電話である。
本発明を適用して、様々な表示機能を有する半導体装置を作製することができる。即ち、それら表示機能を有する半導体装置を表示部に組み込んだ様々な電子機器に本発明を適用できる。本実施の形態では、高性能且つ高い信頼性を付与することを目的とした表示機能を有する半導体装置を有する電子機器の例を説明する。
102 半導体層
103 接合層
104 バリア層
108 ボンド基板
110 損傷領域
116 単結晶半導体層
117 マスク
119 半導体層
121 イオンビーム
130 半導体層
205 半導体層
206 半導体層
207 ゲート絶縁層
208 ゲート電極層
209 ゲート電極層
210 不純物元素
211 マスク
212a、212b 第1のn型不純物領域
213 不純物元素
214 マスク
215a、215b 第1のp型不純物領域
216a〜216d 側壁絶縁層
217 不純物元素
218 マスク
219a、219b 第2のn型不純物領域
220a、220b 第3のn型不純物領域
221 チャネル形成領域
222 不純物元素
223 マスク
224a、224b 第2のp型不純物領域
225a、225b 第3のp型不純物領域
226 チャネル形成領域
227 絶縁膜
228 絶縁層
229a、229b 配線層
230a、230b 配線層
231 薄膜トランジスタ
232 薄膜トランジスタ
233a、233b ゲート絶縁層
252 外部端子接続領域
253 封止領域
254 駆動回路領域
256 画素領域
304a、304b 駆動回路領域
306 画素領域
307 駆動回路領域
310 ベース基板
313 バリア層
314 接合層
317 絶縁膜
318 絶縁膜
319 絶縁膜
320 電極層
373 トランジスタ
374 トランジスタ
375 トランジスタ
376 容量素子
378 端子電極層
381 絶縁層
383 絶縁層
384 電極層
385 着色層
387 スペーサ
391 偏光子
392 シール材
393 偏光子(偏光板)
394 FPC
395 対向基板
396 異方性導電体層
400 加熱温度
500 マイクロプロセッサ
501 演算回路
502 演算回路制御部
503 命令解析部
504 制御部
505 タイミング制御部
506 レジスタ
507 レジスタ制御部
508 バスインターフェース
509 専用メモリ
510 メモリインターフェース
511 RFCPU
512 アナログ回路部
513 デジタル回路部
514 共振回路
515 整流回路
516 定電圧回路
517 リセット回路
518 発振回路
519 復調回路
520 変調回路
521 RFインターフェース
522 制御レジスタ
523 クロックコントローラ
524 インターフェース
525 中央処理ユニット
526 ランダムアクセスメモリ
527 専用メモリ
528 アンテナ
529 容量部
530 電源管理回路
600 素子基板
603 バリア層
604 接合層
607 絶縁膜
655 薄膜トランジスタ
658 駆動回路領域
665 絶縁膜
667 薄膜トランジスタ
668 薄膜トランジスタ
675 ゲート絶縁層
677 薄膜トランジスタ
678 端子電極層
679 配線層
680 電極層
685 電極層
686 絶縁層
688 発光層
689 電極層
690 発光素子
692 シール材
693 充填材
694 FPC
695 封止基板
696 異方性導電層
900 パネル
901 コントローラ
902 中央処理装置(CPU)
903 電源回路
904 送受信回路
905 画素領域
906a 走査線駆動回路
906b 走査線駆動回路
907 信号線駆動回路
908 フレキシブル配線基板(FPC)
909 インターフェース(I/F)
910 アンテナ用ポート
911 メモリ
920 制御信号生成回路
921 デコーダ
922 レジスタ
923 演算回路
924 RAM
925 DRAM
926 フラッシュメモリ
927 マイク
928 スピーカー
929 音声処理回路
930 入力手段
931 送受信回路
932 VRAM
933 アンテナ
935 インターフェース
946 プリント配線基板
993 信号処理回路
994 マイクロフォン
995 スピーカー
996 筐体
997 バッテリ
998 入力手段
999 モジュール
1001 ハウジング
1904 チューナ
1905 映像信号増幅回路
1906 映像信号処理回路
1907 コントロール回路
1908 信号分割回路
1909 音声信号増幅回路
1910 音声信号処理回路
1911 制御回路
1912 入力部
1913 スピーカ
2001 筐体
2002 表示用パネル
2003 主画面
2004 モデム
2005 受信機
2006 リモコン操作機
2007 表示部
2008 サブ画面
2009 スピーカー部
2010 筐体
2011 表示部
2012 キーボード部
2013 スピーカー部
9101 本体
9102 表示部
9201 本体
9202 表示部
9301 本体
9302 表示部
9401 本体
9402 表示部
9701 表示部
9702 表示部
Claims (3)
- 単結晶半導体基板上に、リンガラス、ボロンガラス、及びリンボロンガラスのいずれか一層又は複数層を有する接合層を形成し、
前記接合層を介して前記単結晶半導体基板に水素イオンを添加して、前記単結晶半導体基板の一定の深さに損傷領域を形成し、
前記接合層を介して前記単結晶半導体基板とベース基板とを接合させ、
熱処理を行って前記単結晶半導体基板を前記損傷領域で分離させ、前記ベース基板上に前記単結晶半導体基板から分離した半導体層を形成し、
前記接合層は、有機シランガスを材料の一つとして用いて、熱CVD法により500℃以上800℃以下の温度範囲で形成され、
前記水素イオンは、H + 、H 2 + 、及びH 3 + を有し、前記H + 、前記H 2 + 、及び前記H 3 + の総量に対してH 3 + の割合が50%以上であることを特徴とする半導体基板の作製方法。 - 単結晶半導体基板上に絶縁層を形成し、
前記絶縁層上に、リンガラス、ボロンガラス、及びリンボロンガラスのいずれか一層又は複数層を有する接合層を形成し、
前記絶縁層及び前記接合層を介して前記単結晶半導体基板に水素イオンを添加して、前記単結晶半導体基板の一定の深さに損傷領域を形成し、
前記絶縁層及び前記接合層を介して前記単結晶半導体基板とベース基板とを接合させ、
熱処理を行って前記単結晶半導体基板を前記損傷領域で分離させ、前記ベース基板上に前記単結晶半導体基板から分離した半導体層を形成し、
前記接合層は、有機シランガスを材料の一つとして用いて、熱CVD法により500℃以上800℃以下の温度範囲で形成され、
前記水素イオンは、H + 、H 2 + 、及びH 3 + を有し、前記H + 、前記H 2 + 、及び前記H 3 + の総量に対してH 3 + の割合が50%以上であることを特徴とする半導体基板の作製方法。 - 請求項2において、前記絶縁層は、窒化シリコン層、酸化シリコン層、窒化酸化シリコン層、及び酸化窒化シリコン層から選ばれた一層、又はこれらのうちの複数の層を有する積層であることを特徴とする半導体基板の作製方法。
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US12/249,437 US7994022B2 (en) | 2007-10-19 | 2008-10-10 | Semiconductor substrate and semiconductor device and manufacturing method of the same |
US13/168,155 US8227866B2 (en) | 2007-10-19 | 2011-06-24 | Semiconductor substrate and semiconductor device and manufacturing method of the same |
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