JP2018032883A - 半導体集積回路装置 - Google Patents
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- 229910052751 metal Inorganic materials 0.000 claims description 41
- 239000002184 metal Substances 0.000 claims description 41
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- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 6
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- 239000010937 tungsten Substances 0.000 description 5
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- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】SRAMセルを構成するインバータが形成されたPウエル領域PW1、PW2が2つに分割されてNウエル領域NW1の両側に配置され、トランジスタを形成する拡散層に曲がりがなく、配置方向が、ウエル境界線やビット線に平行に走るように形成される。アレイの途中には、基板への電源を供給するための領域が、メモリセル32ローあるいは、64ロー毎に、ワード線と平行に形成される。
【選択図】図1
Description
従来のSRAMセルのレイアウトでは、SRAMセルを構成するインバータが形成されたPウエル領域が2つに分割されてNウエル領域の両側に配置され、ウエル境界線がビット線に平行に走るように形成されている。
(1)直線部分と平行な長辺を有する長方形の形状、または、(2)直線部分と平行な長辺を有する複数の長方形をそれぞれの短辺を介して組み合わせた形状であり、あるいは、
(1)直線部分と平行な長辺を有する長方形の形状、または、(2)直線部分と平行な長辺を有する複数の長方形を上記直線部分の方向に延びるように組み合わせた形状であることを特徴とする。
図1および図2に本発明のSRAMセルのレイアウトMCを示す。図1は、半導体基板に形成された、ウエル領域、拡散層、多結晶シリコン配線層およびコンタクトが示されており、図2には、第1層の金属配線層、ビアホール1、第2層の金属配線層、ビアホール2および第3層の金属配線層が示されている。図3は、図1および図2で使用される記号の説明である。
図4に実施例1のメモリセルMCをアレイ状に配列した場合の例を示す。図中の記号は、図3に説明されている。
図5および図6に実施例3のSRAMセルのレイアウトMC2を示す。図5および図6で使用される記号の説明を図3に示した。実施例3のメモリセルMC2は実施例1のメモリセルMCと比べて、実施例1では、拡散層(LN1、LN1)の形が羽子板状であるのに対し、実施例3の拡散層(LN3、LN4)が長方形であると点と、コンタクト(SC1、SC2)が、コンタクト(SC3、SC4)と第1層の金属配線層(M11、M12)で置き換えられている点を除いて同一である。
図7および図8に実施例4のSRAMセルのレイアウトMC3を示す。図7および図8で使用される記号の説明を図3に示した。実施例4のメモリセルMC3は実施例3のメモリセルMC2と比べて、多結晶シリコン配線層(FG5、FG6、FG7、FG8)の形が長方形である点が異なる。このセルでは、折れ曲がりがなく、パターン補正(OCP)が必要なく、トランジスタどうしのバランスがよくなる。
図9および図10に実施例5のSRAMセルのレイアウトMC4を示す。図9および図10で使用される記号の説明を図11に示した。実施例5のメモリセルMC4は実施例1のメモリセルMCと比べて、配線構造が異なる。
図12および図13に実施例6のSRAMセルのレイアウトMC5を示す。図12および図13で使用される記号の説明を図14に示した。実施例6のメモリセルMC5は実施例1のメモリセルMCと比べて、ゲート電極と拡散層接続するいわゆる3層コンタクトの構造が異なる。
図16および図17に実施例7のSRAMセルのレイアウトMC6を示す。図16および図17で使用される記号の説明を図14に示した。実施例7のメモリセルMC6は実施例6のメモリセルMC5と比べて、 コンタクト(SC5、SC6)が、コンタクト(SC7、SC8)と第1層の金属配線層(M11、M12)で置き換えられている点を除いて同一である。
図18および図19に実施例8のSRAMセルのレイアウトMC7を示す。図18および図19で使用される記号の説明を図20に示した。実施例8のメモリセルMC7は実施例1のメモリセルMCと比べて、 コンタクト(SC1、SC2)が、ローカルインターコネクト(LI1、LI2)で置き換えられている点と、ワード線が第2層目の金属配線から第1層目の金属配線に、ビット線と電源電位線と接地電位線が第3層目の金属配線から第2層目の金属配線に変更されている点を除いて同一である。図21は図18、19のA−B線に沿った断面図である。
図22に実施例9の3層コンタクト部のプロセスフローを示す。実施例9は実施例1、3、4、5、8の3層コンタクト部を形成するプロセスの一例である。
図23に実施例10の3層コンタクト部のプロセスフローを示す。実施例10は実施例1、3、4、5、8の3層コンタクト部を形成するプロセスの一例である。
TN1、TN2、TN3、TN4……Nチャネル型MOSトランジスタ
TP1、TP2……Pチャネル型MOSトランジスタ
PW1、PW2……Pウエル領域
NW1、NW……Nウエル領域
FG1、FG2、FG3、FG4、FG5、FG6、FG7、FG8、FG……多結晶シリコン配線層
LN1、LN2、LN3、LN4、LP1、LP2……拡散層
SC1、SC2、SC3、SC4、SC5、SC6、SC7、SC8……コンタクト
INV1、INV2……インバータ回路
WD、WD1……ワード線
BL1、BL2、BL3、BL4……ビット線
Vss、Vss1、Vss2、Vss3、Vss4、Vss5、Vss6……接地電位線
Vcc、Vcc1、Vcc2……電源電位線
Vbp……Nウエル領域へ電位を供給する線
Vbn……Pウエル領域へ電位を供給する線
wddrv……ワードドライバ回路
AMP……センスアンプ回路
M11、M12……第1層の金属配線層
GB……グローバルビット線
SGI……フィールド領域
PolySi……多結晶シリコン
SiN……シリコン窒化膜
SiO……シリコン酸化膜
SS……シリサイド層
TEOS……プラズマCVD TEOS膜
W……タングステン
Al……アルミニウム配線層
P+……P型高濃度拡散層。
Claims (1)
- 半導体基板の上に複数層の金属配線が設けられた半導体集積回路装置であって、
前記半導体基板に設けられた第1Pウエル領域と、
前記半導体基板に設けられた第2Pウエル領域と、
前記第1Pウエル領域と前記第2Pウエル領域との間の領域に設けられた第1Nウエル領域と、
前記第1Pウエル領域に設けられた第1および第3Nチャネル型MOSトランジスタと、前記第2Pウエル領域に設けられた第2および第4Nチャネル型MOSトランジスタと、前記第1Nウエル領域に設けられる第1および第2Pチャネル型MOSトランジスタとを有する第1メモリセルと、
前記第1Pチャネル型MOSトランジスタのゲートおよび前記第1Nチャネル型MOSトランジスタのゲートを一体に構成する第1配線と、
前記第2Pチャネル型MOSトランジスタのゲートおよび前記第2Nチャネル型MOSトランジスタのゲートを一体に構成する第2配線と、
前記第3Nチャネル型MOSトランジスタのゲートを構成する第3配線と、
前記第4Nチャネル型MOSトランジスタのゲートを構成する第4配線と、
第1ビット線と、
第2ビット線と、
前記第3配線と第3コンタクトを介して接続され、前記第4配線と第4コンタクトを介して接続され、前記第1ビット線および前記第2ビット線に交差する第1ワード線と、
第1電位を供給する電源電位線と、
前記第1Pチャネル型MOSトランジスタおよび前記第2Pチャネル型MOSトランジスタを覆うシリコン窒化膜と、
前記シリコン窒化膜上に形成された層間絶縁膜と、
を有し、
前記第1配線と前記第2Pチャネル型MOSトランジスタのドレインは、前記層間絶縁膜と前記シリコン窒化膜に形成された第1コンタクト内の第1プラグにより接続され、
前記第2配線と前記第1Pチャネル型MOSトランジスタのドレインは、前記層間絶縁膜と前記シリコン窒化膜に形成された第2コンタクト内の第2プラグにより接続され、
前記第1Pチャネル型MOSトランジスタのドレインは前記第1Nチャネル型MOSトランジスタのドレインに接続され、
前記第2Pチャネル型MOSトランジスタのドレインは前記第2Nチャネル型MOSトランジスタのドレインに接続され、
前記第1Pチャネル型MOSトランジスタおよび前記第2Pチャネル型MOSトランジスタのそれぞれソースには前記第1電位が与えられ、
前記第1Nチャネル型MOSトランジスタおよび前記第2Nチャネル型MOSトランジスタのそれぞれソースには前記第1電位より低い第2電位が与えられ、
前記第3Nチャネル型MOSトランジスタは、前記第1ビット線と前記第1Nチャネル型MOSトランジスタのドレインとの間を電気的に接続し、
前記第4Nチャネル型MOSトランジスタは、前記第2ビット線と前記第2Nチャネル型MOSトランジスタのドレインとの間を電気的に接続し、
前記第1配線、前記第2配線、前記第3配線および前記第4配線の各々の平面視した外形形状は、長方形であり、
平面視において、前記電源電位線は、前記第1ビット線および前記第2ビット線の間に配置され、
前記電源電位線、前記第1ビット線および前記第2ビット線は、前記複数層の金属配線のうちの同じ層の金属配線で形成され、
前記第1ワード線は、前記複数層の金属配線のうちの前記電源電位線とは異なる層の金属配線で形成され、
前記第1配線、前記第2配線、前記第3配線および前記第4配線のそれぞれの長手方向は、同一方向に揃っている、半導体集積回路装置。
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JP2012186906A Expired - Lifetime JP5840092B2 (ja) | 1999-05-12 | 2012-08-27 | 半導体集積回路装置 |
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JP2014161090A Pending JP2014225698A (ja) | 1999-05-12 | 2014-08-07 | 半導体集積回路装置 |
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JP2017144172A Expired - Lifetime JP6291117B2 (ja) | 1999-05-12 | 2017-07-26 | 半導体集積回路装置 |
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JP2010036355A Expired - Lifetime JP5324494B2 (ja) | 1999-05-12 | 2010-02-22 | 半導体集積回路装置 |
JP2012186906A Expired - Lifetime JP5840092B2 (ja) | 1999-05-12 | 2012-08-27 | 半導体集積回路装置 |
JP2013061363A Expired - Lifetime JP5684847B2 (ja) | 1999-05-12 | 2013-03-25 | 半導体集積回路装置 |
JP2014161090A Pending JP2014225698A (ja) | 1999-05-12 | 2014-08-07 | 半導体集積回路装置 |
JP2015180386A Expired - Lifetime JP6055056B2 (ja) | 1999-05-12 | 2015-09-14 | 半導体集積回路装置 |
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Families Citing this family (202)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4565700B2 (ja) * | 1999-05-12 | 2010-10-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US6681379B2 (en) * | 2000-07-05 | 2004-01-20 | Numerical Technologies, Inc. | Phase shifting design and layout for static random access memory |
KR100362192B1 (ko) * | 2000-10-31 | 2002-11-23 | 주식회사 하이닉스반도체 | 버팅 콘택 구조를 가지는 풀씨모스 에스램 셀 |
TW522546B (en) | 2000-12-06 | 2003-03-01 | Mitsubishi Electric Corp | Semiconductor memory |
JP4471504B2 (ja) * | 2001-01-16 | 2010-06-02 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
JP4618914B2 (ja) * | 2001-03-13 | 2011-01-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2002368135A (ja) | 2001-06-12 | 2002-12-20 | Hitachi Ltd | 半導体記憶装置 |
US6898111B2 (en) * | 2001-06-28 | 2005-05-24 | Matsushita Electric Industrial Co., Ltd. | SRAM device |
JP4877894B2 (ja) * | 2001-07-04 | 2012-02-15 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2003060088A (ja) | 2001-08-14 | 2003-02-28 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP4623885B2 (ja) | 2001-08-16 | 2011-02-02 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
JP3637299B2 (ja) * | 2001-10-05 | 2005-04-13 | 松下電器産業株式会社 | 半導体記憶装置 |
TWI221656B (en) | 2001-10-24 | 2004-10-01 | Sanyo Electric Co | Semiconductor integrated circuit device |
TW579576B (en) | 2001-10-24 | 2004-03-11 | Sanyo Electric Co | Semiconductor circuit |
JP2003152111A (ja) | 2001-11-13 | 2003-05-23 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP2003218238A (ja) | 2001-11-14 | 2003-07-31 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP2003203993A (ja) * | 2002-01-10 | 2003-07-18 | Mitsubishi Electric Corp | 半導体記憶装置及びその製造方法 |
US6737685B2 (en) * | 2002-01-11 | 2004-05-18 | International Business Machines Corporation | Compact SRAM cell layout for implementing one-port or two-port operation |
JP2010153893A (ja) * | 2002-01-29 | 2010-07-08 | Renesas Technology Corp | 半導体記憶装置 |
JP4278338B2 (ja) | 2002-04-01 | 2009-06-10 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
KR100488835B1 (ko) * | 2002-04-04 | 2005-05-11 | 산요덴키가부시키가이샤 | 반도체 장치 및 표시 장치 |
JP4152668B2 (ja) | 2002-04-30 | 2008-09-17 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
JP2004022809A (ja) | 2002-06-17 | 2004-01-22 | Renesas Technology Corp | 半導体記憶装置 |
JP2004047529A (ja) * | 2002-07-09 | 2004-02-12 | Renesas Technology Corp | 半導体記憶装置 |
KR100616057B1 (ko) * | 2002-11-29 | 2006-08-28 | 가부시끼가이샤 도시바 | 반도체 집적 회로 장치 |
JP2004241473A (ja) * | 2003-02-04 | 2004-08-26 | Renesas Technology Corp | 半導体記憶装置 |
JP3920804B2 (ja) * | 2003-04-04 | 2007-05-30 | 松下電器産業株式会社 | 半導体記憶装置 |
JP4217242B2 (ja) * | 2003-08-18 | 2009-01-28 | 富士通マイクロエレクトロニクス株式会社 | 不揮発性半導体メモリ |
CA2443206A1 (en) | 2003-09-23 | 2005-03-23 | Ignis Innovation Inc. | Amoled display backplanes - pixel driver circuits, array architecture, and external compensation |
JP2005197345A (ja) | 2004-01-05 | 2005-07-21 | Hitachi Ltd | 半導体装置 |
JP2005197518A (ja) * | 2004-01-08 | 2005-07-21 | Matsushita Electric Ind Co Ltd | 半導体装置とセル |
US20050275043A1 (en) * | 2004-06-10 | 2005-12-15 | Chien-Chao Huang | Novel semiconductor device design |
CA2472671A1 (en) | 2004-06-29 | 2005-12-29 | Ignis Innovation Inc. | Voltage-programming scheme for current-driven amoled displays |
JP2006054430A (ja) * | 2004-07-12 | 2006-02-23 | Renesas Technology Corp | 半導体装置 |
US7176125B2 (en) * | 2004-07-23 | 2007-02-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a static random access memory with a buried local interconnect |
JP4553185B2 (ja) | 2004-09-15 | 2010-09-29 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
CA2490858A1 (en) | 2004-12-07 | 2006-06-07 | Ignis Innovation Inc. | Driving method for compensated voltage-programming of amoled displays |
US9799246B2 (en) | 2011-05-20 | 2017-10-24 | Ignis Innovation Inc. | System and methods for extraction of threshold and mobility parameters in AMOLED displays |
US9280933B2 (en) | 2004-12-15 | 2016-03-08 | Ignis Innovation Inc. | System and methods for extraction of threshold and mobility parameters in AMOLED displays |
US8599191B2 (en) | 2011-05-20 | 2013-12-03 | Ignis Innovation Inc. | System and methods for extraction of threshold and mobility parameters in AMOLED displays |
US10013907B2 (en) | 2004-12-15 | 2018-07-03 | Ignis Innovation Inc. | Method and system for programming, calibrating and/or compensating, and driving an LED display |
US9275579B2 (en) | 2004-12-15 | 2016-03-01 | Ignis Innovation Inc. | System and methods for extraction of threshold and mobility parameters in AMOLED displays |
US7619597B2 (en) | 2004-12-15 | 2009-11-17 | Ignis Innovation Inc. | Method and system for programming, calibrating and driving a light emitting device display |
US8576217B2 (en) | 2011-05-20 | 2013-11-05 | Ignis Innovation Inc. | System and methods for extraction of threshold and mobility parameters in AMOLED displays |
US20140111567A1 (en) | 2005-04-12 | 2014-04-24 | Ignis Innovation Inc. | System and method for compensation of non-uniformities in light emitting device displays |
US10012678B2 (en) | 2004-12-15 | 2018-07-03 | Ignis Innovation Inc. | Method and system for programming, calibrating and/or compensating, and driving an LED display |
US9171500B2 (en) | 2011-05-20 | 2015-10-27 | Ignis Innovation Inc. | System and methods for extraction of parasitic parameters in AMOLED displays |
JP4377342B2 (ja) * | 2005-01-18 | 2009-12-02 | Necエレクトロニクス株式会社 | 半導体集積回路、レイアウト方法、レイアウト装置及びレイアウトプログラム |
CA2496642A1 (en) | 2005-02-10 | 2006-08-10 | Ignis Innovation Inc. | Fast settling time driving method for organic light-emitting diode (oled) displays based on current programming |
JP2006287216A (ja) * | 2005-03-10 | 2006-10-19 | Nec Electronics Corp | 半導体装置及び半導体装置の製造方法 |
JP4578329B2 (ja) | 2005-06-03 | 2010-11-10 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
TW200707376A (en) | 2005-06-08 | 2007-02-16 | Ignis Innovation Inc | Method and system for driving a light emitting device display |
US8405216B2 (en) * | 2005-06-29 | 2013-03-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structure for integrated circuits |
CN1893084A (zh) * | 2005-07-07 | 2007-01-10 | 松下电器产业株式会社 | 半导体装置 |
JP5090671B2 (ja) * | 2005-08-01 | 2012-12-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CA2518276A1 (en) | 2005-09-13 | 2007-03-13 | Ignis Innovation Inc. | Compensation technique for luminance degradation in electro-luminance devices |
FR2891652A1 (fr) * | 2005-10-03 | 2007-04-06 | St Microelectronics Sa | Cellule de memoire vive sram asymetrique a six transistors. |
JP2007103862A (ja) * | 2005-10-07 | 2007-04-19 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP5164857B2 (ja) | 2006-01-09 | 2013-03-21 | イグニス・イノベイション・インコーポレーテッド | アクティブマトリクスディスプレイ回路の駆動方法および表示システム |
US9489891B2 (en) | 2006-01-09 | 2016-11-08 | Ignis Innovation Inc. | Method and system for driving an active matrix display circuit |
US9269322B2 (en) | 2006-01-09 | 2016-02-23 | Ignis Innovation Inc. | Method and system for driving an active matrix display circuit |
US8541879B2 (en) | 2007-12-13 | 2013-09-24 | Tela Innovations, Inc. | Super-self-aligned contacts and method for making the same |
US9230910B2 (en) | 2006-03-09 | 2016-01-05 | Tela Innovations, Inc. | Oversized contacts and vias in layout defined by linearly constrained topology |
US7908578B2 (en) | 2007-08-02 | 2011-03-15 | Tela Innovations, Inc. | Methods for designing semiconductor device with dynamic array section |
US8448102B2 (en) | 2006-03-09 | 2013-05-21 | Tela Innovations, Inc. | Optimizing layout of irregular structures in regular layout context |
US8839175B2 (en) | 2006-03-09 | 2014-09-16 | Tela Innovations, Inc. | Scalable meta-data objects |
US9009641B2 (en) | 2006-03-09 | 2015-04-14 | Tela Innovations, Inc. | Circuits with linear finfet structures |
US7763534B2 (en) | 2007-10-26 | 2010-07-27 | Tela Innovations, Inc. | Methods, structures and designs for self-aligning local interconnects used in integrated circuits |
US7956421B2 (en) * | 2008-03-13 | 2011-06-07 | Tela Innovations, Inc. | Cross-coupled transistor layouts in restricted gate level layout architecture |
US8658542B2 (en) | 2006-03-09 | 2014-02-25 | Tela Innovations, Inc. | Coarse grid design methods and structures |
US7446352B2 (en) | 2006-03-09 | 2008-11-04 | Tela Innovations, Inc. | Dynamic array architecture |
US9563733B2 (en) * | 2009-05-06 | 2017-02-07 | Tela Innovations, Inc. | Cell circuit and layout with linear finfet structures |
US9035359B2 (en) | 2006-03-09 | 2015-05-19 | Tela Innovations, Inc. | Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods |
US8653857B2 (en) | 2006-03-09 | 2014-02-18 | Tela Innovations, Inc. | Circuitry and layouts for XOR and XNOR logic |
JP5061490B2 (ja) * | 2006-04-06 | 2012-10-31 | ソニー株式会社 | 半導体装置およびその製造方法 |
US8477121B2 (en) | 2006-04-19 | 2013-07-02 | Ignis Innovation, Inc. | Stable driving scheme for active matrix displays |
JP4653693B2 (ja) * | 2006-05-11 | 2011-03-16 | パナソニック株式会社 | 半導体記憶装置 |
JP4868934B2 (ja) | 2006-05-11 | 2012-02-01 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
JP2008034037A (ja) * | 2006-07-28 | 2008-02-14 | Toshiba Corp | 半導体記憶装置 |
JP5045022B2 (ja) * | 2006-08-09 | 2012-10-10 | 富士通セミコンダクター株式会社 | 半導体記憶装置 |
CA2556961A1 (en) | 2006-08-15 | 2008-02-15 | Ignis Innovation Inc. | Oled compensation technique based on oled capacitance |
JP5110831B2 (ja) * | 2006-08-31 | 2012-12-26 | キヤノン株式会社 | 光電変換装置及び撮像システム |
JP5305622B2 (ja) * | 2006-08-31 | 2013-10-02 | キヤノン株式会社 | 光電変換装置の製造方法 |
US7592247B2 (en) * | 2006-10-04 | 2009-09-22 | International Business Machines Corporation | Sub-lithographic local interconnects, and methods for forming same |
US7525868B2 (en) * | 2006-11-29 | 2009-04-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multiple-port SRAM device |
JP2008159669A (ja) * | 2006-12-21 | 2008-07-10 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
JP4110192B1 (ja) * | 2007-02-23 | 2008-07-02 | キヤノン株式会社 | 光電変換装置及び光電変換装置を用いた撮像システム |
US8667443B2 (en) | 2007-03-05 | 2014-03-04 | Tela Innovations, Inc. | Integrated circuit cell library for multiple patterning |
US20080251934A1 (en) * | 2007-04-13 | 2008-10-16 | Jack Allan Mandelman | Semiconductor Device Structures and Methods of Fabricating Semiconductor Device Structures for Use in SRAM Devices |
US20080251878A1 (en) * | 2007-04-13 | 2008-10-16 | International Business Machines Corporation | Structure incorporating semiconductor device structures for use in sram devices |
JP2009016809A (ja) | 2007-06-07 | 2009-01-22 | Toshiba Corp | 半導体記憶装置 |
JP2010003712A (ja) * | 2007-08-09 | 2010-01-07 | Renesas Technology Corp | 半導体装置、半導体装置の配置配線方法、及びデータ処理システム |
JP4473901B2 (ja) | 2007-09-10 | 2010-06-02 | 株式会社東芝 | 半導体記憶装置 |
JP2009094201A (ja) | 2007-10-05 | 2009-04-30 | Nec Electronics Corp | 半導体集積回路装置 |
JP2008135169A (ja) * | 2007-12-21 | 2008-06-12 | Renesas Technology Corp | 半導体記憶装置 |
US8453094B2 (en) | 2008-01-31 | 2013-05-28 | Tela Innovations, Inc. | Enforcement of semiconductor structure regularity for localized transistors and interconnect |
US7939443B2 (en) | 2008-03-27 | 2011-05-10 | Tela Innovations, Inc. | Methods for multi-wire routing and apparatus implementing same |
CN102057418B (zh) | 2008-04-18 | 2014-11-12 | 伊格尼斯创新公司 | 用于发光器件显示器的系统和驱动方法 |
EP2321748B1 (en) | 2008-07-16 | 2017-10-04 | Tela Innovations, Inc. | Methods for cell phasing and placement in dynamic array architecture and implementation of the same |
CA2637343A1 (en) | 2008-07-29 | 2010-01-29 | Ignis Innovation Inc. | Improving the display source driver |
US9122832B2 (en) * | 2008-08-01 | 2015-09-01 | Tela Innovations, Inc. | Methods for controlling microloading variation in semiconductor wafer layout and fabrication |
JP2009081452A (ja) * | 2008-11-17 | 2009-04-16 | Renesas Technology Corp | 半導体記憶装置 |
US9370075B2 (en) | 2008-12-09 | 2016-06-14 | Ignis Innovation Inc. | System and method for fast compensation programming of pixels in a display |
JP2010169853A (ja) | 2009-01-22 | 2010-08-05 | Sony Corp | パターン補正方法、露光用マスク、露光用マスクの製造方法および半導体装置の製造方法 |
US8004042B2 (en) | 2009-03-20 | 2011-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Static random access memory (SRAM) cell and method for forming same |
CA2688870A1 (en) | 2009-11-30 | 2011-05-30 | Ignis Innovation Inc. | Methode and techniques for improving display uniformity |
CA2669367A1 (en) | 2009-06-16 | 2010-12-16 | Ignis Innovation Inc | Compensation technique for color shift in displays |
US9311859B2 (en) | 2009-11-30 | 2016-04-12 | Ignis Innovation Inc. | Resetting cycle for aging compensation in AMOLED displays |
US10319307B2 (en) | 2009-06-16 | 2019-06-11 | Ignis Innovation Inc. | Display system with compensation techniques and/or shared level resources |
US9384698B2 (en) | 2009-11-30 | 2016-07-05 | Ignis Innovation Inc. | System and methods for aging compensation in AMOLED displays |
US8661392B2 (en) | 2009-10-13 | 2014-02-25 | Tela Innovations, Inc. | Methods for cell boundary encroachment and layouts implementing the Same |
US8633873B2 (en) | 2009-11-12 | 2014-01-21 | Ignis Innovation Inc. | Stable fast programming scheme for displays |
US10996258B2 (en) | 2009-11-30 | 2021-05-04 | Ignis Innovation Inc. | Defect detection and correction of pixel circuits for AMOLED displays |
US8803417B2 (en) | 2009-12-01 | 2014-08-12 | Ignis Innovation Inc. | High resolution pixel architecture |
CA2687631A1 (en) | 2009-12-06 | 2011-06-06 | Ignis Innovation Inc | Low power driving scheme for display applications |
US10176736B2 (en) | 2010-02-04 | 2019-01-08 | Ignis Innovation Inc. | System and methods for extracting correlation curves for an organic light emitting device |
US20140313111A1 (en) | 2010-02-04 | 2014-10-23 | Ignis Innovation Inc. | System and methods for extracting correlation curves for an organic light emitting device |
US10163401B2 (en) | 2010-02-04 | 2018-12-25 | Ignis Innovation Inc. | System and methods for extracting correlation curves for an organic light emitting device |
CA2692097A1 (en) | 2010-02-04 | 2011-08-04 | Ignis Innovation Inc. | Extracting correlation curves for light emitting device |
US9881532B2 (en) | 2010-02-04 | 2018-01-30 | Ignis Innovation Inc. | System and method for extracting correlation curves for an organic light emitting device |
US10089921B2 (en) | 2010-02-04 | 2018-10-02 | Ignis Innovation Inc. | System and methods for extracting correlation curves for an organic light emitting device |
US8946828B2 (en) * | 2010-02-09 | 2015-02-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device having elevated structure and method of manufacturing the same |
CA2696778A1 (en) | 2010-03-17 | 2011-09-17 | Ignis Innovation Inc. | Lifetime, uniformity, parameter extraction methods |
JP4741027B2 (ja) * | 2010-05-07 | 2011-08-03 | パナソニック株式会社 | 半導体記憶装置 |
US8426310B2 (en) * | 2010-05-25 | 2013-04-23 | Freescale Semiconductor, Inc. | Method of forming a shared contact in a semiconductor device |
WO2012012538A2 (en) * | 2010-07-20 | 2012-01-26 | University Of Virginia Patent Foundation | Memory cell |
US9159627B2 (en) | 2010-11-12 | 2015-10-13 | Tela Innovations, Inc. | Methods for linewidth modification and apparatus implementing the same |
US8907991B2 (en) | 2010-12-02 | 2014-12-09 | Ignis Innovation Inc. | System and methods for thermal compensation in AMOLED displays |
US20140368491A1 (en) | 2013-03-08 | 2014-12-18 | Ignis Innovation Inc. | Pixel circuits for amoled displays |
US9351368B2 (en) | 2013-03-08 | 2016-05-24 | Ignis Innovation Inc. | Pixel circuits for AMOLED displays |
US9886899B2 (en) | 2011-05-17 | 2018-02-06 | Ignis Innovation Inc. | Pixel Circuits for AMOLED displays |
US9530349B2 (en) | 2011-05-20 | 2016-12-27 | Ignis Innovations Inc. | Charged-based compensation and parameter extraction in AMOLED displays |
JP5711612B2 (ja) * | 2011-05-24 | 2015-05-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9466240B2 (en) | 2011-05-26 | 2016-10-11 | Ignis Innovation Inc. | Adaptive feedback system for compensating for aging pixel areas with enhanced estimation speed |
CN106910464B (zh) | 2011-05-27 | 2020-04-24 | 伊格尼斯创新公司 | 补偿显示器阵列中像素的系统和驱动发光器件的像素电路 |
EP3404646B1 (en) | 2011-05-28 | 2019-12-25 | Ignis Innovation Inc. | Method for fast compensation programming of pixels in a display |
JP5705053B2 (ja) | 2011-07-26 | 2015-04-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8735972B2 (en) * | 2011-09-08 | 2014-05-27 | International Business Machines Corporation | SRAM cell having recessed storage node connections and method of fabricating same |
US10089924B2 (en) | 2011-11-29 | 2018-10-02 | Ignis Innovation Inc. | Structural and low-frequency non-uniformity compensation |
US9324268B2 (en) | 2013-03-15 | 2016-04-26 | Ignis Innovation Inc. | Amoled displays with multiple readout circuits |
US8582352B2 (en) | 2011-12-06 | 2013-11-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for FinFET SRAM cells |
US8581348B2 (en) * | 2011-12-13 | 2013-11-12 | GlobalFoundries, Inc. | Semiconductor device with transistor local interconnects |
US20130193516A1 (en) * | 2012-01-26 | 2013-08-01 | Globalfoundries Inc. | Sram integrated circuits and methods for their fabrication |
US8937632B2 (en) | 2012-02-03 | 2015-01-20 | Ignis Innovation Inc. | Driving system for active-matrix displays |
US8947902B2 (en) | 2012-03-06 | 2015-02-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor memory and method of making the same |
US9349436B2 (en) | 2012-03-06 | 2016-05-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor memory and method of making the same |
US9747834B2 (en) | 2012-05-11 | 2017-08-29 | Ignis Innovation Inc. | Pixel circuits including feedback capacitors and reset capacitors, and display systems therefore |
US8829610B2 (en) * | 2012-05-15 | 2014-09-09 | United Microelectronics Corp. | Method for forming semiconductor layout patterns, semiconductor layout patterns, and semiconductor structure |
US8922544B2 (en) | 2012-05-23 | 2014-12-30 | Ignis Innovation Inc. | Display systems with compensation for line propagation delay |
JP5938277B2 (ja) | 2012-06-08 | 2016-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
WO2013191309A1 (ko) * | 2012-06-18 | 2013-12-27 | 포항공과대학교 산학협력단 | 나노 구조를 갖는 금속산화물반도체 가스센서 및 그 제조방법 |
US8823178B2 (en) | 2012-09-14 | 2014-09-02 | Globalfoundries Inc. | Bit cell with double patterned metal layer structures |
US9786223B2 (en) | 2012-12-11 | 2017-10-10 | Ignis Innovation Inc. | Pixel circuits for AMOLED displays |
US9336717B2 (en) | 2012-12-11 | 2016-05-10 | Ignis Innovation Inc. | Pixel circuits for AMOLED displays |
US9830857B2 (en) | 2013-01-14 | 2017-11-28 | Ignis Innovation Inc. | Cleaning common unwanted signals from pixel measurements in emissive displays |
CN104981862B (zh) | 2013-01-14 | 2018-07-06 | 伊格尼斯创新公司 | 用于向驱动晶体管变化提供补偿的发光显示器的驱动方案 |
US9721505B2 (en) | 2013-03-08 | 2017-08-01 | Ignis Innovation Inc. | Pixel circuits for AMOLED displays |
CA2894717A1 (en) | 2015-06-19 | 2016-12-19 | Ignis Innovation Inc. | Optoelectronic device characterization in array with shared sense line |
EP3043338A1 (en) | 2013-03-14 | 2016-07-13 | Ignis Innovation Inc. | Re-interpolation with edge detection for extracting an aging pattern for amoled displays |
CN105144361B (zh) | 2013-04-22 | 2019-09-27 | 伊格尼斯创新公司 | 用于oled显示面板的检测系统 |
KR102053289B1 (ko) | 2013-05-27 | 2019-12-06 | 에스케이하이닉스 주식회사 | 반도체 장치 |
US9437137B2 (en) | 2013-08-12 | 2016-09-06 | Ignis Innovation Inc. | Compensation accuracy |
US9741282B2 (en) | 2013-12-06 | 2017-08-22 | Ignis Innovation Inc. | OLED display system and method |
US9761170B2 (en) | 2013-12-06 | 2017-09-12 | Ignis Innovation Inc. | Correction for localized phenomena in an image array |
US9502653B2 (en) | 2013-12-25 | 2016-11-22 | Ignis Innovation Inc. | Electrode contacts |
US9183933B2 (en) | 2014-01-10 | 2015-11-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory cell |
KR102114237B1 (ko) | 2014-01-20 | 2020-05-25 | 삼성전자 주식회사 | 반도체 장치 및 이의 제조 방법 |
DE102015206281A1 (de) | 2014-04-08 | 2015-10-08 | Ignis Innovation Inc. | Anzeigesystem mit gemeinsam genutzten Niveauressourcen für tragbare Vorrichtungen |
US9978755B2 (en) * | 2014-05-15 | 2018-05-22 | Taiwan Semiconductor Manufacturing Company Limited | Methods and devices for intra-connection structures |
US9946828B2 (en) | 2014-10-30 | 2018-04-17 | Samsung Electronics Co., Ltd. | Integrated circuit and method of designing layout thereof |
CA2873476A1 (en) | 2014-12-08 | 2016-06-08 | Ignis Innovation Inc. | Smart-pixel display architecture |
US9806070B2 (en) * | 2015-01-16 | 2017-10-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device layout, memory device layout, and method of manufacturing semiconductor device |
CA2879462A1 (en) | 2015-01-23 | 2016-07-23 | Ignis Innovation Inc. | Compensation for color variation in emissive devices |
JP6396834B2 (ja) * | 2015-03-23 | 2018-09-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CA2886862A1 (en) | 2015-04-01 | 2016-10-01 | Ignis Innovation Inc. | Adjusting display brightness for avoiding overheating and/or accelerated aging |
US9391080B1 (en) | 2015-04-28 | 2016-07-12 | Globalfoundries Inc. | Memory bit cell for reduced layout area |
CA2889870A1 (en) | 2015-05-04 | 2016-11-04 | Ignis Innovation Inc. | Optical feedback system |
CA2892714A1 (en) | 2015-05-27 | 2016-11-27 | Ignis Innovation Inc | Memory bandwidth reduction in compensation system |
US10373554B2 (en) | 2015-07-24 | 2019-08-06 | Ignis Innovation Inc. | Pixels and reference circuits and timing techniques |
CA2898282A1 (en) | 2015-07-24 | 2017-01-24 | Ignis Innovation Inc. | Hybrid calibration of current sources for current biased voltage progra mmed (cbvp) displays |
US10657895B2 (en) | 2015-07-24 | 2020-05-19 | Ignis Innovation Inc. | Pixels and reference circuits and timing techniques |
CA2900170A1 (en) | 2015-08-07 | 2017-02-07 | Gholamreza Chaji | Calibration of pixel based on improved reference values |
CA2908285A1 (en) | 2015-10-14 | 2017-04-14 | Ignis Innovation Inc. | Driver with multiple color pixel structure |
JP2017108031A (ja) | 2015-12-11 | 2017-06-15 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CN106952900B (zh) * | 2016-01-07 | 2021-07-27 | 联华电子股份有限公司 | 半导体布局结构 |
US10096604B2 (en) * | 2016-09-08 | 2018-10-09 | Globalfoundries Inc. | Selective SAC capping on fin field effect transistor structures and related methods |
DE112018000380T5 (de) | 2017-01-13 | 2019-09-26 | Semiconductor Energy Laboratory Co., Ltd. | Speichervorrichtung, Halbleitervorrichtung, elektronisches Bauelement und elektronisches Gerät |
TWI698873B (zh) * | 2017-03-28 | 2020-07-11 | 聯華電子股份有限公司 | 半導體記憶元件 |
TWI711159B (zh) | 2017-03-28 | 2020-11-21 | 聯華電子股份有限公司 | 半導體記憶元件 |
TWI689080B (zh) | 2017-05-08 | 2020-03-21 | 聯華電子股份有限公司 | 記憶體裝置 |
CN112489701B (zh) * | 2017-09-22 | 2023-12-05 | 联华电子股份有限公司 | 静态随机存取存储器组成的存储器元件 |
WO2019077747A1 (ja) * | 2017-10-20 | 2019-04-25 | 株式会社ソシオネクスト | 半導体記憶回路 |
JP2019114764A (ja) | 2017-12-21 | 2019-07-11 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
US10644009B2 (en) | 2017-12-21 | 2020-05-05 | Renesas Electronics Corporation | Semiconductor memory device |
CN110010169B (zh) * | 2018-01-04 | 2022-03-29 | 联华电子股份有限公司 | 双端口静态随机存取存储器单元 |
US10818677B2 (en) * | 2018-07-16 | 2020-10-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Layout of static random access memory periphery circuit |
US10985272B2 (en) * | 2018-11-05 | 2021-04-20 | Samsung Electronics Co., Ltd. | Integrated circuit devices including vertical field-effect transistors |
JP6901515B2 (ja) * | 2019-04-04 | 2021-07-14 | ウィンボンド エレクトロニクス コーポレーション | 半導体装置 |
WO2021166645A1 (ja) * | 2020-02-19 | 2021-08-26 | 株式会社ソシオネクスト | 半導体記憶装置 |
CN112864162B (zh) * | 2021-03-02 | 2022-07-19 | 长江存储科技有限责任公司 | 一种页缓冲器、场效应晶体管及三维存储器 |
US20220302129A1 (en) * | 2021-03-10 | 2022-09-22 | Invention And Collaboration Laboratory Pte. Ltd. | SRAM Cell Structures |
WO2022239681A1 (ja) * | 2021-05-12 | 2022-11-17 | 株式会社ソシオネクスト | 半導体集積回路装置 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62128546A (ja) * | 1985-11-29 | 1987-06-10 | Mitsubishi Electric Corp | 半導体集積回路装置及びその製造方法 |
JPH02312271A (ja) * | 1989-05-29 | 1990-12-27 | Hitachi Ltd | 半導体記憶装置およびその製造方法 |
US5132771A (en) * | 1985-12-27 | 1992-07-21 | Hitachi, Ltd. | Semiconductor memory device having flip-flop circuits |
JPH0590538A (ja) * | 1991-09-25 | 1993-04-09 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPH10178110A (ja) * | 1996-12-19 | 1998-06-30 | Toshiba Corp | 半導体記憶装置 |
WO1998028795A1 (fr) * | 1996-12-20 | 1998-07-02 | Hitachi, Ltd. | Dispositif memoire a semi-conducteur et procede de fabrication associe |
JPH1145949A (ja) * | 1997-07-28 | 1999-02-16 | Mitsubishi Electric Corp | スタティック型半導体記憶装置およびその製造方法 |
Family Cites Families (51)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0182779B1 (ko) * | 1989-03-20 | 1999-03-20 | 미다 가쓰시게 | 반도체집적회로장치 및 그 제조방법 |
JP2927463B2 (ja) | 1989-09-28 | 1999-07-28 | 株式会社日立製作所 | 半導体記憶装置 |
JP2718810B2 (ja) | 1990-07-10 | 1998-02-25 | 鹿島建設株式会社 | 床型枠用移動式支保工 |
US5166902A (en) * | 1991-03-18 | 1992-11-24 | United Technologies Corporation | SRAM memory cell |
US5396100A (en) | 1991-04-05 | 1995-03-07 | Hitachi, Ltd. | Semiconductor integrated circuit device having a compact arrangement of SRAM cells |
JP3149248B2 (ja) * | 1992-02-25 | 2001-03-26 | 株式会社日立製作所 | 半導体集積回路 |
JPH05307616A (ja) * | 1992-04-30 | 1993-11-19 | Hitachi Ltd | 半導体装置 |
KR960005602B1 (ko) | 1992-07-01 | 1996-04-26 | 신꼬 고오센 고오교오 가부시끼가이샤 | 내피로성과 내식성이 높은 2상 스테인레스강 와이어로프 및 그 제조방법 |
JP3059607B2 (ja) * | 1992-09-04 | 2000-07-04 | 三菱電機株式会社 | 半導体記憶装置およびその製造方法 |
JPH06188388A (ja) | 1992-12-17 | 1994-07-08 | Hitachi Ltd | 半導体記憶装置 |
JP2658835B2 (ja) * | 1993-10-20 | 1997-09-30 | 日本電気株式会社 | スタチック型半導体記憶装置 |
JPH06291281A (ja) | 1993-03-31 | 1994-10-18 | Sony Corp | Sramメモリーセル構造及びその形成方法 |
JPH0745704A (ja) * | 1993-07-27 | 1995-02-14 | Matsushita Electric Ind Co Ltd | コンタクトの形成方法 |
JPH0786436A (ja) | 1993-09-10 | 1995-03-31 | Fujitsu Ltd | スタティックram |
JP3771283B2 (ja) * | 1993-09-29 | 2006-04-26 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JPH07130877A (ja) * | 1993-11-05 | 1995-05-19 | Sony Corp | 完全cmos型スタティック記憶セル |
JP2682411B2 (ja) | 1993-12-13 | 1997-11-26 | 日本電気株式会社 | 半導体記憶装置 |
KR950023283U (ko) | 1994-01-17 | 1995-08-21 | 한윤수 | 속뚜껑을 겸한 컵이 내장된 식수통 |
JP3510335B2 (ja) * | 1994-07-18 | 2004-03-29 | 株式会社ルネサステクノロジ | 半導体記憶装置、内部電源電圧発生回路、内部高電圧発生回路、中間電圧発生回路、定電流源、および基準電圧発生回路 |
JPH0837241A (ja) | 1994-07-21 | 1996-02-06 | Sony Corp | スタティック記憶セル |
JPH08181225A (ja) | 1994-10-28 | 1996-07-12 | Nkk Corp | 半導体記憶装置 |
JPH08148499A (ja) * | 1994-11-17 | 1996-06-07 | Sony Corp | 多層配線形成方法 |
JP3570052B2 (ja) | 1995-01-19 | 2004-09-29 | セイコーエプソン株式会社 | 半導体メモリ装置及びその製造方法 |
JPH08250605A (ja) * | 1995-03-07 | 1996-09-27 | Hitachi Ltd | 半導体集積回路装置 |
JPH098297A (ja) * | 1995-06-26 | 1997-01-10 | Mitsubishi Electric Corp | 半導体装置、その製造方法及び電界効果トランジスタ |
JP3419597B2 (ja) | 1995-07-11 | 2003-06-23 | 株式会社日立製作所 | 半導体集積回路装置の製造方法 |
JPH09162304A (ja) * | 1995-12-12 | 1997-06-20 | Mitsubishi Electric Corp | 半導体記憶装置 |
JPH09270469A (ja) * | 1996-03-29 | 1997-10-14 | Sanyo Electric Co Ltd | 半導体メモリ装置 |
JP3824343B2 (ja) | 1996-03-29 | 2006-09-20 | 富士通株式会社 | 半導体装置 |
JP2933010B2 (ja) | 1996-05-31 | 1999-08-09 | 日本電気株式会社 | 半導体装置 |
KR100230426B1 (ko) * | 1996-06-29 | 1999-11-15 | 윤종용 | 집적도가 향상된 스태틱 랜덤 억세스 메모리장치 |
JP2872124B2 (ja) * | 1996-07-15 | 1999-03-17 | 日本電気株式会社 | Cmos型スタティックメモリ |
TW340975B (en) | 1996-08-30 | 1998-09-21 | Toshiba Co Ltd | Semiconductor memory |
US5883826A (en) | 1996-09-30 | 1999-03-16 | Wendell; Dennis Lee | Memory block select using multiple word lines to address a single memory cell row |
JPH10172287A (ja) | 1996-12-05 | 1998-06-26 | Mitsubishi Electric Corp | スタティック型半導体記憶装置 |
US5831896A (en) | 1996-12-17 | 1998-11-03 | International Business Machines Corporation | Memory cell |
JP3036588B2 (ja) | 1997-02-03 | 2000-04-24 | 日本電気株式会社 | 半導体記憶装置 |
KR19990004944A (ko) | 1997-06-30 | 1999-01-25 | 김영환 | 에스램 셀 제조 방법 |
JP4014708B2 (ja) | 1997-08-21 | 2007-11-28 | 株式会社ルネサステクノロジ | 半導体集積回路装置の設計方法 |
KR100305922B1 (ko) | 1997-12-23 | 2001-12-17 | 윤종용 | 씨모오스스테이틱랜덤액세스메모리장치 |
US6285088B1 (en) | 1998-05-13 | 2001-09-04 | Texas Instruments Incorporated | Compact memory circuit |
JP3186696B2 (ja) | 1998-05-28 | 2001-07-11 | 日本電気株式会社 | 光学式記号読取装置 |
JP3544126B2 (ja) * | 1998-10-15 | 2004-07-21 | 株式会社東芝 | 半導体装置の製造方法及び半導体装置 |
JP2000174141A (ja) * | 1998-12-01 | 2000-06-23 | Sony Corp | 半導体記憶装置 |
JP2000232168A (ja) | 1999-02-10 | 2000-08-22 | Sony Corp | 半導体記憶装置 |
KR100395538B1 (ko) | 1999-02-12 | 2003-08-25 | 미래산업 주식회사 | 표면실장기의 콘베이어 폭 조절장치 및 그 방법 |
JP4674386B2 (ja) * | 1999-02-17 | 2011-04-20 | ソニー株式会社 | 半導体記憶装置 |
KR20000018762U (ko) | 1999-03-26 | 2000-10-25 | 박종근 | 양면 접착용 방향제 용기 |
JP4565700B2 (ja) * | 1999-05-12 | 2010-10-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP3830416B2 (ja) * | 2001-06-28 | 2006-10-04 | 株式会社ノリタケカンパニーリミテド | 電子源用電極およびその製造方法ならびに電子管 |
KR100665842B1 (ko) * | 2004-12-24 | 2007-01-09 | 삼성전자주식회사 | 반도체 메모리 장치에서의 컬럼 패쓰 회로 배치구조 |
-
2000
- 2000-04-27 JP JP2000132848A patent/JP4565700B2/ja not_active Expired - Lifetime
- 2000-05-05 US US09/565,535 patent/US6677649B2/en not_active Expired - Lifetime
- 2000-05-10 TW TW89108930A patent/TW469632B/zh not_active IP Right Cessation
- 2000-05-10 KR KR1020000025125A patent/KR100796215B1/ko active IP Right Grant
-
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- 2003-06-27 US US10/606,954 patent/US20040012040A1/en not_active Abandoned
-
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- 2005-01-26 US US11/042,172 patent/US7612417B2/en not_active Expired - Fee Related
- 2005-10-31 US US11/261,764 patent/US20060050588A1/en not_active Abandoned
-
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- 2007-06-25 KR KR1020070062452A patent/KR20070077162A/ko not_active Application Discontinuation
- 2007-10-24 KR KR1020070107160A patent/KR100928694B1/ko active IP Right Grant
-
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- 2008-02-25 KR KR1020080016740A patent/KR100948569B1/ko active IP Right Grant
- 2008-09-26 KR KR1020080094648A patent/KR20080093008A/ko active Application Filing
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- 2009-01-05 US US12/348,524 patent/US7781846B2/en not_active Expired - Fee Related
- 2009-10-26 KR KR1020090101702A patent/KR100977760B1/ko active IP Right Grant
-
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- 2010-02-22 JP JP2010036355A patent/JP5324494B2/ja not_active Expired - Lifetime
- 2010-04-14 KR KR1020100034209A patent/KR101079215B1/ko active IP Right Grant
- 2010-06-23 US US12/821,329 patent/US8482083B2/en not_active Expired - Fee Related
-
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- 2011-01-05 KR KR1020110001013A patent/KR101134084B1/ko active IP Right Grant
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- 2014-08-07 JP JP2014161090A patent/JP2014225698A/ja active Pending
-
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- 2015-09-14 JP JP2015180386A patent/JP6055056B2/ja not_active Expired - Lifetime
-
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- 2016-07-21 US US15/216,327 patent/US9646678B2/en not_active Expired - Lifetime
- 2016-10-07 JP JP2016199209A patent/JP2017005281A/ja active Pending
-
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- 2017-02-20 JP JP2017028683A patent/JP6197134B2/ja not_active Expired - Lifetime
- 2017-03-02 US US15/448,585 patent/US9985038B2/en not_active Expired - Fee Related
- 2017-07-26 JP JP2017144172A patent/JP6291117B2/ja not_active Expired - Lifetime
- 2017-12-01 JP JP2017231580A patent/JP6537583B2/ja not_active Expired - Lifetime
-
2018
- 2018-05-09 US US15/975,761 patent/US20180261607A1/en not_active Abandoned
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62128546A (ja) * | 1985-11-29 | 1987-06-10 | Mitsubishi Electric Corp | 半導体集積回路装置及びその製造方法 |
US5132771A (en) * | 1985-12-27 | 1992-07-21 | Hitachi, Ltd. | Semiconductor memory device having flip-flop circuits |
JPH02312271A (ja) * | 1989-05-29 | 1990-12-27 | Hitachi Ltd | 半導体記憶装置およびその製造方法 |
JPH0590538A (ja) * | 1991-09-25 | 1993-04-09 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JPH10178110A (ja) * | 1996-12-19 | 1998-06-30 | Toshiba Corp | 半導体記憶装置 |
US5930163A (en) * | 1996-12-19 | 1999-07-27 | Kabushiki Kaisha Toshiba | Semiconductor memory device having two P-well layout structure |
WO1998028795A1 (fr) * | 1996-12-20 | 1998-07-02 | Hitachi, Ltd. | Dispositif memoire a semi-conducteur et procede de fabrication associe |
US6407420B1 (en) * | 1996-12-20 | 2002-06-18 | Hitachi, Ltd. | Integrated circuit device having line width determined by side wall spacer provided in openings formed in insulating film for connection conductors |
JPH1145949A (ja) * | 1997-07-28 | 1999-02-16 | Mitsubishi Electric Corp | スタティック型半導体記憶装置およびその製造方法 |
US5886388A (en) * | 1997-07-28 | 1999-03-23 | Mitsubishi Denki Kabushiki Kaisha | Static semiconductor memory device and manufacturing method thereof |
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