DE69833467D1 - Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem - Google Patents

Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem

Info

Publication number
DE69833467D1
DE69833467D1 DE69833467T DE69833467T DE69833467D1 DE 69833467 D1 DE69833467 D1 DE 69833467D1 DE 69833467 T DE69833467 T DE 69833467T DE 69833467 T DE69833467 T DE 69833467T DE 69833467 D1 DE69833467 D1 DE 69833467D1
Authority
DE
Germany
Prior art keywords
application
signal transmission
semiconductor integrated
integrated circuit
transmission system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69833467T
Other languages
English (en)
Other versions
DE69833467T2 (de
Inventor
Hirotaka Tamura
Hisakatsu Araki
Shigetoshi Wakayama
Kohtaroh Gotoh
Junji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP15542997A external-priority patent/JP3961072B2/ja
Priority claimed from JP07940198A external-priority patent/JP4063392B2/ja
Priority claimed from JP13561098A external-priority patent/JP3955150B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69833467D1 publication Critical patent/DE69833467D1/de
Publication of DE69833467T2 publication Critical patent/DE69833467T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222Clock generating, synchronizing or distributing circuits within memory device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/18Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0025Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of clock signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019Variable delay
    • H03K2005/00026Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
    • H03K2005/00052Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter by mixing the outputs of fixed delayed signals with each other or with the input signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Pulse Circuits (AREA)
DE69833467T 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem Expired - Lifetime DE69833467T2 (de)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
JP15542997 1997-06-12
JP15542997A JP3961072B2 (ja) 1997-06-12 1997-06-12 半導体装置及びそのタイミング調整方法
JP225498 1998-01-08
JP225498 1998-01-08
JP07940198A JP4063392B2 (ja) 1998-03-26 1998-03-26 信号伝送システム
JP7940198 1998-03-26
JP13561098 1998-05-18
JP13561098A JP3955150B2 (ja) 1998-01-08 1998-05-18 位相インターポレータ、タイミング信号発生回路、および、該タイミング信号発生回路が適用される半導体集積回路装置並びに半導体集積回路システム

Publications (2)

Publication Number Publication Date
DE69833467D1 true DE69833467D1 (de) 2006-04-20
DE69833467T2 DE69833467T2 (de) 2006-08-24

Family

ID=27453587

Family Applications (4)

Application Number Title Priority Date Filing Date
DE69833467T Expired - Lifetime DE69833467T2 (de) 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69837689T Expired - Lifetime DE69837689T2 (de) 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69841282T Expired - Lifetime DE69841282D1 (de) 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69840135T Expired - Lifetime DE69840135D1 (de) 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem

Family Applications After (3)

Application Number Title Priority Date Filing Date
DE69837689T Expired - Lifetime DE69837689T2 (de) 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69841282T Expired - Lifetime DE69841282D1 (de) 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69840135T Expired - Lifetime DE69840135D1 (de) 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem

Country Status (5)

Country Link
US (4) US6247138B1 (de)
EP (4) EP1489619B1 (de)
KR (4) KR100313820B1 (de)
DE (4) DE69833467T2 (de)
TW (1) TW387065B (de)

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EP1489619A3 (de) 2005-02-02
US8065553B2 (en) 2011-11-22
KR100340298B1 (ko) 2002-06-14
DE69840135D1 (de) 2008-11-27
EP1492120A2 (de) 2004-12-29
EP1489619B1 (de) 2008-10-15
US6247138B1 (en) 2001-06-12
EP0884732A3 (de) 2001-03-21
DE69841282D1 (de) 2009-12-17
KR100399427B1 (ko) 2003-09-29
US20030042957A1 (en) 2003-03-06
KR100346804B1 (ko) 2002-08-03
KR100313820B1 (ko) 2001-12-28
EP1489619A2 (de) 2004-12-22
EP0884732A2 (de) 1998-12-16
US6484268B2 (en) 2002-11-19
US20010007136A1 (en) 2001-07-05
DE69837689T2 (de) 2007-08-23
TW387065B (en) 2000-04-11
US7496781B2 (en) 2009-02-24
EP0884732B1 (de) 2006-02-15
KR19990006950A (ko) 1999-01-25
EP1492120A3 (de) 2005-02-02
DE69837689D1 (de) 2007-06-06
DE69833467T2 (de) 2006-08-24
EP1492120B1 (de) 2007-04-25
EP1492121A3 (de) 2005-02-02

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