DE69939291D1 - Eingangsschaltung - Google Patents

Eingangsschaltung

Info

Publication number
DE69939291D1
DE69939291D1 DE69939291T DE69939291T DE69939291D1 DE 69939291 D1 DE69939291 D1 DE 69939291D1 DE 69939291 T DE69939291 T DE 69939291T DE 69939291 T DE69939291 T DE 69939291T DE 69939291 D1 DE69939291 D1 DE 69939291D1
Authority
DE
Germany
Prior art keywords
input circuit
input
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69939291T
Other languages
English (en)
Inventor
Yutaka Terada
Takefumi Yoshikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69939291D1 publication Critical patent/DE69939291D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093—Input synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
DE69939291T 1998-04-28 1999-04-27 Eingangsschaltung Expired - Lifetime DE69939291D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11834998 1998-04-28

Publications (1)

Publication Number Publication Date
DE69939291D1 true DE69939291D1 (de) 2008-09-25

Family

ID=14734507

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69939291T Expired - Lifetime DE69939291D1 (de) 1998-04-28 1999-04-27 Eingangsschaltung

Country Status (4)

Country Link
US (2) US6829316B1 (de)
EP (1) EP0953982B1 (de)
CN (1) CN1185657C (de)
DE (1) DE69939291D1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004355163A (ja) * 2003-05-28 2004-12-16 Renesas Technology Corp データ処理装置および電子機器
US7307461B2 (en) * 2003-09-12 2007-12-11 Rambus Inc. System and method for adaptive duty cycle optimization
JP3953041B2 (ja) * 2004-03-31 2007-08-01 日本電気株式会社 出力バッファ回路および半導体集積回路
JP4682567B2 (ja) * 2004-09-13 2011-05-11 パナソニック株式会社 表示素子駆動装置および画像表示装置
JP4404756B2 (ja) * 2004-12-07 2010-01-27 Ｏｋｉセミコンダクタ株式会社 半導体集積回路
US7469354B2 (en) * 2005-04-21 2008-12-23 Infineon Technologies Ag Circuit including a deskew circuit for asymmetrically delaying rising and falling edges
JP2006351108A (ja) * 2005-06-16 2006-12-28 Oki Electric Ind Co Ltd 半導体記憶装置
DE102006004229A1 (de) * 2006-01-30 2007-08-09 Infineon Technologies Ag Integrierte Schaltung zum Empfang von Daten
JP2009043342A (ja) * 2007-08-09 2009-02-26 Panasonic Corp 半導体記憶装置
FR2960720A1 (fr) * 2010-05-25 2011-12-02 St Microelectronics Sa Procede de protection d'un circuit logique contre des radiations externes et dispositif electronique associe.

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS639220A (ja) 1986-06-30 1988-01-14 Nec Corp バツフア回路
US4819251A (en) * 1988-05-06 1989-04-04 Rockwell International Corporation High speed non-return-to-zero digital clock recovery apparatus
JPH0514167A (ja) 1991-06-28 1993-01-22 Kawasaki Steel Corp 出力ドライバ回路
JPH0583111A (ja) 1991-09-24 1993-04-02 Nec Ic Microcomput Syst Ltd Ｃｍｏｓ集積回路
JPH05110550A (ja) 1991-10-16 1993-04-30 Fujitsu Ltd スキユーキヤンセル方式
JPH0786900A (ja) 1993-09-17 1995-03-31 Fujitsu Ltd 半導体装置
JPH07131311A (ja) 1993-10-29 1995-05-19 Ando Electric Co Ltd 同期式遅延回路
JPH08237101A (ja) 1994-09-20 1996-09-13 Kawasaki Steel Corp 信号入力回路
JPH08194664A (ja) 1995-01-19 1996-07-30 Hitachi Ltd データ転送装置
US5712884A (en) * 1995-03-31 1998-01-27 Samsung Electronics Co., Ltd. Data receiving method and circuit of digital communication system
US5636165A (en) 1995-04-14 1997-06-03 Martin Marietta Corporation Apparatus for and method of facilitating proper data transfer between two or more digital memory elements
KR0172798B1 (ko) 1995-06-30 1999-03-30 김주용 모드 적응형 데이타 출력 버퍼
DE19637167C2 (de) 1995-09-15 1999-11-04 Mitsubishi Semiconductor Am Integrierte Schaltung und Verfahren zum Betreiben derselben
TW340262B (en) 1996-08-13 1998-09-11 Fujitsu Ltd Semiconductor device, system consisting of semiconductor devices and digital delay circuit
US5732027A (en) 1996-12-30 1998-03-24 Cypress Semiconductor Corporation Memory having selectable output strength
US6247138B1 (en) * 1997-06-12 2001-06-12 Fujitsu Limited Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system
US5963606A (en) * 1997-06-27 1999-10-05 Sun Microsystems, Inc. Phase error cancellation method and apparatus for high performance data recovery
JP3019814B2 (ja) * 1997-09-18 2000-03-13 日本電気株式会社 クロックリカバリ回路
US6157229A (en) * 1997-09-29 2000-12-05 Matsushita Electric Industrial Co., Ltd. Skew compensation device
JPH11122229A (ja) * 1997-10-17 1999-04-30 Fujitsu Ltd リタイミング回路およびリタイミング方法
JP3908356B2 (ja) * 1997-10-20 2007-04-25 富士通株式会社 半導体集積回路

Also Published As

Publication number Publication date
CN1245339A (zh) 2000-02-23
US6829316B1 (en) 2004-12-07
US20050094426A1 (en) 2005-05-05
US7149267B2 (en) 2006-12-12
EP0953982B1 (de) 2008-08-13
CN1185657C (zh) 2005-01-19
EP0953982A1 (de) 1999-11-03

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP

8364 No opposition during term of opposition