DE69922798D1 - Pufferschaltung - Google Patents

Pufferschaltung

Info

Publication number
DE69922798D1
DE69922798D1 DE69922798T DE69922798T DE69922798D1 DE 69922798 D1 DE69922798 D1 DE 69922798D1 DE 69922798 T DE69922798 T DE 69922798T DE 69922798 T DE69922798 T DE 69922798T DE 69922798 D1 DE69922798 D1 DE 69922798D1
Authority
DE
Germany
Prior art keywords
buffer circuit
buffer
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69922798T
Other languages
English (en)
Other versions
DE69922798T2 (de
Inventor
Fiona Marshall
Steven Collins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qinetiq Ltd
Original Assignee
Qinetiq Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=10829020&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69922798(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Qinetiq Ltd filed Critical Qinetiq Ltd
Publication of DE69922798D1 publication Critical patent/DE69922798D1/de
Application granted granted Critical
Publication of DE69922798T2 publication Critical patent/DE69922798T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
    • H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/57—Control of the dynamic range
    • H04N25/571—Control of the dynamic range involving a non-linear response
    • H04N25/573—Control of the dynamic range involving a non-linear response the logarithmic type
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)
  • Read Only Memory (AREA)
DE69922798T 1998-03-20 1999-03-19 Pufferschaltkreis Expired - Fee Related DE69922798T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB9806094 1998-03-20
GBGB9806094.0A GB9806094D0 (en) 1998-03-20 1998-03-20 Improvements in buffer circuits
PCT/GB1999/000873 WO1999049571A1 (en) 1998-03-20 1999-03-19 Buffer circuit

Publications (2)

Publication Number Publication Date
DE69922798D1 true DE69922798D1 (de) 2005-01-27
DE69922798T2 DE69922798T2 (de) 2005-12-08

Family

ID=10829020

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69922798T Expired - Fee Related DE69922798T2 (de) 1998-03-20 1999-03-19 Pufferschaltkreis

Country Status (8)

Country Link
US (1) US6507519B1 (de)
EP (1) EP1064722B1 (de)
JP (1) JP2003526957A (de)
KR (1) KR20010042082A (de)
CA (1) CA2324567A1 (de)
DE (1) DE69922798T2 (de)
GB (2) GB9806094D0 (de)
WO (1) WO1999049571A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001218113A (ja) * 2000-02-02 2001-08-10 Minolta Co Ltd 固体撮像装置
US7068312B2 (en) * 2000-02-10 2006-06-27 Minolta Co., Ltd. Solid-state image-sensing device
US6600471B2 (en) 2000-07-28 2003-07-29 Smal Camera Technologies, Inc. Precise MOS imager transfer function control for expanded dynamic range imaging
JP3667214B2 (ja) 2000-08-25 2005-07-06 キヤノン株式会社 固体撮像装置およびその駆動方法
US7551024B2 (en) * 2001-03-13 2009-06-23 Marvell World Trade Ltd. Nested transimpedance amplifier
JP4629279B2 (ja) * 2001-08-17 2011-02-09 富士通セミコンダクター株式会社 オフセットキャンセル機能を有するオペアンプ
ITUD20020139A1 (it) * 2002-06-19 2003-12-19 Neuricam Spa Elemento fotosensibile per sensori elettro-ottici
US7245535B2 (en) * 2005-09-21 2007-07-17 Actel Corporation Non-volatile programmable memory cell for programmable logic array
JP5674096B2 (ja) * 2010-07-22 2015-02-25 独立行政法人産業技術総合研究所 光電変換セル及びアレイとその読み出し方法と回路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4829203A (en) * 1988-04-20 1989-05-09 Texas Instruments Incorporated Integrated programmable bit circuit with minimal power requirement
JPH06339082A (ja) * 1993-05-28 1994-12-06 Canon Inc 光電変換装置
US5541402A (en) * 1994-10-17 1996-07-30 At&T Corp. Imaging active pixel device having a non-destructive read-out gate
WO1997021304A1 (en) 1995-12-01 1997-06-12 The Secretary Of State For Defence Imaging system
EP0840452B1 (de) * 1996-10-30 2001-07-18 STMicroelectronics S.r.l. Spannungsvergleicher mit mindestens einem Isolierschicht-MOS-Transistor und damit ausgerüstete Analog-Digital-Wandler
US6141243A (en) * 1996-11-12 2000-10-31 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. Sensor element
US5943268A (en) * 1997-12-31 1999-08-24 Programmable Microelectronics Corporation Non-volatile latch having PMOS floating gate memory cells

Also Published As

Publication number Publication date
JP2003526957A (ja) 2003-09-09
GB9806094D0 (en) 1998-05-20
CA2324567A1 (en) 1999-09-30
WO1999049571A1 (en) 1999-09-30
GB0022755D0 (en) 2000-11-01
DE69922798T2 (de) 2005-12-08
US6507519B1 (en) 2003-01-14
EP1064722B1 (de) 2004-12-22
GB2350506A (en) 2000-11-29
KR20010042082A (ko) 2001-05-25
EP1064722A1 (de) 2001-01-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee