BR9306232A - Fabricaçao de ic de isolamento dielétrico de membrana - Google Patents

Fabricaçao de ic de isolamento dielétrico de membrana

Info

Publication number
BR9306232A
BR9306232A BR9306232A BR9306232A BR9306232A BR 9306232 A BR9306232 A BR 9306232A BR 9306232 A BR9306232 A BR 9306232A BR 9306232 A BR9306232 A BR 9306232A BR 9306232 A BR9306232 A BR 9306232A
Authority
BR
Brazil
Prior art keywords
fabrication
dielectric insulation
membrane dielectric
membrane
insulation
Prior art date
Application number
BR9306232A
Other languages
English (en)
Inventor
Glenn J Leedy
Original Assignee
Glenn J Leedy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Glenn J Leedy filed Critical Glenn J Leedy
Publication of BR9306232A publication Critical patent/BR9306232A/pt

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    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
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    • G03F7/70658—Electrical testing
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    • G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
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Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Bipolar Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Pressure Sensors (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • X-Ray Techniques (AREA)
  • Electron Beam Exposure (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
BR9306232A 1992-04-08 1993-04-02 Fabricaçao de ic de isolamento dielétrico de membrana BR9306232A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/865,412 US5354695A (en) 1992-04-08 1992-04-08 Membrane dielectric isolation IC fabrication
PCT/US1993/003140 WO1993021748A1 (en) 1992-04-08 1993-04-02 Membrane dielectric isolation ic fabrication

Publications (1)

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BR9306232A true BR9306232A (pt) 1998-06-23

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BR9306232A BR9306232A (pt) 1992-04-08 1993-04-02 Fabricaçao de ic de isolamento dielétrico de membrana

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US (26) US5354695A (pt)
EP (2) EP1233444A3 (pt)
JP (5) JPH07508614A (pt)
KR (4) KR100585616B1 (pt)
BR (1) BR9306232A (pt)
WO (1) WO1993021748A1 (pt)

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