CN1622730A - 发光模块 - Google Patents

发光模块 Download PDF

Info

Publication number
CN1622730A
CN1622730A CNA2004101022273A CN200410102227A CN1622730A CN 1622730 A CN1622730 A CN 1622730A CN A2004101022273 A CNA2004101022273 A CN A2004101022273A CN 200410102227 A CN200410102227 A CN 200410102227A CN 1622730 A CN1622730 A CN 1622730A
Authority
CN
China
Prior art keywords
substrate
luminescence component
light emitting
drive circuit
emitting module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2004101022273A
Other languages
English (en)
Inventor
俞文雄
吴明哲
黄希哲
许政义
伍茂仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taylor engineering Co.,Ltd.
Original Assignee
Neostones MicroFabrication Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Neostones MicroFabrication Corp filed Critical Neostones MicroFabrication Corp
Priority to CNA2004101022273A priority Critical patent/CN1622730A/zh
Priority to US11/095,799 priority patent/US20060131757A1/en
Priority to JP2005124248A priority patent/JP2006173556A/ja
Publication of CN1622730A publication Critical patent/CN1622730A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/435Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material
    • B41J2/447Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources
    • B41J2/45Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources using light-emitting diode [LED] or laser arrays
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40Details of LED load circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Led Device Packages (AREA)
  • Electrophotography Configuration And Component (AREA)
  • Led Devices (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

本发明涉及一种发光模块,该模块包含:一基板;一发光组件,以作为光源之用,其中该发光组件的第一表面以黏着材料黏合于该基板之上;一连接器,其第一表面以黏着材料黏合于该基板上;一覆晶式驱动电路芯片,其第一表面上形成有一电路主体与数个导电凸块,该覆晶式驱动电路芯片的第一表面面向该发光组件的第二表面与该连接器的第二表面,使得所述导电凸块可完成与该发光组件及该连接器间的电性连接,进而让该发光组件及该连接器可利用该驱动电路芯片上的该电路主体来完成电性连接;以及数条接线,连接该连接器与该基板,用以完成两者间的电性连接。

Description

发光模块
技术领域
本发明涉及一种发光模块,尤其涉及一种可适用于打印机、复印机或扫描仪的发光模块。
背景技术
图1为公知发光模块的结构示意图。参考图1的所示可清楚看出,公知发光模块主要包含有一个基板111、数个发光组件121、数个驱动电路芯片131、数条接线141以及数条接线161。
公知发光模块主要是以引线接合(wire bonding)的构装技术来完成发光组件(light emitting element)121与驱动电路芯片(driver circuit)131间的电性连接。
图2为公知发光模块的侧面放大示意图。参考图2的所示可知,公知发光模块的基板111以黏着材料151来与发光组件121进行黏合,并以黏着材料152来黏合驱动电路芯片131。其中发光组件121作为发光源之用,常见的发光组件有发光二极管晶粒,而其以黏着材料151来与基板111相黏合。至于驱动电路芯片131则作为驱动发光组件之用,其亦以黏着材料152来与基板111相黏合。而接线141则作为电性连接发光组件121与驱动电路芯片131之用,至于接线161则作为该驱动电路芯片131与基板111的电性连接之用。而上述接线可用金线来完成。
就引线接合的构装技术水准而言,目前成熟稳定的引线接线垫(bond pad)间距(pitch)可设计为100微米,但欲在发光组件121与驱动电路芯片131间制造出更高密度的输入/输出(I/O)接点,使得引线接线垫间距要更加缩小时,引线接合技术便不是一个稳定可行的制程。
此外,以A4尺寸的雷射印表头(A4 size LED printer head)产品为例,若欲达到600dpi的分辨率要求,以发光二极管晶粒所完成的发光组件121与驱动电路芯片131间将形成约5000点的输入/输出(I/O)接点,因此接线141的数量将高达五千条,需进行约5000次的引线接合制程,耗时约15分钟,如此将会造成庞大的成本负担。而如何改善此一常用手段的缺陷,成为发展本发明的主要目的。
发明内容
随着数字影像存取技术的提升以及高密度全彩打印及显示的需求,快速低成本的制造技术方能满足全方位消费性电子产品的时代。故,本发明的主要技术手段为使用覆晶接合的构装技术,在基板上黏合发光组件与驱动电路芯片,以快速形成一高构装密度的发光模块。本发明的应用范围广泛,可适用于打印机、复印机、扫描仪等光电装置。
为实现上述目的,本发明提供一种发光模块,该模块包含:一基板;一发光组件,以作为光源之用,其中该发光组件的第一表面以黏着材料黏合于该基板之上;一驱动电路芯片,其第一表面以黏着材料黏合于该基板上;一覆晶式连接器,其第一表面上形成有数个导电凸块与导电线路,该覆晶式连接器的第一表面面向该发光组件的第二表面与该驱动电路芯片的第二表面,使得所述导电凸块可完成与该发光组件及该驱动电路芯片间的电性连接,进而让该发光组件及该驱动电路芯片可利用所述导电线路来完成电性连接;以及数条接线,连接该驱动电路芯片与该基板,用以完成两者间的电性连接。
根据上述构想,本发明所述的发光模块,其中该基板由印刷电路板、陶瓷基板等可于其表面上制作电路的基板所制成。
根据上述构想,本发明所述的发光模块,其中该发光组件可为发光二极管、液晶显示器组件或雷射光源,而该发光模块可适用于打印机、复印机或扫描仪。
根据上述构想,本发明所述的发光模块,其中该发光组件的第二表面与该驱动电路芯片的第二表面上各具有数个接线垫,用以和该覆晶式连接器上的所述导电凸块完成电性连接。
根据上述构想,本发明所述的发光模块,其中该覆晶式连接器由一电路基板所完成,其上形成有以所述导电凸块与导电线路。
本发明的另一方面提供一种发光模块,该模块包含:一基板;一发光组件,以作为光源之用,其中该发光组件的第一表面以黏着材料黏合于该基板之上;一连接器,其第一表面以黏着材料黏合于该基板上;一覆晶式驱动电路芯片,其第一表面上形成有一电路主体与数个导电凸块,该覆晶式驱动电路芯片的第一表面面向该发光组件的第二表面与该连接器的第二表面,使得所述导电凸块可完成与该发光组件及该连接器间的电性连接,进而让该发光组件及该连接器可利用该驱动电路芯片上的该电路主体来完成电性连接;以及数条接线,连接该连接器与该基板,用以完成两者间的电性连接。
根据上述构想,本发明所述的发光模块,其中该基板由印刷电路板、陶瓷基板等可于其表面上制作电路的基板所制成。
根据上述构想,本发明所述的发光模块,其中该发光组件可为发光二极管、液晶显示器组件或雷射光源,而该发光模块可适用于打印机、复印机或扫描仪。
根据上述构想,本发明所述的发光模块,其中该发光组件的第二表面与该连接器的第二表面上各具有数个接线垫,用以和该驱动电路芯片上的所述导电凸块完成电性连接。
根据上述构想,本发明所述的发光模块,其中该连接器由一电路基板为主体,该电路基板上形成有所述接线垫。
本发明的主要特点为使用以覆晶接合的构装技术制造一发光模块。此发光模块有以下两种主要设计架构:(一)包含一基板,在基板上形成数个发光组件与数个驱动电路芯片,发光组件与驱动电路芯片的第一表面与基板相连接,发光组件与驱动电路芯片的第二表面则与覆晶式连接器电性连接;(二)包含一基板,在基板上形成数个发光组件与数个驱动电路芯片,发光组件与连接器的第一表面与基板相连接,发光组件与连接器的第二表面则与覆晶式驱动电路芯片电性连接。
兹配合下列附图和实施方式的说明,将更加清楚地描述本发明。
附图说明
图1为公知发光模块的结构示意图。
图2为公知发光模块的剖面放大示意图。
图3为本发明架构(一)的发光模块的结构示意图。
图4为根据本发明架构(一)的剖面放大示意图。
图5(a)为本发明架构(一)的以覆盖式连接器电性接合发光组件与驱动电路芯片的说明图一。
图5(b)则为图5(a)的覆盖式连接器局部放大图。
图6(a)为本发明架构(一)的以覆盖式连接器电性接合发光组件与驱动电路芯片的说明图二。
图6(b)则为图6(a)的覆盖式连接器局部放大图。
图7为本发明架构(二)的发光模块的结构示意图。
图8为根据本发明架构(二)的剖面放大示意图。
图9(a)为本发明架构(二)以驱动电路芯片电性接合发光组件与连接器的说明图一。
图9(b)则为图9(a)的驱动电路芯片局部放大图。
图10为本发明架构(二)以驱动电路芯片电性接合发光组件与连接器的说明图二。
具体实施方式
图3为本发明的发光模块架构(一)的较佳实施例结构示意图。参考图3的所示可清楚看出,本较佳实施例的发光模块主要包含一个基板311、数个发光组件321、数个驱动电路芯片331、数个覆晶式连接器341以及数条接线361。
图4为根据图3的剖面放大示意图。参考图4的所示可清楚看出,本较佳实施例分别以黏着材料351、352黏合发光组件的第一表面322与驱动电路芯片的第一表面332于基板311上。发光组件321作为发光源之用,其利用黏着材料351黏合于基板311之上,该发光组件321可为发光二极管、液晶显示器组件、以及雷射光源中的任意一种;驱动电路芯片331作为驱动发光组件321之用,其利用黏着材料352黏合于基板311上。
本发明以覆晶式连接器341电性连接发光组件321的第二表面323与驱动电路芯片331的第二表面333,该覆晶式连接器341以数个导电凸块342电性连接发光组件321与驱动电路芯片331,该覆晶式连接器的导电凸块342由导电材料所制成;并以数条接线361电性连接驱动电路芯片331与基板311。
图5(a)和图5(b)为本发明的以覆晶式连接器电性接合发光组件与驱动电路芯片的第一说明示意图。请先参考图5(a),该图为覆晶式连接器341和发光组件321与驱动电路芯片331作电性连接前的分解示意图,发光组件321上具有接线垫521,而驱动电路芯片331另外具有接线垫531。再请参考图5(b),图5(b)为图5(a)中覆晶式连接器的局部放大示意图,此图中示出覆晶式连接器341的主体3411上设置有导电凸块342与线路511,而此该覆晶式连接器可由一电路基板所完成,其上形成的导电凸块342与线路511除了可用光罩光刻蚀刻等制程来完成之外,也可用印刷或是喷墨等已知的电路基板制程来完成。
图6(a)和图6(b)为本发明的以覆晶式连接器电性接合发光组件与驱动电路芯片的第二说明示意图。首先请参考图6(a),该图为覆晶式连接器341和发光组件321与驱动电路芯片331作电性连接后的组装示意图。图6(b)则为图6(a)中覆晶式连接器的局部放大示意图。参考图6(b)的所示可清楚看出,在此图中的覆晶式连接器341已被翻转,使该覆晶式连接器341上的导电凸块342可和发光组件321的接线垫521与驱动电路芯片331的接线垫531作电性连接。
再请参见图7,其为本发明的发光模块架构(二)的较佳实施例结构示意图。参考图7的所示可清楚看出,本较佳实施例的发光模块主要包含一个基板311、数个发光组件321、数个覆晶式驱动电路芯片731、数个连接器700以及数条接线361。
而图8为根据图7的剖面放大示意图。参考图8的所示可清楚看出,本较佳实施例分别以黏着材料351、352黏合发光组件的第一表面322与连接器700的第一表面732于基板311上。发光组件321作为发光源之用,其利用黏着材料351黏合于基板311之上,该发光组件321可为发光二极管、液晶显示器组件、以及雷射光源中的任意一种;覆晶式驱动电路芯片731上的电路主体730作为驱动发光组件321之用,而连接器700则利用黏着材料352黏合于基板311上。
本发明以覆晶式驱动电路芯片731电性连接发光组件321的第二表面323与连接器700的第二表面733,该覆晶式驱动电路芯片731以数个导电凸块742电性连接发光组件321与连接器700,该驱动电路芯片731上的导电凸块742由导电材料所制成;并以数条接线361电性连接该连接器700与基板311。
图9(a)和图9(b)为本发明的以覆晶式驱动电路芯片731电性接合发光组件321与连接器700的第一说明示意图。请先参考图9(a),该图为覆晶式驱动电路芯片731和发光组件321与连接器700作电性连接前的分解示意图,发光组件321上具有接线垫521,而连接器700上另外具有多个接线垫931与接线垫541。再请参考图9(b),图9(b)为图9(a)中覆晶式驱动电路芯片731的局部放大示意图,此图中示出覆晶式驱动电路芯片731上设置有导电凸块942。而此覆晶式驱动电路芯片731上的导电凸块942与941可与驱动电路芯片731上其它电路一样,可用光罩光刻蚀刻等制程来完成,或是用印刷、喷墨等已知的电路基板制程来完成。
图10为本发明的以覆晶式驱动电路芯片731电性接合发光组件与驱动电路芯片的第二说明示意图,该图为连接器700和发光组件321与覆晶式驱动电路芯片731作电性连接后的组装示意图,在此图中的覆晶式驱动电路芯片731已被翻转,使该覆晶式驱动电路芯片731上的导电凸块942与941可分别和发光组件321的接线垫521与连接器700的接线垫931作电性连接。
而本发明的覆晶接合(flip chip connection)构装技术相较于传统常用引线接合技术,有下列优点:
(1)缩短构装作业时间:覆晶芯片放置时间仅需3~5秒,以A4尺寸的雷射印表头(A4 size LED printer head)产品为例,约两分钟即可完成相同目的约15分钟5000次的引线接合制程,效率为引线接合方式的7.5倍。
(2)高分辨率产品的实现:利用覆晶可以制作出50微米以下的接合间距,可达到高分辨率光学设计需求。
(3)缩小发光组件尺寸降低成本:传统引线方式的接线垫(bond pad)面积占发光组件绝大部分面积,采覆晶接合可缩小接线垫(bond pad)尺寸,进而缩小发光组件尺寸30%以上,大幅节省发光组件材料成本。
由上述可知,本发明架构(一)利用覆晶接合的构装技术,以覆晶式连接器电性连接发光组件与驱动电路芯片,取代了繁杂且为数众多的引线接合制程,除缩短作业时间与高分辨率性能的实现外,该覆晶式连接器不会因所需连接的发光组件的数目(pixel)增多而使得制造成本增加,相对的引线接合成本与引线数目成正比。以A4 size LED printer head产品为例,当分辨率从600dpi增加至1200dpi时,引线数目将从约5000条增加至约10000条,除材料成本倍增外,构装难度升高后造成不良率的增加更是难以估计,而采覆晶式连接器则无此问题。
本发明架构(二)利用覆晶接合的构装技术,以覆晶式驱动电路芯片电性连接发光组件与连接器,除了具备上述架构(一)的优点外,原先架构(一)的驱动电路芯片改成架构(二)覆晶式驱动电路芯片,可进一步缩小驱动电路芯片的面积,降低驱动电路芯片材料成本。因此,本发明极具产业上的利用价值。
以上所述,仅为本发明的较佳实施方式而已,不能以此限定本发明实施的范围。即凡依本发明专利保护范围所做的均等变化与修饰,皆应仍属本发明专利涵盖的范围内。

Claims (10)

1.一种发光模块,该模块包含:
一基板;
一发光组件,以作为光源之用,其中该发光组件的第一表面以黏着材料黏合于该基板之上;
一驱动电路芯片,其第一表面以黏着材料黏合于该基板上;
一覆晶式连接器,其第一表面上形成有数个导电凸块与导电线路,该覆晶式连接器的第一表面面向该发光组件的第二表面与该驱动电路芯片的第二表面,使得所述导电凸块完成与该发光组件及该驱动电路芯片间的电性连接,进而该发光组件及该驱动电路芯片利用所述导电线路来完成电性连接;
以及
数条接线,连接该驱动电路芯片与该基板,完成两者间的电性连接。
2.根据权利要求1所述的发光模块,其中该基板由印刷电路板、陶瓷基板等可于其表面上制作电路的基板所制成。
3.根据权利要求1所述的发光模块,其中该发光组件为发光二极管、液晶显示器组件或雷射光源,而该发光模块可适用于打印机、复印机或扫描仪。
4.根据权利要求1所述的发光模块,其中该发光组件的第二表面与该驱动电路芯片的第二表面上各具有数个接线垫,和该覆晶式连接器上的所述导电凸块完成电性连接。
5.根据权利要求1所述的发光模块,其中该覆晶式连接器由一电路基板所完成,其上形成有以所述导电凸块与导电线路。
6.一种发光模块,该模块包含:
一基板;
一发光组件,以作为光源之用,其中该发光组件的第一表面以黏着材料黏合于该基板之上;
一连接器,其第一表面以黏着材料黏合于该基板上;
一覆晶式驱动电路芯片,其第一表面上形成有一电路主体与数个导电凸块,该覆晶式驱动电路芯片的第一表面面向该发光组件的第二表面与该连接器的第二表面,使得所述导电凸块完成与该发光组件及该连接器间的电性连接,进而该发光组件及该连接器利用该驱动电路芯片上的该电路主体来完成电性连接;以及数条接线,连接该连接器与该基板,完成两者间的电性连接。
7.根据权利要求6所述的发光模块,其中该基板由印刷电路板、陶瓷基板等可于其表面上制作电路的基板所制成。
8.根据权利要求6所述的发光模块,其中该发光组件为发光二极管、液晶显示器组件或雷射光源,而该发光模块可适用于打印机、复印机或扫描仪。
9.根据权利要求6所述的发光模块,其中该发光组件的第二表面与该连接器的第二表面上各具有数个接线垫,和该覆晶式驱动电路芯片上的所述导电凸块完成电性连接。
10.根据权利要求6所述的发光模块,其中该连接器由一电路基板为主体,该电路基板上形成有所述接线垫。
CNA2004101022273A 2004-12-16 2004-12-16 发光模块 Pending CN1622730A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CNA2004101022273A CN1622730A (zh) 2004-12-16 2004-12-16 发光模块
US11/095,799 US20060131757A1 (en) 2004-12-16 2005-03-31 Light emitting module
JP2005124248A JP2006173556A (ja) 2004-12-16 2005-04-21 発光モジュール

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA2004101022273A CN1622730A (zh) 2004-12-16 2004-12-16 发光模块

Publications (1)

Publication Number Publication Date
CN1622730A true CN1622730A (zh) 2005-06-01

Family

ID=34766803

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2004101022273A Pending CN1622730A (zh) 2004-12-16 2004-12-16 发光模块

Country Status (3)

Country Link
US (1) US20060131757A1 (zh)
JP (1) JP2006173556A (zh)
CN (1) CN1622730A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113757579A (zh) * 2020-06-05 2021-12-07 致伸科技股份有限公司 光源模块及其电子计算机

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9243794B2 (en) 2006-09-30 2016-01-26 Cree, Inc. LED light fixture with fluid flow to and from the heat sink
US7686469B2 (en) 2006-09-30 2010-03-30 Ruud Lighting, Inc. LED lighting fixture
US9028087B2 (en) 2006-09-30 2015-05-12 Cree, Inc. LED light fixture
US7952262B2 (en) * 2006-09-30 2011-05-31 Ruud Lighting, Inc. Modular LED unit incorporating interconnected heat sinks configured to mount and hold adjacent LED modules
US20090086491A1 (en) 2007-09-28 2009-04-02 Ruud Lighting, Inc. Aerodynamic LED Floodlight Fixture
US20080185597A1 (en) * 2007-02-06 2008-08-07 Universal Scientific Industrial Co., Ltd. Light-emitting module
DE102009033915B4 (de) * 2009-07-20 2022-05-25 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung eines Leuchtmittels und Leuchtmittel
US8273588B2 (en) * 2009-07-20 2012-09-25 Osram Opto Semiconductros Gmbh Method for producing a luminous device and luminous device
JP6277851B2 (ja) * 2014-05-08 2018-02-14 富士通株式会社 光モジュール
CN104465956A (zh) * 2014-12-31 2015-03-25 深圳市晶台股份有限公司 一种一体化led的封装结构
JP7205490B2 (ja) * 2017-12-13 2023-01-17 ソニーグループ株式会社 発光モジュールの製造方法
CN116665551A (zh) * 2020-02-14 2023-08-29 群创光电股份有限公司 电子装置
US11984701B2 (en) * 2021-08-23 2024-05-14 Xerox Corporation System for electronically controlling and driving independently addressable semiconductor lasers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4929965A (en) * 1987-09-02 1990-05-29 Alps Electric Co. Optical writing head
US5354695A (en) * 1992-04-08 1994-10-11 Leedy Glenn J Membrane dielectric isolation IC fabrication
US5790384A (en) * 1997-06-26 1998-08-04 International Business Machines Corporation Bare die multiple dies for direct attach
US5923955A (en) * 1998-05-28 1999-07-13 Xerox Corporation Fine flip chip interconnection
US6219254B1 (en) * 1999-04-05 2001-04-17 Trw Inc. Chip-to-board connection assembly and method therefor
JP4601892B2 (ja) * 2002-07-04 2010-12-22 ラムバス・インコーポレーテッド 半導体装置および半導体チップのバンプ製造方法
TW565920B (en) * 2002-10-14 2003-12-11 Opto Tech Corp Light emitting element array module and printer head and micro-display using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113757579A (zh) * 2020-06-05 2021-12-07 致伸科技股份有限公司 光源模块及其电子计算机

Also Published As

Publication number Publication date
JP2006173556A (ja) 2006-06-29
US20060131757A1 (en) 2006-06-22

Similar Documents

Publication Publication Date Title
CN1622730A (zh) 发光模块
US8388177B2 (en) Light emitting module
CN1344036A (zh) 片式发光二极管及其制造方法
CN1171295C (zh) 一体型电子部件的组装方法以及一体型电子部件
CN101075609A (zh) 发光二极管芯片的封装结构及其方法
US20100219745A1 (en) Light-emitting module, and display unit and lighting unit using the same
CN1674316A (zh) 半导体发光器件
CN1855481A (zh) 透明led显示器及其制造方法
CN1880836A (zh) 具有发光二极管的背光单元及其制造方法
CN1892322A (zh) 显示基板、显示装置、及其方法
CN1298082C (zh) 图像传感器模块
CN1601768A (zh) 一种发光二极管结构
CN1885577A (zh) 表面粘着装置型的发光二极管封装组件与制造方法
KR20180114439A (ko) 반도체 발광 소자를 이용한 디스플레이 장치
CN1510766A (zh) 表面安装型白色发光二极管
US7712943B2 (en) Backlight module with light source substrate blocks
US9978726B2 (en) Display device using semiconductor light emitting device and method for manufacturing the same
CN1521863A (zh) 发光二极管的封装装置
CN1204523C (zh) 使用多层电极的指纹识别传感组件及其制造方法
CN101042498A (zh) 不具有印刷电路板的led背光单元及其制造方法
CN1819254A (zh) 发光二极管芯片
CN1521841A (zh) 半导体器件
CN1266780C (zh) 具有压敏电阻层的发光器件
CN1495894A (zh) 光耦合半导体器件及其制造方法
CN1154570C (zh) 热打印头和热打印头装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: TAYLOR ENGINEERING CO., LTD.

Free format text: FORMER OWNER: XINLEI MICRO MFG. CO., LTD.

Effective date: 20080725

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20080725

Address after: Virgin Islands (British)

Applicant after: Taylor engineering Co.,Ltd.

Address before: Hsinchu, Taiwan Province

Applicant before: NeoStones MicroFabrication Corp.

C12 Rejection of a patent application after its publication
RJ01 Rejection of invention patent application after publication

Open date: 20050601