JP5564212B2 - 半導体装置の作製方法、及び半導体装置 - Google Patents
半導体装置の作製方法、及び半導体装置 Download PDFInfo
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- JP5564212B2 JP5564212B2 JP2009182980A JP2009182980A JP5564212B2 JP 5564212 B2 JP5564212 B2 JP 5564212B2 JP 2009182980 A JP2009182980 A JP 2009182980A JP 2009182980 A JP2009182980 A JP 2009182980A JP 5564212 B2 JP5564212 B2 JP 5564212B2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
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Description
本実施の形態では、In、Ga、及びZnを含む酸化物半導体層を用い、半導体層とソース電極層及びドレイン電極層との間にバッファ層を設け、チャネル保護層を設けた逆スタガ型(ボトムゲート構造)の薄膜トランジスタの作製工程について、図1及び図2を用いて説明する。
本実施の形態では、上記実施の形態1とは別の構造のバッファ層に有するIGZO半導体層を用いた逆スタガ型(ボトムゲート構造)薄膜トランジスタの作製工程について、図3及び図4を用いて説明する。また、本実施の形態において、実施の形態1と同じものについては同じ符号を用い、詳細な説明を省略する。
本実施の形態では、複数のチャネル形成領域を接続した構造を有するIGZO半導体層を用いた薄膜トランジスタの作製方法について、図5を用いて説明する。
ここでは、少なくともゲート絶縁膜と酸化物半導体層の積層を大気に触れることなく、連続成膜を行う逆スタガ型の薄膜トランジスタの作製例を以下に示す。ここでは、連続成膜を行う工程までの工程を示し、その後の工程は、実施の形態1乃至3のいずれか一に従って薄膜トランジスタを作製すればよい。
また、成膜方法として、成膜中にターゲット物質とスパッタガス成分とを化学反応させてそれらの化合物薄膜を形成するリアクティブスパッタ法や、成膜中に基板にも電圧をかけるバイアススパッタ法もある。
本実施の形態では、同一基板上に少なくとも駆動回路の一部と、画素部に配置する薄膜トランジスタを作製する例について以下に説明する。
本発明の一態様を適用した薄膜トランジスタを作製し、該薄膜トランジスタを画素部、さらには駆動回路に用いて表示機能を有する半導体装置(表示装置ともいう)を作製することができる。また、本発明の一態様を適用した薄膜トランジスタを用いた駆動回路の一部または全体を、画素部と同じ基板上に一体形成し、システムオンパネルを形成することができる。
本実施の形態では、本発明の一態様を適用した半導体装置として電子ペーパーの例を示す。
本実施の形態では、本発明の一態様を適用した半導体装置として発光表示装置の例を示す。表示装置の有する表示素子としては、ここではエレクトロルミネッセンスを利用する発光素子を用いて示す。エレクトロルミネッセンスを利用する発光素子は、発光材料が有機化合物であるか、無機化合物であるかによって区別され、一般的に、前者は有機EL素子、後者は無機EL素子と呼ばれている。
次に、本発明の一態様を適用した半導体装置を搭載した表示パネルの構成について、以下に示す。本実施の形態では、表示素子として液晶素子を有する液晶表示装置の一形態である液晶表示パネル(液晶パネルともいう)、表示素子として発光素子を有する半導体装置の一形態である発光表示パネル(発光パネルともいう)について説明する。
本発明に係る半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、電子ペーパー、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機などが挙げられる。特に、実施の形態6〜実施の形態9で示したように、本発明に係る薄膜トランジスタを液晶表示装置、発光装置、電気泳動方式表示装置などに適用することにより、電子機器の表示部に用いることができる。以下に具体的に例示する。
81 搬送ロボット
82 カセット室
83 ゲートバルブ
84 ゲートバルブ
85 ゲートバルブ
86 ゲートバルブ
87 ゲートバルブ
88 ゲートバルブ
89 処理室
90 処理室
91 処理室
92 処理室
93 処理室
94 基板
100 基板
102a ゲート絶縁膜
102b ゲート絶縁膜
103 半導体膜
104 膜
105 導電膜
106 絶縁膜
111 ゲート電極層
111a ゲート電極層
113 半導体層
114a バッファ層
114c 層
115a ドレイン電極層
115c 導電層
116 チャネル保護層
116a チャネル保護層
117 レジストマスク
118 レジストマスク
200 基板
201 薄膜トランジスタ
202 ソース配線層
203 ゲート配線層
204 容量配線層
211 絶縁層
212 絶縁層
213 絶縁層
255 電極層
260 液晶表示素子
261 絶縁層
262 液晶層
263 絶縁層
264 着色層
265 電極層
266 基板
267 偏光板
268 偏光板
301 薄膜トランジスタ
302 薄膜トランジスタ
303 発光素子
304 容量素子
305 ソース配線層
306 ゲート配線層
307 電源線
311 絶縁層
312 絶縁層
313 絶縁層
320 電極層
321 隔壁
322 電界発光層
323 電極層
324 発光素子
581 薄膜トランジスタ
585 絶縁層
587 電極層
587a 電極層
588 電極層
589 球形粒子
590a 黒色領域
590b 白色領域
594 キャビティ
595 充填材
1000 携帯電話機
1001 筐体
1002 表示部
1003 操作ボタン
1004 外部接続ポート
1005 スピーカ
1006 マイク
1601 ポスター
1602 車内広告
2100 デジタルプレーヤー
2130 本体
2131 表示部
2132 メモリ部
2133 操作部
2134 イヤホン
2137 制御部
2600 TFT基板
2601 対向基板
2602 シール材
2603 画素部
2604 表示素子
2605 着色層
2606 偏光板
2607 偏光板
2608 配線回路部
2609 フレキシブル配線基板
2610 冷陰極管
2611 反射板
2612 回路基板
2613 拡散板
2700 電子書籍
2701 筐体
2703 筐体
2705 表示部
2707 表示部
2711 軸部
2721 電源
2723 操作キー
2725 スピーカ
4001 基板
4002 画素部
4003 信号線駆動回路
4004 走査線駆動回路
4005 シール材
4006 基板
4008 液晶層
4010 薄膜トランジスタ
4011 薄膜トランジスタ
4013 液晶素子
4015 接続端子
4016 配線
4018 FPC
4019 異方性導電膜
4030 画素電極層
4031 対向電極層
4032 絶縁層
4501 基板
4502 画素部
4503a 信号線駆動回路
4504a 走査線駆動回路
4505 シール材
4506 基板
4507 充填材
4509 薄膜トランジスタ
4510 薄膜トランジスタ
4511 発光素子
4515 接続端子
4516 配線
4517 電極層
4518a FPC
4519 異方性導電膜
5300 基板
5301 画素部
5302 走査線駆動回路
5303 信号線駆動回路
5400 基板
5401 画素部
5402 走査線駆動回路
5403 信号線駆動回路
5404 走査線駆動回路
5501 配線
5502 配線
5503 配線
5504 配線
5505 配線
5506 配線
5543 ノード
5544 ノード
5571 薄膜トランジスタ
5572 薄膜トランジスタ
5573 薄膜トランジスタ
5574 薄膜トランジスタ
5575 薄膜トランジスタ
5576 薄膜トランジスタ
5577 薄膜トランジスタ
5578 薄膜トランジスタ
5601 ドライバIC
5602 スイッチ群
5603a 薄膜トランジスタ
5603b 薄膜トランジスタ
5603c 薄膜トランジスタ
5611 配線
5612 配線
5613 配線
5621 配線
5703a タイミング
5703b タイミング
5703c タイミング
5711 配線
5712 配線
5713 配線
5714 配線
5715 配線
5716 配線
5717 配線
5721 信号
5803a タイミング
5803b タイミング
5803c タイミング
5821 信号
7001 駆動用TFT
7002 発光素子
7003 陰極
7004 発光層
7005 陽極
7011 駆動用TFT
7012 発光素子
7013 陰極
7014 発光層
7015 陽極
7016 遮蔽膜
7017 導電膜
7021 駆動用TFT
7022 発光素子
7023 陰極
7024 発光層
7025 陽極
7027 導電膜
9600 テレビジョン装置
9601 筐体
9603 表示部
9605 スタンド
9607 表示部
9609 操作キー
9610 リモコン操作機
9700 デジタルフォトフレーム
9701 筐体
9703 表示部
Claims (5)
- 基板上に、ゲート電極層を形成し、
前記ゲート電極層上に、ゲート絶縁膜を形成し、
前記ゲート絶縁膜上に、インジウム、ガリウム、及び亜鉛を含む酸化物半導体膜を形成し、
前記酸化物半導体膜のチャネル形成領域上に、絶縁膜を形成し、
前記酸化物半導体膜上の、チタンを含む酸化物を介して、導電膜を形成し、
前記導電膜上に、レジストマスクを形成し、
前記レジストマスクを用いて、前記導電膜と、前記チタンを含む酸化物と、前記酸化物半導体膜とをエッチングして、前記導電膜を、前記チタンを含む酸化物より後退させ、
前記酸化物半導体膜を加熱することを特徴とする半導体装置の作製方法。 - 基板上に、ゲート電極層を形成し、
前記ゲート電極層上に、ゲート絶縁膜を形成し、
前記ゲート絶縁膜上に、インジウム、ガリウム、及び亜鉛を含み、
前記亜鉛の組成比が、前記インジウムの組成比よりも小さく、
かつ前記亜鉛の組成比が、前記ガリウムの組成比よりも小さい、酸化物半導体膜を形成し、
前記酸化物半導体膜のチャネル形成領域上に、絶縁膜を形成し、
前記酸化物半導体膜上の、チタンを含む酸化物を介して、導電膜を形成し、
前記導電膜上に、レジストマスクを形成し、
前記レジストマスクを用いて、前記導電膜と、前記チタンを含む酸化物と、前記酸化物半導体膜とをエッチングして、前記導電膜を、前記チタンを含む酸化物より後退させ、
前記酸化物半導体膜を加熱することを特徴とする半導体装置の作製方法。 - 請求項1又は請求項2において、
前記基板を無バイアス状態として、前記酸化物半導体膜に、プラズマ処理を行うことを特徴とする半導体装置の作製方法。 - ゲート電極層と、
前記ゲート電極層上の、ゲート絶縁膜と、
前記ゲート絶縁膜上の、インジウム、ガリウム、及び亜鉛を含む酸化物半導体膜と、
前記酸化物半導体膜のチャネル形成領域上の、絶縁膜と、
前記酸化物半導体膜上の、第1の導電膜と、
前記酸化物半導体膜上の、第2の導電膜と、
前記酸化物半導体膜と、前記第1の導電膜との間の、第1のチタンを含む酸化物と、
前記酸化物半導体膜と、前記第2の導電膜との間の、第2のチタンを含む酸化物と、を有し、
前記第1のチタンを含む酸化物は、前記第1の導電膜の下端部より、延在した下端部を有し、
前記第2のチタンを含む酸化物は、前記第2の導電膜の下端部より、延在した下端部を有することを特徴とする半導体装置。 - ゲート電極層と、
前記ゲート電極層上の、ゲート絶縁膜と、
前記ゲート絶縁膜上の、インジウム、ガリウム、及び亜鉛を含む酸化物半導体膜と、
前記酸化物半導体膜のチャネル形成領域上の、絶縁膜と、
前記酸化物半導体膜上の、第1の導電膜と、
前記酸化物半導体膜上の、第2の導電膜と、
前記酸化物半導体膜と、前記第1の導電膜との間の、第1のチタンを含む酸化物と、
前記酸化物半導体膜と、前記第2の導電膜との間の、第2のチタンを含む酸化物と、を有し、
前記第1のチタンを含む酸化物は、前記第1導電膜の下端部より、延在した下端部を有し、
前記第2のチタンを含む酸化物は、前記第2導電膜の下端部より、延在した下端部を有し、
前記酸化物半導体膜において、
前記亜鉛の組成比は、前記インジウムの組成比よりも小さく、
かつ前記亜鉛の組成比は、前記ガリウムの組成比よりも小さいことを特徴とする半導体装置。
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