CN103762178A - 一种低温多晶硅薄膜晶体管及其制造方法 - Google Patents

一种低温多晶硅薄膜晶体管及其制造方法 Download PDF

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CN103762178A
CN103762178A CN201310727131.5A CN201310727131A CN103762178A CN 103762178 A CN103762178 A CN 103762178A CN 201310727131 A CN201310727131 A CN 201310727131A CN 103762178 A CN103762178 A CN 103762178A
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dielectric layer
layer
thickness
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徐向阳
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201310727131.5A priority Critical patent/CN103762178A/zh
Priority to KR1020167019150A priority patent/KR101872629B1/ko
Priority to US14/241,764 priority patent/US9257290B2/en
Priority to GB1610213.9A priority patent/GB2535404B/en
Priority to RU2016124649A priority patent/RU2634087C1/ru
Priority to PCT/CN2014/071266 priority patent/WO2015096264A1/zh
Priority to JP2016542976A priority patent/JP2017508275A/ja
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Abstract

本发明公开了一种低温多晶硅薄膜晶体管及其制造方法，该低温多晶硅薄膜晶体管至少包括一栅极绝缘层，所述栅极绝缘层为复合绝缘层，该复合绝缘层包括至少三层介电层，其中，各层介电层的致密性按照制造过程中形成的顺序依次增大。在本发明中，考虑了复合绝缘层中每一层的致密性关系，因此根据本发明的制造方法得到的低温多晶硅薄膜晶体管的复合绝缘层能够增强各层表面接触特性和薄膜连续性。进一步又考虑了复合绝缘层中每一层的厚度，因此得到的低温多晶硅薄膜晶体管能够有效地降低寄生电容，进而增强晶体管的响应速率。

Description

一种低温多晶硅薄膜晶体管及其制造方法
技术领域
本发明是关于低温多晶硅薄膜晶体管的制作工艺领域，尤其涉及一种可提供电气特性以及可靠度的低温多晶硅薄膜晶体管及其制造方法。
背景技术
在现今的平板显示器技术中，液晶显示器(Liquid Crystal Display，LCD)可以说是其中最为成熟的技术，例如，日常生活中常见的手机、数码相机、摄影机、笔记本电脑以至于监视器均是利用此项技术所制造的商品。
然而，随着人们对于显示器视觉要求提高，加上新技术应用领域不断扩展，更高像质、高清晰度、高亮度且具有低价位的平面显示器已成为未来显示技术发展的趋势，也是新的显示技术发展的原动力。而平面显示器中的低温多晶硅(Low TemperaturePoly-silicon，LTPS)薄膜晶体管除了具有符合有源驱动潮流的特性外，其技术也正是一个可以达到上述目标的重要技术突破。
传统的LTPS TFT如图1所示，包括玻璃基板101、置于玻璃基板101的缓冲层102，在该缓冲层102上形成多晶硅，其上包含有设置在源极区域103的源极电极和设置在漏极区域104的漏极电极以及设置在通道区域111上的栅极绝缘层GI。在该GI层上形成有栅极电极108和钝化层109。GI层通常采用两层复合结构：介电层105和介电层107，一般为SiO2和SiNx。
但是，由SiNx与SiO2组成的栅极绝缘层具有表面接触特性与薄膜连续性不好，而且在GI形成通孔（VIA hole）时，容易产生二段角（undercut），即SiO2比SiNx的刻蚀速度大造成SiO2孔大于SiNx，导致接触性不好。
因此，如何解决上述问题，以提供一种低温多晶硅薄膜晶体管的制造方法，使得所制造的晶体管具有较强的接触连续性、有效降低寄生电容，进而增强晶体管的响应速率，乃业界所致力的课题之一。
发明内容
本发明所要解决的技术问题之一是需要提供一种低温多晶硅薄膜晶体管的制造方法，使得制造得到的晶体管具有较强的接触连续性，能够有效降低寄生电容，进而增强晶体管的响应速率。另外，还提供了一种低温多晶硅薄膜晶体管。
1）为了解决上述技术问题，本发明提供了一种低温多晶硅薄膜晶体管的制造方法，包括：提供一绝缘基板；在所述绝缘基板的缓冲层上形成至少一多晶硅层，该多晶硅层的表面包含有所属低温多晶硅薄膜晶体管的一源极区域、一漏极区域以及一通道区域；依次进行至少三次PECVD工序以在所述通道区域上依序形成至少三层介电层，进而构成一复合栅极绝缘层，其中，各层介电层的致密性按照制造过程中形成的顺序依次增大；以及在该复合栅极绝缘层之上形成一栅极电极。
2）在本发明的第1）项的一个优选实施方式中，所述复合栅极绝缘层由一第一介电层、一第二介电层和一第三介电层组成，且第一介电层为SiO2，第二介电层为SiON，第三介电层为SiNx。
3）在本发明的第1）项或第2）项中的一个优选实施方式中，所述第一介电层的膜厚均大于所述第二介电层和所述第三介电层的膜厚。
4）在本发明的第1）项-第3）项中任一项的一个优选实施方式中，所述第一介电层SiO2膜厚的范围为1000～1500埃，所述第二介电层SiON膜厚的范围为100～1000埃，所述第三介电层SiNx膜厚的范围为100～500埃。
5）在本发明的第1）项-第4）项中任一项的一个优选实施方式中，形成所述多晶硅层的步骤包括：进行一溅射工序，以便在所述绝缘基板的表面上形成一非晶硅层，以及进行一退火工序，以使所述非晶硅层再结晶形成所述多晶硅层，其中，所述退火工序包括一准分子激光退火工序。
6）在本发明的第1）项-第5）项中任一项的一个优选实施方式中，在形成所述栅极电极之后，再进行一利用所述栅极电极作为MASK的离子注入工序，以便在所述源极区域以及漏极区域内的上述多晶硅之内分别形成一源极电极以及一漏极电极，在所述离子注入工序之后，再进行一活化工序，以活化所述源极电极以及漏极电极内的掺杂剂。
7）根据本发明的另一方面，还提供了一种低温多晶硅薄膜晶体管，其至少包括一栅极绝缘层，所述栅极绝缘层为复合绝缘层，该复合绝缘层包括至少三层介电层，其中，各层介电层的致密性按照制造过程中形成的顺序依次增大。
8）在本发明的第7）项的优选实施方式中，所述栅极绝缘层由一第一介电层、一第二介电层和一第三介电层组成，且第一介电层为SiO2，第二介电层为SiON，第三介电层为SiNx。
9）在本发明的第7）项或第8）项的一个优选实施方式中，所述第一介电层的膜厚均大于所述第二介电层和所述第三介电层的膜厚。
10）在本发明的第7）项-第9）项中任一项的一个优选实施方式中所述第一介电层SiO2膜厚的范围为1000～1500埃，所述第二介电层SiON膜厚的范围为100～1000埃，所述第三介电层SiNx膜厚的范围为100～500埃。
与现有技术相比，本发明的一个或多个实施例可以具有如下优点：
在本发明中，考虑了复合绝缘层中每一层的致密性关系，因此根据本发明的制造方法得到的低温多晶硅薄膜晶体管的复合绝缘层能够增强各层表面接触特性和薄膜连续性。进一步又考虑了复合绝缘层中每一层的厚度，因此得到的低温多晶硅薄膜晶体管能够有效地降低寄生电容，进而增强晶体管的响应速率。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1是现有技术中低温多晶硅薄膜晶体管的部分结构示例图;
图2是根据本发明一实施例的低温多晶硅薄膜晶体管的制造方法的流程示意图；
图3是根据本发明一实施例的一低温多晶硅薄膜晶体管的部分结构示例图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，以下结合附图对本发明作进一步地详细说明。
图2是根据本发明一实施例的低温多晶硅薄膜晶体管的制造方法的流程示意图，下面同时参考图2和图3来说明制造一LTPS TFT的方法的各个步骤。
步骤S210，提供一绝缘基板101，在该绝缘基板101的缓冲（buffer）层102上形成至少一多晶硅(LTPS)层，其中，该多晶硅层的表面包含有所属LTPS TFT的一源极区域103、一漏极区域104以及一通道区域111。
需要说明的是，上述绝缘基板101包括一玻璃基板或一石英基板，buffer层102是通过PECVD在绝缘基板101上形成的SiO2。
另外，上述形成LTPS层的步骤还包括下列工序：
首先，进行一溅射工序，以便在上述绝缘基板101的表面上形成一非晶硅层(a-Si)，然后进行一退火工序，以使上述a-Si层再结晶形成上述多晶硅。其中上述退火工序包括一准分子激光退火工序。
步骤S220，依次进行一第一PECVD工序、一第二PECVD工序和一第三PECVD工序，以在上述通道区域111上依序形成第一介电层105、第二介电层106和第三介电层107，上述这三层介电层构成一复合栅极绝缘(简称GI)层，其中，各层介电层的致密性按照制造过程中形成的顺序依次增大，即第一介电层105<第二介电层106<第三介电层107。
具体地，首先在多晶硅层的表面上通过第一PECVD工序沉淀第一介电层105，其次通过第二PECVD工序在该第一介电层105上沉淀第二介电层106，再次通过第三PECVD工序在该第二介电层106上沉淀第三介电层107。
需要说明的是，上述复合GI层的PECVD工序在单一晶片式反应器中连续进行。
并且优选地，上述复合GI层的第一介电层105为SiO2，第二介电层106为SiON，第三介电层107为SiNx。其中上述复合GI层中的第一介电层105和buffer层102的SiO2用于改善与LTPS的界面特性，上述复合GI层中的第三介电层107的SiNx用于阻挡水气以及金属离子，第二介电层106的SiON主要起到改善第一介电层105和第三介电层107界面接触连续性的作用(致密性：SiNx>SiON>SiO2)。
这样，由上述三层介电层组成的复合栅绝缘层在改善其自身与低温多晶硅之间的接触特性并防止水气和金属离子进入到低温多晶硅界面和内部的同时，还能够增强表面接触特性和薄膜连续性。
当然，容易理解，本实施例仅是一个示例，该复合绝缘层可以为其它多层，例如四层或五层，即本领域技术人员可以通过例如四次或五次的PECVD形成四层或五层的多层介电层。需要注意的是，该复合绝缘层的各个介电层的致密性关系为：按照制造过程中形成的顺序依次增大。
另外，第一介电层105的膜厚远大于第二介电层106和第三介电层107的膜厚，这样可以有效降低寄生电容。优选地，第一介电层SiO2膜厚约为1000～1500埃，第二介电层SiON膜厚约为100～1000埃，第三介电层SiNx膜厚约为100～500埃。
步骤S230，在该复合GI层之上形成一栅极电极(Gate)108。
需要说明的是，上述栅极电极的材料优选包括：钨、铬、铝、钼和铜。
步骤S240，进行一利用上述栅极电极108作为MASK的离子注入工序，通过过孔110以在上述源极区域103以及漏极区域104内的上述多晶硅之内分别形成一源极电极以及一漏极电极。
步骤S250，进行一活化工序，以活化上述源极电极以及漏极电极内的掺杂剂。
最后，再进行一PECVD工序，形成一钝化层，该钝化层可以为SiO或SiNx。
那么，根据上述的制造流程最终会形成如图3所示的低温多晶硅薄膜晶体管的结构。
综上所述，由于本发明考虑了复合绝缘层中每一层的致密性关系，因此根据本发明的制造方法所制出的低温多晶硅薄膜晶体管能够增强各层表面接触特性和薄膜连续性。进一步又考虑了复合绝缘层中每一层的厚度，因此还能够有效地降低寄生电容，进而增强晶体管的响应速率。即通过改善GI成膜质量，提高了低温多晶硅薄膜晶体管的电气特性以及可靠度。
以上所述，仅为本发明较佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉该技术的人员在本发明所揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以权利要求的保护范围为准。

Claims (10)

1.一种低温多晶硅薄膜晶体管的制造方法，其特征在于，包括：
提供一绝缘基板；
在所述绝缘基板的缓冲层上形成至少一多晶硅层，该多晶硅层的表面包含有所属低温多晶硅薄膜晶体管的一源极区域、一漏极区域以及一通道区域；
依次进行至少三次PECVD工序以在所述通道区域上依序形成至少三层介电层，进而构成一复合栅极绝缘层，其中，各层介电层的致密性按照制造过程中形成的顺序依次增大；以及
在该复合栅极绝缘层之上形成一栅极电极。
2.根据权利要求1所述的制造方法，其特征在于，
所述复合栅极绝缘层由一第一介电层、一第二介电层和一第三介电层组成，且第一介电层为SiO2，第二介电层为SiON，第三介电层为SiNx。
3.根据权利要求2所述的制造方法，其特征在于，
所述第一介电层的膜厚均大于所述第二介电层和所述第三介电层的膜厚。
4.根据权利要求3所述的制造方法，其特征在于，
所述第一介电层SiO2膜厚的范围为1000～1500埃，所述第二介电层SiON膜厚的范围为100～1000埃，所述第三介电层SiNx膜厚的范围为100～500埃。
5.根据权利要求1所述的制造方法，其特征在于，形成所述多晶硅层的步骤包括：
进行一溅射工序，以便在所述绝缘基板的表面上形成一非晶硅层，以及
进行一退火工序，以使所述非晶硅层再结晶形成所述多晶硅层，其中，所述退火工序包括一准分子激光退火工序。
6.根据权利要求1所述的制造方法，其特征在于，
在形成所述栅极电极之后，再进行一利用所述栅极电极作为MASK的离子注入工序，以便在所述源极区域以及漏极区域内的上述多晶硅之内分别形成一源极电极以及一漏极电极，在所述离子注入工序之后，再进行一活化工序，以活化所述源极电极以及漏极电极内的掺杂剂。
7.一种低温多晶硅薄膜晶体管，其特征在于，
至少包括一栅极绝缘层，
所述栅极绝缘层为复合绝缘层，该复合绝缘层包括至少三层介电层，其中，各层介电层的致密性按照制造过程中形成的顺序依次增大。
8.根据权利要求7所述的低温多晶硅薄膜晶体管，其特征在于，
所述栅极绝缘层由一第一介电层、一第二介电层和一第三介电层组成，且第一介电层为SiO2，第二介电层为SiON，第三介电层为SiNx。
9.根据权利要求8所述的低温多晶硅薄膜晶体管，其特征在于，
所述第一介电层的膜厚均大于所述第二介电层和所述第三介电层的膜厚。
10.根据权利要求9所述的低温多晶硅薄膜晶体管，其特征在于，
所述第一介电层SiO2膜厚的范围为1000～1500埃，所述第二介电层SiON膜厚的范围为100～1000埃，所述第三介电层SiNx膜厚的范围为100～500埃。
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