CN104766802A - 液晶显示面板、阵列基板及其薄膜晶体管的制造方法 - Google Patents

液晶显示面板、阵列基板及其薄膜晶体管的制造方法 Download PDF

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CN104766802A
CN104766802A CN201510136465.4A CN201510136465A CN104766802A CN 104766802 A CN104766802 A CN 104766802A CN 201510136465 A CN201510136465 A CN 201510136465A CN 104766802 A CN104766802 A CN 104766802A
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film transistor
electrode
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CN104766802B (zh
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高冬子
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2015/075765 priority patent/WO2016149958A1/zh
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Abstract

本发明提供一种液晶显示面板、阵列基板及其薄膜晶体管的制造方法。所述制造方法包括：提供基体；在基体上形成第一金属层，第一金属层包括依次层叠的铝金属层、氧化铝层及钼金属层；对第一金属层进行图案化以形成栅电极；在栅电极上依序形成栅绝缘层、半导体层及欧姆接触层；在欧姆接触层上形成第二金属层；对第二金属层进行图案化以形成源电极和漏电极。本发明能够抑制铝金属层在高温环境下发生变形产生的凸起，避免薄膜晶体管的栅电极与源电极、漏电极之间发生短路，确保液晶显示面板的画面显示质量。

Description

液晶显示面板、阵列基板及其薄膜晶体管的制造方法
技术领域
本发明涉及液晶显示技术领域，具体而言，涉及一种液晶显示面板、阵列基板及两者的薄膜晶体管的制造方法。
背景技术
薄膜晶体管(Thin Film Transistor，TFT)与像素电极连接，且其栅电极与液晶显示面板的栅极线(gate lines)连接以在接收到栅极驱动信号时开启，其源电极与液晶显示面板的数据线(gate lines)连接以将接收到的灰阶电压传递至像素电极进行画面显示。当前，业界普遍采用铝金属Al和钼金属Mo制造薄膜晶体管，一般为铝金属层的上方设置钼金属层，并且为降低薄膜晶体管的电阻，设计铝金属层的厚度较大，然而由于铝的熔点较低(660℃)，制程中所需的高温环境使得铝原子之间相互挤压，铝金属层极易因挤压变形而产生凸起(hillock)，所产生的凸起在严重时可以导致薄膜晶体管的栅电极、源电极以及漏电极之间发生短路，从而影响液晶显示面板的画面显示质量。
发明内容
鉴于此，本发明实施例提供一种液晶显示面板、阵列基板及其薄膜晶体管的制造方法，能够抑制铝金属层在高温环境下发生变形产生的凸起，确保液晶显示面板的画面显示质量。
本发明采用的一个技术方案是提供一种薄膜晶体管的制造方法。所述制造方法包括：提供一基体；在基体上形成第一金属层，第一金属层包括依次层叠的铝金属层、氧化铝层及钼金属层；对第一金属层进行图案化以形成薄膜晶体管的栅电极；在栅电极上依序形成栅绝缘层、半导体层及欧姆接触层；在欧姆接触层上形成第二金属层；对第二金属层进行图案化以形成薄膜晶体管的源电极和漏电极。
其中，在欧姆接触层上形成第一金属层的步骤包括：采用等离子体轰击铝靶材，以将铝溅射于基体上；通入氧气，使得铝在溅射时发生氧化反应形成氧化铝层；在氧化铝层上形成钼金属层。
其中，第二金属层包括依次层叠的铝金属层、氧化铝层及钼金属层。
其中，所述制造方法还包括：在源电极和漏电极上形成钝化层；在钝化层上形成接触孔以暴露源电极或漏电极；在钝化层上形成像素电极，且像素电极通过接触孔与源电极和漏电极中的一个电连接。
其中，通过干法刻蚀的方式形成接触孔。
其中，基体包括衬底板材以及形成于衬底板材上的氧化层。
本发明采用的另一个技术方案是提供一种阵列基板。所述阵列基板包括基体以及形成于基体上的薄膜晶体管阵列及像素电极，薄膜晶体管的栅电极包括依次层叠的铝金属层、氧化铝层及钼金属层，像素电极通过接触孔与薄膜晶体管的源电极和漏电极中的一个电连接。
其中，薄膜晶体管的源电极和漏电极也包括依次层叠的铝金属层、氧化铝层以及钼金属层。
其中，所述薄膜晶体管还包括形成于栅电极上的栅绝缘层、形成于栅绝缘层上的半导体层、形成于半导体层上的欧姆接触层，源电极和漏电极形成于欧姆接触层上。
本发明采用的又一个技术方案是提供一种液晶显示面板。其阵列基板包括基体以及形成于基体上的薄膜晶体管阵列及像素电极，薄膜晶体管的栅电极包括依次层叠的铝金属层、氧化铝层及钼金属层，像素电极通过接触孔与薄膜晶体管的源电极和漏电极中的一个电连接。
本发明实施例的液晶显示面板、阵列基板及其薄膜晶体管的制造方法，通过在制造栅电极的铝金属层和钼金属层中增加氧化铝层，由于氧化铝的熔点和硬度均远高于铝，因此可抑制铝金属层在高温环境下发生变形产生的凸起，从而避免薄膜晶体管的栅电极与源电极、漏电极之间发生短路，进而确保画面显示质量。
附图说明
图1是本发明的薄膜晶体管的制造方法一实施例的流程图；
图2是形成薄膜晶体管的栅电极一实施例的示意图；
图3是形成薄膜晶体管的源电极和漏电极一实施例的示意图；
图4是本发明的薄膜晶体管的制造方法另一实施例的流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，本发明以下所描述的实施例仅仅是本发明的一部分实施例，而不是本发明全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本发明所保护的范围。
图1是本发明的薄膜晶体管的制造方法一实施例的流程图。如图1所示，所述薄膜晶体管的制造方法包括以下：
步骤S11：提供一基体。
如图2所示，基体11对应用于形成液晶显示面板的阵列基板，所述基体11可为玻璃基体、塑料基体或可挠式基体。
当然，基体11还可以包括衬底板材及形成于衬底板材上的氧化层。所述氧化层包括氮化硅(SiNx)层、氧化硅(SiOx)层以及两者组合，所述氧化层用于防止衬底板材内的杂质在后续工艺中向上扩散而影响之后形成的低温多晶硅薄膜的品质，氮化硅层和氧化硅层可以采用化学气相沉积(Chemical vapor deposition，CVD)、等离子化学气相沉积(Plasma Enhanced Chemical vapor deposition，PECVD)形成，还可以采用溅射、真空蒸镀或低压化学气相沉积等方法，但不限于此。
步骤S12：在基体上形成第一金属层，所述第一金属层包括依次层叠的铝金属层、氧化铝层以及钼金属层。
结合图2所示，在基体11上形成第一金属层12的方式可以为：首先采用等离子体轰击铝靶材，以将铝溅射于基体11(或者上述氧化层)之上形成铝金属层121；然后，在铝溅射将要完成时，通入适量氧气，使得铝在溅射到基板上的同时与氧气发生氧化反应，从而在铝金属层121的表面形成氧化铝层122；最后，在氧化铝层122的表面形成钼金属层123。其中，本发明实施例可以采用磁控溅射工艺在基体11(或者上述氧化层)之上形成铝金属层121及钼金属层123。
步骤S13：对第一金属层进行图案化以形成薄膜晶体管的栅电极。
具体可通过对第一金属层12进行刻蚀来形成液晶显示面板的多个栅电极124，其中可利用包含有磷酸、硝酸、醋酸以及去离子水的蚀刻液对第一金属层12进行蚀刻，当然也可以采用干法蚀刻。
步骤S14：在栅电极上依序形成栅绝缘层、半导体层及欧姆接触层。
步骤S15：在欧姆接触层上形成第二金属层。
步骤S16：对第二金属层进行图案化以形成源电极和漏电极。
在图2所示的栅电极124上形成如图3所示的栅绝缘层125、半导体层126、欧姆接触层127、源电极128和漏电极129。
步骤S16可采用与对第一金属层12相同或不同的图案化工艺。
本实施例的薄膜晶体管的制造方法，通过在制造栅电极124的铝金属层121和钼金属层123中增加一氧化铝层122，由于氧化铝的熔点和硬度均远高于铝，因此可抑制铝金属层121在高温环境下发生变形产生的凸起，从而避免薄膜晶体管的栅电极124、源电极128以及漏电极129之间发生短路，进而确保画面显示质量。
后续，结合图3所示的实施例，薄膜晶体管的制造方法还可以包括以下步骤：
在源电极128和漏电极129上形成钝化层130。
在钝化层130上形成接触孔131以暴露漏电极129，其中，优选通过干法刻蚀的方式形成接触孔131。
在钝化层130上形成像素电极132，且像素电极132通过接触孔131与漏电极129电连接。另外，薄膜晶体管阵列的栅电极124与形成于基体11(阵列基板)上的栅极线对应电连接，薄膜晶体管阵列的源电极128与形成于阵列基板上的数据线对应电连接，栅极线和数据线垂直交叉形成像素电极132所在的像素显示区域。
在其他实施例中，也可以在钝化层130上形成接触孔131以暴露源电极128，使像素电极132通过接触孔131与源电极128电连接，此时，漏电极129与形成于阵列基板上的数据线对应电连接。
图4是本发明的薄膜晶体管的制造方法另一实施例的流程图。在上述实施例的描述基础上但与之不同的是，本实施例采用与栅电极124相同的材料制造所述薄膜晶体管的源电极128和漏电极129，即用于制造源电极128和漏电极129的第二金属层也包括依次层叠的所述铝金属层121、所述氧化铝层122及所述钼金属层123。
如图4所示，本实施例的所述薄膜晶体管的制造方法包括以下：
步骤S41：提供一基体。
步骤S42：在基体上形成第一金属层，所述第一金属层包括依次层叠的铝金属层、氧化铝层以及钼金属层。
步骤S43：对第一金属层进行图案化以形成薄膜晶体管的栅电极。
步骤S44：在栅电极上依序形成栅绝缘层、半导体层及欧姆接触层。
步骤S45：在欧姆接触层上形成第二金属层，所述第二金属层也包括依次层叠的铝金属层、氧化铝层以及钼金属层。
步骤S46：对第二金属层进行图案化以形成源电极和漏电极。
本发明实施例进一步提供一种包含采用上述制造方法得到的薄膜晶体管的阵列基板以及液晶显示面板，因此具有与其相同的有益效果。
综上所述，本发明实施例的液晶显示面板、阵列基板及其薄膜晶体管的制造方法，通过在制造栅电极的铝金属层和钼金属层中增加氧化铝层，由于氧化铝的熔点和硬度均远高于铝，因此可抑制铝金属层在高温环境下发生变形产生的凸起，从而避免薄膜晶体管的栅电极、源电极以及漏电极之间发生短路，进而确保画面显示质量。
基于此，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

1.一种薄膜晶体管的制造方法，其特征在于，所述方法包括：
提供一基体；
在所述基体上形成第一金属层，其中所述第一金属层包括依次层叠的铝金属层、氧化铝层及钼金属层；
对所述第一金属层进行图案化以形成所述薄膜晶体管的栅电极；
在所述栅电极上依序形成栅绝缘层、半导体层及欧姆接触层；
在所述欧姆接触层上形成第二金属层；
对所述第二金属层进行图案化以形成所述薄膜晶体管的源电极和漏电极。
2.根据权利要求1所述的方法，其特征在于，所述在所述欧姆接触层上形成第一金属层的步骤包括：
采用等离子体轰击铝靶材，以将铝溅射于所述基体上；
通入氧气，使得所述铝在溅射时发生氧化反应形成氧化铝层；
在所述氧化铝层上形成所述钼金属层。
3.根据权利要求1或2所述的方法，其特征在于，所述第二金属层也包括依次层叠的所述铝金属层、所述氧化铝层及所述钼金属层。
4.根据权利要求1所述的方法，其特征在于，所述方法还包括：
在由所述源电极和所述漏电极组成的源漏电极层上形成钝化层；
在所述钝化层上形成接触孔以暴露所述源电极或所述漏电极；
在所述钝化层上形成像素电极，且所述像素电极通过所述接触孔与所述源电极和所述漏电极中的一个电连接。
5.根据权利要求4所述的方法，其特征在于，通过干法刻蚀的方式形成所述接触孔。
6.根据权利要求1所述的方法，其特征在于，所述基体包括衬底板材以及形成于所述衬底板材上的氧化层。
7.一种阵列基板，包括基体以及形成于所述基体上的薄膜晶体管阵列及像素电极，其特征在于，所述薄膜晶体管的栅电极包括依次层叠的铝金属层、氧化铝层及钼金属层，所述像素电极通过接触孔与所述薄膜晶体管的源电极和漏电极中的一个电连接。
8.根据权利要求7所述的阵列基板，其特征在于，所述源电极和所述漏电极包括依次层叠的所述铝金属层、所述氧化铝层、所述钼金属层。
9.根据权利要求7所述的阵列基板，其特征在于，所述薄膜晶体管还包括形成于所述栅电极上的栅绝缘层、形成于所述栅绝缘层上的半导体层、形成于所述半导体层上的欧姆接触层，所述源电极和所述漏电极形成于所述欧姆接触层上。
10.一种液晶显示面板，其特征在于，所述液晶显示面板包括权利要求7-9任意一项所述的阵列基板。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109786232A (zh) * 2018-12-20 2019-05-21 深圳市华星光电技术有限公司 栅极与薄膜晶体管的制造方法
CN109979946A (zh) * 2019-03-15 2019-07-05 惠科股份有限公司 一种阵列基板及其制造方法和显示面板
WO2020238640A1 (zh) * 2019-05-31 2020-12-03 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104766802B (zh) * 2015-03-26 2019-05-03 深圳市华星光电技术有限公司 液晶显示面板、阵列基板及其薄膜晶体管的制造方法
CN111584503A (zh) * 2020-05-11 2020-08-25 Tcl华星光电技术有限公司 阵列基板及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010017848A (ko) * 1999-08-16 2001-03-05 박종섭 액정 표시 장치 및 그 제조방법
JP2001284600A (ja) * 2000-04-04 2001-10-12 Matsushita Electric Ind Co Ltd 薄膜トランジスタ及びその製造方法
CN102023435A (zh) * 2009-09-23 2011-04-20 北京京东方光电科技有限公司 液晶显示器及其制造方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4790920A (en) * 1985-12-20 1988-12-13 Intel Corporation Method for depositing an al2 O3 cap layer on an integrated circuit substrate
JP2875363B2 (ja) * 1990-08-08 1999-03-31 株式会社日立製作所 液晶表示装置
US6238808B1 (en) * 1998-01-23 2001-05-29 Canon Kabushiki Kaisha Substrate with zinc oxide layer, method for producing zinc oxide layer, photovoltaic device, and method for producing photovoltaic device
JP3916334B2 (ja) * 1999-01-13 2007-05-16 シャープ株式会社 薄膜トランジスタ
US7075121B2 (en) * 2000-12-20 2006-07-11 Yamaha Corporation Magnetic tunneling junction element having thin composite oxide film
US20050260804A1 (en) * 2004-05-24 2005-11-24 Tae-Wook Kang Semiconductor device and method of fabricating the same
JP2009200315A (ja) * 2008-02-22 2009-09-03 Hitachi Ltd 半導体装置の製造方法
JP2011032268A (ja) * 2009-07-10 2011-02-17 Sumitomo Chemical Co Ltd 置換ベンゾカルコゲノアセン化合物、該化合物を含有する薄膜及び該薄膜を含有する有機半導体デバイス
KR101716471B1 (ko) * 2010-06-07 2017-03-28 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
JP5668917B2 (ja) * 2010-11-05 2015-02-12 ソニー株式会社 薄膜トランジスタおよびその製造方法
JPWO2012090462A1 (ja) * 2010-12-28 2014-06-05 出光興産株式会社 有機半導体材料、当該材料を含んでなる塗布液、及び有機薄膜トランジスタ
JP5728990B2 (ja) * 2011-02-10 2015-06-03 住友化学株式会社 ジカルコゲノベンゾジピロール化合物、該化合物の製造方法、該化合物を含む薄膜及び該薄膜を含む有機半導体デバイス
US20130187116A1 (en) * 2012-01-19 2013-07-25 Globalfoundries Singapore Pte Ltd RRAM Device With Free-Forming Conductive Filament(s), and Methods of Making Same
JP5338939B2 (ja) * 2012-04-06 2013-11-13 Ｄｉｃ株式会社 フタロシアニンナノサイズ構造物、及び該ナノサイズ構造物を用いた電子素子
KR101919423B1 (ko) * 2012-08-01 2018-11-19 삼성전자주식회사 그래핀 반도체 및 이를 포함하는 전기소자
WO2014080933A1 (ja) * 2012-11-21 2014-05-30 株式会社コベルコ科研 表示装置または入力装置に用いられる電極、および電極形成用スパッタリングターゲット
BR112015013928A2 (pt) * 2012-12-13 2017-07-11 California Inst Of Techn fabricação de eletrodos tridimensionais com área de superfície elevada
KR102136790B1 (ko) * 2013-11-15 2020-07-23 삼성디스플레이 주식회사 플렉서블 디스플레이 장치와, 이의 제조 방법
KR102247048B1 (ko) * 2013-12-04 2021-05-03 삼성디스플레이 주식회사 표시 기판 및 이의 제조 방법
US20150311067A1 (en) * 2014-04-24 2015-10-29 Applied Materials, Inc. Millisecond annealing in ammonia ambient for precise placement of nitrogen in thin film stacks
CN104037233B (zh) * 2014-06-10 2018-01-09 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、oled背板和显示装置
US9293523B2 (en) * 2014-06-24 2016-03-22 Applied Materials, Inc. Method of forming III-V channel
KR102223139B1 (ko) * 2014-09-02 2021-03-05 삼성디스플레이 주식회사 박막 트랜지스터 기판 및 이를 포함하는 표시 패널
CN104766802B (zh) * 2015-03-26 2019-05-03 深圳市华星光电技术有限公司 液晶显示面板、阵列基板及其薄膜晶体管的制造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010017848A (ko) * 1999-08-16 2001-03-05 박종섭 액정 표시 장치 및 그 제조방법
JP2001284600A (ja) * 2000-04-04 2001-10-12 Matsushita Electric Ind Co Ltd 薄膜トランジスタ及びその製造方法
CN102023435A (zh) * 2009-09-23 2011-04-20 北京京东方光电科技有限公司 液晶显示器及其制造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109786232A (zh) * 2018-12-20 2019-05-21 深圳市华星光电技术有限公司 栅极与薄膜晶体管的制造方法
CN109979946A (zh) * 2019-03-15 2019-07-05 惠科股份有限公司 一种阵列基板及其制造方法和显示面板
CN109979946B (zh) * 2019-03-15 2021-06-11 惠科股份有限公司 一种阵列基板及其制造方法和显示面板
WO2020238640A1 (zh) * 2019-05-31 2020-12-03 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置
US11961848B2 (en) 2019-05-31 2024-04-16 Hefei Xinsheng Optoelectronics Technology Co., Ltd. Display substrate and manufacturing method therefor, and display device

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